JP6451898B2 - Elastic wave device and elastic wave device - Google Patents

Elastic wave device and elastic wave device Download PDF

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JP6451898B2
JP6451898B2 JP2018512020A JP2018512020A JP6451898B2 JP 6451898 B2 JP6451898 B2 JP 6451898B2 JP 2018512020 A JP2018512020 A JP 2018512020A JP 2018512020 A JP2018512020 A JP 2018512020A JP 6451898 B2 JP6451898 B2 JP 6451898B2
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上坂　健一
健一 上坂
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Murata Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
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    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/058—Holders; Supports for surface acoustic wave devices
    • H03H9/059—Holders; Supports for surface acoustic wave devices consisting of mounting pads or bumps
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    • H03—ELECTRONIC CIRCUITRY
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    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
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    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1071—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the SAW device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1085—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a non-uniform sealing mass covering the non-active sides of the BAW device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/25—Constructional features of resonators using surface acoustic waves
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/20—Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Description

本発明は、弾性波素子および弾性波装置に関する。   The present invention relates to an acoustic wave element and an acoustic wave device.

電子デバイスを小型化および低背化するための実装手段として、フリップチップ実装が挙げられる。例えば、特許文献１には、基板、基板上に設けられた振動部、振動部と接続され基板上に設けられたパッド、振動部の周囲に立設された支持層、振動部を覆うカバー層、パッドに接合されたビア導体、およびビア導体に接続されたバンプを備えた、いわゆるＷＬＰ（Ｗａｆｅｒ Ｌｅｖｅｌ Ｐａｃｋａｇｅ）構造を有する弾性波デバイスが開示されている。この構成によれば、上記弾性波デバイスを実装基板上に樹脂モールドにより実装する際に、振動部が配置された中空空間への樹脂およびフラックスの流入を抑制し、当該中空空間の液密性が高い弾性波デバイスを提供することが可能となる。   As a mounting means for reducing the size and height of an electronic device, flip chip mounting can be mentioned. For example, Patent Document 1 discloses a substrate, a vibration unit provided on the substrate, a pad connected to the vibration unit and provided on the substrate, a support layer standing around the vibration unit, and a cover layer covering the vibration unit An acoustic wave device having a so-called WLP (Wafer Level Package) structure including a via conductor bonded to a pad and a bump connected to the via conductor is disclosed. According to this configuration, when the acoustic wave device is mounted on the mounting substrate by a resin mold, the resin and the flux are prevented from flowing into the hollow space where the vibration part is disposed, and the liquid tightness of the hollow space is reduced. A high acoustic wave device can be provided.

国際公開第２００９／１０４４３８号International Publication No. 2009/104438

特許文献１に開示されたような、バンプを介して実装基板に実装される弾性波デバイスの場合、実装基板への実装時および使用時における温度変化に起因するバンプ接合部応力の発生を均等化すべく、バンプの配置レイアウトは、基板を平面視した場合に、通常対称レイアウトが採用される。これにより、弾性波デバイスの機械的な信頼性を向上させることができる。   In the case of an acoustic wave device that is mounted on a mounting board via bumps as disclosed in Patent Document 1, the generation of bump joint stress due to temperature changes during mounting on the mounting board and during use is equalized. Therefore, the bump layout is usually a symmetrical layout when the substrate is viewed in plan. Thereby, the mechanical reliability of an elastic wave device can be improved.

しかしながら、弾性波装置の小型化の要請に対応すべく、バンプ配置レイアウトの対称性を確保しつつバンプのピッチを小さくしていくと、弾性波デバイスと実装基板との間への樹脂の充填性が悪化し、弾性波デバイスの気密性、耐熱性、耐水耐湿性、および絶縁性などの信頼性が低下する。   However, if the pitch of the bumps is reduced while ensuring the symmetry of the bump arrangement layout in order to meet the demand for downsizing of the acoustic wave device, the resin filling property between the acoustic wave device and the mounting substrate can be reduced. This deteriorates the reliability of the acoustic wave device, such as airtightness, heat resistance, water and moisture resistance, and insulation.

そこで、本発明は、弾性波素子を樹脂モールドにより実装基板へ実装する際の樹脂の充填性の向上、および、バンプ接合部の機械的信頼性の向上を両立させた弾性波素子および弾性波装置を提供することを目的とする。   Accordingly, the present invention provides an acoustic wave element and an acoustic wave device that achieve both improvement in resin filling properties when mounting an acoustic wave element on a mounting substrate using a resin mold, and improvement in mechanical reliability of a bump joint. The purpose is to provide.

上記目的を達成するために、本発明の一態様に係る弾性波素子は、互いに背向する第１主面および第２主面を有する基板と、前記基板に形成され、弾性波を励振する弾性波励振部と、前記第１主面上に形成され、前記弾性波励振部と接続された電極パッドと、互いに背向する第１端面および第２端面を有し、前記第１端面が前記電極パッドに接合された中間電極と、前記中間電極の前記第２端面に接合されたバンプと、を備え、前記第１主面上には、前記電極パッド、前記中間電極および前記バンプがこの順で接合された接合端子が３以上配置されており、前記第１主面を平面視した場合、一の前記接合端子とその周囲に配置された複数の接合端子との距離のうち最小の距離を、前記一の接合端子のバンプ間距離と定義し、前記接合端子ごとに定義された前記バンプ間距離のうち、最小の前記バンプ間距離より大きくかつ最大の前記バンプ間距離を有する第１接合端子、および、当該第１接合端子と前記最大のバンプ間距離を隔てて配置された第２接合端子の少なくとも一方の前記第２端面の面積は、その他の接合端子の前記第２端面の面積よりも大きい。   In order to achieve the above object, an elastic wave device according to an aspect of the present invention includes a substrate having a first main surface and a second main surface facing away from each other, and an elasticity formed on the substrate to excite an elastic wave. A wave excitation unit; an electrode pad formed on the first main surface and connected to the elastic wave excitation unit; and a first end surface and a second end surface facing away from each other, the first end surface being the electrode An intermediate electrode bonded to a pad; and a bump bonded to the second end surface of the intermediate electrode. The electrode pad, the intermediate electrode, and the bump are arranged in this order on the first main surface. Three or more bonded joint terminals are arranged, and when the first main surface is viewed in plan, the minimum distance among the distances between the one joint terminal and the plurality of joint terminals arranged around the joint terminal, Defined as the distance between bumps of the one junction terminal, for each junction terminal A first joint terminal having a maximum inter-bump distance greater than the minimum inter-bump distance among the defined inter-bump distances, and the first joint terminal and the maximum inter-bump distance are separated from each other The area of the second end face of at least one of the formed second joint terminals is larger than the area of the second end face of the other joint terminals.

上記構成を有する弾性波素子が実装基板にフリップチップ実装された場合、接合端子の配置が対称なレイアウトから接合端子数を減らし接合端子間距離を広げることで、実装基板と弾性波素子との間への樹脂の充填性が改善される。しかしながら、接合端子数を減らし非対称な接合端子配置とすることで、各接合端子にかかる応力が不均一となり、第１接合端子および第２接合端子の第２端面付近にクラックが発生する恐れがある。   When the acoustic wave device having the above configuration is flip-chip mounted on the mounting substrate, the number of the joining terminals is reduced and the distance between the joining terminals is increased from the layout in which the arrangement of the joining terminals is symmetric. The resin filling property is improved. However, by reducing the number of junction terminals and providing an asymmetric junction terminal arrangement, the stress applied to each junction terminal becomes non-uniform, and cracks may occur near the second end surfaces of the first junction terminal and the second junction terminal. .

これに対して、上記構成によれば、第１接合端子と第２接合端子との間のバンプ間距離が他のバンプ間距離よりも大きいので、樹脂の充填性を向上させることができる。さらに、第１接合端子および第２接合端子の少なくとも一方の第２端面の面積がその他の接合端子の第２端面の面積よりも大きい。これにより、上記少なくとも一方の接合端子の応力が低減されるので、各接合端子の応力の不均一を低減でき、接合端子の第２端面付近でのクラックの発生を抑制できる。つまり、樹脂モールド時の樹脂充填性の向上と、接合端子の機械的信頼性の向上とを両立させることが可能となる。   On the other hand, according to the said structure, since the distance between bumps between a 1st junction terminal and a 2nd junction terminal is larger than the distance between other bumps, the filling property of resin can be improved. Furthermore, the area of the second end face of at least one of the first joining terminal and the second joining terminal is larger than the area of the second end face of the other joining terminals. Thereby, since the stress of the said at least one joining terminal is reduced, the nonuniformity of the stress of each joining terminal can be reduced, and generation | occurrence | production of the crack in the 2nd end surface vicinity of a joining terminal can be suppressed. That is, it is possible to achieve both improvement in resin filling property during resin molding and improvement in mechanical reliability of the joining terminal.

また、前記第２接合端子の次に前記第１接合端子に近い第３接合端子の前記第２端面の面積は、前記その他の接合端子の前記第２端面の面積よりも大きくてもよい。   In addition, the area of the second end face of the third joint terminal next to the first joint terminal next to the second joint terminal may be larger than the area of the second end face of the other joint terminals.

これにより、第１接合端子または第２接合端子において、第１接合端子と第２接合端子とを結ぶ方向にかかる応力だけでなく、当該方向と異なる方向にかかる応力も低減できるので、第１接合端子および第２接合端子の第２端面付近でのクラックの発生を、より抑制できる。   Accordingly, in the first joint terminal or the second joint terminal, not only the stress applied in the direction connecting the first joint terminal and the second joint terminal but also stress applied in a direction different from the direction can be reduced. Generation of cracks in the vicinity of the second end face of the terminal and the second joint terminal can be further suppressed.

また、前記第１接合端子および前記第２接合端子のうち、いずれか一方のみの前記第２端面の面積は、前記その他の接合端子の前記第２端面の面積よりも大きくてもよい。   Moreover, the area of the second end face of only one of the first joint terminal and the second joint terminal may be larger than the area of the second end face of the other joint terminals.

接合端子の第２端面の面積を大きくすると、接合端子間の間隔が小さくなり、接合端子間に配置される弾性波励振部の面積が制約を受けることとなる。この観点から、第１接合端子および第２接合端子のいずれか一方のみの第２端面の面積を大きくすることにより、第１接合端子および第２接合端子の双方の第２端面の面積を大きくする場合と比較して、樹脂モールド時の樹脂充填性の向上および接合端子のクラックの抑制を両立させつつ、基板に形成された弾性波励振部のレイアウトの制約を緩和できる。   When the area of the second end face of the junction terminal is increased, the interval between the junction terminals is reduced, and the area of the elastic wave excitation unit disposed between the junction terminals is restricted. From this point of view, by increasing the area of the second end face of only one of the first joint terminal and the second joint terminal, the areas of the second end faces of both the first joint terminal and the second joint terminal are increased. Compared to the case, it is possible to relieve the restrictions on the layout of the elastic wave excitation portion formed on the substrate while simultaneously improving the resin filling property at the time of resin molding and suppressing the crack of the joining terminal.

また、前記基板は、前記第１主面を平面視した場合に矩形形状を有し、前記第１接合端子および前記第２接合端子のうち、前記基板の四隅に近い方の接合端子の前記第２端面の面積は、前記その他の接合端子の前記第２端面の面積よりも大きくてもよい。   Further, the substrate has a rectangular shape when the first main surface is viewed in plan, and the first of the junction terminals closer to the four corners of the substrate among the first junction terminals and the second junction terminals. The area of the two end faces may be larger than the area of the second end face of the other joining terminal.

接合端子数を減らし非対称な接合端子配置とした場合、第１接合端子および第２接合端子のうち、基板の四隅に近い接合端子に大きな応力がかかる傾向があり、当該接合端子の第２端面付近にクラックが発生する恐れがある。この観点から、第１接合端子および第２接合端子のうち、基板の四隅に近い方の接合端子の第２端面の面積を大きくすることにより、樹脂モールド時の樹脂充填性の向上および接合端子のクラックの抑制を両立させつつ、基板に形成された弾性波励振部および配線のレイアウトの制約を緩和できる。   When the number of the junction terminals is reduced and the asymmetric junction terminal arrangement is adopted, a large stress tends to be applied to the junction terminals near the four corners of the substrate, and the vicinity of the second end surface of the junction terminals. There is a risk of cracking. From this point of view, by increasing the area of the second end face of the joint terminal closer to the four corners of the substrate among the first joint terminal and the second joint terminal, the resin filling property at the time of resin molding and the joint terminal can be improved. The constraints on the layout of the elastic wave excitation unit and the wiring formed on the substrate can be relaxed while simultaneously suppressing cracks.

また、前記第１接合端子および前記第２接合端子の少なくとも一方は、複数配置されていてもよい。   A plurality of at least one of the first joint terminal and the second joint terminal may be arranged.

これにより、上記少なくとも一方の接合端子の応力が低減されるので、各接合端子の応力の不均一を低減でき、接合端子の第２端面付近でのクラックの発生を抑制できる。   Thereby, since the stress of the said at least one joining terminal is reduced, the nonuniformity of the stress of each joining terminal can be reduced, and generation | occurrence | production of the crack in the 2nd end surface vicinity of a joining terminal can be suppressed.

また、本発明の一態様に係る弾性波装置は、上記記載の弾性波素子と、前記バンプが接合され、前記弾性波素子と対向配置された実装基板と、前記実装基板に接し、前記弾性波素子を覆うように配置された樹脂部材と、を備えた弾性波装置であって、前記基板は圧電基板であり、前記弾性波励振部は、前記第１主面上に設けられたＩＤＴ電極であり、前記弾性波素子は、さらに、前記第１主面上の前記ＩＤＴ電極が設けられた領域の周囲に立設され、前記ＩＤＴ電極より前記第１主面からの高さが高い支持層と、前記第１主面とで前記支持層を挟んで配置され、前記ＩＤＴ電極を覆うカバー層と、を備え、前記中間電極は、前記支持層に接し前記カバー層を貫通するように配置され、前記基板、前記支持層および前記カバー層によって、前記ＩＤＴ電極を含む内部空間が形成され、前記樹脂部材は、前記内部空間には形成されず、前記カバー層と前記実装基板との間であって複数の前記バンプの間に形成されている。   An elastic wave device according to an aspect of the present invention includes the above-described elastic wave element, a mounting substrate in which the bump is bonded and disposed opposite to the elastic wave element, and in contact with the mounting substrate. An elastic wave device including a resin member arranged to cover the element, wherein the substrate is a piezoelectric substrate, and the elastic wave excitation unit is an IDT electrode provided on the first main surface. And the acoustic wave element is further provided on a periphery of a region where the IDT electrode is provided on the first main surface, and a support layer having a height higher than the IDT electrode from the first main surface. A cover layer disposed between the first main surface and the support layer and covering the IDT electrode, and the intermediate electrode is disposed so as to contact the support layer and penetrate the cover layer, By the substrate, the support layer and the cover layer, The internal space containing the DT electrodes are formed, the resin member, the not formed in the interior space, a between the mounting substrate and the cover layer are formed between a plurality of said bumps.

これにより、ＷＬＰ（Ｗａｆｅｒ Ｌｅｖｅｌ Ｐａｃｋａｇｅ）型の弾性表面波素子が、実装基板上に樹脂モールドされた構成を有する弾性波装置において、弾性波素子の第１接合端子と第２接合端子との間のバンプ間距離が他のバンプ間距離よりも大きいので、バンプ間への樹脂の充填性を向上させることができる。さらに、第１接合端子および第２接合端子の少なくとも一方の第２端面の面積がその他の接合端子の第２端面の面積よりも大きい。これにより、上記少なくとも一方の接合端子の応力が低減されるので、各接合端子の応力の不均一を低減でき、第１接合端子および第２接合端子の第２端面付近でのクラックの発生を抑制できる。つまり、樹脂モールド時の樹脂充填性の向上と、接合端子のクラックの抑制とを両立させることが可能となる。   As a result, in a surface acoustic wave device having a configuration in which a WLP (Wafer Level Package) type surface acoustic wave element is resin-molded on a mounting substrate, a space between the first joint terminal and the second joint terminal of the acoustic wave element is provided. Since the distance between the bumps is larger than the distance between the other bumps, the resin filling property between the bumps can be improved. Furthermore, the area of the second end face of at least one of the first joining terminal and the second joining terminal is larger than the area of the second end face of the other joining terminals. As a result, the stress of at least one of the joining terminals is reduced, so that the unevenness of the stress of each joining terminal can be reduced, and the occurrence of cracks in the vicinity of the second end face of the first joining terminal and the second joining terminal is suppressed. it can. That is, it is possible to achieve both improvement of the resin filling property at the time of resin molding and suppression of cracks in the joining terminals.

本発明によれば、弾性波素子を実装基板へ樹脂モールドで実装する際の樹脂の充填性の向上、および、バンプ接合部の機械的信頼性の向上を両立させた弾性波素子または弾性波装置を提供することが可能となる。   According to the present invention, an acoustic wave device or an acoustic wave device that achieves both improvement in resin filling when mounting an acoustic wave device on a mounting substrate with a resin mold and improvement in mechanical reliability of a bump bonding portion. Can be provided.

図１は、実施の形態１に係る弾性波素子の断面図である。FIG. 1 is a cross-sectional view of the acoustic wave device according to the first embodiment. 図２は、実施の形態１に係る弾性波装置の断面図である。FIG. 2 is a cross-sectional view of the acoustic wave device according to the first embodiment. 図３は、実施の形態１に係る弾性波素子のカバー層表面の平面図である。FIG. 3 is a plan view of the cover layer surface of the acoustic wave device according to the first embodiment. 図４Ａは、従来の弾性波素子のカバー層表面の平面図である。FIG. 4A is a plan view of a cover layer surface of a conventional acoustic wave device. 図４Ｂは、比較例１に係る弾性波素子のカバー層表面の平面図である。4B is a plan view of the surface of the cover layer of the acoustic wave device according to Comparative Example 1. FIG. 図５は、比較例１に係る弾性波素子の断面図である。FIG. 5 is a cross-sectional view of an acoustic wave device according to Comparative Example 1. 図６は、実施の形態１の変形例１に係る弾性波素子のカバー層表面の平面図である。FIG. 6 is a plan view of the cover layer surface of the acoustic wave device according to the first modification of the first embodiment. 図７は、実施の形態１の変形例２に係る弾性波素子のカバー層表面の平面図である。FIG. 7 is a plan view of the cover layer surface of the acoustic wave device according to the second modification of the first embodiment. 図８は、実施の形態２に係る弾性波素子のカバー層表面の平面図である。FIG. 8 is a plan view of the surface of the cover layer of the acoustic wave device according to the second embodiment. 図９Ａは、従来の弾性波素子のカバー層表面の平面図である。FIG. 9A is a plan view of a cover layer surface of a conventional acoustic wave device. 図９Ｂは、比較例２に係る弾性波素子のカバー層表面の平面図である。FIG. 9B is a plan view of the cover layer surface of the acoustic wave device according to Comparative Example 2.

以下、本発明の実施の形態について、図面を用いて詳細に説明する。なお、以下で説明する実施の形態は、いずれも包括的または具体的な例を示すものである。以下の実施の形態で示される数値、形状、材料、構成要素、構成要素の配置、接続形態、製造工程、及び、製造工程の順序などは、一例であり、本発明を限定する主旨ではない。以下の実施の形態における構成要素のうち、独立請求項に記載されていない構成要素については、任意の構成要素として説明される。また、図面に示される構成要素の大きさまたは大きさの比は、必ずしも厳密ではない。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. It should be noted that each of the embodiments described below shows a comprehensive or specific example. The numerical values, shapes, materials, constituent elements, arrangement of constituent elements, connection modes, manufacturing steps, and order of manufacturing steps shown in the following embodiments are merely examples, and are not intended to limit the present invention. Among the constituent elements in the following embodiments, constituent elements not described in the independent claims are described as optional constituent elements. In addition, the size or size ratio of the components shown in the drawings is not necessarily strict.

（実施の形態１）
［１．１ 弾性波素子１０の構成］
図１は、実施の形態１に係る弾性波素子１０の断面図である。同図に示された弾性波素子１０は、圧電基板１７と、振動部１２と、電極パッド１３と、支持層１５と、カバー層１６と、アンダーバンプメタル（以下、ＵＢＭと記す）２１（２１ａ１および２１ｂ１）と、バンプ２０（２０ａ１および２０ｂ１）とを備える。本実施の形態に係る弾性波素子１０は、弾性波の伝搬機能を有する圧電基板１７がパッケージ機能を兼ねた、いわゆるＷＬＰ（Ｗａｆｅｒ Ｌｅｖｅｌ Ｐａｃｋａｇｅ）構造を有し、小型化かつ低背化を実現している。このような弾性波素子１０は、例えば、所定の周波数帯域の高周波信号を選択的に通過させる弾性表面波（ＳＡＷ：Ｓｕｒｆａｃｅ Ａｃｏｕｓｔｉｃ Ｗａｖｅ）フィルタに適用される。(Embodiment 1)
[1.1 Configuration of Elastic Wave Element 10]
FIG. 1 is a cross-sectional view of an acoustic wave device 10 according to the first embodiment. The acoustic wave element 10 shown in the figure includes a piezoelectric substrate 17, a vibrating portion 12, an electrode pad 13, a support layer 15, a cover layer 16, an under bump metal (hereinafter referred to as UBM) 21 (21a1). And 21b1) and bumps 20 (20a1 and 20b1). The acoustic wave device 10 according to the present embodiment has a so-called WLP (Wafer Level Package) structure in which the piezoelectric substrate 17 having an acoustic wave propagation function also serves as a package function, and realizes a reduction in size and height. ing. Such an acoustic wave element 10 is applied to, for example, a surface acoustic wave (SAW) filter that selectively passes a high-frequency signal in a predetermined frequency band.

振動部１２は、弾性波を励振する弾性波励振部であり、圧電基板１７の表面１７ｓに形成されているＩＤＴ（Ｉｎｔｅｒｄｉｇｉｔａｌ Ｔｒａｎｓｄｕｃｅｒ）電極１１を有する。ＩＤＴ電極１１は、圧電基板１７を伝搬する弾性波を電気信号に変換する、または電気信号を当該弾性波に変換する機能電極である。   The vibration unit 12 is an elastic wave excitation unit that excites an elastic wave, and includes an IDT (Interdigital Transducer) electrode 11 formed on the surface 17 s of the piezoelectric substrate 17. The IDT electrode 11 is a functional electrode that converts an elastic wave propagating through the piezoelectric substrate 17 into an electric signal, or converts an electric signal into the elastic wave.

電極パッド１３は、ＩＤＴ電極１１と電気的に接続され、圧電基板１７の表面１７ｓに形成され、ＩＤＴ電極１１で変換された電気信号を取り出す、または、電気信号をＩＤＴ電極１１に供給する。電極パッド１３は、例えば、端子電極１３１および配線電極１３２の積層体である。端子電極１３１は、ＩＤＴ電極１１と接続された電極であり、ＩＤＴ電極１１の周囲に設けられる。端子電極１３１は、ＩＤＴ電極１１と同様の材料で構成される。配線電極１３２は、端子電極１３１に電気的に接続される電極であり、ＩＤＴ電極１１と弾性波素子１０の外部の配線とを接続するための配線経路の一部を構成する。端子電極１３１および配線電極１３２は、金属または合金から構成される複数の積層体から構成されてもよい。   The electrode pad 13 is electrically connected to the IDT electrode 11, is formed on the surface 17 s of the piezoelectric substrate 17, takes out an electric signal converted by the IDT electrode 11, or supplies the electric signal to the IDT electrode 11. The electrode pad 13 is a laminated body of the terminal electrode 131 and the wiring electrode 132, for example. The terminal electrode 131 is an electrode connected to the IDT electrode 11 and is provided around the IDT electrode 11. The terminal electrode 131 is made of the same material as the IDT electrode 11. The wiring electrode 132 is an electrode electrically connected to the terminal electrode 131 and constitutes a part of a wiring path for connecting the IDT electrode 11 and a wiring outside the acoustic wave element 10. The terminal electrode 131 and the wiring electrode 132 may be composed of a plurality of laminated bodies composed of metals or alloys.

圧電基板１７は、例えば、ＬｉＮｂＯ３単結晶またはＬｉＴａＯ３単結晶で構成された基板である。また、ＩＤＴ電極１１は、Ｃｕ、Ａｌ、Ｐｔ、それらの積層体、またはそれらの合金を主材料とした櫛歯状電極である。The piezoelectric substrate 17 is a substrate made of, for example, LiNbO 3 single crystal or LiTaO 3 single crystal. The IDT electrode 11 is a comb-like electrode whose main material is Cu, Al, Pt, a laminate thereof, or an alloy thereof.

支持層１５は、ＩＤＴ電極１１を囲むように形成された支持部材である。   The support layer 15 is a support member formed so as to surround the IDT electrode 11.

カバー層１６は、支持層１５上に形成されたカバー部材である。   The cover layer 16 is a cover member formed on the support layer 15.

上記構成により、圧電基板１７、支持層１５、カバー層１６は、ＩＤＴ電極１１を中空空間１４内に封止している。   With the above configuration, the piezoelectric substrate 17, the support layer 15, and the cover layer 16 seal the IDT electrode 11 in the hollow space 14.

支持層１５は、例えば、ポリイミド、エポキシ、ベンゾシクロブテン（Ｂｅｎｚｏｃｙｃｌｏｂｕｔｅｎｅ：ＢＣＢ）、ポリベンゾオキサゾール（Ｐｏｌｙｂｅｎｚｏｘａｚｏｌｅ：ＰＢＯ）、金属及び酸化珪素の少なくとも一つを含む材料から構成される。   The support layer 15 is made of, for example, a material containing at least one of polyimide, epoxy, benzocyclobutene (BCB), polybenzoxazole (PBO), metal, and silicon oxide.

カバー層１６は、例えば、エポキシ、ウレタン、フェノール、ポリエステル、ＢＣＢ、およびＰＢＯの少なくとも一つを含む材料から構成される。なお、カバー層１６は、２層で構成されていてもよく、この場合には、上記材料で構成された第１層の上に、例えば、ポリイミド、エポキシ、ＢＣＢ、ＰＢＯ、珪素、酸化珪素、ＬｉＴａＯ３、およびＬｉＮｂＯ３の少なくとも一つを含む材料から構成される第２層が形成される。The cover layer 16 is made of, for example, a material containing at least one of epoxy, urethane, phenol, polyester, BCB, and PBO. Note that the cover layer 16 may be formed of two layers. In this case, for example, polyimide, epoxy, BCB, PBO, silicon, silicon oxide, A second layer made of a material containing at least one of LiTaO 3 and LiNbO 3 is formed.

カバー層１６および支持層１５には、圧電基板１７の表面１７ｓに形成された電極パッド１３に達するビアホール（貫通孔）が形成されている。このビアホールには、ビア導体としてＵＢＭ２１が充填されている。ＵＢＭ２１は、互いに背向する第１端面２１ｔおよび第２端面２１ｓを有し、第１端面２１ｔが電極パッド１３に接合され、第２端面２１ｓがバンプ２０に接合された中間電極である。ＵＢＭ２１は、カバー層１６および支持層１５を貫通し、圧電基板１７の上方に形成されている。そして、ＵＢＭ２１上には、外部に露出するバンプ２０が形成されている。ＵＢＭ２１は、例えば、電界めっき法により上記ビアホールに充填されたＣｕ／Ｎｉ合金およびＮｉ／Ａｕ合金などが挙げられる。なお、ＵＢＭ２１の表面に、酸化防止のためのＡｕ膜が形成されてもよい。   Via holes (through holes) reaching the electrode pads 13 formed on the surface 17 s of the piezoelectric substrate 17 are formed in the cover layer 16 and the support layer 15. The via hole is filled with UBM 21 as a via conductor. The UBM 21 is an intermediate electrode having a first end surface 21 t and a second end surface 21 s that face each other, the first end surface 21 t is bonded to the electrode pad 13, and the second end surface 21 s is bonded to the bump 20. The UBM 21 penetrates the cover layer 16 and the support layer 15 and is formed above the piezoelectric substrate 17. On the UBM 21, bumps 20 that are exposed to the outside are formed. Examples of the UBM 21 include Cu / Ni alloys and Ni / Au alloys filled in the via holes by an electroplating method. An Au film for preventing oxidation may be formed on the surface of the UBM 21.

バンプ２０は、ＵＢＭ２１の第２端面２１ｓに接合され、カバー層１６から突出するように形成されている。バンプ２０は、高導電性金属で構成されたボール状の電極であり、例えば、Ｓｎ／Ａｇ／Ｃｕで構成されたはんだバンプ、および、Ａｕを主成分とするバンプなどが挙げられる。   The bump 20 is bonded to the second end surface 21 s of the UBM 21 and is formed so as to protrude from the cover layer 16. The bump 20 is a ball-shaped electrode made of a highly conductive metal, and examples thereof include a solder bump made of Sn / Ag / Cu and a bump mainly composed of Au.

なお、ＵＢＭ２１のバンプ２０との接合面である第２端面２１ｓの形状は、平面であってもよく、また、曲面であってもよい。   Note that the shape of the second end surface 21 s that is a joint surface of the UBM 21 with the bump 20 may be a flat surface or a curved surface.

圧電基板１７の表面１７ｓには、電極パッド１３、ＵＢＭ２１およびバンプ２０がこの順で接合された接合端子が、３以上配置されている。   On the surface 17s of the piezoelectric substrate 17, three or more joining terminals are arranged in which the electrode pads 13, the UBM 21 and the bumps 20 are joined in this order.

なお、図１では、電極パッド１３、ＵＢＭ２１およびバンプ２０を１組とした接合端子は、中空空間１４を挟んでＸ軸方向に２組だけ表されているが、弾性波素子１０の入出力端子およびＧＮＤ端子の数、ならびに、実装基板への接合強度のバランスなどに応じた数の接合端子が配置されている（本実施の形態では図３に示すように８個）。   In FIG. 1, only two sets of joint terminals including the electrode pad 13, UBM 21, and bump 20 as a set are shown in the X-axis direction with the hollow space 14 interposed therebetween. The number of bonding terminals according to the number of GND terminals and the balance of bonding strength to the mounting substrate, etc. are arranged (8 in this embodiment as shown in FIG. 3).

ここで、本実施の形態に係る弾性波素子１０では、ＵＢＭ２１ｂ１の第２端面２１ｓの面積（図１では長さＬ２１ｂ１）は、ＵＢＭ２１ａ１の第２端面２１ｓの面積（図１では長さＬ２１ａ１）よりも大きい。Here, the acoustic wave device 10 according to the present embodiment, the area of the second end surface 21s (FIG. 1 length L 21b1) of UBM21b1, the area of the second end surface 21s (FIG. 1 the length of UBM21a1 L 21a1 Bigger than).

［１．２ 弾性波装置１の構成］
次に、上述した弾性波素子１０が実装基板に搭載された弾性波装置１の構成について説明する。[1.2 Configuration of elastic wave device 1]
Next, the configuration of the acoustic wave device 1 in which the above-described acoustic wave element 10 is mounted on a mounting substrate will be described.

図２は、実施の形態１に係る弾性波装置１の断面図である。同図に示された弾性波装置１は、弾性波素子１０と、実装基板３０と、樹脂部材４０とを備える。   FIG. 2 is a cross-sectional view of the acoustic wave device 1 according to the first embodiment. The elastic wave device 1 shown in the figure includes an elastic wave element 10, a mounting substrate 30, and a resin member 40.

実装基板３０は、弾性波素子１０を実装する基板であり、例えば、プリント基板またはセラミック基板などである。実装基板３０は、一方の主面３０ａおよび他方の主面３０ｂを有し、少なくとも主面３０ａには、ランド電極３１および配線（図示せず）が形成されている。主面３０ａに形成されたランド電極３１および配線は、実装基板３０の内部配線または主面３０ｂに形成された外部接続電極および外部配線（図示せず）とビア導体（図示せず）などを通じて電気接続されている。これにより、主面３０ｂに形成された外部接続電極および外部配線は、外部の回路部品と電気接続することが可能な配置構成となっている。   The mounting board 30 is a board on which the acoustic wave element 10 is mounted, and is, for example, a printed board or a ceramic board. The mounting substrate 30 has one main surface 30a and the other main surface 30b, and land electrodes 31 and wirings (not shown) are formed on at least the main surface 30a. The land electrode 31 and the wiring formed on the main surface 30a are electrically connected through the internal wiring of the mounting substrate 30 or the external connection electrodes and external wiring (not shown) formed on the main surface 30b and via conductors (not shown). It is connected. Thereby, the external connection electrode and the external wiring formed on the main surface 30b have an arrangement configuration capable of being electrically connected to an external circuit component.

弾性波素子１０は、実装基板３０の主面３０ａに形成されたランド電極３１に、バンプ２０を介してフリップチップ実装（フリップチップボンディング）されている。   The acoustic wave element 10 is flip-chip mounted (flip chip bonding) on the land electrode 31 formed on the main surface 30 a of the mounting substrate 30 via the bumps 20.

樹脂部材４０は、実装基板３０の主面３０ａに接し、弾性波素子１０を覆う封止部材である。言い換えると、弾性波素子１０は、樹脂部材４０と密着し、樹脂部材４０で覆われている。   The resin member 40 is a sealing member that contacts the main surface 30 a of the mounting substrate 30 and covers the acoustic wave element 10. In other words, the acoustic wave element 10 is in close contact with the resin member 40 and is covered with the resin member 40.

樹脂部材４０の配置により、弾性波素子１０の気密性、耐熱性、耐水耐湿性、および絶縁性などの信頼性が強化される。樹脂部材４０は、例えば、エポキシ樹脂などの樹脂からなる。なお、樹脂部材４０は、ＳｉＯ２などの無機フィラーを含有した熱硬化性のエポキシ樹脂を含んでいてもよい。The arrangement of the resin member 40 enhances the reliability of the acoustic wave element 10 such as airtightness, heat resistance, water / moisture resistance, and insulation. The resin member 40 is made of a resin such as an epoxy resin, for example. The resin member 40 may include a thermosetting epoxy resin containing an inorganic filler such as SiO 2 .

ここで、樹脂部材４０は、中空空間１４には形成されず、カバー層１６と実装基板３０との間であって、複数のバンプ２０の間に充填されている。   Here, the resin member 40 is not formed in the hollow space 14 but is filled between the cover layer 16 and the mounting substrate 30 and between the plurality of bumps 20.

［１．３ 弾性波素子１０における接合端子の配置レイアウト］
次に、弾性波素子１０における接合端子の配置レイアウトについて説明する。[1.3 Arrangement Layout of Junction Terminals in Elastic Wave Element 10]
Next, the layout of the junction terminals in the acoustic wave device 10 will be described.

図３は、実施の形態１に係る弾性波素子１０のカバー層１６表面の平面図である。より具体的には、図３は、カバー層１６の実装基板３０に対向する面における、ＵＢＭ２１の配置レイアウトをＺ軸負方向から見た図である。なお、図１および図２の断面図は、図３のＩ−Ｉ断面図を表している。   FIG. 3 is a plan view of the surface of the cover layer 16 of the acoustic wave device 10 according to the first embodiment. More specifically, FIG. 3 is a view of the layout of the UBM 21 on the surface of the cover layer 16 facing the mounting substrate 30 as viewed from the negative Z-axis direction. 1 and 2 represent the II cross-sectional view of FIG.

圧電基板１７は、表面１７ｓを平面視した場合、矩形形状となっており、カバー層１６は、図３に示すように、圧電基板１７の形状を反映して矩形形状となっている。実施の形態１に係る弾性波素子１０のカバー層１６には、８つの接合端子に対応したＵＢＭ２１ａ１、２１ａ２、２１ａ３、２１ａ４、２１ｂ１、２１ｂ３、２１ｂ４、２１ｂ５が配置されている。   The piezoelectric substrate 17 has a rectangular shape when the surface 17s is viewed in plan, and the cover layer 16 has a rectangular shape reflecting the shape of the piezoelectric substrate 17, as shown in FIG. In the cover layer 16 of the acoustic wave device 10 according to the first exemplary embodiment, UBMs 21a1, 21a2, 21a3, 21a4, 21b1, 21b3, 21b4, and 21b5 corresponding to eight joint terminals are arranged.

弾性波素子１０におけるＵＢＭ２１の配置レイアウトにおいて、上行（Ｙ軸方向）のＵＢＭ２１の基本ピッチは、ＵＢＭ２１ｂ３、２１ｂ４および２１ｂ５の距離Ｌｂ２である。一方、下行（Ｙ軸方向）のＵＢＭ２１の基本ピッチは、ＵＢＭ２１ａ１、２１ａ２、２１ａ３および２１ａ４の距離Ｌａ１である。これらの規則性の中で、ＵＢＭ２１ｂ１と２１ｂ３との距離Ｌｂ１が、距離Ｌｂ２よりも大きくなっており、ＵＢＭ２１の配置レイアウトは、左右非対称となっている。また、ＵＢＭ２１ｂ１の第２端面２１ｓの面積Ａ２１ｂ１およびＵＢＭ２１ｂ３の第２端面２１ｓの面積Ａ２１ｂ３は、その他のＵＢＭの第２端面２１ｓの面積（Ａ２１ａ１、Ａ２１ａ２、Ａ２１ａ３、Ａ２１ａ４、Ａ２１ｂ４、Ａ２１ｂ５）よりも大きい。In the arrangement layout of the UBM 21 in the acoustic wave element 10, the basic pitch of the UBM 21 in the ascending direction (Y-axis direction) is the distance Lb2 between the UBMs 21b3, 21b4, and 21b5. On the other hand, the basic pitch of the UBM 21 in the descending direction (Y-axis direction) is a distance La1 between the UBMs 21a1, 21a2, 21a3, and 21a4. Among these regularities, the distance Lb1 between the UBMs 21b1 and 21b3 is larger than the distance Lb2, and the arrangement layout of the UBM 21 is asymmetrical. The second end surface area A 21 b 3 of the 21s of the area A 21b1 and UBM21b3 second end surface 21s of the UBM21b1, the area of the second end surface 21s of the other UBM (A 21a1, A 21a2, A 21a3, A 21a4, A 21b4 , A 21b5 ).

つまり、弾性波素子１０では、カバー層１６におけるＵＢＭ２１の配置レイアウトの対称性を確保するためのＵＢＭ２１間の規則的な距離（Ｌａ１およびＬｂ２）に対して、これらよりも大きい距離（Ｌｂ１）を共有するＵＢＭ２１ｂ１および２１ｂ３とバンプ２０ｂ１および２０ｂ３との接合面積を大きくしている。   That is, the elastic wave element 10 shares a distance (Lb1) larger than the regular distances (La1 and Lb2) between the UBMs 21 for ensuring symmetry of the layout of the UBMs 21 in the cover layer 16. The bonding area between the UBMs 21b1 and 21b3 and the bumps 20b1 and 20b3 is increased.

ここで、複数のＵＢＭ２１のうち、いずれのＵＢＭ２１の第２端面２１ｓの面積を大きくするかについての規則について説明する。   Here, a rule regarding which of the plurality of UBMs 21 the area of the second end face 21s of the UBM 21 is increased will be described.

まず、圧電基板１７の表面１７ｓを平面視した場合、一の接合端子（ＵＢＭ２１）とその周囲に配置された複数の接合端子（ＵＢＭ２１）との距離のうち最小の距離を、一の接合端子のバンプ間距離と定義する。   First, when the surface 17s of the piezoelectric substrate 17 is viewed in plan, the minimum distance among the distances between one junction terminal (UBM21) and a plurality of junction terminals (UBM21) arranged around the one junction terminal (UBM21) is determined as one junction terminal. It is defined as the distance between bumps.

例えば、図３の場合、ＵＢＭ２１ｂ５と、ＵＢＭ２１ｂ５の周囲に配置されたＵＢＭ２１ｂ４、２１ａ３、および２１ａ４との距離のうち、最小の距離は、ＵＢＭ２１ｂ４との距離Ｌｂ２である。つまり、ＵＢＭ２１ｂ５のバンプ間距離はＬｂ２である。また、ＵＢＭ２１ｂ１と、ＵＢＭ２１ｂ１の周囲に配置されたＵＢＭ２１ｂ３、２１ａ１、および２１ａ２との距離のうち、最小の距離は、ＵＢＭ２１ｂ３との距離Ｌｂ１である。つまり、ＵＢＭ２１ｂ１のバンプ間距離はＬｂ１である。また、ＵＢＭ２１ａ１と、ＵＢＭ２１ａ１の周囲に配置されたＵＢＭ２１ｂ１、２１ｂ３、および２１ａ２との距離のうち、最小の距離は、ＵＢＭ２１ａ２との距離Ｌａ１である。つまり、ＵＢＭ２１ａ１のバンプ間距離はＬａ１である。このようにして、各接合端子（各ＵＢＭ２１）のバンプ間距離が定義される。   For example, in the case of FIG. 3, the minimum distance among the distances between the UBM 21b5 and the UBMs 21b4, 21a3, and 21a4 arranged around the UBM 21b5 is the distance Lb2 with the UBM 21b4. That is, the distance between bumps of the UBM 21b5 is Lb2. Of the distances between the UBM 21b1 and the UBMs 21b3, 21a1, and 21a2 arranged around the UBM 21b1, the minimum distance is the distance Lb1 with the UBM 21b3. That is, the distance between bumps of the UBM 21b1 is Lb1. Of the distances between the UBM 21a1 and the UBMs 21b1, 21b3, and 21a2 arranged around the UBM 21a1, the minimum distance is the distance La1 with the UBM 21a2. That is, the distance between bumps of the UBM 21a1 is La1. Thus, the distance between bumps of each junction terminal (each UBM 21) is defined.

次に、接合端子（ＵＢＭ２１）ごとに定義された上記バンプ間距離のうち、最小のバンプ間距離より大きくかつ最大のバンプ間距離を有する第１接合端子を決定する。   Next, a first joint terminal having a maximum inter-bump distance greater than the minimum inter-bump distance among the inter-bump distances defined for each joint terminal (UBM21) is determined.

例えば、図３において、最小のバンプ間距離は、ＵＢＭ２１ｂ３、２１ｂ４および２１ｂ５のバンプ間距離Ｌｂ２である。この場合、最小のバンプ間距離Ｌｂ２よりも大きくかつ最大のバンプ間距離を有する接合端子は、ＵＢＭ２１ｂ１であり、このバンプ間距離はＬｂ１である。つまり、第１接合端子は、ＵＢＭ２１ｂ１で構成された接合端子と決定される。   For example, in FIG. 3, the minimum inter-bump distance is the inter-bump distance Lb2 of the UBMs 21b3, 21b4, and 21b5. In this case, the joint terminal that is larger than the minimum inter-bump distance Lb2 and has the maximum inter-bump distance is the UBM 21b1, and the inter-bump distance is Lb1. That is, the first joint terminal is determined as the joint terminal configured by the UBM 21b1.

次に、上記第１接合端子と上記最大のバンプ間距離を隔てて配置された第２接合端子を決定する。   Next, a second joint terminal disposed with a distance between the first joint terminal and the maximum bump distance is determined.

例えば、図３において、第１接合端子であるＵＢＭ２１ｂ１と最大のバンプ間距離Ｌｂ１を隔てて配置された第２接合端子は、ＵＢＭ２１ｂ３で構成された接合端子である。   For example, in FIG. 3, the second joint terminal disposed with the UBM 21b1 being the first joint terminal and the maximum inter-bump distance Lb1 is a joint terminal configured by the UBM 21b3.

最後に、上記第１接合端子および上記第２接合端子を構成するＵＢＭ２１ｂ１およびＵＢＭ２１ｂ３の第２端面２１ｓの面積を、その他の接合端子を構成するＵＢＭ２１ａ１〜２１ａ４および２１ｂ４〜２１ｂ５の第２端面２１ｓの面積よりも大きく設定する。   Finally, the area of the second end face 21s of the UBM 21b1 and the UBM 21b3 constituting the first joint terminal and the second joint terminal is the area of the second end face 21s of the UBMs 21a1 to 21a4 and 21b4 to 21b5 constituting the other joint terminals. Set larger than.

図４Ａは、従来の弾性波素子６０Ａのカバー層表面の平面図である。図４Ａに示すように、上行（Ｙ軸方向）のＵＢＭ６１の基本ピッチは、距離Ｌｂ２である。一方、下行（Ｙ軸方向）のＵＢＭ６１の基本ピッチは、距離Ｌａ１である。各ＵＢＭ６１は、例外なく規則的に配置され、左右対称なＵＢＭ６１の配置レイアウトとなっている。上記従来の弾性波素子６０Ａが実装基板に実装される場合、実装基板への実装時および使用時における温度変化に起因する各接合端子の応力は均等化される。これにより、弾性波デバイスの機械的な信頼性を確保できる。しかしながら、弾性波装置の小型化の要請に対応すべく、弾性波素子６０Ａのようにバンプ配置レイアウトの対称性を確保しつつバンプのピッチを小さくしていくと、弾性波素子６０Ａと実装基板との間への樹脂の充填性が悪化し、弾性波素子６０Ａの気密性、耐熱性、耐水耐湿性、および絶縁性などの信頼性が低下する。   FIG. 4A is a plan view of a cover layer surface of a conventional acoustic wave device 60A. As shown in FIG. 4A, the basic pitch of the UBM 61 in the ascending direction (Y-axis direction) is a distance Lb2. On the other hand, the basic pitch of the UBM 61 in the descending direction (Y-axis direction) is the distance La1. Each UBM 61 is regularly arranged without exception, and has a symmetrical layout of the UBM 61. When the conventional acoustic wave element 60A is mounted on a mounting board, the stress at each junction terminal due to temperature changes during mounting on the mounting board and during use is equalized. Thereby, the mechanical reliability of an elastic wave device is securable. However, if the pitch of the bumps is reduced while the symmetry of the bump arrangement layout is secured as in the elastic wave element 60A in order to meet the demand for downsizing of the elastic wave device, the elastic wave element 60A and the mounting substrate As a result, the resin filling property of the elastic wave element 60A deteriorates, and the reliability of the acoustic wave element 60A, such as airtightness, heat resistance, water and moisture resistance, and insulation, is lowered.

この信頼性低下の対策として、図４Ｂのような、ＵＢＭの配置レイアウトが想定される。   As a countermeasure against this decrease in reliability, a UBM layout is assumed as shown in FIG. 4B.

図４Ｂは、比較例１に係る弾性波素子７０Ａのカバー層表面の平面図である。また、図５は、比較例１に係る弾性波素子７０Ａの断面図である。なお、図５の断面図は、図４ＢのＶ−Ｖ断面図を表している。図４Ｂに示すように、上行（Ｙ軸方向）のＵＢＭ７１の基本ピッチ、および、下行（Ｙ軸方向）のＵＢＭ７１の基本ピッチを変更しないことで、各接合端子にかかる応力の分散効果を確保する。一方で、電気的特性に影響しないＵＢＭ７１ｂ２を削除し、ＵＢＭ７１ｂ１と７１ｂ３との距離を大きく確保することにより、弾性波素子７０Ａと実装基板との間への樹脂の充填性を改善する。これにより、ＵＢＭ７１ｂ１と７１ｂ３との間の空間から、樹脂をカバー層１６と実装基板３０との間へ侵入させることが可能となる。しかしながら、弾性波素子７０Ａのように、接合端子（ＵＢＭ７１）数を減らし非対称な接合端子配置とすることで、各接合端子にかかる応力は不均一となる。また、全てのＵＢＭ７１の第２端面７１ｓの面積は等しい（図５では、長さＬ７１ａ１＝長さＬ７１ｂ１）。この配置構成では、特に、ＵＢＭ７１ｂ１を構成する接合端子の応力が、他の接合端子の応力と比べて大きくなり、ＵＢＭ７１ｂ１を構成する接合端子の第２端面２１ｓ付近にクラックが発生する確率が高くなる。4B is a plan view of the cover layer surface of the acoustic wave device 70A according to Comparative Example 1. FIG. FIG. 5 is a cross-sectional view of an acoustic wave element 70A according to Comparative Example 1. The sectional view of FIG. 5 represents the VV sectional view of FIG. 4B. As shown in FIG. 4B, the basic pitch of the UBM 71 in the upper row (Y-axis direction) and the basic pitch of the UBM 71 in the lower row (Y-axis direction) are not changed, so that the effect of distributing the stress applied to each joint terminal is secured. . On the other hand, by eliminating the UBM 71b2 that does not affect the electrical characteristics and securing a large distance between the UBMs 71b1 and 71b3, the resin filling property between the acoustic wave element 70A and the mounting substrate is improved. As a result, the resin can enter between the cover layer 16 and the mounting substrate 30 from the space between the UBMs 71b1 and 71b3. However, the stress applied to each joint terminal becomes non-uniform by reducing the number of joint terminals (UBM 71) and providing an asymmetric joint terminal arrangement as in the acoustic wave element 70A. Further, the areas of the second end surfaces 71s of all the UBMs 71 are equal (in FIG. 5, length L 71a1 = length L 71b1 ). In this arrangement configuration, in particular, the stress of the joining terminal constituting the UBM 71b1 becomes larger than the stress of the other joining terminals, and the probability that a crack is generated in the vicinity of the second end face 21s of the joining terminal constituting the UBM 71b1 is increased. .

これに対して、本実施の形態に係る弾性波素子１０の構成によれば、図３に示すように、第１接合端子（ＵＢＭ２１ｂ１）と第２接合端子（ＵＢＭ２１ｂ３）との間のバンプ間距離Ｌｂ１が他のバンプ間距離よりも大きいので、樹脂の充填性を向上させることができる。さらに、第１接合端子（ＵＢＭ２１ｂ１）および第２接合端子（ＵＢＭ２１ｂ３）の第２端面２１ｓの面積が、その他の接合端子の第２端面の面積よりも大きい。これにより、第１接合端子（ＵＢＭ２１ｂ１）および第２接合端子（ＵＢＭ２１ｂ３）の応力が低減されるので、各接合端子の応力の不均一を低減でき、第１接合端子（ＵＢＭ２１ｂ１）および第２接合端子（ＵＢＭ２１ｂ３）の第２端面付近でのクラックの発生を抑制できる。つまり、樹脂モールド時の樹脂充填性の向上と、接合端子の機械的信頼性の向上とを両立させることが可能となる。   On the other hand, according to the configuration of the acoustic wave device 10 according to the present embodiment, as shown in FIG. 3, the inter-bump distance between the first joint terminal (UBM21b1) and the second joint terminal (UBM21b3). Since Lb1 is larger than the distance between other bumps, the resin filling property can be improved. Furthermore, the area of the second end face 21s of the first joint terminal (UBM21b1) and the second joint terminal (UBM21b3) is larger than the areas of the second end faces of the other joint terminals. Thereby, since the stress of the 1st junction terminal (UBM21b1) and the 2nd junction terminal (UBM21b3) is reduced, the nonuniformity of the stress of each junction terminal can be reduced, and the 1st junction terminal (UBM21b1) and the 2nd junction terminal Generation of cracks in the vicinity of the second end face of (UBM21b3) can be suppressed. That is, it is possible to achieve both improvement in resin filling property during resin molding and improvement in mechanical reliability of the joining terminal.

［１．４ 変形例１の弾性波素子１０Ａにおける接合端子の配置レイアウト］
図６は、実施の形態１の変形例１に係る弾性波素子１０Ａのカバー層１６表面の平面図である。上記第１接合端子（ＵＢＭ２１ｂ１）および上記第２接合端子（ＵＢＭ２１ｂ３）の双方の第２端面２１ｓの面積を大きくするのではなく、図６に示すように、第１接合端子または第２接合端子のみの第２端面２１ｓの面積を、その他の接合端子を構成するＵＢＭ２１ａ１〜２１ａ４および２１ｂ４〜２１ｂ５の第２端面２１ｓの面積よりも大きく設定してもよい。[1.4 Arrangement Layout of Junction Terminals in Elastic Wave Element 10A of Modification 1]
6 is a plan view of the surface of cover layer 16 of acoustic wave element 10A according to Modification 1 of Embodiment 1. FIG. Instead of increasing the area of the second end face 21s of both the first joint terminal (UBM21b1) and the second joint terminal (UBM21b3), as shown in FIG. 6, only the first joint terminal or the second joint terminal is used. The area of the second end face 21s may be set larger than the area of the second end face 21s of the UBMs 21a1 to 21a4 and 21b4 to 21b5 constituting the other junction terminals.

接合端子（ＵＢＭ２１）の第２端面２１ｓの面積を大きくすると、接合端子間の間隔が小さくなり、接合端子間に配置される振動部１２の面積が制約を受けることとなる。この観点から、第１接合端子および第２接合端子のいずれか一方のみの第２端面２１ｓの面積を大きくすることにより、第１接合端子および第２接合端子の双方の第２端面２１ｓの面積を大きくする場合と比較して、樹脂モールド時の樹脂充填性の向上および接合端子のクラックの抑制を両立させつつ、圧電基板１７上に形成された振動部１２のレイアウトの制約を緩和できる。   When the area of the second end face 21s of the junction terminal (UBM21) is increased, the interval between the junction terminals is reduced, and the area of the vibration part 12 disposed between the junction terminals is restricted. From this viewpoint, the area of the second end face 21s of both the first joint terminal and the second joint terminal is increased by increasing the area of the second end face 21s of only one of the first joint terminal and the second joint terminal. Compared with the case where it enlarges, the restrictions of the layout of the vibration part 12 formed on the piezoelectric substrate 17 can be relieved, while improving the resin filling property at the time of resin molding and suppressing the crack of the joining terminal.

また、本変形例１に係る弾性波素子１０Ａのように、第１接合端子および第２接合端子のうち、圧電基板１７の四隅に近い方の接合端子の第２端面２１ｓの面積が、その他の接合端子の第２端面２１ｓの面積よりも大きくてもよい。本変形例では、第１接合端子および第２接合端子のうち、圧電基板１７の四隅に近い方の接合端子は、ＵＢＭ２１ｂ１を構成する第１接合端子である。   Further, as in the acoustic wave element 10A according to the first modification, the area of the second end surface 21s of the joint terminal closer to the four corners of the piezoelectric substrate 17 among the first joint terminal and the second joint terminal is other than It may be larger than the area of the second end face 21s of the junction terminal. In the present modification, of the first joint terminal and the second joint terminal, the joint terminal closer to the four corners of the piezoelectric substrate 17 is the first joint terminal constituting the UBM 21b1.

接合端子（ＵＢＭ）数を減らし非対称な接合端子配置とした場合、第１接合端子および第２接合端子のうち、圧電基板１７の四隅に近い接合端子の第２端面付近にクラックが発生する確率が高くなる。この観点から、第１接合端子および第２接合端子のうち、圧電基板１７の四隅に近い方の接合端子の第２端面２１ｓの面積を大きくすることにより、樹脂モールド時の樹脂充填性の向上および接合端子のクラックの抑制を両立させつつ、圧電基板１７に形成された振動部１２および配線のレイアウトの制約を緩和できる。   When the number of the junction terminals (UBM) is reduced and the asymmetric junction terminal arrangement is adopted, there is a probability that a crack will occur in the vicinity of the second end face of the junction terminal near the four corners of the piezoelectric substrate 17 among the first junction terminal and the second junction terminal. Get higher. From this point of view, by increasing the area of the second end face 21s of the joint terminal closer to the four corners of the piezoelectric substrate 17 out of the first joint terminal and the second joint terminal, the resin filling property during resin molding is improved. The constraints on the layout of the vibrating portion 12 and the wiring formed on the piezoelectric substrate 17 can be relaxed while simultaneously suppressing the cracks in the joining terminals.

［１．５ 変形例２の弾性波素子１０Ｂにおける接合端子の配置レイアウト］
図７は、実施の形態１の変形例２に係る弾性波素子１０Ｂのカバー層１６表面の平面図である。本変形例に係る弾性波素子１０Ｂは、実施の形態１に係る弾性波素子１０と比較して、同一行内のＵＢＭ間距離よりも行間のＵＢＭ間距離が短いレイアウトを有している。本変形例に係る弾性波素子１０Ｂについて、実施の形態１に係る弾性波素子１０と同じ構成については説明を省略し、異なる構成を中心に説明する。[1.5 Arrangement Layout of Junction Terminals in Elastic Wave Element 10B of Modification 2]
FIG. 7 is a plan view of the cover layer 16 surface of the acoustic wave device 10B according to the second modification of the first embodiment. The elastic wave device 10B according to the present modification has a layout in which the distance between UBMs between rows is shorter than the distance between UBMs within the same row as compared with the elastic wave device 10 according to the first embodiment. Regarding the acoustic wave device 10B according to this modification, the description of the same configuration as that of the acoustic wave device 10 according to the first embodiment will be omitted, and a description will be given focusing on a different configuration.

弾性波素子１０ＢにおけるＵＢＭ２１の配置レイアウトにおいて、上行（Ｙ軸方向）のＵＢＭ２１の基本ピッチは、ＵＢＭ２１ｂ３、２１ｂ４および２１ｂ５の距離Ｌｂ２である。一方、下行（Ｙ軸方向）のＵＢＭ２１の基本ピッチは、ＵＢＭ２１ａ１、２１ａ２、２１ａ３および２１ａ４の距離Ｌａ１である。これらの規則性の中で、ＵＢＭ２１ｂ１と２１ｂ３との距離Ｌｂ１が、距離Ｌｂ２よりも大きくなっており、ＵＢＭ２１の配置レイアウトは、左右非対称となっている。また、ＵＢＭ２１ｂ１の第２端面２１ｓの面積Ａ２１ｂ１、ＵＢＭ２１ｂ３の第２端面２１ｓの面積Ａ２１ｂ３、ＵＢＭ２１ａ１の第２端面２１ｓの面積Ａ２１ａ１は、その他のＵＢＭの第２端面２１ｓの面積（Ａ２１ａ２、Ａ２１ａ３、Ａ２１ａ４、Ａ２１ｂ４、Ａ２１ｂ５）よりも大きい。In the layout of the UBM 21 in the acoustic wave device 10B, the basic pitch of the UBM 21 in the ascending direction (Y-axis direction) is the distance Lb2 between the UBMs 21b3, 21b4, and 21b5. On the other hand, the basic pitch of the UBM 21 in the descending direction (Y-axis direction) is a distance La1 between the UBMs 21a1, 21a2, 21a3, and 21a4. Among these regularities, the distance Lb1 between the UBMs 21b1 and 21b3 is larger than the distance Lb2, and the arrangement layout of the UBM 21 is asymmetrical. The second end surface area of the 21s A 21b1, the area of the second end surface 21s of the UBM21b3 A 21b3, the area A 21a1 of the second end surface 21s of the UBM21a1 of UBM21b1, the area of the second end surface 21s of the other UBM (A 21a2, A 21a3 , A 21a4 , A 21b4 , A 21b5 ).

つまり、ＵＢＭ２１ｂ１、２１ｂ３、および２１ａ１と、バンプ２０ｂ１、２０ｂ３、および２０ａ１との接合面積を大きくする。   That is, the bonding area between the UBMs 21b1, 21b3, and 21a1 and the bumps 20b1, 20b3, and 20a1 is increased.

ここで、複数のＵＢＭ２１のうち、いずれのＵＢＭ２１の第２端面２１ｓの面積を大きくするかについての規則について説明する。   Here, a rule regarding which of the plurality of UBMs 21 the area of the second end face 21s of the UBM 21 is increased will be described.

まず、圧電基板１７の表面１７ｓを平面視した場合、一の接合端子（ＵＢＭ２１）とその周囲に配置された複数の接合端子（ＵＢＭ２１）との距離のうち最小の距離を、一の接合端子のバンプ間距離と定義する。   First, when the surface 17s of the piezoelectric substrate 17 is viewed in plan, the minimum distance among the distances between one junction terminal (UBM21) and a plurality of junction terminals (UBM21) arranged around the one junction terminal (UBM21) is determined as one junction terminal. It is defined as the distance between bumps.

例えば、図７の場合、ＵＢＭ２１ｂ５と、ＵＢＭ２１ｂ５の周囲に配置されたＵＢＭ２１ｂ４、２１ａ３、および２１ａ４との距離のうち、最小の距離は、ＵＢＭ２１ｂ４との距離Ｌｂ２である。つまり、ＵＢＭ２１ｂ５のバンプ間距離はＬｂ２である。また、ＵＢＭ２１ｂ１と、ＵＢＭ２１ｂ１の周囲に配置されたＵＢＭ２１ｂ３、２１ａ１、および２１ａ２との距離のうち、最小の距離は、ＵＢＭ２１ａ１との距離Ｌａｂである。つまり、ＵＢＭ２１ｂ１のバンプ間距離はＬａｂである。また、ＵＢＭ２１ａ１と、ＵＢＭ２１ａ１の周囲に配置されたＵＢＭ２１ｂ１、２１ｂ３、および２１ａ２との距離のうち、最小の距離は、ＵＢＭ２１ａ２との距離Ｌａ１である。つまり、ＵＢＭ２１ａ１のバンプ間距離はＬａ１である。このようにして、各接合端子（各ＵＢＭ２１）のバンプ間距離が定義される。   For example, in the case of FIG. 7, the minimum distance among the distances between the UBM 21b5 and the UBMs 21b4, 21a3, and 21a4 arranged around the UBM 21b5 is the distance Lb2 with the UBM 21b4. That is, the distance between bumps of the UBM 21b5 is Lb2. Of the distances between the UBM 21b1 and the UBMs 21b3, 21a1, and 21a2 arranged around the UBM 21b1, the minimum distance is the distance Lab from the UBM 21a1. That is, the distance between bumps of the UBM 21b1 is Lab. Of the distances between the UBM 21a1 and the UBMs 21b1, 21b3, and 21a2 arranged around the UBM 21a1, the minimum distance is the distance La1 with the UBM 21a2. That is, the distance between bumps of the UBM 21a1 is La1. Thus, the distance between bumps of each junction terminal (each UBM 21) is defined.

次に、接合端子（ＵＢＭ２１）ごとに定義された上記バンプ間距離のうち、最小のバンプ間距離より大きくかつ最大のバンプ間距離を有する第１接合端子を決定する。   Next, a first joint terminal having a maximum inter-bump distance greater than the minimum inter-bump distance among the inter-bump distances defined for each joint terminal (UBM21) is determined.

例えば、図７において、最小のバンプ間距離は、ＵＢＭ２１ｂ３、２１ｂ４および２１ｂ５のバンプ間距離Ｌｂ２である。この場合、最小のバンプ間距離Ｌｂ２よりも大きくかつ最大のバンプ間距離を有する接合端子は、ＵＢＭ２１ｂ１であり、このバンプ間距離はＬａｂである。つまり、第１接合端子は、ＵＢＭ２１ｂ１で構成された接合端子と決定される。   For example, in FIG. 7, the minimum inter-bump distance is the inter-bump distance Lb2 of the UBMs 21b3, 21b4, and 21b5. In this case, the joint terminal that is larger than the minimum inter-bump distance Lb2 and has the maximum inter-bump distance is the UBM 21b1, and the inter-bump distance is Lab. That is, the first joint terminal is determined as the joint terminal configured by the UBM 21b1.

次に、上記第１接合端子と上記最大のバンプ間距離を隔てて配置された第２接合端子を決定する。   Next, a second joint terminal disposed with a distance between the first joint terminal and the maximum bump distance is determined.

例えば、図７において、第１接合端子であるＵＢＭ２１ｂ１と最大のバンプ間距離Ｌａｂを隔てて配置された第２接合端子は、ＵＢＭ２１ａ１で構成された接合端子である。   For example, in FIG. 7, the second joint terminal arranged with a maximum distance between bumps Lab from the UBM 21b1 which is the first joint terminal is a joint terminal constituted by the UBM 21a1.

次に、上記第１接合端子および上記第２接合端子を構成するＵＢＭ２１ｂ１およびＵＢＭ２１ａ１の第２端面２１ｓの面積を、その他の接合端子を構成するＵＢＭ２１ａ２〜２１ａ４および２１ｂ４〜２１ｂ５の第２端面２１ｓの面積よりも大きく設定する。   Next, the area of the second end face 21s of the UBM 21b1 and UBM 21a1 constituting the first joint terminal and the second joint terminal, and the area of the second end face 21s of the UBMs 21a2 to 21a4 and 21b4 to 21b5 constituting the other joint terminals Set larger than.

最後に、第２接合端子（ＵＢＭ２１ａ１）の次に第１接合端子（ＵＢＭ２１ｂ１）に近い第３接合端子の第２端面２１ｓの面積を、その他の接合端子を構成するＵＢＭ２１ａ２〜２１ａ４および２１ｂ４〜２１ｂ５の第２端面２１ｓの面積よりも大きく設定する。   Finally, the area of the second end face 21s of the third joint terminal next to the first joint terminal (UBM21b1) next to the second joint terminal (UBM21a1) is the same as that of the UBMs 21a2 to 21a4 and 21b4 to 21b5 constituting the other joint terminals. The area is set larger than the area of the second end face 21s.

例えば、図７において、第２接合端子（ＵＢＭ２１ａ１）の次に第１接合端子（ＵＢＭ２１ｂ１）に近い第３接合端子は、ＵＢＭ２１ｂ３で構成された接合端子である。   For example, in FIG. 7, the third junction terminal next to the first junction terminal (UBM21b1) after the second junction terminal (UBM21a1) is a junction terminal constituted by UBM21b3.

これにより、第１接合端子または第２接合端子において、第１接合端子と第２接合端子とを結ぶ方向（Ｘ軸方向）にかかる応力だけでなく、当該方向と異なる方向（Ｙ軸方向）にかかる応力も低減できるので、第１接合端子および第２接合端子の第２端面２１ｓ付近でのクラックの発生を、より抑制できる。   Thereby, in the first joint terminal or the second joint terminal, not only the stress applied in the direction connecting the first joint terminal and the second joint terminal (X-axis direction) but also in a direction different from the direction (Y-axis direction). Since such stress can also be reduced, the occurrence of cracks in the vicinity of the second end face 21s of the first and second joint terminals can be further suppressed.

なお、本変形例においても、第１接合端子（ＵＢＭ２１ｂ１）および第２接合端子（ＵＢＭ２１ａ１）のうちいずれか一方のみと、第３接合端子（ＵＢＭ２１ｂ３）との第２端面２１ｓの面積を、その他の接合端子の第２端面２１ｓの面積よりも大きく設定してもよい。   Also in this modification, the area of the second end face 21s between only one of the first joint terminal (UBM21b1) and the second joint terminal (UBM21a1) and the third joint terminal (UBM21b3) is set to other values. You may set larger than the area of 21 s of 2nd end surfaces of a junction terminal.

（実施の形態２）
本実施の形態では、第１接合端子と最大のバンプ間距離を隔てて配置された第２接合端子が複数存在するレイアウトについて説明する。本実施の形態に係る弾性波素子１０Ｃについて、実施の形態１に係る弾性波素子１０と同じ構成については説明を省略し、異なる構成を中心に説明する。(Embodiment 2)
In the present embodiment, a layout in which a plurality of second joint terminals arranged with a maximum distance between the bumps from the first joint terminals is described. Regarding the acoustic wave element 10C according to the present embodiment, the description of the same configuration as that of the acoustic wave element 10 according to the first embodiment will be omitted, and a description will be given focusing on a different configuration.

［２．１ 弾性波素子１０Ｃにおける接合端子の配置レイアウト］
図８は、実施の形態２に係る弾性波素子１０Ｃのカバー層１６表面の平面図である。より具体的には、図８は、カバー層１６の実装基板３０に対向する面における、ＵＢＭ２１の配置レイアウトを、Ｚ軸負方向から見た図である。[2.1 Arrangement Layout of Junction Terminals in Elastic Wave Element 10C]
FIG. 8 is a plan view of the surface of the cover layer 16 of the acoustic wave device 10C according to the second embodiment. More specifically, FIG. 8 is a view of the layout of the UBM 21 on the surface of the cover layer 16 facing the mounting substrate 30 as viewed from the negative Z-axis direction.

図８に示すように、実施の形態２に係る弾性波素子１０Ｃのカバー層１６には、５つの接合端子に対応したＵＢＭ２１ａ２、２１ａ３、２１ｂ２、２１ｂ３、２１ｃ１が配置されている。   As shown in FIG. 8, UBMs 21 a 2, 21 a 3, 21 b 2, 21 b 3, 21 c 1 corresponding to the five joining terminals are arranged on the cover layer 16 of the acoustic wave device 10 C according to the second embodiment.

弾性波素子１０ＣにおけるＵＢＭ２１の配置レイアウトにおいて、上行（Ｙ軸方向）のＵＢＭ２１の基本ピッチは、ＵＢＭ２１ｂ２および２１ｂ３の距離Ｌｂ１である。一方、下行（Ｙ軸方向）のＵＢＭ２１の基本ピッチは、ＵＢＭ２１ａ２および２１ａ３の距離Ｌａ１である。これらの規則性の中で、ＵＢＭ２１ｃ１とそれに最近接するＵＢＭ２１ｂ２および２１ａ２との距離ＬｂｃおよびＬａｃ（＝Ｌｂｃ）が、距離Ｌａ１およびＬｂ２よりも大きくなっており、ＵＢＭ２１の配置レイアウトは、左右非対称となっている。また、ＵＢＭ２１ａ２の第２端面２１ｓの面積Ａ２１ａ２、ＵＢＭ２１ｂ２の第２端面２１ｓの面積Ａ２１ｂ２、およびＵＢＭ２１ｃ１の第２端面２１ｓの面積Ａ２１ｃ１は、その他のＵＢＭの第２端面２１ｓの面積（Ａ２１ｂ３、Ａ２１ａ３）よりも大きい。In the layout of the UBM 21 in the acoustic wave element 10C, the basic pitch of the UBM 21 in the ascending direction (Y-axis direction) is the distance Lb1 between the UBMs 21b2 and 21b3. On the other hand, the basic pitch of the UBM 21 in the descending direction (Y-axis direction) is the distance La1 between the UBMs 21a2 and 21a3. Among these regularities, the distances Lbc and Lac (= Lbc) between the UBM 21c1 and the closest UBMs 21b2 and 21a2 are larger than the distances La1 and Lb2, and the layout of the UBM 21 is asymmetrical in the left-right direction. Yes. Further, the area A 21a2 of the second end face 21s of the UBM 21a2 , the area A 21b2 of the second end face 21s of the UBM 21b2 , and the area A 21c1 of the second end face 21s of the UBM 21c1 are the areas (A 21b3) of the second end face 21s of the other UBM. , A 21a3 ).

つまり、カバー層１６におけるＵＢＭ２１の配置レイアウトの対称性を確保するためのＵＢＭ２１間の規則的な距離（Ｌａ１およびＬｂ１）に対して、これらよりも大きい距離（ＬａｃおよびＬｂｃ）を共有するＵＢＭ２１ｃ１、２１ｂ２および２１ａ２とバンプ２０ｃ１、２０ｂ２および２０ａ２との接合面積を大きくする。   In other words, the UBMs 21c1, 21b2 that share a distance (Lac and Lbc) larger than the regular distances (La1 and Lb1) between the UBMs 21 for ensuring the symmetry of the layout of the UBMs 21 in the cover layer 16. And 21a2 and the bumps 20c1, 20b2, and 20a2 are increased in bonding area.

ここで、複数のＵＢＭ２１のうち、いずれのＵＢＭ２１の第２端面２１ｓの面積を大きくするかについての規則について説明する。   Here, a rule regarding which of the plurality of UBMs 21 the area of the second end face 21s of the UBM 21 is increased will be described.

まず、圧電基板１７の表面１７ｓを平面視した場合、一の接合端子（ＵＢＭ２１）とその周囲に配置された複数の接合端子（ＵＢＭ２１）との距離のうち最小の距離を、一の接合端子のバンプ間距離と定義する。   First, when the surface 17s of the piezoelectric substrate 17 is viewed in plan, the minimum distance among the distances between one junction terminal (UBM21) and a plurality of junction terminals (UBM21) arranged around the one junction terminal (UBM21) is determined as one junction terminal. It is defined as the distance between bumps.

例えば、図８の場合、ＵＢＭ２１ｂ３と、ＵＢＭ２１ｂ３の周囲に配置されたＵＢＭ２１ｂ２、２１ａ２、および２１ａ３との距離のうち、最小の距離は、ＵＢＭ２１ａ３との距離Ｌａｂである。つまり、ＵＢＭ２１ｂ３のバンプ間距離はＬａｂである。また、ＵＢＭ２１ｂ２と、ＵＢＭ２１ｂ２の周囲に配置されたＵＢＭ２１ｃ１、２１ａ２、および２１ｂ３との距離のうち、最小の距離は、ＵＢＭ２１ａ２との距離Ｌａｂである。つまり、ＵＢＭ２１ｂ２のバンプ間距離はＬａｂである。また、ＵＢＭ２１ｃ１と、ＵＢＭ２１ｃ１の周囲に配置されたＵＢＭ２１ｂ２および２１ａ２との距離のうち、最小の距離は、ＵＢＭ２１ｂ２およびＵＢＭ２１ａ２との距離ＬｂｃおよびＬａｃである。つまり、ＵＢＭ２１ｃ１のバンプ間距離はＬｂｃ（＝Ｌａｃ）である。このようにして、各接合端子（各ＵＢＭ２１）のバンプ間距離が定義される。   For example, in the case of FIG. 8, the minimum distance among the distances between the UBM 21b3 and the UBMs 21b2, 21a2, and 21a3 arranged around the UBM 21b3 is the distance Lab with respect to the UBM 21a3. That is, the distance between bumps of the UBM 21b3 is Lab. Of the distances between the UBM 21b2 and the UBMs 21c1, 21a2, and 21b3 arranged around the UBM 21b2, the minimum distance is the distance Lab from the UBM 21a2. That is, the distance between bumps of the UBM 21b2 is Lab. Of the distances between the UBM 21c1 and the UBMs 21b2 and 21a2 arranged around the UBM 21c1, the minimum distances are the distances Lbc and Lac between the UBM 21b2 and the UBM 21a2. That is, the distance between bumps of the UBM 21c1 is Lbc (= Lac). Thus, the distance between bumps of each junction terminal (each UBM 21) is defined.

次に、接合端子（ＵＢＭ２１）ごとに定義された上記バンプ間距離のうち、最小のバンプ間距離より大きくかつ最大のバンプ間距離を有する第１接合端子を決定する。   Next, a first joint terminal having a maximum inter-bump distance greater than the minimum inter-bump distance among the inter-bump distances defined for each joint terminal (UBM21) is determined.

例えば、図８において、最小のバンプ間距離は、ＵＢＭ２１ｂ２、２１ｂ３、２１ａ２および２１ａ３のバンプ間距離Ｌａｂである。この場合、最小のバンプ間距離Ｌａｂよりも大きくかつ最大のバンプ間距離を有する接合端子は、ＵＢＭ２１ｃ１であり、このバンプ間距離はＬｂｃ（＝Ｌａｃ）である。つまり、第１接合端子は、ＵＢＭ２１ｃ１で構成された接合端子と決定される。   For example, in FIG. 8, the minimum inter-bump distance is the inter-bump distance Lab of UBMs 21b2, 21b3, 21a2, and 21a3. In this case, the joint terminal having a maximum inter-bump distance greater than the minimum inter-bump distance Lab is UBM 21c1, and the inter-bump distance is Lbc (= Lac). That is, the first joint terminal is determined as the joint terminal configured by the UBM 21c1.

次に、上記第１接合端子と上記最大のバンプ間距離を隔てて配置された第２接合端子を決定する。   Next, a second joint terminal disposed with a distance between the first joint terminal and the maximum bump distance is determined.

例えば、図８において、第１接合端子であるＵＢＭ２１ｃ１と最大のバンプ間距離ＬｂｃおよびＬａｃを隔てて配置された第２接合端子は、それぞれＵＢＭ２１ｂ２で構成された接合端子およびＵＢＭ２１ａ２で構成された接合端子である。   For example, in FIG. 8, the second joint terminals arranged with the UBM 21c1 being the first joint terminal and the maximum inter-bump distances Lbc and Lac separated from each other are the joint terminal composed of the UBM 21b2 and the joint terminal composed of the UBM 21a2. It is.

最後に、上記第１接合端子および上記第２接合端子を構成するＵＢＭ２１ｃ１、２１ｂ２および２１ａ２の第２端面２１ｓの面積を、その他の接合端子を構成するＵＢＭ２１ｂ３および２１ａ３の第２端面２１ｓの面積よりも大きく設定する。   Finally, the area of the second end face 21s of the UBMs 21c1, 21b2, and 21a2 constituting the first joining terminal and the second joining terminal is set to be larger than the area of the second end face 21s of the UBMs 21b3 and 21a3 constituting the other joining terminals. Set larger.

図９Ａは、従来の弾性波素子８０Ａのカバー層表面の平面図である。図９Ａに示すように、上行（Ｙ軸方向）のＵＢＭ８１の基本ピッチは、距離Ｌｂ１である。一方、下行（Ｙ軸方向）のＵＢＭ８１の基本ピッチは、距離Ｌａ１である。また、中央行（Ｙ軸方向）のＵＢＭ８１の、他行のＵＢＭ８１との基本ピッチは、距離Ｌｃ１である。各ＵＢＭ８１は、例外なく規則的に配置され、左右対称なＵＢＭの配置レイアウトとなっている。上記従来の弾性波素子８０Ａが実装基板に実装される場合、実装基板への実装時および使用時における温度変化に起因する各接合端子のバンプ接合部応力は均等化される。これにより、弾性波装置の機械的な信頼性を確保できる。しかしながら、弾性波装置の小型化の要請に対応すべく、弾性波素子８０Ａのようにバンプ配置レイアウトの対称性を確保しつつバンプのピッチを小さくしていくと、弾性波素子８０Ａと実装基板との間への樹脂の充填性が悪化し、弾性波素子８０Ａの気密性、耐熱性、耐水耐湿性、および絶縁性などの信頼性が低下する。   FIG. 9A is a plan view of a cover layer surface of a conventional acoustic wave device 80A. As shown in FIG. 9A, the basic pitch of the UBM 81 in the ascending direction (Y-axis direction) is a distance Lb1. On the other hand, the basic pitch of the UBM 81 in the descending direction (Y-axis direction) is the distance La1. The basic pitch of the UBM 81 in the central row (Y-axis direction) with the UBM 81 in the other row is the distance Lc1. Each UBM 81 is regularly arranged without exception, and has a symmetrical UBM arrangement layout. When the conventional acoustic wave element 80A is mounted on a mounting board, the bump bonding portion stress of each bonding terminal caused by temperature changes during mounting on the mounting board and during use is equalized. Thereby, the mechanical reliability of an elastic wave apparatus is securable. However, if the pitch of the bumps is reduced while ensuring the symmetry of the bump arrangement layout as in the elastic wave element 80A in order to meet the demand for downsizing the elastic wave device, the elastic wave element 80A and the mounting substrate As a result, the resin filling property of the elastic wave element 80A deteriorates, and the reliability of the acoustic wave element 80A, such as airtightness, heat resistance, water and moisture resistance, and insulation, decreases.

この信頼性低下の対策として、図９Ｂのような、ＵＢＭ９１の配置レイアウトが想定される。   As a countermeasure against this decrease in reliability, an arrangement layout of the UBM 91 as shown in FIG. 9B is assumed.

図９Ｂは、比較例２に係る弾性波素子９０Ａのカバー層表面の平面図である。図９Ｂに示すように、上行、中央行および下行（Ｙ軸方向）のＵＢＭ９１の基本ピッチを変更しないことで、各接合端子にかかる応力の分散効果を確保する。一方で、電気的特性に影響しないＵＢＭ９１ｂ１、９１ａ１および９１ｃ３を削除し、ＵＢＭ９１ｃ１とＵＢＭ９１ｂ２との距離、ＵＢＭ９１ｃ１とＵＢＭ９１ａ２との距離、およびＵＢＭ９１ｂ３とＵＢＭ９１ａ３との距離を大きく確保することにより、弾性波素子９０Ａと実装基板との間への樹脂の充填性を改善する。これにより、ＵＢＭ９１で囲まれた空間へ樹脂を侵入させることが可能となる。しかしながら、弾性波素子９０Ａのように、接合端子（ＵＢＭ９１）数を減らし非対称な接合端子配置とすることで、各接合端子にかかる応力は不均一となる。また、全てのＵＢＭ９１の第２端面９１ｓの面積は等しい。この配置構成では、特に、ＵＢＭ９１ｃ１を構成する接合端子の応力が、他の接合端子と比べて大きくなり、ＵＢＭ９１ｃ１を構成する接合端子の第２端面９１ｓ付近にクラックが発生する確率が高くなる。   FIG. 9B is a plan view of the cover layer surface of the acoustic wave device 90A according to Comparative Example 2. As shown in FIG. 9B, the basic pitch of the UBM 91 in the upper row, the middle row, and the lower row (Y-axis direction) is not changed, thereby ensuring the effect of dispersing the stress applied to each joint terminal. On the other hand, the UBM 91b1, 91a1, and 91c3 that do not affect the electrical characteristics are deleted, and the distance between the UBM 91c1 and the UBM 91b2, the distance between the UBM 91c1 and the UBM 91a2, and the distance between the UBM 91b3 and the UBM 91a3 are ensured. Improves resin filling property between PCB and mounting board. As a result, the resin can enter the space surrounded by the UBM 91. However, the stress applied to each joint terminal becomes non-uniform by reducing the number of joint terminals (UBM 91) and providing an asymmetric joint terminal arrangement like the acoustic wave element 90A. Further, the areas of the second end faces 91s of all the UBMs 91 are equal. In this arrangement configuration, in particular, the stress of the joining terminal constituting the UBM 91c1 becomes larger than that of other joining terminals, and the probability that a crack is generated in the vicinity of the second end face 91s of the joining terminal constituting the UBM 91c1 is increased.

これに対して、本実施の形態に係る弾性波素子１０Ｃの構成によれば、図８に示すように、第１接合端子（ＵＢＭ２１ｃ１）と第２接合端子（ＵＢＭ２１ｂ２および２１ａ２）との間のバンプ間距離ＬｂｃおよびＬａｃが、他のバンプ間距離よりも大きいので、樹脂の充填性を向上させることができる。さらに、第１接合端子（ＵＢＭ２１ｃ１）および第２接合端子（ＵＢＭ２１ｂ２および２１ａ２）の第２端面２１ｓの面積が、その他の接合端子の第２端面の面積よりも大きい。これにより、第１接合端子（ＵＢＭ２１ｃ１）および第２接合端子（ＵＢＭ２１ｂ２および２１ａ２）の応力が低減されるので、各接合端子の応力の不均一を低減でき、第１接合端子（ＵＢＭ２１ｃ１）および第２接合端子（ＵＢＭ２１ｂ２および２１ａ２）の第２端面付近でのクラックの発生を抑制できる。つまり、樹脂モールド時の樹脂充填性の向上と、接合端子の機械的信頼性の向上とを両立させることが可能となる。   On the other hand, according to the configuration of the acoustic wave device 10C according to the present embodiment, as shown in FIG. 8, the bump between the first joint terminal (UBM21c1) and the second joint terminal (UBM21b2 and 21a2). Since the distances Lbc and Lac are larger than the distances between the other bumps, the resin filling property can be improved. Furthermore, the area of the second end face 21s of the first joint terminal (UBM21c1) and the second joint terminal (UBM21b2 and 21a2) is larger than the areas of the second end faces of the other joint terminals. Thereby, since the stress of the 1st junction terminal (UBM21c1) and the 2nd junction terminal (UBM21b2 and 21a2) is reduced, the nonuniformity of the stress of each junction terminal can be reduced, and the 1st junction terminal (UBM21c1) and the 2nd The generation of cracks in the vicinity of the second end face of the junction terminal (UBM 21b2 and 21a2) can be suppressed. That is, it is possible to achieve both improvement in resin filling property during resin molding and improvement in mechanical reliability of the joining terminal.

（その他の実施の形態など）
以上、本発明の実施の形態に係る弾性波素子および弾性波装置について、実施の形態および変形例を挙げて説明したが、本発明の弾性波素子および弾性波装置は、上記実施の形態および変形例に限定されるものではない。上記実施の形態および変形例における任意の構成要素を組み合わせて実現される別の実施の形態や、上記実施の形態および変形例に対して本発明の主旨を逸脱しない範囲で当業者が思いつく各種変形を施して得られる変形例や、本開示の弾性波素子または弾性波装置を内蔵した各種機器も本発明に含まれる。(Other embodiments, etc.)
As described above, the elastic wave element and the elastic wave device according to the embodiment of the present invention have been described with reference to the embodiment and the modification. It is not limited to examples. Other embodiments realized by combining arbitrary components in the above embodiments and modifications, and various modifications conceivable by those skilled in the art without departing from the gist of the present invention with respect to the above embodiments and modifications. Modifications obtained by applying the above and various devices incorporating the elastic wave element or the elastic wave device of the present disclosure are also included in the present invention.

なお、実施の形態１および２に係る弾性波素子は、ＳＡＷフィルタに適用されるだけでなく、弾性境界波やＢＡＷ（Ｂｕｌｋ Ａｃｏｕｓｔｉｃ Ｗａｖｅ）を用いた弾性波フィルタであってもよい。   The elastic wave elements according to the first and second embodiments are not only applied to the SAW filter, but may be an elastic wave filter using a boundary acoustic wave or a BAW (Bulk Acoustic Wave).

なお、上記実施の形態１および２において、ＵＢＭ２１の第２端面２１ｓの面積に対応させてバンプ２０の大きさを変化させた態様を挙げたが、バンプ２０の大きさはＵＢＭ２１の第２端面２１ｓの面積に関係なく、一定であってもよい。例えば、図１において、ＵＢＭ２１ｂ１の第２端面２１ｓの面積（幅Ｌ２１ｂ１）は、ＵＢＭ２１ａ１の第２端面２１ｓの面積（幅Ｌ２１ａ１）よりも大きく、これに対応させて、バンプ２０ｂ１の幅は、バンプ２０ａ１の幅よりも広い。これに対して、ＵＢＭ２１ｂ１の第２端面２１ｓの面積がＵＢＭ２１ａ１の第２端面２１ｓの面積よりも大きくても、バンプ２０ｂ１およびバンプ２０ａ１の大きさ（幅）が等しくてもよい。つまり、本発明の特徴は、バンプ２０とＵＢＭ２１との接合面積を、接合端子の配置レイアウトに応じて変化させることにより、各接合端子にかかる応力の不均一性を緩和することであり、バンプの大きさを変化させることではない。   In the first and second embodiments, the aspect in which the size of the bump 20 is changed corresponding to the area of the second end surface 21s of the UBM 21 is described. However, the size of the bump 20 is the second end surface 21s of the UBM 21. Regardless of the area, it may be constant. For example, in FIG. 1, the area (width L21b1) of the second end face 21s of the UBM 21b1 is larger than the area (width L21a1) of the second end face 21s of the UBM 21a1, and the width of the bump 20b1 is corresponding to the bump 20a1. Wider than the width of. On the other hand, even if the area of the second end face 21s of the UBM 21b1 is larger than the area of the second end face 21s of the UBM 21a1, the size (width) of the bump 20b1 and the bump 20a1 may be equal. That is, the feature of the present invention is to reduce the non-uniformity of stress applied to each joint terminal by changing the joint area between the bump 20 and the UBM 21 according to the layout of the joint terminals. It is not changing the size.

本発明は、熱衝撃に対する耐性が高い小型かつ低背の弾性波装置として、携帯電話機などの通信機器に広く利用できる。   INDUSTRIAL APPLICABILITY The present invention can be widely used in communication equipment such as a mobile phone as a small and low profile elastic wave device having high resistance to thermal shock.

１ 弾性波装置
１０、１０Ａ、１０Ｂ、１０Ｃ、６０Ａ、７０Ａ、８０Ａ、９０Ａ 弾性波素子
１１ ＩＤＴ電極
１２ 振動部
１３ 電極パッド
１４ 中空空間
１５ 支持層
１６ カバー層
１７ 圧電基板
１７ｓ 表面
２０、２０ａ１、２０ｂ１、７０、７０ａ１、７０ｂ１ バンプ
２１、２１ａ１〜２１ａ４、２１ｂ１〜２１ｂ５、２１ｃ１、６１、６１ａ１〜６１ａ４、６１ｂ１〜６１ｂ５、７１、７１ａ１〜７１ａ４、７１ｂ１、７１ｂ３〜７１ｂ５、８１、８１ａ１〜８１ａ３、８１ｂ１〜８１ｂ３、８１ｃ１、８１ｃ３、９１、９１ａ２、９１ａ３、９１ｂ２、９１ｂ３、９１ｃ１ ＵＢＭ（アンダーバンプメタル）
２１ｓ、７１ｓ 第２端面
２１ｔ、７１ｔ 第１端面
３０ 実装基板
３０ａ、３０ｂ 主面
３１ ランド電極
４０ 樹脂部材
１３１ 端子電極
１３２ 配線電極DESCRIPTION OF SYMBOLS 1 Elastic wave apparatus 10, 10A, 10B, 10C, 60A, 70A, 80A, 90A Elastic wave element 11 IDT electrode 12 Vibration part 13 Electrode pad 14 Hollow space 15 Support layer 16 Cover layer 17 Piezoelectric substrate 17s Surface 20, 20a1, 20b1 70, 70a1, 70b1 Bump 21, 21a1 to 21a4, 21b1 to 21b5, 21c1, 61, 61a1 to 61a4, 61b1 to 61b5, 71, 71a1 to 71a4, 71b1, 71b3 to 71b5, 81, 81a1 to 81a3, 81b1 to 81b3 81c1, 81c3, 91, 91a2, 91a3, 91b2, 91b3, 91c1 UBM (under bump metal)
21s, 71s 2nd end surface 21t, 71t 1st end surface 30 Mounting board 30a, 30b Main surface 31 Land electrode 40 Resin member 131 Terminal electrode 132 Wiring electrode

Claims (6)

互いに背向する第１主面および第２主面を有する基板と、
前記基板に形成され、弾性波を励振する弾性波励振部と、
前記第１主面上に形成され、前記弾性波励振部と接続された電極パッドと、
互いに背向する第１端面および第２端面を有し、前記第１端面が前記電極パッドに接合された中間電極と、
前記中間電極の前記第２端面に接合されたバンプと、を備え、
前記第１主面上には、前記電極パッド、前記中間電極および前記バンプがこの順で接合された接合端子が３以上配置されており、
前記第１主面を平面視した場合、一の前記接合端子とその周囲に配置された複数の接合端子との距離のうち最小の距離を、前記一の接合端子のバンプ間距離と定義し、
前記接合端子ごとに定義された前記バンプ間距離のうち、最小の前記バンプ間距離より大きくかつ最大の前記バンプ間距離を有する第１接合端子、および、当該第１接合端子と前記最大のバンプ間距離を隔てて配置された第２接合端子の少なくとも一方の前記第２端面の面積は、その他の接合端子の前記第２端面の面積よりも大きい、
弾性波素子。A substrate having a first main surface and a second main surface facing away from each other;
An elastic wave excitation unit formed on the substrate for exciting elastic waves;
An electrode pad formed on the first main surface and connected to the elastic wave excitation unit;
An intermediate electrode having a first end face and a second end face facing away from each other, wherein the first end face is joined to the electrode pad;
A bump bonded to the second end surface of the intermediate electrode,
On the first main surface, three or more bonding terminals in which the electrode pad, the intermediate electrode, and the bump are bonded in this order are arranged,
When the first main surface is viewed in plan, the minimum distance among the distances between the one junction terminal and the plurality of junction terminals arranged around the one junction terminal is defined as the inter-bump distance of the one junction terminal,
Of the inter-bump distances defined for each of the joint terminals, a first joint terminal having a maximum inter-bump distance that is greater than a minimum inter-bump distance, and between the first joint terminal and the maximum bump The area of the second end face of at least one of the second joint terminals arranged at a distance is larger than the area of the second end face of the other joint terminals.
Elastic wave element. 前記第２接合端子の次に前記第１接合端子に近い第３接合端子の前記第２端面の面積は、前記その他の接合端子の前記第２端面の面積よりも大きい、
請求項１に記載の弾性波素子。The area of the second end face of the third joint terminal close to the first joint terminal next to the second joint terminal is larger than the area of the second end face of the other joint terminals.
The acoustic wave device according to claim 1. 前記第１接合端子および前記第２接合端子のうち、いずれか一方のみの前記第２端面の面積は、前記その他の接合端子の前記第２端面の面積よりも大きい、
請求項１または２に記載の弾性波素子。The area of the second end face of only one of the first joint terminal and the second joint terminal is larger than the area of the second end face of the other joint terminals.
The elastic wave device according to claim 1. 前記基板は、前記第１主面を平面視した場合に矩形形状を有し、
前記第１接合端子および前記第２接合端子のうち、前記基板の四隅に近い方の接合端子の前記第２端面の面積は、前記その他の接合端子の前記第２端面の面積よりも大きい、
請求項１〜３のいずれか１項に記載の弾性波素子。The substrate has a rectangular shape when the first main surface is viewed in plan,
Of the first junction terminal and the second junction terminal, the area of the second end surface of the junction terminal closer to the four corners of the substrate is larger than the area of the second end surface of the other junction terminals.
The elastic wave element of any one of Claims 1-3. 前記第１接合端子および前記第２接合端子の少なくとも一方は、複数配置されている、
請求項１〜４のいずれか１項に記載の弾性波素子。A plurality of at least one of the first joint terminal and the second joint terminal are arranged,
The elastic wave element of any one of Claims 1-4. 請求項１〜５のいずれか１項に記載の弾性波素子と、
前記バンプが接合され、前記弾性波素子と対向配置された実装基板と、
前記実装基板に接し、前記弾性波素子を覆うように配置された樹脂部材と、を備えた弾性波装置であって、
前記基板は圧電基板であり、
前記弾性波励振部は、前記第１主面上に設けられたＩＤＴ電極であり、
前記弾性波素子は、さらに、
前記第１主面上の前記ＩＤＴ電極が設けられた領域の周囲に立設され、前記ＩＤＴ電極より前記第１主面からの高さが高い支持層と、
前記第１主面とで前記支持層を挟んで配置され、前記ＩＤＴ電極を覆うカバー層と、を備え、
前記中間電極は、前記支持層に接し前記カバー層を貫通するように配置され、
前記基板、前記支持層および前記カバー層によって、前記ＩＤＴ電極を含む内部空間が形成され、
前記樹脂部材は、前記内部空間には形成されず、前記カバー層と前記実装基板との間であって複数の前記バンプの間に形成されている、
弾性波装置。The elastic wave device according to any one of claims 1 to 5,
A mounting substrate in which the bumps are bonded and arranged to face the acoustic wave element;
An elastic wave device comprising: a resin member disposed in contact with the mounting substrate and covering the elastic wave element;
The substrate is a piezoelectric substrate;
The elastic wave excitation unit is an IDT electrode provided on the first main surface,
The acoustic wave device further includes:
A support layer that is erected around the region on the first main surface where the IDT electrode is provided, and has a height higher than the IDT electrode from the first main surface;
A cover layer disposed with the support layer sandwiched between the first main surface and covering the IDT electrode,
The intermediate electrode is disposed so as to contact the support layer and penetrate the cover layer,
An internal space including the IDT electrode is formed by the substrate, the support layer, and the cover layer,
The resin member is not formed in the internal space, and is formed between the cover layer and the mounting substrate and between the plurality of bumps.
Elastic wave device.
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