JP6440734B2 - マルチスレッディング・コンピュータ・システムにおける利用を追跡するコンピュータ実装方法、システムおよびコンピュータ・プログラム - Google Patents
マルチスレッディング・コンピュータ・システムにおける利用を追跡するコンピュータ実装方法、システムおよびコンピュータ・プログラム Download PDFInfo
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Description
キー動作の結果としてマルチスレッディング機構が無効化される場合、非ゼロスレッド識別情報を有するすべてのCPUのアーキテクテッド・レジスタ・コンテキストを保持することができる。クリア・リセットの介在なしにマルチスレッディング機構が後で再度有効化される場合、非ゼロのスレッド識別情報を有するすべてのCPUのアーキテクテッド・レジスタ・コンテキストが復元される。
あるいは、発行ユニット(例えば図3の発行ユニット214)または命令フェッチ・ユニット(例えば図3の命令フェッチ・ユニット210)からの情報を使用して、完了済み命令数をカウンタ802に示すことができる。
Claims (9)
- マルチスレッディング(MT)モードで動作するように構成されたコアを含む構成における利用を追跡するためのコンピュータ実装方法であって、前記MTモードは前記コアの共用資源上で複数のスレッドをサポートし、前記方法は、
複数組のカウンタを含む複数の利用カウンタをリセットすることと、
前記コア上での各クロック・サイクルについて、
前記コア上で現在アクティブであるスレッドの数に基づいて、前記複数組のカウンタから1組のカウンタを選択すること、
前記コアの前記複数のスレッドにおける1つまたは複数の実行イベントの集約に基づいて、前記選択された1組のカウンタ内のカウンタをインクリメントすること、および
前記利用カウンタの値をソフトウェア・プログラムに供給すること、を実行することとを含む方法。 - 前記実行イベントがクロック・サイクルを含み、前記選択された1組のカウンタ内の前記カウンタが1だけインクリメントされる、請求項1に記載の方法。
- 前記実行イベントが命令完了をさらに含み、前記選択された1組のカウンタ内の他のカウンタが、前記クロック・サイクル中に現在アクティブであるすべてのスレッド上の命令完了の数に基づいてインクリメントされる、請求項2に記載の方法。
- 前記実行イベントがキャッシュ・ミスをさらに含み、前記選択された1組のカウンタ内の他のカウンタが、前記クロック・サイクル中に現在アクティブであるすべてのスレッド上のキャッシュ・ミスの数に基づいてインクリメントされる、請求項2に記載の方法。
- 前記実行イベントが分岐予測誤りをさらに含み、前記選択された1組のカウンタ内の他のカウンタが、前記クロック・サイクル中に現在アクティブであるすべてのスレッド上の分岐予測誤りの数に基づいてインクリメントされる、請求項2に記載の方法。
- スレッドは、スレッドが有効であって待ち状態ではない場合に現在アクティブである、請求項2に記載の方法。
- 前記ソフトウェア・プログラムがオペレーティング・システムまたはハイパーバイザである、請求項1に記載の方法。
- 請求項1ないし7のいずれかに記載の方法のすべてのステップを実行するために適応された手段を含むシステム。
- 請求項1ないし7のいずれかに記載の方法のすべてのステップをコンピュータに実行させるためのコンピュータ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US14/226,980 | 2014-03-27 | ||
US14/226,980 US10102004B2 (en) | 2014-03-27 | 2014-03-27 | Hardware counters to track utilization in a multithreading computer system |
PCT/EP2015/055571 WO2015144499A1 (en) | 2014-03-27 | 2015-03-17 | Hardware counters to track utilization in a multithreading computer system |
Publications (2)
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JP2017509078A JP2017509078A (ja) | 2017-03-30 |
JP6440734B2 true JP6440734B2 (ja) | 2018-12-19 |
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JP2016556893A Active JP6440734B2 (ja) | 2014-03-27 | 2015-03-17 | マルチスレッディング・コンピュータ・システムにおける利用を追跡するコンピュータ実装方法、システムおよびコンピュータ・プログラム |
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US (2) | US10102004B2 (ja) |
JP (1) | JP6440734B2 (ja) |
CN (1) | CN106104487B (ja) |
DE (1) | DE112015001477T5 (ja) |
GB (1) | GB2540070B (ja) |
WO (1) | WO2015144499A1 (ja) |
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