JP6435794B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device.

Some DC-DC converters use a power semiconductor module incorporating a diode chip.
FIG. 5 is a cross-sectional view of an example of such a power semiconductor module. FIG. 6 is a plan view of the power semiconductor module shown in FIG. 5 is a cross-sectional view taken along line VV in FIG. In the power semiconductor module 101 shown in FIGS. 5 and 6, a semiconductor chip 106 is mounted on an insulating substrate 102. The insulating substrate 102 includes an insulating plate 103, a circuit board 104 formed on one main surface of the insulating plate 103, and a heat radiating plate 105 formed on the other main surface of the insulating plate 103. The circuit board 104 is selectively formed on the insulating plate 103 so as to form a circuit pattern, and a semiconductor chip 106 is joined to the circuit board 104 by solder 107.

  The resin case 109 is bonded to the insulating substrate 102 with an adhesive 110. The resin case 109 is integrally provided with an external terminal 111a and an external terminal 111b. One end of the external terminal 111a and the semiconductor chip 106 are electrically connected by a bonding wire 112a, and one end of the external terminal 111b and the circuit board 104 of the insulating substrate 102 are electrically connected by 112b.

Further, a sealing material 113 made of an insulating thermosetting resin such as an epoxy resin is injected into the resin case 109 in which the bonding wire 112 a and the bonding wire 112 b are wired, and solidified, so that the circuit board 104 in the resin case 109 is solidified. In addition, the semiconductor chip 106, the external terminals 111a and 111b, the bonding wires 112a and 112b, and the like are protected. In FIG. 6, the sealing material 113 is not shown for easy understanding.
A semiconductor device having the above structure is described in Patent Document 1.

  In recent years, in order to increase the thermal conductivity of an insulating substrate and enhance the heat dissipation effect, there is one in which an organic insulating plate containing a heat conductive filler is used as an insulating plate constituting the insulating substrate. The organic insulating plate containing such a heat conductive filler has a relatively small thermal expansion coefficient, and therefore, the difference in thermal expansion coefficient from the heat radiating plate is relatively large, thereby increasing the initial warpage of the insulating substrate.

  Moreover, in order to improve the heat resistance and pressure resistance of a power semiconductor module, there is one in which an epoxy resin is used as a sealing material. Since the epoxy resin has a large cure shrinkage rate, after injecting the sealing material into the case and solidifying it, the resin case is pulled toward the center by the shrinkage of the sealing material, and the insulation that adheres to this resin case The substrate is also pulled in the same manner, causing warpage of the insulating substrate. Since the heat sink is attached to the cooler in the insulating substrate, suppressing the warpage of the insulating substrate is important for improving the adhesion to the cooler.

  With respect to a substrate for reducing warpage, there is a substrate in which a resin is formed flat on one surface opposite to a main surface of a patterned metal plate and a recess is provided on the surface of the resin (Patent Document 2). Further, there is a power semiconductor device in which a metal base is divided into a plurality of pieces and a partition plate is provided between the metal bases (Patent Document 3).

Utility Model Registration No. 3191112 JP-A-10-270830 Japanese Patent Laid-Open No. 10-93016

However, Patent Document 2 and Patent Document 3 still have room for improvement with respect to suppression of warpage of the insulating substrate.
Therefore, an object of the present invention is to provide a semiconductor device capable of adjusting the warpage of an insulating substrate within an appropriate range.

In order to achieve the above object, the following semiconductor device is provided.
The semiconductor device accommodates an insulating substrate formed by sequentially stacking a circuit board, an organic insulating plate, and a heat sink, a semiconductor element bonded to the circuit board of the insulating substrate, and the insulating substrate and the semiconductor element. A resin case, an external terminal formed integrally with the resin case, one end exposed inside the resin case and the other end extending outward from the resin case, and a front surface of the semiconductor element A bonding wire electrically connected to at least one of the formed electrode and the circuit board of the insulating substrate and electrically connected to one end of the external terminal, and injected into the resin case and solidified. And a sealing material made of a thermosetting resin for sealing the semiconductor element, the insulating substrate, and the bonding wire. In the heat sink of the insulating substrate, a groove is formed linearly along the short side direction in the central portion in the longitudinal direction of the insulating substrate, and the resin case includes the partition plate of the sealing material, A partition plate is positioned on an extension line in the thickness direction of the heat sink from a groove formed in the heat sink of the insulating substrate.

  According to the present invention, it is possible to adjust the warpage of the insulating substrate so as to be flat or within a certain amount of warpage within a predetermined range.

It is sectional drawing of the power semiconductor module of Embodiment 1 of this invention. It is explanatory drawing of the power semiconductor module of FIG. It is explanatory drawing of the power semiconductor module of Embodiment 2 of this invention. It is a graph which shows the relationship between the thickness of a heat sink, and the displacement amount from the target value of the curvature of an insulated substrate. It is sectional drawing of an example of the conventional power semiconductor module. It is a top view of the power semiconductor module of FIG.

(Embodiment 1)
Embodiments of a semiconductor device of the present invention will be specifically described with reference to the drawings.
A semiconductor device according to Embodiment 1 of the present invention is shown in a sectional view in FIG. The semiconductor device of this embodiment is configured as a power semiconductor module 1. A plurality of semiconductor chips 6 are mounted on the insulating substrate 2.

  The insulating substrate 2 includes an organic insulating plate 3, a circuit board 4 formed on one main surface of the organic insulating plate 3, and a heat radiating plate 5 formed on the other main surface of the organic insulating plate 3. In other words, the insulating substrate 2 is formed by sequentially laminating the circuit board 4, the organic insulating board 3, and the heat sink 5. The insulating substrate 2 has a substantially rectangular planar shape.

The organic insulating plate 3 is made of an insulating resin such as an epoxy resin. The organic insulating plate 3 preferably contains a filler in order to improve the thermal conductivity. The degree of warping of the insulating substrate 2 varies depending on the presence or absence of the filler and the amount of filler. Therefore, it is possible to adjust the warpage by adjusting the amount of filler. However, the amount of filler added to the organic insulating plate 3 is a preferable amount for heat conduction, and in addition, it is higher to adjust the warp by forming grooves 5a and 5b in the heat radiating plate 5 as described later. This is preferable because warpage can be adjusted while maintaining heat dissipation.
The circuit board 4 is made of copper foil, for example, and is selectively formed on the organic insulating board 3 so as to form a circuit pattern. A semiconductor chip 6 is joined to the circuit board 4 by solder 7 and is electrically and mechanically connected. However, the joining of the circuit board 4 and the semiconductor chip 6 is not limited to the solder 7 but may be a sintered material using a metal paste such as a silver paste. In addition to the semiconductor chip 6, a capacitor chip 8 is attached to the circuit board 4.

The heat radiating plate 5 is connected to a cooling plate (not shown) and transfers heat from the semiconductor chip 6. The heat sink 5 is made of a metal plate having good thermal conductivity such as aluminum or copper.
The semiconductor chip 6 is a diode in this embodiment. The number and type of semiconductor chips 6 are not limited. The semiconductor chip 6 can also use a wide band gap semiconductor such as silicon carbide (SiC) or gallium nitride (GaN) in addition to single crystal silicon as a substrate.

  The resin case 9 has a hollow (frame shape), substantially rectangular parallelepiped box shape, and a space for accommodating the insulating substrate 2 and the semiconductor chip 6 is formed. The bottom surface of the resin case 9 and the peripheral edge of the organic insulating plate 3 of the insulating substrate 2 are bonded by the adhesive 10, eliminating the gap between the resin case 9 and the insulating substrate, and the sealing material 13 leaks out from the gap. Is preventing. The resin case 9 is preferably made of a resin such as polyphenylene sulfide resin (PPS resin). The resin case 9 is integrally provided with external terminals 11a and external terminals 11b made of leads by transfer molding using a mold. One end of the external terminal 11 a and the external terminal 11 b is exposed inside the resin case 9. In addition, one end of the external terminal 11a and the semiconductor chip 6 are electrically connected by a bonding wire 12a, and one end of the external terminal 11b and the circuit board 4 of the insulating substrate 2 are electrically connected by a bonding wire 12b.

  A sealing material 13 made of an insulating thermosetting resin such as epoxy resin or urethane resin is injected from the opening at the upper end of the resin case 9 after the bonding wire 12a and the bonding wire 12b are wired, and further solidified. Thus, the circuit board 4, the semiconductor chip 6, the external terminals 11a and 11b, the bonding wires 12a and 12b, etc. in the resin case 9 are protected.

  2A is a plan view of the power semiconductor module 1 of FIG. 1, FIG. 2B is a cross-sectional view taken along line bb of FIG. 2A, and FIG. The rear view of the power semiconductor module 1 is shown, respectively. 1 is a cross-sectional view taken along the line II in FIG. 2A, and FIG. 2B is a cross-sectional view taken along the line IIb-IIb in FIG. 2A and 2B, the sealing material 13 is not shown for easy understanding. The power semiconductor module 1 of the present embodiment has a groove 5a that extends linearly from the center in the longitudinal direction to the heat sink 5 of the insulating substrate 2 in the lateral direction. Moreover, it has the groove | channel 5b extended linearly in a longitudinal direction from the center part of a transversal direction.

  The effects of the grooves 5a and 5b will be described. When the power semiconductor module 1 is assembled, the insulating substrate 2 preferably has a slight warp that is substantially flat or convex outward. Further, it is preferable that the amount of warping when convexing outward falls within a certain amount within a predetermined range. Regarding the warpage of the insulating substrate 2, the manufacturing method of the insulating substrate 2 will be described. The insulating substrate 2 before being assembled into the power semiconductor module 1 includes the circuit board 4, the organic insulating board 3, and the heat sink 5 in order. It is manufactured by laminating and pressing by hot pressing. The manufactured insulating substrate 2 has a difference between the linear expansion coefficient of the organic insulating plate 3 and the linear expansion coefficient of the heat radiating plate 5, and thus may not have a desired shape of warpage. For example, depending on the presence / absence (addition amount) of filler that can be included in the organic insulating plate 3 and the material of the heat sink 5, the warp that is concave outward when the power semiconductor module 1 is assembled (this is referred to as “reverse anti-reverse” May even occur).

  In this respect, in the power semiconductor module 1 of the present embodiment, since the grooves 5a and 5b are formed in the heat radiating plate 5 of the insulating substrate 2, the linear expansion coefficient of the organic insulating plate 3 and the linear expansion coefficient of the heat radiating plate 5 are It is possible to reduce the amount of warping due to the difference. Further, since the grooves 5a and 5b are formed in the heat radiating plate 5, the bending rigidity of the heat radiating plate 5 is lowered, thereby solidifying the sealing material 13 injected into the resin case 9 when the power semiconductor module 1 is assembled. It is possible to easily adjust the warp due to shrinkage to a predetermined range.

Warpage of the insulating substrate 2 occurs not only in the longitudinal direction but also in the lateral direction. Therefore, the power semiconductor module 1 of the present embodiment has not only the groove 5a but also the groove 5b.
The groove 5a is preferably a central portion in the longitudinal direction of the insulating substrate 2. The central portion is not necessarily limited to the middle position that bisects the longitudinal direction. The groove 5a should just be located in the center part when classifying a longitudinal direction into a center part and an edge part. Although one groove 5a is sufficient although it depends on the size of the insulating substrate 2, two or more grooves 5a may be provided in the central portion.
The groove 5b is preferably the central portion of the insulating substrate 2 in the short direction. The central portion is not necessarily limited to the middle position that bisects the short direction. It suffices if the groove 5b is located in the center when the short direction is classified into the center and the end. Although one groove 5b is sufficient although it depends on the size of the insulating substrate 2, two or more grooves 5b may be provided in the central portion.

The cross-sectional shapes of the grooves 5a and 5b can be V-grooves as shown in FIG. The groove is not limited to a V groove, and may be a U groove. The processing method for forming the grooves 5a and 5b is not particularly limited, but cutting with an end mill or the like can be performed.
The widths of the grooves 5a and 5b, that is, the widths of the openings of the grooves 5a and 5b on the surface of the heat radiating plate 5, depending on the processing tool, can be set to 1 mm or less, for example.

The depth of the grooves 5a and 5b, that is, the distance in the thickness direction from the surface of the heat sink 5 to the deepest portion of the grooves 5a and 5b is 20 times the thickness of the heat sink 5 in consideration of the bending strength of the insulating substrate 2. It is preferable to be about ˜50%.
The groove 5 a and the groove 5 b may be formed on the surface of the heat radiating plate 5 on the side facing the organic insulating plate 3. In this case, the groove 5a and the groove 5b are formed on the surface of the heat radiating plate 5 before being bonded to the organic insulating plate 3 by hot pressing.

  The power semiconductor module of this embodiment shown in FIG. 1 includes partition plates 9 a and 9 b that partition the sealing material 13 in the resin case 9. The partition plate 9a extends along the short direction at the center portion in the longitudinal direction of the resin case 9, and the partition plate 9b extends along the longitudinal direction at the center portion in the short direction.

  The power semiconductor module 1 according to the present embodiment includes four partitions divided by partition plates 9a and 9b. The sealing material 13 is solidified for each partitioned section. Therefore, since the area when the sealing material 13 contracts is divided, the compressive force acting on the insulating substrate 2 is smaller than when the partition plate is not provided. Therefore, the amount of warping of the insulating substrate 2 can be reduced, and the warping of the insulating substrate 2 can be easily controlled by suppressing the insulating substrate 2 from being excessively warped.

  The partition plates 9a and 9b are formed simultaneously with the resin case 9 by transfer molding using the same material as the resin case 9. The width of the partition plates 9a and 9b may be about 1 to 2 mm as a size that can be molded by a mold.

  As for the partitioning of the sealing material 13 in the resin case by the partition plates 9a and 9b, the shrinkage of the sealing materials 13 partitioned by the partition plates 9a and 9b is preferably as much as possible. In the power semiconductor module 1 shown in FIGS. 1 and 2, the sealing material 13 is divided into four parts by the partition plates 9a and 9b, but the number of divisions is not limited to four.

The partition plates 9a and 9b are provided so as to avoid the semiconductor chip 6 and the bonding wire 12a according to the size and arrangement of the semiconductor chip 6 and the bonding wire 12a. In the illustrated example, one of the semiconductor chip 6, the bonding wire 12a, and the bonding wire 12b is accommodated in each of the four sections.
Further, when the partition plate 9b is provided near the semiconductor chip 6 between the semiconductor chip 6 and the bonding wire 12b, the progress of the resin peeling from the fillet portion of the solder 7 joining the semiconductor chip 6 is suppressed. And can improve reliability. However, it must be avoided that the wire bonder connecting the bonding wire 12a to the electrode formed on the front surface of the semiconductor chip 6 interferes with the partition plate 9b. Therefore, it is preferable to provide the partition plate 9b at a position close to the semiconductor chip 6 as far as the wire bonder does not interfere with the partition from the viewpoint of manufacturing.

  The partition plates 9a and 9b and the insulating substrate 2 are preferably bonded with an adhesive. However, as long as the sealing material 13 in the resin case 9 is substantially separated by the partition plates 9a and 9b, it does not necessarily have to be bonded.

  The partition plates 9 a and 9 b are preferably provided so as to be located on the extended line in the thickness direction of the heat sink 5 from the grooves 5 a and 5 b of the heat sink 5 of the insulating substrate 2. In other words, when the power semiconductor module 1 is viewed from above, the positions of the partition plates 9a and 9b are made to coincide with the positions of the grooves 5a and 5b. The partition plates 9a and 9b and the grooves 5a and 5b face each other with the organic insulating plate 3 interposed therebetween. Thereby, the shrinkage of the sealing material 13 and the warp of the insulating substrate 2 can be adjusted, and the warp amount of the insulating plate can be adjusted to an appropriate range.

  It is preferable that the upper ends of the partition plates 9a and 9b are located in the same plane as the upper end of the resin case 9. In other words, the height of the partition plates 9a and 9b is the same as the height of the side wall of the resin case 9. is there. As a result, the sealing material 13 can be injected to the vicinity of the upper ends of the partition plates 9a and 9b, so that the insulation performance of the bonding wires 12a and 12b by the sealing material 13 can be maintained high. In addition, since the upper ends of the partition plates 9 a and 9 b are positioned on the same plane as the upper end of the resin case 9, other components can be placed on the power semiconductor module 1.

(Embodiment 2)
FIG. 3 is a plan view (FIG. 3A) and a cross-sectional view (FIG. 3B) of the semiconductor device according to the second embodiment of the present invention. FIG. 3B is a cross-sectional view taken along the line IIIb-IIIb in FIG. Further, in FIG. 3B, the sealing material 13 is not shown for easy understanding. In FIG. 3, the same members as those shown in FIGS. 1 and 2 are denoted by the same reference numerals as those in FIGS. Therefore, in this embodiment, the overlapping description about the same member as the power semiconductor module 1 of Embodiment 1 is abbreviate | omitted.

  In the power semiconductor module 21 of the present embodiment, the resin case 9 has a protruding portion 9 c that partially protrudes from the upper surface of the resin case 9. The protrusions 9c are arranged at one corner on the upper surface of the resin case 9 at positions adjacent to the corner along the longitudinal and short sides of the resin case 9, and along one side in the longitudinal direction. Two are formed.

  By having the protruding portion 9 c, the sealing material 13 can be injected in such an amount as to fill the upper surface of the resin case 9. Thereby, the insulation by the sealing material 13 can be sufficiently ensured. Further, even when the sealing material 13 rides on the upper surface of the resin case 9 during the injection of the sealing material 13 or after the sealing material 13 is injected and transported before solidification, the sealing material 13 is sealed. The material 13 goes around the side surface of the protruding portion 9c and does not ride on the upper surface. Therefore, the power semiconductor module 21 of this embodiment does not have a poor appearance. Moreover, workability | operativity when inject | pouring the sealing material 13 can be improved. Furthermore, since the sealing material 13 does not run on the upper surface of the protrusion 9c on the upper surface of the resin case 9, even when a flat plate for mounting a lid or a part is mounted on the resin case 9, This does not cause a decrease in adhesiveness.

  The number of the protrusions 9c may be at least three from the viewpoint that the lid can be supported flat. However, in consideration of the dimensional accuracy of the resin case 9 and the accuracy of the height of the protrusion 9c, it is adjacent to the corner portion along the longitudinal direction and the short direction of the case 9 as shown in FIG. In addition, it is preferable that each has a protrusion 9c.

  Further, it is desirable that the position of the protruding portion 9c is a position that does not interfere with the pressing jig when the bonding wire 12a and the bonding wire 12b are wire bonded.

  The height of the protruding portion 9c from the upper surface of the resin case 9 is sufficient if it is about 0.1 to 1 mm as a height that does not ride on the protruding portion 9c even when the sealing material 13 rides on the upper surface. is there.

In the power semiconductor module 1 of the first embodiment, an aluminum plate is used as the heat sink 5 of the insulating substrate 2, and the relationship between the thickness of the heat sink and the amount of displacement from the target value of the warp of the insulating substrate is graphed. The result is shown in FIG.
As the thickness of the heat sink 5 increases, the amount of warpage per unit length decreases. And in this Embodiment 1, since partition plate 9a, 9b is provided and the area of the sealing material 13 is divided | segmented, since the groove | channel 5a, 5b is formed in the heat sink 5, hardening of the sealing material 13 is carried out. The shrinkage rate can be apparently reduced, and the amount of displacement from the target value can be adjusted small. In FIG. 4, the amount of displacement from the target value could be reduced by 20 to 2.5%.

DESCRIPTION OF SYMBOLS 1 Power semiconductor module 2 Insulation board 3 Organic insulation board 4 Circuit board 5 Heat sink 5a, 5b Groove 6 Semiconductor chip 9 Resin case 9a, 9b Partition plate 9c Protrusion part 11a, 11b External terminal 12a, 12b Bonding wire 13 Sealing material

Claims (5)

An insulating substrate formed by sequentially laminating a heat sink, an organic insulating plate, and a circuit board;
A semiconductor element bonded to the circuit board of the insulating substrate;
A resin case for housing the insulating substrate and the semiconductor element;
An external terminal formed integrally with the resin case, one end exposed to the inside of the resin case and the other end extending outward from the resin case;
A bonding wire electrically connected to at least one of an electrode formed on the front surface of the semiconductor element and a circuit board of the insulating substrate, and electrically connected to one end of the external terminal;
A sealing material made of a thermosetting resin that is injected and solidified inside the resin case and seals the semiconductor element, the insulating substrate, and the bonding wire;
With
In the heat sink of the insulating substrate, a groove is formed in a linear shape along the short direction in the central portion in the longitudinal direction of the insulating substrate ,
The resin case is provided with a partition plate of the sealing member, wherein the partition plate, and characterized that you position from the insulation trenches formed in the heat sink substrate on the thickness direction of the extension line of the heat radiating plate Semiconductor device.   2. The semiconductor device according to claim 1, wherein a groove is formed in a linear shape along the longitudinal direction in a central portion of the insulating substrate in the short direction of the heat sink of the insulating substrate.   The semiconductor device according to claim 1, wherein a depth of the groove of the heat sink of the insulating substrate is 20 to 50% of a thickness of the heat sink.   The semiconductor device according to claim 1, wherein an upper end of the partition plate is located in the same plane as an upper end of the resin case.   The semiconductor device according to claim 1, wherein the resin case has a protrusion partly protruding from an upper surface of the resin case.

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