JP6408857B2 - Gate driver unit and power module - Google Patents

Description

  The present invention relates to a gate driver unit and a power module.

  A power module is a device that connects at least a pair of switching elements to a power supply in series and obtains an output from between the pair of switching elements. Such a power module is used, for example, in an inverter circuit that constitutes a drive circuit for driving an electric motor. The electric motor is used as a power source of, for example, an electric vehicle (including a hybrid vehicle), a train, an industrial robot, and the like. The power module is also applied to an inverter circuit that converts electric power generated by a solar cell, a wind power generator, and other power generation devices (particularly a private power generation device) so as to match the power of a commercial power source. An example of the switching element is an insulated gate bipolar transistor (IGBT). In recent years, a silicon carbide (SiC) device has been developed as a new configuration of the switching element.

  The power module is generally controlled by a gate driver unit. The gate driver unit controls a gate current and a source current of the power module. In such a gate driver unit, a secondary circuit through which the gate current and the source current pass and a primary circuit that controls the secondary circuit are configured. The secondary circuit may be classified into a high voltage side and a low voltage side. In such a form, it is required to sufficiently increase the mutual withstand voltage of the high-voltage side secondary circuit, the low-voltage side secondary circuit, and the primary circuit. However, if the dielectric strength voltage of these circuits is increased, there is a problem that the size of the gate driver unit in plan view is increased.

JP 2013-179229 A

  The present invention has been conceived under the circumstances described above, and an object thereof is to provide a gate driver unit and a power module capable of increasing the withstand voltage while achieving downsizing.

  A gate driver unit provided by a first aspect of the present invention is a gate driver unit for controlling a gate current of a power module, and includes a first driver board and a second driver board arranged in parallel to each other, and the first driver board. 1 driver substrate and a bonding layer for bonding the second driver substrate, the first driver substrate comprises a first substrate and a first wiring pattern formed on the first substrate, And having a first inner surface facing the second driver substrate side and a first outer surface facing the opposite side to the first inner surface, the second driver substrate comprising a second base material and the second base material A second wiring pattern formed on the first driver board, and a second inner surface facing the first driver substrate side and a second outer surface facing the opposite side of the second inner surface. Is the first outside A plurality of first outer surface isolation regions insulated from each other, and the second wiring pattern is insulated from each other at the second outer surface isolation region and the second inner surface insulated from each other at the second outer surface. The plurality of second inner surface isolation regions, the plurality of first outer surface isolation regions, the plurality of second outer surface isolation regions, and the plurality of second inner surface isolation regions are the first driver board and the first The two driver boards are characterized in that they overlap each other in the thickness direction and the overlapping parts are electrically connected to each other.

  In a preferred embodiment of the present invention, a plurality of secondary regions comprising the first outer surface isolation region, the second outer surface isolation region, and the second inner surface isolation region that overlap each other and are electrically connected to each other in the thickness direction view. Prepare.

  In a preferred embodiment of the present invention, the plurality of secondary regions include a high pressure side secondary region and a low pressure side secondary region.

  In a preferred embodiment of the present invention, the plurality of secondary regions include only one high-pressure side secondary region.

  In a preferred embodiment of the present invention, the plurality of secondary regions include only three low-pressure side secondary regions.

  In a preferred embodiment of the present invention, there is provided a primary region composed of the first outer surface isolation region, the second outer surface isolation region, and the second inner surface isolation region that overlap each other and are electrically connected to each other when viewed in the thickness direction.

  In a preferred embodiment of the present invention, only one primary region is provided.

  In a preferred embodiment of the present invention, the primary region is disposed between the high-pressure side secondary region and the low-pressure side secondary region.

  In a preferred embodiment of the present invention, the first driver board and the second driver board have a long rectangular shape.

  In a preferred embodiment of the present invention, the three high voltage side secondary regions are arranged along the longitudinal direction of the first driver substrate.

  In a preferred embodiment of the present invention, the high voltage side secondary region, the primary side region, and the low voltage side secondary region are arranged in the short direction of the first driver and the second driver substrate. .

  In a preferred embodiment of the present invention, a high-voltage transformer is mounted on the first outer surface so as to straddle the high-voltage secondary region and the primary region.

  In a preferred embodiment of the present invention, a low-voltage transformer is mounted on the first outer surface so as to straddle the low-voltage secondary region and the primary region.

  In a preferred embodiment of the present invention, a high voltage side driving IC is provided on the second outer surface so as to straddle the high voltage side secondary region and the primary region.

  In a preferred embodiment of the present invention, a low-pressure side drive IC is provided on the second outer surface so as to straddle the low-pressure side secondary region and the primary region.

  In a preferred embodiment of the present invention, the high-voltage side transformer and the high-voltage side driving IC overlap each other when viewed in the thickness direction.

  In a preferred embodiment of the present invention, the low-voltage side transformer and the low-voltage side driving IC overlap each other when viewed in the thickness direction.

  In a preferred embodiment of the present invention, a plurality of built-in components mounted on the second inner surface are provided.

  In a preferred embodiment of the present invention, the built-in component is covered with the bonding layer.

  In a preferred embodiment of the present invention, each of the built-in components is a non-wire-mounted component that is surface-mounted on the second inner surface and no wire is used for mounting.

  In a preferred embodiment of the present invention, the first wiring pattern has a first outer layer formed on the first outer surface and a first inner layer formed on the first inner surface.

  In a preferred embodiment of the present invention, the first wiring pattern has a first through-hole portion that penetrates the first base material and electrically connects the first outer layer and the first inner layer.

  In a preferred embodiment of the present invention, the first through-hole portion is filled in an inner conductor layer that covers an inner surface of a through hole formed in the first base material, and a region surrounded by the inner conductor layer. Sealing material.

  In a preferred embodiment of the present invention, the second wiring pattern has a second outer layer formed on the second outer surface and a second inner layer formed on the second inner surface.

  In a preferred embodiment of the present invention, the second wiring pattern has a second through-hole portion that penetrates the second base material and electrically connects the second outer layer and the second inner layer.

  In a preferred embodiment of the present invention, the second through-hole portion is filled in an inner surface conductor layer that covers an inner surface of the through hole formed in the second base material and a region surrounded by the inner surface conductor layer. And a sealing material.

  In a preferred embodiment of the present invention, the bonding layer includes an insulating body, and the first wiring pattern of the first driver board passing through the insulating body and the second wiring pattern of the second driver board. And a through-conductive portion that conducts.

  The power module provided by the second aspect of the present invention includes a plurality of input terminals, a high voltage side circuit including a switching element, a low voltage side circuit including a switching element, a plurality of output terminals, and a plurality of sets of control terminals. And a gate driver unit provided close to the first side surface of the present invention that is electrically connected to the plurality of sets of control terminals.

  In a preferred embodiment of the present invention, three high voltage side circuits and three low voltage side circuits are provided.

  In a preferred embodiment of the present invention, the plurality of output terminals include a U-phase terminal, a V-phase terminal, and a W-phase terminal.

  In a preferred embodiment of the present invention, a plurality of sets of control terminals are provided.

  In a preferred embodiment of the present invention, the plurality of sets of control terminals include a high voltage side group and a low voltage side group.

  In a preferred embodiment of the present invention, the high-voltage side group includes a high-voltage side gate terminal.

  In a preferred embodiment of the present invention, the high-voltage side group includes a high-voltage side source terminal.

  In a preferred embodiment of the present invention, the low-voltage side group includes a low-voltage side gate terminal.

  In a preferred embodiment of the present invention, the low voltage side group includes a low voltage side source terminal.

  In a preferred embodiment of the present invention, the switching element is made of SiC.

  In preferable embodiment of this invention, the case which accommodates the said switching element is provided.

  According to the present invention, the first outer surface isolation region, the second outer surface isolation region, and the second inner surface isolation region are bulky in the thickness direction view of the first driver substrate and the second driver substrate, and They are connected to each other. As a result, the first outer surface isolation region, the second outer surface isolation region, and the second inner surface isolation region that are insulated from other parts are appropriately set, and the dimensions in plan view thereof become excessively large. Can be avoided. Therefore, the withstand voltage can be increased while reducing the size of the gate driver unit.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

It is a top view which shows the gate driver unit and power module based on 1st Embodiment of this invention. It is sectional drawing which follows the II-II line | wire of FIG. It is a circuit diagram which shows the gate driver unit and power module of FIG. It is a top view which shows the gate driver unit of FIG. It is a top view which shows the inside of the gate driver unit of FIG. It is a bottom view which shows the inside of the gate driver unit of FIG. It is a side view which shows the inside of the gate driver unit of FIG. It is a principal part expanded sectional view which shows the inside of the gate driver unit of FIG. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the gate driver unit of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the gate driver unit of FIG. 1. FIG. 3 is an enlarged cross-sectional view of a main part showing an example of a method for manufacturing the gate driver unit of FIG. 1. FIG. 8 is an enlarged cross-sectional view of a main part showing another example of the method for manufacturing the gate driver unit of FIG. FIG. 8 is an enlarged cross-sectional view of a main part showing another example of the method for manufacturing the gate driver unit of FIG. It is a top view which shows the gate driver unit and power module based on 2nd Embodiment of this invention. It is a top view which shows the gate driver unit of FIG. It is a bottom view which shows the gate driver unit of FIG. It is a side view which shows the gate driver unit of FIG. It is a principal part expanded sectional view which shows the gate driver unit based on 3rd Embodiment of this invention. It is a top view which shows the gate driver unit based on 4th Embodiment of this invention. It is principal part sectional drawing which follows the XX-XX line of FIG.

  Hereinafter, preferred embodiments of the present invention will be specifically described with reference to the drawings.

  1 to 8 show a gate driver unit and a power module according to the first embodiment of the present invention. The power module B1 of the present embodiment is a device that obtains an output by connecting power from a power source connected to a plurality of input terminals 71 to a plurality of high voltage side circuits 61 and a plurality of low voltage side circuits 62. Such a power module B1 is used, for example, in an inverter circuit constituting a drive circuit for driving an electric motor. The electric motor is used as a power source of, for example, an electric vehicle (including a hybrid vehicle), a train, an industrial robot, and the like. The power module is also applied to an inverter circuit that converts electric power generated by a solar cell, a wind power generator, and other power generation devices (particularly a private power generation device) so as to match the power of a commercial power source. The gate driver unit A1 is a unit that controls the gate current and the source current of the power module B1.

  The gate driver unit A1 of the present embodiment includes a first driver substrate 1, a second driver substrate 2, a bonding layer 3, a plurality of high-voltage transformers 51, a plurality of low-voltage transformers 52, a plurality of high-voltage drivers IC 53, and a plurality of low-voltages. A side drive IC 54 and a connector 56 are provided. Further, a primary area 41 and a plurality of secondary areas 42 are set in the gate driver unit A1. Further, the power module B1 of the present embodiment includes a plurality of high voltage side circuits 61, a plurality of low voltage side circuits 62, a plurality of input terminals 71, a plurality of output terminals 72, a plurality of control terminals 73, a case 81, and a sealing resin 82. It has.

  FIG. 1 is a plan view showing a gate driver unit A1 and a power module B1 of the present invention. 2 is a cross-sectional view taken along line II-II in FIG. FIG. 3 is a circuit diagram showing the power module B1. FIG. 4 is a plan view showing the gate driver unit A1. FIG. 5 is a plan view showing the inside of the gate driver unit A1. FIG. 6 is a bottom view showing the inside of the gate driver unit A1. FIG. 7 is a side view showing the inside of the gate driver unit A1. FIG. 8 is an enlarged cross-sectional view of a main part showing the inside of the gate driver unit A1.

  As shown in FIG. 3, the plurality of input terminals 71 are for connecting a power source for supplying power to the power module B1. In the present embodiment, a pair of input terminals 71 is employed. One input terminal 71 is for the positive electrode, and the other input terminal 71 is for the negative electrode. The plurality of output terminals 72 include a U-phase terminal 721, a V-phase terminal 722, and a W-phase terminal 723. U-phase terminal 721, V-phase terminal 722, and W-phase terminal 723 correspond to the U-phase, V-phase, and W-phase of a three-phase AC motor (not shown) that is supplied with power by, for example, power module B1.

  The pair of input terminals 71 are connected in parallel with three sets of the high-voltage side circuit 61 and the low-voltage side circuit 62, which are composed of a high-voltage circuit 61 and a low-voltage circuit 62 connected in series. A U-phase terminal 721, a V-phase terminal 722, and a W-phase terminal 723 are connected between the high-voltage side circuit 61 and the low-voltage side circuit 62 of each set.

  The high voltage side circuit 61 has a switching element 611. The switching element 611 is constituted by, for example, a MOS field effect transistor constituted by a SiC semiconductor device. Switching element 611 is not limited to a SiC semiconductor device, and other forms of switching elements such as an IGBT (Insulated Gate Bipolar Transistor) may be applied. The high voltage side circuit 61 includes, for example, a Schottky barrier diode (SBD). In particular, in this embodiment, the Schottky barrier diode is composed of a SiC semiconductor device (SiC-SBD). The high voltage side circuit 61 is connected to two high voltage side group control terminals 731 including a high voltage side gate terminal 733 and a high voltage side source terminal 734. The high-voltage side group control terminal 731 is included in the plurality of control terminals 73. The high voltage side gate terminal 733 is a terminal for the gate current of the high voltage side circuit 61. The high-voltage source terminal 734 is a source current terminal for the high-voltage circuit 61.

  The low voltage side circuit 62 has a switching element 621. The switching element 621 is configured by, for example, a MOS field effect transistor configured by a SiC semiconductor device. Switching element 621 is not limited to a SiC semiconductor device, and other forms of switching elements such as an IGBT (Insulated Gate Bipolar Transistor) may be applied. The low voltage side circuit 62 includes, for example, a Schottky barrier diode (SBD). In particular, in this embodiment, the Schottky barrier diode is composed of a SiC semiconductor device (SiC-SBD). The low-voltage side circuit 62 is connected to two low-voltage side group control terminals 732 including a low-voltage side gate terminal 735 and a low-voltage side source terminal 736. The low-voltage side group control terminal 732 is included in the plurality of control terminals 73. The low voltage side gate terminal 735 is a terminal for the gate current of the low voltage side circuit 62. The high-voltage source terminal 734 is a source current terminal for the high-voltage circuit 61.

  The plurality of control terminals 73 of the high voltage side circuit 61 and the low voltage side circuit 62 may include control terminals other than the high voltage side gate terminal 733, the high voltage side source terminal 734, the low voltage side gate terminal 735, and the low voltage side source terminal 736. . Examples of such control terminals include a source sense terminal, a feedback terminal, and a temperature detection element signal terminal for temperature detection.

  As shown in FIG. 1, in the present embodiment, the power module B1 has a long rectangular shape in plan view (viewed in the z direction). The longitudinal direction of the power module B1 is the x direction, and the short direction is the direction.

  As shown in FIG. 2, the switching element 611 constituting the high voltage side circuit 61 and the switching element 621 constituting the low voltage side circuit 62 are accommodated in a case 81. The case 81 is an element constituting the appearance of the power module B1, and is made of an insulating material.

  The internal space of the case 81 is sealed with a sealing resin 82. The sealing resin 82 is intended to protect the switching element 611, the switching element 621, and the like and to increase insulation between them and the outside.

  As shown in FIG. 1, in this embodiment, a pair of input terminals 71, a U-phase terminal 721, a V-phase terminal 722, and a W-phase terminal 723 are arranged apart from each other in plan view. Further, as shown in FIG. 1 and FIG. 2, in the present embodiment, the plurality of control terminals 73 constitute three sets of high voltage side group control terminals 731 and three sets of low voltage side group control terminals 732, Projecting in the z direction.

  As shown in FIGS. 1 and 2, the gate driver unit A1 has a rectangular shape in plan view, like the power module B1, and is disposed above the gate driver unit A1 in the z direction. Although the illustrated gate driver unit A1 is exposed to the outside, for example, the gate driver unit A1 may be further sealed with resin.

  The first driver board 1 and the second driver board 2 spread along the xy direction, and are spaced apart from each other in the z direction and arranged in parallel to each other.

  The first driver substrate 1 includes a first base material 13 and a first wiring pattern 14. The first base material 13 is made of an insulating material, for example, glass epoxy resin. The first wiring pattern 14 is formed on the first base material 13 and is made of, for example, a single type or a plurality of types of metals appropriately selected from Cu, Ni, Au, and the like. The first driver board 1 has a first outer surface 11 and a first inner surface 12. The first outer surface 11 faces the outer side opposite to the second driver board 2. The first inner surface 12 faces the inner side which is the second driver substrate 2 side.

  As shown in FIG. 8, the first wiring pattern 14 has a first outer layer 15, a first inner layer 16, and a first through hole portion 17. The first outer layer 15 is a portion formed on the first outer surface 11. The first inner layer 16 is a portion formed on the first inner surface 12. The first through-hole portion 17 penetrates the first base material 13 and electrically connects the first outer layer 15 and the first inner layer 16.

  The first through-hole portion 17 includes an inner surface conductor layer 171 that covers the inner surface of the through hole formed in the first base material 13, and a sealing material 172 filled in a region surrounded by the inner surface conductor layer 171. . The inner conductor layer 171 is made of the same material as the first outer layer 15 and the first inner layer 16. The sealing material 172 seals a region surrounded by the inner conductor layer 171 against pressure applied in a manufacturing process described later. Sealing material 172 is made of, for example, an insulating resin.

  As shown in FIG. 4, the first driver substrate 1 has a plurality of first outer surface isolation regions 18. As shown in FIG. 4, the plurality of first outer surface isolation regions 18 are formed by parts of the first outer layer 15 formed on the first outer surface 11 of the first wiring pattern 14, and are insulated from each other. They are separated from each other. In FIG. 4, the hatched band-shaped portion is a portion where the first outer layer 15 of the first wiring pattern 14 is not formed. This strip-shaped portion partitions adjacent first outer surface isolation regions 18. In the figure, elements formed in the first outer surface isolation region 18 as constituting the first outer surface isolation region 18 in the first outer layer 15 of the first wiring pattern 14 are omitted for convenience.

  The second driver board 2 includes a second base material 23 and a second wiring pattern 24. The second base material 23 is made of an insulating material, for example, glass epoxy resin. The second wiring pattern 24 is formed on the second base material 23 and is made of, for example, a single type or a plurality of types of metals appropriately selected from Cu, Ni, Au, and the like. 2 has a second outer surface 21 and a second inner surface 22. The second outer surface 21 faces the outer side opposite to the first driver board 1. The second inner surface 22 faces the inner side that is the first driver substrate 1 side.

  As shown in FIG. 8, the second wiring pattern 24 has a second outer layer 25, a second inner layer 26, and a second through hole portion 27. The second outer layer 25 is a portion formed on the second outer surface 21. The second inner layer 26 is a portion formed on the second inner surface 22. The second through-hole portion 27 penetrates the second base material 23 and electrically connects the second outer layer 25 and the second inner layer 26.

  The second through-hole portion 27 includes an inner surface conductor layer 271 that covers the inner surface of the through hole formed in the second base material 23, and a sealing material 272 that is filled in a region surrounded by the inner surface conductor layer 271. . The inner conductor layer 271 is made of the same material as the second outer layer 25 and the second inner layer 26. The sealing material 272 seals a region surrounded by the inner conductor layer 271 against a pressure applied in a manufacturing process described later. Sealing material 272 is made of, for example, an insulating resin.

  As shown in FIGS. 5 and 6, the second driver substrate 2 has a plurality of second outer surface isolation regions 28 and a plurality of second inner surface isolation regions 29.

  As shown in FIG. 6, the plurality of second outer surface isolation regions 28 are formed by portions of the second outer layer 25 formed on the second outer surface 21 of the second wiring pattern 24, and are insulated from each other. They are separated from each other. In FIG. 6, the hatched band-shaped portion is a portion where the second outer layer 25 of the second wiring pattern 24 is not formed. This belt-like portion defines the adjacent second outer surface isolation regions 28. In the figure, elements formed in the second outer surface isolation region 28 as constituting the second outer surface isolation region 28 in the second outer layer 25 of the second wiring pattern 24 are omitted for convenience.

  As shown in FIG. 5, the plurality of second inner surface isolation regions 29 are formed by portions of the second inner layer 26 formed on the second inner surface 22 of the second wiring pattern 24 and are insulated from each other. They are separated from each other. In FIG. 5, the hatched band-shaped portion is a portion where the second inner layer 26 of the second wiring pattern 24 is not formed. This belt-like portion defines the adjacent second inner surface isolation regions 29. In the figure, elements formed in the second inner surface isolation region 29 as constituting the second inner surface isolation region 29 in the second inner layer 26 of the second wiring pattern 24 are omitted for convenience.

  The bonding layer 3 bonds the first driver substrate 1 and the second driver substrate 2. In the present embodiment, the bonding layer 3 includes an insulating body 31 and a plurality of through conductive portions 32. The insulating main body 31 is made of an insulating material, for example, a mixture containing an inorganic filler and a thermosetting resin. The penetrating conductive portion 32 conducts an appropriate position of the first inner layer 16 of the first wiring pattern 14 and an appropriate position of the second inner layer 26 of the second wiring pattern 24, and penetrates the insulating body 31. The through conductive portion 32 is made of, for example, a conductive resin composition.

  As shown in FIGS. 4 to 6, in the present embodiment, three first outer surface isolation regions 18, second outer surface isolation regions 28, and three each arranged along the y direction on the right side in FIG. 4. A second inner surface isolation region 29 is formed. The first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 are arranged so as to overlap each other in plan view. In addition, three first outer surface isolation regions 18, second outer surface isolation regions 28, and second inner surface isolation regions 29 arranged along the y direction on the right side in FIG. The outer surface isolation region 18, the second outer surface isolation region 28 and the second inner surface isolation region 29 constitute one secondary region 42. The secondary region 42 is defined as a low pressure side region 422. The first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 constituting the low-pressure side region 422 are the first through hole portion 17, the first inner layer 16, the through conductive portion 32, and the second They are electrically connected to each other through the through-hole portion 27 as appropriate.

  As shown in FIGS. 4 to 6, in the present embodiment, the first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 are arranged one by one on the left side in FIG. 4. The first driver substrate 1 and the second driver substrate 2 are formed along the long sides. The first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 are arranged so as to overlap in plan view. Further, each of the first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 arranged on the left side in FIG. 4 constitutes one secondary region 42. . Further, the secondary region 42 is defined as a high-pressure side region 421. The first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 constituting the high-voltage side region 421 are the first through-hole portion 17, the first inner layer 16, the through conductive portion 32, and the second. They are electrically connected to each other through the through-hole portion 27 as appropriate.

  As shown in FIGS. 4 to 6, in the present embodiment, one first outer surface isolation region 18, second outer surface isolation region 28, and second inner surface isolation region 29 are provided one by one at the center in the left-right direction in FIG. 4. Is formed. The first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 are arranged so as to overlap in plan view. Further, each of the first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 arranged at the center in the left-right direction in FIG. 4 constitutes one primary region 41. Yes. The first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 constituting the primary region 41 are the first through hole portion 17, the first inner layer 16, the through conductive portion 32, and the second They are electrically connected to each other through the through-hole portion 27 as appropriate.

  As shown in FIG. 4, the high voltage side transformer 51 extends across the first outer surface isolation region 18 constituting the high voltage side region 421 and the first outer surface isolation region 18 constituting the primary region 41 on the first outer surface 11. Has been implemented. In the present embodiment, three high-voltage side transformers 51 are arranged apart from each other in the y direction. These three high voltage side transformers 51 are mounted so as to overlap one high voltage side region 421 (first outer surface isolation region 18).

  As shown in FIG. 4, the low-voltage transformer 52 extends across the first outer surface isolation region 18 constituting the low-pressure side region 422 and the first outer surface isolation region 18 constituting the primary region 41 on the first outer surface 11. Has been implemented. In the present embodiment, the three low-voltage side transformers 52 are arranged apart from each other in the y direction. Further, these three low voltage side transformers 52 are mounted so as to overlap with the three low voltage side regions 422 (first outer surface isolation region 18).

  As shown in FIG. 6, the high voltage side drive IC 53 extends across the second outer surface isolation region 28 constituting the high voltage side region 421 and the second outer surface isolation region 28 constituting the primary region 41 on the second outer surface 21. Has been implemented. In the present embodiment, three high-voltage side drive ICs 53 are arranged apart from each other in the y direction. These three high-voltage side drive ICs 53 are mounted so as to overlap one high-voltage side region 421 (second outer surface isolation region 28). As shown in FIGS. 4 and 6, the high-voltage side transformers 51 and the high-voltage side drive ICs 53 overlap each other in plan view.

  As shown in FIG. 6, the low-pressure side drive IC 54 extends across the second outer surface isolation region 28 constituting the low-pressure side region 422 and the second outer surface isolation region 28 constituting the primary region 41 on the second outer surface 21. Has been implemented. In the present embodiment, three low-voltage side drive ICs 54 are arranged apart from each other in the y direction. Further, these three low-voltage side drive ICs 54 are mounted so as to overlap with the three low-voltage side regions 422 (second outer surface isolation region 28). Further, as shown in FIGS. 4 and 6, the low-voltage transformers 52 and the low-voltage drive ICs 54 overlap each other in plan view.

  As shown in FIG. 5, a plurality of built-in components 55 are mounted on the second inner surface 22 of the second driver board 2. The plurality of built-in components 55 are covered with the bonding layer 3 (insulating body 31). Each built-in component 55 is a non-wire-mounted component that is surface-mounted on the second inner surface 22 and no wire is used for mounting. Examples of such a built-in component 55 include small passive components such as a chip resistor, a capacitor, and a diode.

  As shown in FIG. 1, three sets of high voltage side group control terminals 731 are connected to the high voltage side region 421, more specifically, the first outer surface isolation region 18 included in the high voltage side region 421. Thereby, the high voltage | pressure side area | region 421 shall control the gate current and source current of the three high voltage | pressure side circuits 61 of power module B1.

  As shown in FIG. 1, three low voltage side group control terminals 732 are provided in three low voltage side areas 422, more specifically, in the three first outer surface isolation areas 18 included in the three low voltage side areas 422. It is connected. Thereby, the low voltage | pressure side area | region 422 shall control the gate current and source current of the three low voltage | pressure side circuits 62 of power module B1.

  As shown in FIGS. 1 and 4, a connector 56 is provided in the first outer surface isolation region 18 included in the primary region 41. The connector 56 is an interface that transmits and receives a signal for controlling the gate driver unit A1 from outside the gate driver unit A1.

  Next, an example of a method for manufacturing the gate driver unit A1 will be described below with reference to FIGS.

  First, as shown in FIG. 9, a first driver board 1 and a second driver board 2 are prepared. The first driver substrate 1 includes the first base material 13 and the first wiring pattern 14 described above. The second driver board 2 includes the second base material 23 and the second wiring pattern 24 described above. In addition, the method of cut | disconnecting suitably after performing the subsequent process using the board | substrate material which can form the some 1st driver board | substrate 1 and the some 2nd driver board | substrate 2 may be used.

  Next, as shown in FIG. 10, a plurality of built-in components 55 are mounted on the second inner surface 22 of the second driver board 2. Also, a bonding layer 3 is prepared. The bonding layer 3 has a plate-like insulating body 31 made of a mixture containing an inorganic filler and a thermosetting resin, and a through conductive portion 32 made of a conductive resin composition provided so as to penetrate therethrough. As illustrated, the bonding layer 3 is disposed between the first driver substrate 1 and the second driver substrate 2 so that the first inner surface 12 and the second inner surface 22 face the bonding layer 3 respectively.

  Next, as shown in FIG. 11, the first driver substrate 1 and the second driver substrate 2 are pressed so that the bonding layer 3 is sandwiched between the first driver substrate 1 and the second driver substrate 2. And the insulation main body 31 and the penetration conductive part 32 are hardened by overheating the whole. Thereafter, the gate driver unit A1 is obtained by mounting the plurality of high-voltage side transformers 51, the plurality of low-voltage side transformers 52, the plurality of high-voltage side drive ICs 53, the plurality of low-voltage side drive ICs 54, the connectors 56, and the like. By connecting three sets of high voltage side group control terminals 731 and three sets of low voltage side group control terminals 732 to the gate driver unit A1, a power module B1 including the gate driver unit A1 is obtained.

  Next, the operation of the gate driver unit A1 and the power module B1 will be described.

  According to the present embodiment, the first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 are bulky when viewed in the thickness direction of the first driver substrate 1 and the second driver substrate 2, And they are electrically connected to each other. As a result, the first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29 that are insulated from other parts are appropriately set, and the plan view dimensions thereof become excessively large. Can be avoided. Therefore, the withstand voltage can be increased while reducing the size of the gate driver unit A1.

  By configuring the secondary region 42 by the first outer surface isolation region 18, the second outer surface isolation region 28 and the second inner surface isolation region 29, the secondary region 42 that can be made to have a relatively high voltage is reduced with respect to other regions. It can be reliably insulated.

  The plurality of secondary regions 42 individually include the high-pressure side region 421 and the low-pressure side region 422, so that the high-pressure side and the low-pressure side of the secondary circuit can be more reliably insulated.

  The configuration having only one high-pressure side region 421 and three low-pressure side regions 422 is preferable for reducing the size and improving the withstand voltage.

  By configuring the primary region 41 with the first outer surface isolation region 18, the second outer surface isolation region 28, and the second inner surface isolation region 29, the primary region 41 can be reliably insulated from the secondary region 42. .

  By disposing the primary region 41 between the high-pressure side region 421 and the low-pressure side region 422, the dielectric strength between the high-pressure side region 421 and the low-pressure side region 422 can be further increased.

  Arranging the three low-voltage side regions 422 along the long side of the first driver substrate 1 is preferable for miniaturization. In addition, it is preferable to arrange one high-voltage side region 421 along the long side of the first driver substrate 1 for miniaturization.

  By mounting the high-voltage transformer 51 so as to straddle the high-voltage region 421 and the primary region 41, the high-voltage transformer 51 can function properly while increasing the dielectric strength between the high-voltage region 421 and the primary region 41. be able to.

  By mounting the low-voltage side transformer 52 so as to straddle the low-voltage side region 422 and the primary region 41, the low-voltage side transformer 52 can function properly while increasing the withstand voltage between the low-voltage side region 422 and the primary region 41. be able to.

  By mounting the high-voltage side drive IC 53 so as to straddle the high-voltage side region 421 and the primary region 41, the high-voltage side drive IC 53 can function properly while increasing the withstand voltage between the high-voltage side region 421 and the primary region 41. be able to.

  By mounting the low-voltage side drive IC 54 so as to straddle the low-voltage side region 422 and the primary region 41, the low-voltage side drive IC 54 can function properly while increasing the withstand voltage between the low-voltage side region 422 and the primary region 41. be able to.

  By mounting a plurality of built-in components 55 on the second inner surface 22 and covering them with the bonding layer 3, these built-in components 55 can be reliably protected. Further, since the built-in component 55 is covered by the insulating body 31 of the bonding layer 3, it is possible to avoid a short circuit caused by an unintended conductor approaching the built-in component 55 or the like. Furthermore, since the built-in component 55 is a non-wire component, the concern that the wire is disconnected due to the deformation pressure of the insulating body 31 when the first driver substrate 1 and the second driver substrate 2 are bonded by the bonding layer 3 is solved. can do.

  The first through-hole portion 17 and the second through-hole portion 27 have the sealing material 172 and the sealing material 272 that can resist deformation pressure, thereby preventing the bonding layer 3 from leaking out during the bonding process. can do.

  The power module B1 including the gate driver unit A1 can be expected to perform more accurate and reliable current control because the withstand voltage in the gate driver unit A1 is increased.

  Further, since the switching element 611 and the switching element 621 are made of MOS field effect transistors formed of SiC semiconductor devices, the operating temperature of the power module B1 can be increased and the operational stability at high temperatures can be improved. it can.

  12 to 20 show a modified example and other embodiments of the present invention. In these drawings, the same or similar elements as those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.

  12 and 13 show a modification of the method for manufacturing the gate driver unit A1. In the present modification, as shown in FIG. 12, the first base material 13 in which the first inner layer 16 and the first through hole portion 17 are formed, and the second inner layer 26 and the second through hole portion 27 are formed. A second base material 23 and a bonding layer 3 are prepared. In addition, a conductive film 15A and a conductive film 25A are prepared. The conductive film 15 </ b> A is a metal plate member that becomes the first outer layer 15 of the first driver substrate 1, and the conductive film 25 </ b> A is a metal plate member that becomes the second outer layer 25 of the second driver substrate 2.

  Next, as shown in FIG. 13, the conductive film 15 </ b> A, the first base material 13, the bonding layer 3, the second base material 23, and the conductive film 25 </ b> A are stacked and bonded together. Then, patterning using etching or the like is performed on the conductive film 15A and the conductive film 25A. Thereby, the first outer layer 15 and the first inner layer 16 are formed. Thereafter, the gate driver unit A1 is obtained by mounting the plurality of high-voltage side transformers 51, the plurality of low-voltage side transformers 52, the plurality of high-voltage side drive ICs 53, the plurality of low-voltage side drive ICs 54, the connectors 56, and the like.

  Also according to such a modification, it is possible to increase the withstand voltage while reducing the size of the gate driver unit A1. Further, by using the conductive film 15A and the conductive film 25A, the first through-hole portion 17 and the second through-hole portion 27 that receive the deformation pressure of the bonding layer 3 are replaced with the conductive film 15A and the conductive film in the bonding step shown in FIG. It can be supported by the membrane 25A. This is more preferable for preventing the first through-hole portion 17 and the second through-hole portion 27 from slipping out due to the deformation pressure and leaking the bonding layer 3.

  14 to 17 show a gate driver unit according to a second embodiment of the present invention. The gate driver unit A2 of the present embodiment is different from the gate driver unit A1 described above in the arrangement of the connector 56 and the mounting posture to the power module B1.

  FIG. 14 is a plan view showing the gate driver units A2 and B2. FIG. 15 is a plan view showing the gate driver unit A2. FIG. 16 is a bottom view showing the gate driver unit A2. FIG. 17 is a side view showing the gate driver unit A2.

  In the present embodiment, as shown in FIG. 15, a connector 56 is provided on the second outer surface 21 of the second driver board 2. In addition, the gate driver unit A2 is fixed to the power module B2 with the first outer surface 11 of the first driver board 1 facing the power module B2. Also in such an embodiment, the withstand voltage can be increased while downsizing the gate driver unit A2.

  FIG. 18 is an enlarged cross-sectional view showing a main part of a gate driver unit according to the third embodiment of the present embodiment. In the gate driver unit A3 of the present embodiment, the configuration of the through conductive portion 32 of the bonding layer 3 is different from the above-described embodiment.

  In the present embodiment, the through conductive portion 32 is made of a metal member of the same type as a so-called bump. The through conductive portion 32 is, for example, a plurality of metal bumps formed at appropriate positions on the second inner layer 26 of the second inner surface 22 of the second driver substrate 2. The first driver substrate 1 and the second driver substrate 2 are joined by the insulating main body 31 while covering these metal bumps with the insulating main body 31, whereby the gate driver unit A3 is obtained. Also according to such an embodiment, the withstand voltage can be increased while reducing the size of the gate driver unit A3.

  19 and 20 are enlarged cross-sectional views of the main part showing the gate driver unit according to the fourth embodiment of the present embodiment. The gate driver unit A4 of the present embodiment is different from the above-described gate driver unit A1 and gate driver unit A2 in the configuration of the bonding layer 3. Moreover, the point provided with the intermediate | middle board | substrate 35 differs from embodiment mentioned above.

  As shown in FIG. 20, the gate driver unit A <b> 4 includes an intermediate substrate 35. The intermediate board 35 is located between the first driver board 1 and the second driver board 2 in the z direction. The first driver substrate 1 and the second driver substrate 2 are bonded by a bonding layer 3. The intermediate substrate 35 is covered with the insulating main body 31 of the bonding layer 3. In the illustrated example, two intermediate substrates 35 are spaced apart in the z direction.

  Each intermediate substrate 35 has a base material 351 and a wiring pattern 352. The base material 351 is a plate-like member made of an insulating resin such as a glass epoxy resin. The wiring pattern 352 is a layer made of metal patterned on the front and back surfaces of the insulating main body 315. In addition, the intermediate substrate 35 is provided with a through hole portion 353. The through-hole portion 353 penetrates the base material 351 and conducts the wiring pattern 352 formed on the front and back surfaces of the base material 351.

  In the present embodiment, a plurality of through-conductive portions 32 are provided. These through-conductive portions 32 are located between the first driver substrate 1 and the intermediate substrate 35, between the two intermediate substrates 35, and between the intermediate substrate 35 and the second driver substrate 2. Including those located between. These intermediate substrates 35 are made of metal bumps, for example. Through the wiring pattern 352 and the through hole portion 353 of the intermediate substrate 35 and the through-conductive portion 32, appropriate positions between the first wiring pattern 14 of the first driver substrate 1 and the second wiring pattern 24 of the second driver substrate 2 Is conducting.

  In the present embodiment, a shield region 354 is provided as shown in FIG. The shield region 354 is configured by a part of the wiring pattern 352 of any of the intermediate substrates 35, and has, for example, a rectangular shape when viewed in the z direction. In this example, the shield region 354 surrounds a predetermined portion of the primary region 41 when viewed in the z direction.

  Also according to such an embodiment, the withstand voltage can be increased while reducing the size of the gate driver unit A3. Further, by stacking the intermediate substrate 35 and the through conductive portion 32, it is possible to increase the distance between the first driver substrate 1 and the second driver substrate 2 while using the through conductive portion 32 made of bumps. For example, as shown in FIG. 20, when any z-direction dimension of the built-in component 55 is relatively large, the built-in component 55 is connected to the first driver board 1 and the second driver board 2. It is convenient to arrange them appropriately.

  By surrounding the primary region 41 in the z-direction view with the shield region 354, it is possible to prevent the high-voltage side drive IC 53 and the like mounted in the primary region 41 from receiving external noise. Alternatively, radio waves that can be emitted from the high voltage side driving IC 53 can be shielded. The shield region 354 is preferably connected to a so-called ground line, but may be configured not to be connected to the ground line.

  The gate driver unit and the power module according to the present invention are not limited to the above-described embodiments. The specific configuration of each part of the gate driver unit and the power module according to the present invention can be varied in design in various ways.

A1 to A4 Gate driver units B1 and B2 Power module 1 First driver board 11 First outer surface 12 First inner surface 13 First base material 14 First wiring pattern 15 First outer layer 15A Conductive film 16 First inner layer 17 First through hole Portion 171 Inner surface conductor layer 172 Sealing material 18 First outer surface isolation region 2 Second driver substrate 21 Second outer surface 22 Second inner surface 23 Second base material 24 Second wiring pattern 25 Second outer layer 25A Conductive film 26 Second inner layer 27 Second through-hole portion 271 Inner surface conductor layer 272 Sealing material 28 Second outer surface isolation region 29 Second inner surface isolation region 3 Bonding layer 31 Insulating body 32 Penetration conductive portion 35 Intermediate substrate 351 Substrate 352 Wiring pattern 353 Through hole portion 354 Shield Region 42 Secondary region 421 High pressure side region 422 Low pressure side region 41 Primary region 51 High pressure side transformer 52 Low pressure side tr Scan 53 high-pressure side of the drive IC
54 Low-voltage drive IC
55 Built-in parts 56 Connector 61 High voltage side circuit 611 Switching element 62 Low voltage side circuit 621 Switching element 71 Input terminal 72 Output terminal 721 U phase terminal 722 V phase terminal 723 W phase terminal 73 Control terminal 731 High voltage side group control terminal 732 Low voltage side group Control terminal 733 High voltage side gate terminal 734 High voltage side source terminal 735 Low voltage side gate terminal 736 Low voltage side source terminal 81 Case 82 Sealing resin

Claims (38)

A gate driver unit for controlling the gate current of the power module,
A first driver board and a second driver board arranged in parallel to each other;
A bonding layer for bonding the first driver substrate and the second driver substrate,
The first driver substrate includes a first base material and a first wiring pattern formed on the first base material, and the first inner surface facing the second driver substrate side is opposite to the first inner surface. And a first outer surface facing
The second driver substrate includes a second base material and a second wiring pattern formed on the second base material, and a second inner surface facing the first driver substrate side and the side opposite to the second inner surface And a second outer surface facing
The first wiring pattern has a plurality of first outer surface isolation regions insulated from each other on the first outer surface,
The second wiring pattern has a plurality of second outer surface isolation regions insulated from each other on the second outer surface and a plurality of second inner surface isolation regions insulated from each other on the second inner surface,
The plurality of first outer surface isolation regions, the plurality of second outer surface isolation regions, and the plurality of second inner surface isolation regions overlap each other in a thickness direction view of the first driver substrate and the second driver substrate. A gate driver unit characterized in that the overlapping parts are electrically connected to each other. A plurality of secondary regions which are composed of the first outer surface isolation region, the second outer surface isolation region, and the second inner surface isolation region that overlap each other and are electrically connected to each other when viewed in the thickness direction. Item 2. The gate driver unit according to Item 1.   The gate driver unit according to claim 2, wherein the plurality of secondary regions include a high voltage side secondary region and a low voltage side secondary region.   The gate driver unit according to claim 3, wherein the plurality of secondary regions include only one of the high-voltage side secondary regions.   5. The gate driver unit according to claim 4, wherein the plurality of secondary regions include only three of the low-pressure side secondary regions. The first outer surface isolation region, the second outer surface isolation region, and the second inner surface isolation region that overlap each other and are electrically connected to each other in the thickness direction view, and include a primary region insulated from the power module . The gate driver unit according to claim 5.   The gate driver unit according to claim 6, comprising only one primary region.   The gate driver unit according to claim 7, wherein the primary region is disposed between the high-pressure side secondary region and the low-pressure side secondary region.   The gate driver unit according to claim 8, wherein the first driver substrate and the second driver substrate have a long rectangular shape. The three low pressure side the secondary regions are arranged along the longitudinal direction of the first driver substrate, the gate driver unit according to claim 9. The high-pressure side second region, the primary area and the low pressure side secondary area, the first are arranged in the driver and the short direction of the second driver substrate, the gate driver unit according to claim 10 .   12. The gate driver unit according to claim 11, further comprising: a high voltage side transformer mounted on the first outer surface so as to straddle the high voltage side secondary region and the primary region.   The gate driver unit according to claim 12, comprising a low-voltage side transformer mounted on the first outer surface so as to straddle the low-voltage secondary region and the primary region.   14. The gate driver unit according to claim 13, further comprising: a high-voltage side drive IC mounted on the second outer surface so as to straddle the high-voltage side secondary region and the primary region.   The gate driver unit according to claim 14, further comprising: a low-voltage side driving IC mounted on the second outer surface so as to straddle the low-voltage side secondary region and the primary region.   The gate driver unit according to claim 15, wherein the high-voltage transformer and the high-voltage driver IC overlap each other when viewed in the thickness direction.   The gate driver unit according to claim 16, wherein the low-voltage transformer and the low-voltage driver IC overlap each other when viewed in the thickness direction.   The gate driver unit according to claim 1, comprising a plurality of built-in components mounted on the second inner surface.   The gate driver unit according to claim 18, wherein the built-in component is covered with the bonding layer.   20. The gate driver unit according to claim 19, wherein each of the built-in components is a non-wire-mounted component that is surface-mounted on the second inner surface and no wire is used for mounting.   21. The gate driver unit according to claim 1, wherein the first wiring pattern has a first outer layer formed on the first outer surface and a first inner layer formed on the first inner surface.   The gate driver unit according to claim 21, wherein the first wiring pattern has a first through-hole portion that penetrates the first base material and electrically connects the first outer layer and the first inner layer.   The first through hole portion includes an inner conductor layer that covers an inner surface of a through hole formed in the first base material, and a sealing material filled in a region surrounded by the inner conductor layer. 22. A gate driver unit according to 22.   The gate driver unit according to any one of claims 1 to 23, wherein the second wiring pattern has a second outer layer formed on the second outer surface and a second inner layer formed on the second inner surface.   25. The gate driver unit according to claim 24, wherein the second wiring pattern has a second through-hole portion that penetrates the second base material and electrically connects the second outer layer and the second inner layer.   The second through-hole portion has an inner conductor layer that covers an inner surface of a through hole formed in the second base material, and a sealing material that is filled in a region surrounded by the inner conductor layer. The gate driver unit described in 1.   The bonding layer includes an insulating main body and a through conductive portion that penetrates the insulating main body and electrically connects the first wiring pattern of the first driver substrate and the second wiring pattern of the second driver substrate. The gate driver unit according to any one of claims 1 to 26. Multiple input terminals,
A high voltage side circuit including a switching element;
A low voltage side circuit including a switching element;
Multiple output terminals,
Multiple sets of control terminals;
The gate driver unit according to any one of claims 1 to 27, wherein the gate driver unit is electrically connected to the plurality of sets of control terminals.
A power module comprising:   29. The power module according to claim 28, comprising three said high voltage side circuits and three said low voltage side circuits.   30. The power module according to claim 29, wherein the plurality of output terminals include a U-phase terminal, a V-phase terminal, and a W-phase terminal.   The power module according to claim 30, comprising a plurality of sets of control terminals.   32. The power module according to claim 31, wherein the plurality of sets of control terminals include a high voltage side group and a low voltage side group.   The power module according to claim 32, wherein the high-voltage side group includes a high-voltage side gate terminal.   The power module according to claim 33, wherein the high-voltage side group includes a high-voltage side source terminal.   The power module according to claim 34, wherein the low-voltage side group includes a low-voltage side gate terminal.   36. The power module of claim 35, wherein the low voltage side set includes a low voltage side source terminal.   37. The power module according to claim 28, wherein the switching element is made of SiC.   The power module according to any one of claims 28 to 37, further comprising a case that accommodates the switching element.

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