JP6386106B2 - Method for depositing layers in vias or trenches and products obtained by the method - Google Patents

Description

  [0001] Embodiments for depositing a layer filling a via or trench, for a device made of a material filled in the via or trench, and for depositing a layer with the material filled in the via or trench Relating to the device. Specifically, embodiments relate to a method for depositing material in a via or trench provided in a first layer deposited on a substrate, a method for manufacturing a transistor on a substrate, an electronic device A layer stack for and an electronic device.

  [0002] In many applications, it is desirable to deposit a thin layer on a substrate, eg, a glass substrate. Conventionally, substrates are coated in various chambers of a coating apparatus. In some applications, the substrate is coated in a vacuum using vapor deposition techniques. Several methods are known for depositing material on a substrate. For example, the substrate may be coated such as by a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, or a plasma enhanced chemical vapor deposition (PECVD) process. Typically, these processes are performed in a processing apparatus or processing chamber in which the substrate to be coated is placed.

  [0003] Over the past few years, the price of electronic devices, especially optoelectronic devices, has dropped significantly. Furthermore, the pixel density of the display continues to increase. For TFT displays, high density TFT integration is desired. However, despite the increasing number of thin film transistors (TFTs) in the device, attempts have been made to increase yield and reduce manufacturing costs.

  [0004] For example, one aspect of increasing the pixel density of a display is the use of LTPS-TFT. LTPS-TFT can be used for LCD or AMOLED display, for example. During the manufacture of LTPS-TFT, the via is filled with a conductive material. Increasing the number of pixels, ie, the number of TFTs, increases the aspect ratio of vias that are to be filled with conductive material. Filling vias using a sputtering process is beneficial in terms of manufacturing costs and the potential to scale up the process. In addition, other applications that must fill vias or trenches (ie, applications other than manufacturing LTPS-TFTs) can also benefit from improved processes.

  [0005] In PVD processes, the deposited material can be in a solid phase in the target. By bombarding the target with energetic particles, atoms of the target material, ie atoms of the material to be deposited, are released from the target. The atoms of the target material are deposited on the substrate to be coated. In the PVD process, the sputtered material, i.e. the material deposited on the substrate, may be configured in various ways. For example, the target may be fabricated from the material being deposited or may have a backing element to which the deposited material is secured. The target containing the material to be deposited is supported or fixed at a predetermined location in the deposition chamber.

  [0006] Typically, sputtering can be performed as magnetron sputtering. Magnetron sputtering uses a magnet assembly to confine the plasma to improve sputtering conditions. In order to obtain the desired layer deposition on the substrate, the plasma distribution, plasma properties, and other deposition parameters need to be controlled. For example, a uniform layer having the desired layer properties is desirable. Thus, given the growing demand for optoelectronic devices and other large-scale device manufacturing, there is a need to further improve the process for manufacturing devices such as displays.

  [0007] In light of the above, methods for depositing material in vias or trenches, methods for fabricating transistors on a substrate, layer stacks, and electronic devices are provided.

  [0008] According to one embodiment, a method is provided for depositing material into a via or trench provided in a first layer deposited over a substrate. The method includes providing a first layer having a via or a trench and depositing a first portion of the second layer on the first layer having a via or a trench, Deposition of the first portion of the layer is performed with a magnetron sputter cathode having a first magnet arrangement, the first magnet arrangement being provided with a first angular coordinate resulting in a first deposition direction. Depositing a second portion of the second layer over the first layer having vias or trenches, wherein the second portion of the second layer is deposited at the magnetron sputter cathode. Performing and depositing, wherein the first magnet arrangement is provided with a second angular coordinate that results in a second deposition direction, the second angular coordinate being different from the first angular coordinate. According to one embodiment, the first magnet arrangement can be rotatable about a first axis of rotation.

  [0009] According to another embodiment, a method is provided for fabricating a transistor on a substrate. The method includes depositing material in vias or trenches provided in a first layer deposited on the substrate. Depositing the material into the via or trench includes providing a first layer having a via or trench and depositing a first portion of the second layer on the first layer having a via or trench. The deposition of the first portion of the second layer is performed with a magnetron sputter cathode having a first magnet arrangement rotatable about a first axis of rotation, wherein the first magnet arrangement is Depositing a second portion of the second layer over the first layer with vias or trenches, resulting in a first angular coordinate resulting in a first deposition direction. Wherein the deposition of the second portion of the second layer is performed at the magnetron sputter cathode, and the first magnet arrangement is provided at a second angular coordinate resulting in a second deposition direction, The angular coordinates of the .

  [0010] According to yet another embodiment, a layer stack for an electronic device is provided. The layer stack includes a first layer and a second layer of material deposited on a substrate. The first layer and the second layer are deposited in a manner for depositing material into vias or trenches provided in the first layer deposited on the substrate. The method includes providing a first layer having a via or a trench and depositing a first portion of the second layer on the first layer having a via or a trench, Deposition of the first portion of the layer is performed with a magnetron sputter cathode having a first magnet arrangement rotatable about a first axis of rotation, the first magnet arrangement resulting in a first deposition direction and Depositing a second portion of the second layer over the first layer having vias or trenches, the first layer having a first angular coordinate comprising: The deposition of the two parts is carried out with a magnetron sputter cathode, the first magnet arrangement is provided with a second angular coordinate resulting in a second deposition direction, the second angular coordinate being the first angular coordinate Different from depositing.

  [0011] According to yet another embodiment, an electronic device is provided. The electronic device includes a layer stack. The layer stack includes a first layer and a second layer of material deposited on a substrate. The first layer and the second layer are deposited in a manner for depositing material into vias or trenches provided in the first layer deposited on the substrate. The method includes providing a first layer having a via or a trench and depositing a first portion of the second layer on the first layer having a via or a trench, Deposition of the first portion of the layer is performed with a magnetron sputter cathode having a first magnet arrangement rotatable about a first axis of rotation, the first magnet arrangement resulting in a first deposition direction and Depositing a second portion of the second layer over the first layer having vias or trenches, the first layer having a first angular coordinate comprising: The deposition of the two parts is carried out with a magnetron sputter cathode, the first magnet arrangement is provided with a second angular coordinate resulting in a second deposition direction, the second angular coordinate being the first angular coordinate Different from depositing.

  [0012] Further advantages, features, aspects and details will be apparent from the dependent claims, the description herein and the accompanying drawings.

  [0013] A more detailed description of the invention, briefly outlined above, may be obtained by reference to the embodiments so that the above features of the invention can be understood in detail. The accompanying drawings relate to embodiments of the invention and are described below.

FIG. 2 shows a schematic view of a portion of a substrate on which a layer stack according to an embodiment is deposited. FIG. 2 shows a schematic view of a portion of a substrate on which a layer stack according to an embodiment is deposited. Described herein, in accordance with the embodiments corresponding to 1 I of Figure 1A, it shows a flow diagram illustrating a method for depositing a layer of material on a substrate. FIG. 2 shows a schematic diagram of an apparatus for depositing a layer of material at a first processing condition, according to an embodiment described herein. FIG. 6 shows a schematic diagram of an apparatus for depositing a layer of material at a second processing condition, according to embodiments described herein. FIG. 6 illustrates first and second processing conditions according to embodiments described herein. FIG. FIG. 5A shows a schematic result of a deposited layer according to an embodiment described herein, FIG. 5A shows a first portion of the layer, and FIG. 5B shows a first and second portion of the layer. Show. FIG. 3 shows a flow diagram illustrating a method for depositing a layer of material on a substrate in accordance with embodiments described herein.

  [0021] Reference will now be made in detail to various embodiments of the invention. One or more examples of these embodiments are illustrated in the figures. Within the following description of the drawings, the same reference numbers refer to the same components. In the following, only the differences with respect to the individual embodiments are described. Each example is provided by way of explanation of the invention, and is not intended as a limitation of the invention. Furthermore, features illustrated or described as part of one embodiment may be used in other embodiments or combined in other embodiments. Thereby, further embodiments are created. This description is intended to include such modifications and variations.

  [0022] According to embodiments described herein, the layer stack is provided to fill vias or trenches, and step coverage is provided, for example, by providing various angular coordinates of the magnet assembly in the source. Improved. For example, the source can be provided by a rotating cathode or a rotatable cathode.

[0023] FIG. 1A shows the layer stack 150 after the first deposition process 202 (see FIG. 2). An active channel layer 152 is deposited on the substrate 151. The active channel layer 152 includes an active channel 152a, a source region 152s, and a drain region 152d. According to an exemplary embodiment, the active channel layer 152 may be a polysilicon layer. The polysilicon layer can be produced, for example, by deposition of silicon from a sputtered cathode and crystallization of the deposited silicon layer. According to exemplary embodiments, the crystallization process may be performed by laser processing, catalytic processing, or another process.

  [0024] According to one embodiment, excimer laser annealing (ELA) may be used. According to another embodiment, enhanced metal induced lateral crystallization (MILC) using pulsed rapid thermal annealing (PRTA) techniques may be used. Yet another technique includes a continuous grain boundary crystalline silicon (CGS) method, a continuous wave (CW) laser method, and sequential lateral crystallization (SLS). Typically, these processes include an annealing process that has a sufficiently low energy impact to avoid damage to the substrate 151.

  [0025] Techniques for fabricating TFTs on glass substrates include amorphous silicon (a-Si) processing and low temperature polysilicon (LTPS) processing. The main difference between the a-Si process and the LTPS process is the electrical properties of the device and the complexity of the process. The low temperature polysilicon TFT process is more mobile, but the process of manufacturing the low temperature polysilicon TFT is more complex. Although a-Si TFTs are less mobile, the process for manufacturing a-Si TFTs is simple. According to the embodiments described herein, low temperature polysilicon TFT processing can be improved. Low temperature polysilicon TFT processing is one example that can beneficially utilize the embodiments described herein.

  [0026] In FIG. 1B, a gate insulator layer 153 is provided over the active channel layer 152 (see box 204 in FIG. 2). As can be seen in FIGS. 1A-1E, some of the layers described herein, such as active channel layer 152, layers of material forming the gate, and other layers, are low temperature polysilicon. Structured during TFT processing. For example, structuring resulting from etching may be performed according to any method not described in this disclosure in a manner known to those skilled in the art. It will be apparent to those skilled in the art whether a structuring process is utilized during the subsequent deposition processes described herein.

  [0027] FIG. 1C shows a first portion 162 of the layer. According to the embodiments described herein, the first portion 162 is deposited in a first deposition direction of material deposited on the substrate and with columnar growth (see box 206 in FIG. 2). The first deposition direction results in the first columnar growth direction. FIG. 1D shows the second portion 164 of the layer. According to the embodiments described herein, the second portion 164 is deposited in a second deposition direction of material deposited on the substrate and with columnar growth (see box 208 in FIG. 2). The second deposition direction results in a second columnar growth direction. According to the embodiments described herein, the deposition direction may be referred to as the main deposition direction or the average deposition direction. For example, the deposition distribution may have some directional extent, but typically has a major or average direction of material.

  [0028] According to embodiments described herein, a layer of material is deposited on a substrate, ie, a layer having a single layer physical property, and the layer of material is in a first columnar growth direction. And the second columnar growth direction, and the second columnar growth direction is different from the first columnar growth direction. According to the embodiments described herein, the process parameters for columnar growth can be as follows. Exemplary processing parameters refer to molybdenum deposition, and other material locations may have other processing parameters for columnar growth of such other materials.

  [0029] Columnar growth referred to herein is understood as a form having columnar grains. The particles have a remarkably large length in one direction, ie along the column, which is referred to as the columnar growth direction. According to some embodiments, columnar growth may be provided for film thicknesses of 20 nm to 500 nm, or more, specifically 100 nm to 400 nm. Yet another processing parameter is 0.1 to 1 Pa, specifically 0.2 to 0.5 Pa deposition pressure, which can depend on the system structure, 3 kW to 60 kW per cathode, more specifically the cathode. Each may be selected from the group of deposition power of 20 kW to 40 kW.

  [0030] As shown in box 210 of FIG. 2, an ion implantation process is performed. Ion implantation is also indicated by arrow 90 in FIG. 1E. The ion implantation process provides doping for the source region 152s and the drain region 152d. The gate electrode of the transistor is used as a mask during the ion implantation process. Accordingly, a self-aligned doping process is performed. Although the second columnar growth direction is different from the first columnar growth direction, in consideration of the first columnar growth direction and the second columnar growth direction, the possibility that ions pass through the mask (that is, the gate electrode) is remarkably high. Decrease. By reducing ion channeling through the gate electrode, unwanted doping of the active channel region is reduced.

  [0031] According to embodiments described herein, the thickness of the gate electrode layer (or another layer for another application utilizing ion implantation) is 200 nm or more, specifically 300 nm or more. There may be. According to a further or alternative implementation, the thickness of the first part of the layer for masking and / or the second part of the layer for masking is 40 nm or more, in particular 100 nm or more. There may be. The gate electrode layer according to some embodiments described herein may be a metal layer, specifically, the layer is a MoW layer, a Mo layer, a Ti layer, an Al layer, a Cu layer. , MoW, Mo, Ti, Al, a layer containing two or more of Cu, or a layer containing one or more alloys of MoW, Mo, Ti, Al, Cu.

  [0032] FIG. 1F shows a layer stack 150 in which a dielectric layer 172 is provided (see box 212 in FIG. 2). For example, the dielectric layer may be an interlayer dielectric. The dielectric layer 172 may be a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or other suitable dielectric layer. A via 173 is etched in the dielectric layer 172. As shown in FIG. 1G, the via 173 is filled with a conductive material 174 (see also box 214 in FIG. 2).

  [0033] According to embodiments described herein that can be combined with other embodiments described herein, a layer stack and / or a corresponding device can be integrated into a high-density transistor. Have For example, the device may have a pixel density of 300 pixels per inch (PPI) or more. In view of the above, the size of the contact hole is reduced, and the taper angle of the contact hole (ie, via) is increased. According to embodiments described herein, step coverage is improved by more than 60% by providing a first portion of the layer that fills the via in the first deposition direction. Depositing the first portion of the layer filling the via is performed with a magnetron sputter cathode having a first magnet arrangement rotatable about a first axis of rotation. At this time, the first magnet arrangement is provided with a first angular coordinate that results in a first deposition direction. Further, depositing the second portion of the layer filling the via is performed with a magnetron sputter cathode having a first magnet arrangement. At this time, the first magnet arrangement is provided with a second angular coordinate that results in a second deposition direction. Thus, step coverage can be improved by providing more than one angular coordinate of the magnetron. For example, the magnetron may be provided in a rotatable sputter cathode and forms a radiation source that extends along the axis of rotation of the cathode. It was an unexpected result that step coverage could be improved by using multiple sources and depositing material at various angular coordinates of the magnetron.

  [0034] According to embodiments described herein, the vias are from Mo, W, Mo, Ti, Al, Cu, combinations thereof, and alloys containing Mo, W, Mo, Ti, Al, Cu. It can be filled with a material selected from the group consisting of: Specifically, the conductive material 174 may be deposited from the above group of materials with high conductivity, such as aluminum, and a material such as molybdenum or titanium may be used as the adhesive layer.

  [0035] Box 216 in FIG. 2 shows the position of the passivation layer 176 (eg, an organic passivation layer such as lacquer) and the common voltage electrode 178. This is also shown in FIG. 1H. The passivation layer is provided with vias that can be filled to provide a pixel electrode 182 after a further dielectric layer 180 provided between the common voltage electrode 178 and the pixel electrode 182 (see box 218 in FIG. 2). reference). According to the embodiments described herein, which can be combined with other embodiments described herein, the pixel electrodes that also fill the wires in the passivation layer 176 can be sputtered. For example, the pixel electrode may be deposited from a transparent conductive oxide (TCO) to form a TCO layer. According to some embodiments that can be combined with other embodiments described herein, the TCO layer can be an indium tin oxide (ITO) layer, a doped ITO layer, an impurity doped ZnO, In2O3, SnO2, and CdO. , ITO (In 2 O 3: Sn), AZO (ZnO: Al), IZO (ZnO: In), GZO (ZnO: Ga), or a combination of ZnO, In 2 O 3 and SnO 2 or a combination thereof. It may include at least one of the objects, or a combination thereof.

  [0036] The embodiment shown in FIGS. 1A-1I illustrates via filling. However, according to other embodiments, improved step coverage filling according to embodiments described herein can also be provided for trench filling.

[0037] According to embodiments that can be combined with other embodiments described herein, a layer (eg, gate formation) over a substrate, as described in connection with FIGS. 3A and 3B. An apparatus for depositing the layer) may be provided. FIG. 3A shows a schematic cross-sectional view of a deposition apparatus 100 according to an embodiment described herein. Illustratively, one vacuum chamber 102 for depositing layers therein is shown. As shown in FIG. 3A, a further chamber 102 may be provided next to the chamber 102. The vacuum chamber 102 can be separated from adjacent chambers by a valve having a valve housing 104 and a valve unit 105. As indicated by arrow 1, after the carrier 114 on which the substrate 151 is placed is inserted into the vacuum chamber 102, the valve unit 105 can be closed. Therefore, the atmosphere in the vacuum chamber 10 2, for example, by generating a technical vacuum by a vacuum pump connected to the chamber 10 2 (technical vacuuming), and / or the region of the deposition chamber 102 the process gas It can be controlled individually by inserting it into the inside. As described above, in many large area processing applications, the large area substrate is supported by a carrier. However, the embodiments described herein are not so limited, and other transport elements that transport the substrate through the processing apparatus or processing system may be used.

[0038] In order to transport the carrier 114 to board rests into and out of the chamber 102, the transport system is provided in the chamber 102. As used herein, the term “substrate” is intended to include glass substrates, wafers, slices of transparent crystals such as sapphire, or substrates such as glass plates.

  [0039] A deposition source (eg, cathode 122) is provided in the chamber 102, as shown in FIG. 3A. The deposition source may be, for example, a rotatable cathode having a target of material to be deposited on the substrate. According to embodiments that can be combined with other embodiments described herein, the cathode may be a rotatable cathode having a magnet assembly 121 therein. Magnetron sputtering may be performed for layer deposition. As illustrated in FIG. 3A, each pair of adjacent cathodes may be connected to a power source 123a-c. Depending on the nature of the deposition process in the target array, each pair of adjacent cathodes may be connected to an AC power source, or each cathode may be connected to a DC power source. In FIG. 3A, a DC power source is shown, and an anode 116 is connected to the power source. According to some embodiments that can be combined with other embodiments described herein, the cathode 122 is connected to an AC power source so that it can be alternately deflected. An AC power source, such as an MF power source, can be provided, for example, to deposit a layer of Al 2 O 3. In this case, the cathode can be operated without an additional anode. Since a complete circuit including the cathode and anode is provided by the cathode 122 pair, for example, an additional anode can be removed.

  [0040] As illustrated in FIG. 3A, the first outer deposition assembly 301 may be connected to a first group of gas tanks 141 to supply a first composition of reactive gases; The second outer deposition assembly 302 may be connected to a second group of gas tanks 142 to supply a second composition of reactive gas, and the inner deposition assembly 303 may include a third of reactive gas. It may be connected to a third group 143 of gas tanks for supplying the composition to the internal deposition assembly. However, all deposition assemblies may also be connected to the same group of gas tanks to supply process gas.

  [0041] According to embodiments that can be combined with other embodiments described herein, the controller 500 is configured to commonly or individually control one or more of the power supplies. ing. As an example, the controller 500 is configured to control a first power source for supplying first power to the first outer deposition assembly and the second outer deposition assembly. The controller may further be configured to control a second power supply 123b for supplying second power to the internal deposition assembly. Referring to the exemplary embodiment of FIGS. 3A and 3B, the first power source for supplying the first power to the first outer deposition assembly and the second outer deposition assembly includes the first power Two separate power sources 123a, 123c may be included for supplying one external deposition assembly and a second external deposition assembly.

  [0042] As shown in FIGS. 3A and 3B, a deposition source (eg, a cathode 122) is provided in the chamber. The deposition source may be, for example, a rotatable cathode having a target of material to be deposited on the substrate. Typically, the cathode may be a rotatable cathode having a magnet assembly 121 therein. Thus, magnetron sputtering may be performed to deposit material on the substrate. As illustrated in FIGS. 3A and 3B, the deposition process may be performed with a rotating cathode and a rotatable magnet assembly, ie, a rotatable magnet yoke therein.

  [0043] As used herein, "magnetron sputtering" refers to sputtering performed using a magnetron, ie, a magnet assembly, which is a unit capable of generating a magnetic field. Typically, such a magnet assembly consists of one or more permanent magnets. These permanent magnets are typically placed inside the rotatable target or on a planar target so that free electrons are trapped inside the generated magnetic field generated below the rotatable target surface. Connected. Such a magnet assembly may further be arranged and connected to the planar cathode. According to a typical implementation, magnetron sputtering can be accomplished with a double magnetron cathode, ie, cathode 122, such as but not limited to a TwinMag ™ cathode assembly. Specifically, a target assembly including a double cathode may be applied to MF sputtering (intermediate frequency sputtering) from the target. According to an exemplary embodiment, the cathode in the deposition chamber may be replaceable. Thus, the target is replaced after the material to be sputtered is consumed.

  [0044] According to different embodiments that can be combined with other embodiments described herein, sputtering can be performed as DC sputtering, MF (intermediate frequency) sputtering, RF sputtering, or pulse sputtering. As described herein, MF, DC, or pulse sputtering can be beneficially applied in some deposition processes. However, other sputtering methods may be further applied.

  [0045] In FIGS. 3A and 3B, a plurality of cathodes 122 having magnet assemblies 121 or magnetrons provided within the cathodes are shown. According to some embodiments that can be combined with other embodiments described herein, sputtering according to the described embodiments can be performed with more than two cathodes. However, particularly in large area deposition applications, an array of cathodes or pairs of cathodes may be provided. For example, more than two cathodes or cathode pairs (eg, three, four, five, six, or more cathodes or cathode pairs) may be provided. The array can be provided in one vacuum chamber. In addition, the array may typically be defined such that adjacent cathodes or pairs of cathodes influence each other, for example, by plasma confinement interactions.

[0046] As shown in FIG. 3A, the magnet assembly is rotated to provide the deposition direction indicated by arrow 300A. A first columnar growth direction is provided, resulting in a first deposition direction. As shown in FIG. 3B, the magnet assembly is rotated to provide the deposition direction indicated by arrow 300B. A second deposition direction is provided, resulting in improved step coverage.

  [0047] Embodiments described herein relating to the fabrication of transistors on a substrate, specifically LPS-TFTs, wherein the gate electrode is used as a mask for self-aligned doping, For example, DC for depositing molybdenum (Mo), molybdenum-tungsten (MoW), titanium (Ti), aluminum (Al), copper (Cu), and alloys containing one or more of the above components. A sputtering process is used. However, other materials that can be sputtered by MF sputtering or RF sputtering or deposited by CVD also move the magnetron sputter cathode magnet assembly from the first position to the second position. May be utilized for improved step coverage with a first deposition direction and a second deposition direction. This is beneficially used in terms of cost effective control in the growth direction. Examples of such other materials can be the transparent conductive oxides described herein.

  [0048] According to different embodiments that can be combined with other embodiments described herein, sputtering is performed as DC (direct current) sputtering, MF (intermediate frequency) sputtering, RF sputtering, or pulse sputtering. Can be done. As described herein, MF, DC, or pulse sputtering can be beneficially applied in some deposition processes. However, other sputtering methods may be further applied. According to embodiments herein, the intermediate frequency is a frequency in the range of 0.5 kHz to 350 kHz, for example in the range of 10 kHz to 50 kHz.

  [0049] According to some embodiments that can be combined with other embodiments described herein, sputtering according to the described embodiments can be performed with more than two cathodes. However, particularly in large area deposition applications, an array of cathodes having 6 or more cathodes, eg, 10 or more cathodes, may be provided. The array may be provided in one vacuum chamber. In addition, the array may typically be defined such that adjacent cathodes or pairs of cathodes influence each other, for example, by plasma confinement interactions. According to a typical implementation, sputtering is not limited to Applied Materials Inc. Can be implemented with a rotating cathode array such as a system such as PiVot.

[0050] According to some embodiments that can be combined with other embodiments described herein, the embodiments described herein are on display PVDs, ie large area substrates for the display market. Can be used for sputter deposition. Flat panel displays or mobile phone displays can be fabricated on large area substrates. According to some embodiments, a large area substrate, or a corresponding carrier having a plurality of substrates, may have a size of at least 0.67 m ² . Typically, this size may be from about 0.67 m ² (0.73 × 0.92 m-Gen4.5) to about 8 m ² , more typically from about ² m ² to about 9 m ^2. Or even a maximum of 12 m ² . According to some embodiments, the large area substrate or corresponding carrier may have a size of 1.4 m ² or more. Typically, a substrate or carrier that is the subject of the provision of structures, devices, and methods, such as cathode assemblies, according to embodiments herein is a large area substrate as described herein. It is. For example, large area substrates or carrier, corresponds to GEN4.5 corresponds to about 0.67 m ² substrate (0.73 × 0.92 m), about 1.4 m ² substrate (1.1 m × 1.3 m) GEN5 corresponding to an approximately 4.29 m ² substrate (1.95 m × 2.2 m), GEN 8.5 corresponding to an approximately 5.7 m ² substrate (2.2 m × 2.5 m), or Furthermore, GEN10 corresponding to a substrate of about 8.7 m ² (2.85 m × 3.05 m) may be used. Further generations such as GEN11 and GEN12, and the substrate area corresponding thereto may be similarly mounted.

  [0051] According to yet another embodiment that can be combined with other embodiments described herein, the target material is aluminum, silicon, tantalum, molybdenum, niobium, titanium, indium, gallium, zinc, tin , Silver, and copper. Specifically, the target material can be selected from the group consisting of indium, gallium, and zinc. Reactive sputter processing results in typical deposited oxides of these target materials. However, nitrides or oxy-nitrides can be deposited as well.

  [0052] According to embodiments described herein, the method provides sputter deposition for positioning a substrate for a static deposition process. Typically, static deposition and dynamic deposition can be distinguished, especially in large area substrate processing, such as processing of vertically oriented large area substrates. According to some embodiments that can be combined with other embodiments described herein, utilizing the substrates and / or carriers described herein and the gas supply system described herein. An apparatus for doing so can be configured for vertical substrate processing. The term vertical substrate processing is understood distinctly with respect to horizontal substrate processing. That is, vertical substrate processing relates to a substantially vertical orientation of the carrier and substrate during substrate processing. Even if there is a deflection of several degrees from the strict vertical orientation, for example up to 10 degrees, or even up to 15 degrees, it is considered vertical substrate processing. A slight tilt of the vertical substrate orientation can result in, for example, more stable handling of the substrate and reduced risk of particles that contaminate the deposited layer. Alternatively, horizontal substrate orientation may be possible. For horizontal substrate orientation, the cathode array is, for example, more or less horizontal. However, a vertical substrate orientation, for example within a range of −15 ° to + 15 °, reduces the floor area for large area substrate processing and therefore reduces the cost of ownership.

  [0053] Thus, a static deposition process can be understood as a deposition process with a static position, a deposition process with a substantially static position, or a deposition process with a partial static position of the substrate. . The static deposition process described herein can be clearly distinguished from a dynamic deposition process without the need for any movement of the substrate position of the static deposition process during the deposition. According to yet another embodiment that can be combined with other embodiments described herein, a deviation from a fully static substrate position (eg, as described above) that is still considered static deposition by those skilled in the art. Substrate vibration, perturbation, or some other motion) may additionally or alternatively be caused by cathode or cathode array motion (eg, perturbation, vibration, etc.). The substrate and cathode (or cathode array) can move relative to each other, for example, in the substrate transport direction, in the lateral direction substantially perpendicular to the substrate transport direction, or in both directions.

  [0054] According to yet another embodiment, manufacturing a layer having a first portion having a first deposition direction and having a second portion having a second different deposition direction is provided in a dynamic deposition system. In addition, the substrate can be moved by more than one source. In this case, the substrate transport speed can be taken into account when determining the deposition direction of the manufacturing process.

  [0055] According to embodiments described herein that can be combined with other embodiments described herein, step coverage of a layer deposited in a via or trench is a first deposition. This can be improved by switching between the direction and the second different deposition direction. In this case, the magnetron is rotated to have different angular coordinates resulting in different deposition directions. According to some embodiments that can be combined with other embodiments described herein, switching between angular coordinates of the magnet assembly can be made back and forth without switching off the sputtering process. Can be performed (eg, so-called "peristalsis" of a magnet assembly). However, it may alternatively be possible to switch off the sputtering cathode while moving from one angular coordinate to another (eg, so-called “split sputtering mode”).

  [0056] FIG. 4A shows a cathode 122 with a magnet assembly 121 disposed therein, for example, in a backing tube supporting a target material. As indicated by axis 410 and indicated by the arrow, magnet assembly 121 may be rotated to deviate from the vertical deposition direction, ie, to have a first angular coordinate. A vertical direction, ie, a direction perpendicular to the surface of the substrate 451 is indicated by a line 471. According to exemplary embodiments that can be combined with other embodiments described herein, the angle 470 is greater than or equal to 10 °, such as 20 ° to 60 ° (such as about 25 ° to 40 °), For example, it may be about 30 °.

  [0057] FIG. 4A shows the confined plasma tube 407 and the resulting deposition direction (see arrow 300A) as a result of the angular position of the magnet assembly 121 relative to the line 471 or substrate 451, respectively. As a result, as shown in FIG. 5A, a first portion 474a of the layer is grown on the substrate 451 and one side of the via or trench is preferably coated with material. The substrate 451 shown in FIGS. 4A to 5B may be the above-described substrate, or may be a substrate provided with one or more layers thereon. 5A and 5B schematically show a layer 472 with a via (or trench) provided therein and a lower layer 452, both of which are provided on a substrate 451.

  [0058] After depositing the first portion 474a of the layer, the magnet assembly 121 is rotated to the second position illustrated in FIG. 4B, ie, the second angular coordinate. The second deposition direction indicated by arrow 300B is provided by the second position of magnet assembly 121. As a result, the second portion 474 of the layer grows on the first portion 474a of the layer, as shown in FIG. 5B. A second portion is deposited and another side of the via or trench is preferably coated with material. According to embodiments described herein, layer thickness d and layout width w in vias or trenches may be provided. Step coverage is obtained by the ratio of the thinnest width w divided by the layer thickness d. According to exemplary embodiments, step coverage of 60% or more can be provided by the method of depositing layers in the vias or trenches described herein.

  [0059] According to yet other embodiments that can be combined with other embodiments described herein, switching between a first position of the magnet assembly and a second position of the magnet assembly, or vice versa. Switching is provided once or multiple times. For example, the switching between the first position of the magnet assembly and the second position of the magnet assembly may be a continuous or semi-continuous operation such as back and forth. According to some embodiments, the magnetron sputter cathode may be a rotatable magnetron sputter cathode having a rotating target, and the rotatable magnetron sputter target forms a source. For example, as described herein, while still being able to benefit from the low manufacturing costs and potential associated with upscaling a method of sputtering from a rotatable cathode on a large area substrate, Increasing step coverage with a source is an unexpected result. For example, the cathode array may be provided such that the magnetron sputter cathode is one of the at least three deposition sources in the array of deposition sources.

  [0060] According to embodiments described herein, the trench or via may have a width of 3 nm or less at the bottom of the via or trench. Still further or alternatively, the trench or via may have a taper angle of 70 ° or greater. By providing one or both of the aspects, a pixel density of 300 ppi or more can be achieved.

  [0061] According to some embodiments, the thickness of the pixel electrode may be 30 nm to 100 nm, eg, about 50 nm, for ITO or other TCO, and for metal, the thickness of the pixel electrode The thickness may be 150 nm to 500 nm, for example 250 nm to 350 nm.

  [0062] According to some embodiments that can be combined with other embodiments described herein, the layer may be a metal layer, specifically, the layer may be a MoW layer, Mo A layer including two or more of a layer, a Ti layer, an Al layer, a Cu layer, MoW, Mo, Ti, Al and Cu, or one or more alloys of MoW, Mo, Ti, Al and Cu. It may be a layer containing. According to another embodiment, for example, the pixel electrode 182 of FIG. 11 has an indium tin oxide (ITO) layer, a doped ITO layer, impurity doped ZnO, In 2 O 3, SnO 2 and CdO, ITO (In 2 O 3: Sn). , AZO (ZnO: Al), IZO (ZnO: In), GZO (ZnO: Ga), or a combination of ZnO, In2O3, and SnO2, or at least one of multicomponent oxides thereof One or more components selected from the group consisting of, or combinations thereof may be included.

[0063] Although some embodiments described herein refer to the fabrication of transistors such as LTPS-TFTs that can beneficially utilize the embodiments described herein. Other applications can benefit from the embodiments described herein as well. FIG. 7 illustrates a method of depositing a second layer of material over a first layer having vias or trenches, but the first part of the layer has vias or trenches in the first deposition direction. (See box 601 in FIG. 6), the deposition of the first portion of the second layer has a first magnet arrangement that is rotatable about a first axis of rotation. Performed with a magnetron sputter cathode. At this time, the first magnet arrangement is provided with a first angular coordinate that results in a first deposition direction. The second portion of the second layer is deposited over the first layer having vias or trenches (see box 602 in FIG. 6) and the second portion of the second layer is deposited by magnetron sputtering. Performed at the cathode. At this time, the first magnet arrangement is provided with a second angular coordinate that results in the second deposition direction, and the first angular coordinate is different from the second angular coordinate.

  [0064] According to yet another embodiment described herein, a method of depositing a layer of material on a substrate is shown. The method deposits a first portion of the layer in a first deposition direction that results in a first columnar growth direction, and a layer deposition in a second deposition direction that results in a second columnar growth direction. Depositing the second portion. The second columnar growth direction is different from the first columnar growth direction. For layer columnar growth, the first deposition direction can be substantially constant, for example, during the deposition of the first portion of the layer, and / or the second deposition direction can be, for example, a layer of It can be substantially constant during the deposition of the second portion. A first deposition direction may be provided for growth with an angle, the first deposition direction being defined by a first angular coordinate of the magnet arrangement of the magnetron sputter cathode and / or a second deposition. The direction is defined by the second angular coordinate of the magnet arrangement of the magnetron sputter cathode.

  [0065] While the above description is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope of the invention, The scope of the invention is defined by the following claims.

Claims (13)

A method for depositing material in vias or trenches provided in a first layer deposited on a substrate, comprising:
Providing the first layer with the via or trench;
Depositing a first portion of a second layer on the first layer having the vias or trenches, wherein the depositing of the first portion of the second layer comprises: Performed in a magnetron sputter cathode having a magnet arrangement, such that the first magnet arrangement produces a first deposition direction indicated by a first angular coordinate defined relative to a direction perpendicular to the surface of the substrate. Provided, depositing,
Depositing a second portion of the second layer over the first layer having the vias or trenches, wherein the depositing of the second portion of the second layer comprises the magnetron. Implemented in a sputter cathode, wherein the first magnet arrangement is provided to produce a second deposition direction indicated by a second angular coordinate defined with respect to a direction perpendicular to the surface of the substrate; Depositing, wherein two angular coordinates are different from the first angular coordinates.   The method of claim 1, wherein the magnetron sputter cathode is a rotatable magnetron sputter cathode having a rotating target, and the rotatable magnetron sputter cathode forms a source.   The method of claim 2, wherein the rotating target rotates about a first axis of rotation.   4. A method according to any one of claims 1 to 3, wherein the magnetron sputter cathode is one deposition source of at least three deposition sources in an array of deposition sources.   The method according to any one of claims 1 to 4, wherein the second layer has a step coverage of 60% or more.   The method according to claim 1, wherein the trench or via has a width of 3 nm or less at the bottom of the via or trench.   The method according to claim 1, wherein the trench or the via has a taper angle of 70 ° or more.   The method according to any one of claims 1 to 7, wherein at least one of the first layer and the second layer is a metal layer.   At least one of the first layer and the second layer is a layer including two or more of MoW layer, Mo layer, Ti layer, Al layer, Cu layer, MoW, Mo, Ti, Al, Cu, Alternatively, the method according to claim 8, which is a layer containing one or more alloys of MoW, Mo, Ti, Al, Cu.   At least one of the first layer and the second layer is an indium tin oxide (ITO) layer, a doped ITO layer, impurity-doped ZnO, In2O3, SnO2 and CdO, ITO (In2O3: Sn), AZO (ZnO: Al), IZO (ZnO: In), GZO (ZnO: Ga), or one or more selected from the group consisting of multicomponent oxides comprising or a combination of ZnO, In2O3 and SnO2 The method according to any one of claims 1 to 7, comprising any component of the above, or a combination thereof. A method of manufacturing a transistor on a substrate, comprising:
11. A method comprising depositing material in vias or trenches provided in a first layer deposited on a substrate according to any one of claims 1-10.   The first layer is deposited on the gate of the transistor deposited on a gate insulator deposited on an active channel layer, and ion implantation is performed with gate masking of the active channel layer. The method of claim 11.   The method of claim 12, wherein the ion implantation provides doping of a contact region of the active channel layer to a source of the transistor and further doping of a contact region of the active channel layer to a drain of the transistor.

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