JP6265506B2 - Communications system - Google Patents

Description

  The present invention relates to a communication system, and more particularly to a communication system that transmits a frequency offset training signal and an adaptive equalizer training signal by switching on the transmission side.

  FIG. 17 is a diagram for explaining a circuit configuration example on the receiving side applied to a communication system using digital power line carrier. On the receiving side of the communication system, the PN (Pseudorandom Nose) code string sent as a training signal from the transmitting side and the received PN code string are synchronized, and the code string is generated at that timing. The code string thus obtained can be used as a reference signal for the adaptive equalizer 100. The training signal is generated by, for example, 4PSK (4 Phase-Shift Keying) modulation of a code string. On the receiving side, the reference symbol determined by the determination unit 102 of the adaptive equalizer 100 is used as it is. Used as 100 reference signals.

The training signal demodulated by the demodulator is input to the adaptive equalizer 100. In a communication system using a digital power line carrier, a reflected wave generated from a transmission line branch point or the like becomes a delayed wave, which becomes intersymbol interference of the digital signal and degrades transmission quality. The adaptive equalizer 100 removes this delayed wave and compensates for the intersymbol interference.
The training signal from the demodulator is input to the filter unit 101 of the adaptive equalizer 100, and the filter unit 101 performs equalization processing using the tap coefficient. The equalized output signal of the filter unit 101 is input to the determiner 102. The determiner 102 performs region determination on the complex plane of the input signal and outputs the determination result to the error amount calculation unit 103 as a reference signal. The error amount calculation unit 103 calculates an error between the equalized output signal from the filter unit 101 and the reference signal from the determination unit 102. Then, the LMS algorithm processing unit 104 updates the tap coefficient of the filter unit 101 based on the error calculated by the error amount calculation unit 103. The output signal from the determiner 102 is demapped by the demapping unit 105 and is output to the decoder unit for decoding processing.

  On the reception side, in order to establish synchronization with the PN code on the transmission side, a PN m-stage register (generator) 106 having the same tap configuration as that of the PN m-stage register (generator) on the transmission side is provided. The bit information output from the demapping unit 105 is input. When the PN code string for adaptive equalizer training flows from the transmission side, the input value to the reception side PN m-stage register 106 is the same as the output value of the PN m-stage register 106. If the AND condition of these input / output values is obtained by the AND gate 107 and the AND condition is obtained continuously by n bits by the n bit counter 108, it is determined that the synchronization with the transmission side PN code is established.

  Regarding the technology related to the above equalization circuit, for example, in Patent Document 1, based on the received training signal, the tap coefficient of the automatic equalizer for data reproduction is initialized by the automatic equalizer for equalization training, After the initial setting, there is an automatic equalization circuit that updates the tap coefficient using the received signal, equalizes the received signal with a data reproduction automatic equalizer based on the updated tap coefficient, and demodulates the equalized received signal. Have been described.

  A schematic configuration of the automatic equalization circuit is shown in FIG. The automatic equalization circuit 200 includes an automatic equalizer for equalization training 203 having the same configuration as the automatic equalizer for data reproduction 201 together with the automatic equalizer for data reproduction 201. The training signal synchronization detection unit 205 detects that a training signal has been received from the input signal. The training pattern signal generator 206 generates a reference training pattern signal having substantially the same pattern as the training signal from the transmission side as a reference signal based on the detection result by the training signal synchronization detection unit 205. The generated reference signal is mapped by the mapping circuit 207.

  The error amount calculation unit 204 calculates an error between the reference signal mapped by the mapping circuit 207 and the signal output from the equalization training automatic equalizer 203 and inputs the error to the equalization training automatic equalizer 203. To do. The equalization training automatic equalizer 203 sequentially updates the tap coefficients based on the input error signal, and outputs an update signal for setting the updated tap coefficient to the data reproduction automatic equalizer 201. As a result, the equalization characteristic necessary for demodulating the received signal including the training signal of the predetermined pattern transmitted from the transmission side is automatically updated. The data signal equalized by the automatic equalizer 201 is input to the discriminator 202, the transmission point sent on the transmission side is identified, and the identification result is output as a data signal.

JP 2002-158722 A

  The communication system using the digital power line carrier is configured for the transmission line system as shown in FIG. 19 by the circuit system as shown in FIG. As shown in FIG. 19, a digital power line carrier device using a transmission line as a transmission medium passes through a coupling capacitor (CC) and a coupling filter (CF) that allow only high frequencies to pass through a high-frequency coaxial cable in a substation (SS). Connected to the transmission line. Further, a line trap (LT) for reducing the power value of the delayed wave is inserted in the transmission line.

  FIG. 20 is a diagram illustrating an example of output characteristics of an adaptive equalizer output of a training signal in the transmission line system of FIG. In the case of the circuit system shown in FIG. 17, since the reference symbol determined by the determiner serves as a reference signal, the equalizer output symbol started from the initial state has a delay wave in the transmission line system shown in FIG. Even in this case, as shown in FIG. 20, it is required to exist somewhere in the same quadrant as the transmission symbol. In the transmission line system shown in FIG. 19, due to the presence of the line trap, even if a delay wave exists, a transmission error does not occur because it exists somewhere in the same quadrant as the transmission symbol. However, in the case of this power transmission system, in a transmission line configuration using branched transmission lines, the presence of line traps increases the amount of attenuation and makes it difficult to communicate with branched electric stations.

  On the other hand, as shown in FIG. 21, for example, in a transmission line system in which a line trap is not installed at a branch point b of the transmission line, communication with the above-described electric station using the branched transmission line is possible. The delay wave loss due to the branch point b is small, and the propagation loss of the transmission line is as small as 0.17 dB / km, so that the power value of the delay wave is large and the power delay profile characteristic is long delay. become.

  Therefore, the output of the adaptive equalizer started from the initial state in such a transmission line has output characteristics as shown in FIG. 22, and there are symbols output in a quadrant different from the quadrant of the transmission symbol. Therefore, the reference signal of the adaptive equalizer 100 is equalized with a signal different from the transmission symbol, which causes a problem that the convergence characteristic of the adaptive equalizer 100 deteriorates. Further, since a pattern different from the PN code string is output from the demapping unit 105, the input to the receiving side PN m stage register 106 and the output value do not match, and synchronization is not established and synchronization is established again. There is a problem that the convergence characteristic of the adaptive equalizer 100 deteriorates in the same manner as described above, such as the establishment process.

  The equalization circuit described in Patent Document 1 is related to the prior art corresponding to the above-described problem, but this equalization circuit includes a reference signal in addition to an adaptive equalizer that removes a delayed wave of a data signal. The tap information obtained by the equalizer is set to the tap value of the adaptive equalizer for removing the delayed wave, and the data signal is equalized. Yes. However, in this case, there are concerns about an increase in circuit scale due to the provision of an equalizer circuit for newly generating a reference signal, and a procedure related to a synchronization acquisition method between a received training signal and a training signal generation circuit is described. Not.

  Furthermore, in the case of a method in which two code sequences having different training code sequences for frequency offset and adaptive equalizer are switched in time series, it is necessary to continue the acquisition of synchronization before and after the code switching and generate a reference signal. For this reason, the configuration of the scheme described above cannot be fully supported, and synchronization acquisition and reference signal generation by a new scheme are required.

  The present invention has been made in view of the above circumstances, and in a communication system using two code strings having different training signals for frequency offset and for an adaptive equalizer, a training signal for an adaptive equalizer on the transmission side It is an object of the present invention to provide a communication system that can establish synchronization of the initial phase between the receiver and the PN code generator on the receiving side and monitor synchronization acquisition after the establishment of synchronization.

  The inventors diligently used an equalization method for an adaptive equalizer in order to enable communication with an electric station using a transmission line system including a branch point where no line trap is installed as shown in FIG. In a communication system that uses two signals with different training code sequences for frequency offset and adaptive equalizer, the timing at which the frequency offset training signal was switched to the adaptive equalizer training signal was detected. If a reference signal of a PN code string for an adaptive equalizer is newly generated on the receiving side based on the timing and this reference signal is used as a training code string for the adaptive equalizer, Since synchronization is established and transmission and reception match with the same code string, the adaptive equalizer transmits the signal with the maximum equalization capability while minimizing the effects of delay waves and noise. It has found to be able to equalize the road, and have reached the present invention.

Further, in the present invention, the synchronization acquisition monitoring unit that monitors whether synchronization between the adaptive equalizer training signal transmitted from the transmission side and the adaptive equalizer training signal generated on the reception side is established. Is provided.
This is because when the receiving side switches under some adverse condition and erroneously detects the timing, the adaptive equalizer continues the training process as it is with a code string that cannot obtain the equalization function at all. In order to avoid this continuation processing, a synchronization acquisition monitoring unit is provided.
In this synchronous acquisition monitoring, a signal generated as a training signal of the adaptive equalizer is input to the tap coefficient setting unit of the matched filter in FIG. 2, and the peak power value of the data output from the matched filter is monitored. If the symbols of the N stages that are the number of stages of the matched filter and the N symbols of the received signal have the same symbol value, a peak of the power value can be obtained in N symbol periods. Can be determined to be established, and the adaptive equalizer training can be continued. On the other hand, if the peak power is not detected in the N symbol period, it is determined that the synchronization is not established, and the operation for establishing the synchronization by shifting to the initial training mode again is performed.

  According to the present invention, in a method using two code sequences having different training code sequences for frequency offset and adaptive equalizer, the transmission side adaptive equalizer training signal sequence and the receiving side PN code generator It is possible to establish synchronization of the initial phase, and to generate an equalizer reference signal code string, and to detect and monitor synchronization acquisition corresponding to the PN code string after the synchronization of the initial phase is established. A communication system can be provided.

It is a block diagram for demonstrating the receiving circuit structure of the communication system by one Embodiment of this invention. It is a figure which shows the more concrete structure of the communication system by one Embodiment of this invention. It is a figure which shows the structural example of the training signal applied to the communication system of this invention. It is a figure which shows the power characteristic of the periodic correlation function of the PN7 code used for a communication system. It is a timing chart which shows an example of the PN code switching timing applied to the communication system of this invention, and code generation timing. It is a figure which shows the structural example of the shift register which comprises the PN generator for adaptive equalizer training. It is a figure which shows the shift register value in each shift register number of the shift register of FIG. It is a figure for demonstrating 4PSK mapping by a Gray code | symbol. It is a figure which shows the example of a timing of mapping data accumulation | storage of a mapping data storage part, and a tap coefficient update. It is a figure which shows the power characteristic of the periodic correlation function of PN12 code | symbol. It is a figure for demonstrating the correction concept of phase inclination correction. It is a block diagram for demonstrating the other receiving circuit structure of the communication apparatus by this invention. It is a figure which shows the example of correction | amendment of the inclination of a phase. It is a block diagram for demonstrating the circuit structure of a frequency offset estimation / correction | amendment part. It is a figure which shows the structural example of the PN code completion | finish determination circuit for offset estimation shown in FIG. It is a block diagram for demonstrating the transmission circuit structure of the communication apparatus of the transmission side applied to the communication system which concerns on this invention. It is a figure for demonstrating the example of a circuit structure of the receiving side applied to the communication system by a digital power line carrier. It is a figure which shows schematic structure of the automatic equalization circuit of a conventional system. It is a figure which shows the power transmission line system by which the line trap is installed in the power transmission line branch. It is a figure which shows an example of the output characteristic of the adaptive equalizer output of the training signal in the power transmission line system | strain of FIG. It is a figure which shows the power transmission line system by which the line trap is installed in the power transmission line branch. It is a figure which shows an example of the output characteristic of the adaptive equalizer output of the training signal in the power transmission line system | strain of FIG.

  FIG. 1 is a block diagram for explaining a receiving circuit configuration of a communication system according to an embodiment of the present invention. The communication device on the reception side receives the symbol pattern based on the PN code transmitted from the communication device on the transmission side, and demodulates it by the demodulator (MODEM unit). The symbol pattern from the demodulator is input to the adaptive equalizer 1 and also input to the synchronization acquisition monitoring unit 40.

In a communication system that uses two signals having different training code sequences for frequency offset and for an adaptive equalizer, the communication device on the reception side receives the training signal transmitted from the transmission side from the frequency offset training signal for the adaptive equalizer. A receiving unit is provided that receives a signal at the timing when switching to the training signal.
The PN generator 10 starts creating a PN code string with a signal at a timing received by the receiving unit. The 4PSK mapping unit 11 performs 4PSK mapping of the PN code string. The adaptive equalizer 1 inputs the symbol data signal mapped by the 4PSK mapping unit 11 as a training signal on the receiving side. The synchronization acquisition monitoring unit 40 monitors whether synchronization between the training signal mapped by the 4PSK mapping unit 11 and the adaptive equalizer training signal transmitted from the transmission side is acquired.

  FIG. 2 is a diagram showing a more specific configuration of the communication system according to the embodiment of the present invention. The synchronization acquisition monitoring unit 40 in FIG. 1 receives a mapping data storage unit 13 that stores a predetermined number of complex conjugate values of symbol data output from the 4PSK mapping unit 11, and a training signal for frequency offset transmitted from the transmission side. And a matched filter 2 for calculating a periodic correlation function from the shift register value of the input signal and the tap coefficient value updated to the value of the symbol data stored in the mapping data storage unit 13, and a training signal for frequency offset. A peak power detection timing generation unit 8 that detects a code having the largest power value within a repetition period of the 4PSK code sequence to be generated and generates timing of the detected code. The function and operation of each component of the main part constituting the communication system will be described individually below.

(1) Matched filter The matched filter 2 includes a shift register unit 3, a tap coefficient setting unit 4, and an addition unit (Σ) 5. The shift register unit 3 implements N stages of register numbers equal to the number of 4PSK symbols generated by the frequency offset PN code, shifts the received data from the demodulating unit while delaying one symbol at a time, and outputs a tap value. To do.
The tap coefficient setting unit 4 is provided with the same number (N stages) of tap coefficient setting units as the shift register unit 3, and a conjugate value of a 4PSK symbol complex number generated by a frequency offset PN code is set in advance. The multiplication of the shift register value and the tap coefficient value is performed every time one symbol is shifted, and the multiplication value is output.

ここで、^*は複素共役である。また、ｕｔ（ｎ）はｔ番目のシフトレジスタ値、ｋｔ（ｎ）はｔ番目のタップ係数値である。
また、複素共役計算部６と乗算器７とにより、周期相関関数Ｒ（ｎ）と、Ｒ（ｎ）を複素共役したものとを乗算し、周期相関関数の電力値Ｒｐ（ｎ）を算出する。これは次式で示される。
Ｒｐ（ｎ）＝Ｒ（ｎ）・Ｒ（ｎ）^* ・・・（２） The adder unit 5 adds the multiplication values from the tap coefficient setting unit 4 by N symbols every time one symbol is shifted, and outputs the added value. The output period correlation function R (n) from the adding unit 5 is expressed as follows.

Where ^* is a complex conjugate. Further, ut (n) is a t-th shift register value, and kt (n) is a t-th tap coefficient value.
Further, the complex conjugate calculation unit 6 and the multiplier 7 multiply the periodic correlation function R (n) and the complex conjugate of R (n) to calculate the power value Rp (n) of the periodic correlation function. . This is shown by the following equation.
Rp (n) = R (n) · R (n) ^* (2)

(2) Peak power detection / timing generation unit The peak power detection / timing generation unit 8 receives the periodic correlation function R (n) and generates the most power within the repetition period of the 4PSK code sequence generated by the frequency offset PN code. A sign having a large value is detected, the point is generated as a timing, and is output to the condition establishment detection unit 9. In addition, when the peak power timing is detected after the timing is generated, information on the synchronization acquisition is output to the condition establishment detection unit 9, and when the peak power timing is not detected, the synchronization acquisition is performed. It is determined that it has not been performed, and the information is output.

(3) PN code switching detection signal receiving unit The PN code switching detection signal receiving unit 21 receives a PN code switching detection signal output from a frequency offset estimation / compensation unit (not shown). The frequency offset estimation / compensation unit compensates the frequency offset based on the training pattern by the PN code transmitted from the transmitting side, determines the switching from the transmitted training pattern, and outputs the PN code switching detection signal. Is.

(4) Condition Satisfaction Detection Unit The condition satisfaction detection unit 9 takes in the PN code switching detection signal from the PN code switching detection signal reception unit 21 and the synchronization acquisition signal from the peak power detection / timing generation unit 8, and receives the PN code. An activation signal is output to the PN generator 10 under the condition that the synchronization acquisition signal is input when the switching detection signal is input. In the condition establishment detection unit 9, when the PN code switching detection signal from the wave number offset estimation / compensation unit is input, if the synchronization is supplemented by the peak power detection / timing generation unit 8, the activation is performed to activate the PN generator 10. Output a signal. The configuration of the frequency offset estimation / compensation unit will be described later.

(5) PN Generator The PN generator 10 is a PN generator having the same configuration as the adaptive equalizer training PNM stage generator set on the transmission side, and the initial value of the shift register is the transmission side PN. The value shifted M bits from the initial value of the generator is used as the initial value, and the counter is started by the start signal output from the condition satisfaction detection unit 9, and is shifted by 2 bits at 1 symbol timing.

(6) 4PSK mapping unit In the 4PSK mapping unit 11, the 2-bit signal obtained from the PN generator 10 is mapped according to the symbol arrangement of the Gray code, and is adapted as the symbol data of the reference signal d (n) for the adaptive equalizer. It is output to the equalizer 1 and also output to the complex conjugate calculator 12.

(7) Complex conjugate calculation unit The complex conjugate value of the symbol data output from the 4PPSK mapping unit 11 is calculated and output to the mapping data storage unit 13.

(8) Mapping Data Storage Unit The mapping data storage unit 13 writes 4PSK mapping data shifted to M bits from the initial value of the PN generator 10 as its initial value. After activation of the PN generator 10, symbol data generated by the 4PSK mapping unit 11 and complex-conjugated by the complex conjugate generation unit 12 is accumulated. The value of the tap coefficient setting unit 4 is updated to the value of the mapping data storage unit 13 at the timing when the N symbol data has been stored in the mapping data storage unit 13.

(9) Adaptive Equalizer The adaptive equalizer 1 uses the adaptive equalizer training reference signal d (n) generated by the 4PSK mapping unit 11 and the estimated transmission symbol calculated by the adaptive equalizer 1. The error amount e (n) is calculated, and the tap coefficient of the adaptive equalizer 1 is updated so that the error amount e (n) is minimized by an LMS algorithm (Least Mean Square Algorithm). The LMS algorithm is expressed by the following equation.
W (n + 1) = W (n) + μu (n) e ^* (n) (3)
Here, w (n + 1) is a tap coefficient to be updated next, W (n) is a current tap coefficient, μ is a feedback coefficient, u (n) is an input signal to the adaptive equalizer, and * is a complex conjugate. .

(Specific explanation of operation method)
An operation example of the communication apparatus having the above configuration will be described.
FIG. 3 is a diagram showing a configuration example of a training signal applied to the communication system of the present invention. In the communication system using the communication apparatus of the present invention, first, a frequency offset training signal as shown in FIG. 3 is transmitted from the transmission side, and then a code switched to the adaptive equalizer training signal is transmitted. After the training signal is transmitted, communication is started and a transmission signal based on random data is transmitted.

For the frequency offset training signal, a 64 symbol repetition code obtained by 4PSK modulation of 2 ⁷ code strings with 1 bit added to PN7 (2 ⁷ -1) is used. The adaptive equalizer training signal uses a 4095 symbol repetition code obtained by 4PSK-modulating a code string of PN12 (2 ¹² -1). Further, after the training signal is transmitted, the transmission signal is switched to 64QAM (Quadrature Amplitude Modulation), and a transmission signal based on random data is transmitted.

  First, as the frequency offset training signal, the same code string is transmitted a plurality of times (here, repeated eight times). Therefore, the initial value of the tap coefficient setting unit 4 of the matched filter 2 shown in FIG. 2 is the same as the complex conjugate value of the code sequence (1 to 64 symbols) of the frequency offset training signal. Therefore, the power value Rp (n) of the autocorrelation function shows peak power at 64 symbol intervals as shown in FIG.

The peak power detection / timing generation unit 8 detects a peak power point generated in 64 symbols and generates timing, and observes whether or not an appearing timing period is generated in 64 symbols, thereby making a frequency offset. The synchronization acquisition for the training code string is monitored.
When synchronization acquisition is continued, an ON signal is output from the peak power detection / timing generation unit 8 to the condition establishment detection unit 9, and when the peak power point is not detected and synchronization acquisition is not performed, an OFF signal is output. Become. In addition, when the synchronization supplement is not performed, the peak power detection / timing generation unit 8 sends a non-detection signal to the existing training sequence. As a result, the operation for shifting to the initial training is performed again.

FIG. 5 is a timing chart showing an example of PN code switching timing and code generation timing applied to the communication system of the present invention.
The communication system is shown in FIG. It is assumed that it is operating with the symbol clock shown in (symbol timing). Where b. As shown in (Reception Symbol Sequence), when the PN code is switched from the frequency offset to the adaptive equalizer training, the PN code switching in the frequency offset estimation / correction unit is determined using 6 symbols of the received signal. Is supposed to be done. Therefore, c. As shown in (PN code switching detection signal), PN code switching is determined after 6 symbols have elapsed since the actual switching of the PN code, and the PN code switching detection signal is output to the PN code switching signal receiver 21. The PN code switching detection signal receiving unit 21 outputs the signal to the condition establishment detecting unit 9.

  Then, the condition establishment detection unit 9 monitors the state of synchronization acquisition by the peak power detection / timing generation unit 8 and the condition of PN code switching detection, the synchronization acquisition continuation signal from the peak power detection / timing generation unit 8, the frequency An activation signal is output to the PN generator 10 under the AND condition of the PN code switching detection signal from the offset estimation / correction unit. For example, d. As shown in (PN code synchronization acquisition), when synchronization is captured by the peak power detection / timing generation unit 8 and a PN code switching detection signal is input, e. As shown in (PN generator activation timing), the activation signal of the PN generator 10 is output to the PN generator 10 at the input timing of the PN code switching detection signal.

The PN generator 10 receives the activation signal output from the peak power detection / timing generation unit 8 and starts shifting the shift register.
Here, the shift register value of the transmission side adaptive equalizer training PN generator immediately before the shift register starts shifting is shifted by 12 bits from the initial value (6 symbols have been generated in 4PSK). For this reason, the shift register value of the PN generator 10 on the reception side needs to wait in a state shifted by 12 bits in order to synchronize the initial phase with the transmission PN generator.
When the PN generator 10 on the receiving side is activated, it shifts by 2 bits at 1 symbol timing, so that f. As shown in (PN12 stage register shift number), the PN code for the adaptive equalizer is generated by the register value shifted by 13 or 14 bits. Thereafter, adaptive equalizer training PN codes are continuously generated.

  The generated adaptive equalizer training PN code is mapped by the 4PSK mapping unit 11 having 2 bits and 1 symbol, g. As shown in (4PSK mapping signal), the seventh, eighth, ninth,... And seventh and subsequent symbol points are generated, and h. This is used as an adaptive equalizer reference signal d (n) shown in (Adaptive equalizer reference signal timing d (n)).

The configuration of the PN generator 10 and an example of register setting will be further described.
FIG. 6 is a diagram illustrating a configuration example of a shift register constituting the adaptive equalizer training PN generator, and FIG. 7 is a diagram illustrating shift register values at each shift register number of the shift register of FIG. As described above, the shift register value of the transmission side adaptive equalizer training PN generator immediately before the shift register starts shifting is shifted by 12 bits from the initial value. For this reason, the shift register value of the adaptive equalizer training PN generator shown in FIG. 6 is synchronized with the transmitting side PN generator in the initial phase, so that the receiving side PN generator 10 shown in FIG. It is necessary to wait in a state where the shift register value is shifted by 12 bits. That is, the standby shift register value is shifted by 12 bits from the shift register initial value.

  When the PN generator 10 on the receiving side is activated, it shifts by 2 bits at 1 symbol timing, so that the register value shifted by 13 to 14 bits from the initial value becomes a register value as shown in FIG. Is output from the shift register shown in FIG. Subsequently, the register value is shifted by 15 or 16 bits at the next symbol timing, and a bit of “1 0” is output. Thereafter, “0 0”, “1 0”, “1 0”... An equalizer training PN code is generated.

  In the generated adaptive equalizer training PN code, symbol points are mapped in accordance with the Gray code shown in FIG. 8 by the 4PSK mapping unit 11 which becomes 1 symbol with 2 bits. As shown in FIG. , 9... And the seventh and subsequent symbol points are generated and used as the reference signal d (n) for the adaptive equalizer.

  The reference signal d (n) output from the 4PSK mapping unit 11 as described above is input to the adaptive equalizer 1, and the output v (n) and d (n) of the equalizer (filter unit) The error amount e (n) is calculated, the tap coefficient of the adaptive equalizer is updated by the LMS algorithm so that the error amount e (n) is minimized, and the equalizer can be converged.

The reference signal d (n) generated by the 4PSK mapping unit 11 is output to the adaptive equalizer 1 and simultaneously complex conjugate symbol data is output to the mapping data storage unit 13.
FIG. 9 is a diagram illustrating a timing example of mapping data accumulation and tap coefficient update of the mapping data accumulation unit. a. As shown in (a symbol string to be written to the mapping data storage unit), the initial value of the mapping data storage unit 13 is 4PSK mapping data (6 symbols) when the PN generator 10 is shifted from the initial value to 12 bits. It is written. After the activation of the PN generator 10, data from the 7th to 64th symbols generated by the PN generator 10 and the 4PSK mapping unit 11 are written.

In the mapping data storage unit 13, when the writing up to the 64th symbol is completed as shown in FIG. . b shows the write timing to the tap coefficient setting unit, and c shows the tap coefficient setting value to be updated.
The shift register unit 3 of the matched filter 2 has the 1st to 64th symbols of the 4PSK signal generated by the transmission side PN12 generator at the next symbol timing. Therefore, if synchronization between the transmission side PN generator and the reception side PN generator is established, d. As shown in (Peak power detection timing), peak power appears from the matched filter 2.
Therefore, the peak power detection / timing generation unit 8 can determine that synchronization has been captured when it is determined that a peak power value has occurred 64 symbols after the previously detected peak power timing.
If no peak power value is detected, it can be determined that synchronization has not been acquired, and a non-detection signal is transmitted to the existing training sequence, and an operation for shifting to initial training is performed again.

In the mapping data storage unit 13, as shown in FIG. 9, writing of 4PSK mapping data of 65 to 128th, 129 to 192,... And tap coefficient setting of the tap coefficient setting unit 4 of the matched filter 2 are performed. Updates are made.
FIG. 10 is a diagram illustrating power characteristics of the periodic correlation function of the PN12 code. If the synchronization is acquired by switching to the adaptive equalizer training signal, the peak power is detected at a period of 64 symbols as shown in FIG.
As described above, even when the PN codes are different, two matched filters are not required, and synchronization can be acquired with one matched filter, so that the circuit scale can be simplified.

Next, the operation of the phase tilt correction method using the present invention will be described.
FIG. 11 is a diagram for explaining a correction concept of phase inclination correction, and shows a transmission-side reference phase vector V1 and a vector V2 when there is a phase inclination. The periodic correlation function output from the matched filter 2 includes phase information, and phase difference information based on the transmission side phase (0 °) can be detected at the point where the correlation is highest. That is, the phase difference R between the reference phase vector V1 and the vector V2 can be detected. The phase tilt is corrected using the phase difference R as a phase correction amount.

FIG. 12 is a block diagram for explaining another receiving circuit configuration of the communication apparatus according to the present invention. The configuration of FIG. 12 is different from the configuration of FIG. 2 in that the arctangent unit (atan unit) 14, the phase correction value generation unit 15, the adder 16, the 1 symbol delay circuit (Z ⁻¹ ), the complex conversion unit 18, and the multiplier. 19 is added. Since the same operation as in FIG. 2 is performed in the part overlapping with FIG. 2, the repeated description is omitted.

  In this configuration example, an arc tangent unit 14 is set on the output side of the matched filter 2 in order to correct the phase gradient based on the phase information detected as described above, and the obtained phase information is phase-corrected with a radian value. Output to the value generator 15.

The phase correction value generation unit 15 uses the synchronization acquisition detection timing signal output from the peak power detection / timing generation unit 8 at a period of 64 symbols, and uses the phase information shown in FIG. Output from the generation unit 15. Since there is no correction information except during peak power, a value of 0 is output.
The phase correction amount output from the phase correction value generation unit 15 is added by the adder 16 with the phase correction amount delayed by the one symbol delay circuit 17, and the addition result is complex-converted by the complex conversion unit 18. The multiplier 19 multiplies the complex-transformed value by the complex received signal from the demodulator, thereby correcting the phase gradient.
FIG. 13 shows a correction example of the phase inclination. FIG. 13A shows the state of inclination before phase correction, and FIG. 13B shows the state of inclination after phase correction.

  As described above, the phase on the transmission side and the phase on the reception side can be matched only by adding a circuit unit newly shown in FIG. This is a very effective means for a method that requires correction of a tilted phase due to a delayed wave or the like.

(Configuration of frequency offset estimation / correction unit)
The configuration and operation of the frequency offset estimation / correction unit will be described below. As described above, the communication apparatus according to the embodiment of the present invention receives the PN code switching detection signal output from the frequency off setting estimation / correction unit, and receives the synchronization acquisition and the input of the PN code switching detection signal in the condition establishment detection unit. The PN generator on the receiving side is activated when the condition is established. The configuration of the frequency offset estimation / correction unit will be described below.

FIG. 14 is a block diagram for explaining a circuit configuration of the frequency offset estimation / correction unit. Frequency offset estimation training pattern by 2 ⁿ code stream transmitted from the transmitting-side communication device is demodulated symbol pattern by 2n code sequence at the demodulator operating as 4PSK demodulator, a frequency offset estimation and correction unit 20 input.

The complex autocorrelation calculation circuit (complex autocorrelation calculation unit) 24 of the frequency offset estimation / correction unit 20 uses the current symbol point r (n) and the (2 ⁿ / 2) symbol delay circuit 28 to delay 2 ⁿ / 2 symbols. R (n−2 ⁿ / 2) is sampled from the symbol pattern, and the autocorrelation between the two symbols is obtained. Here, since the same 4PSK symbol point is generated from the transmission side in a 2 ⁿ / 2 cycle by the PN code, r (n) and r (n−2 ⁿ / 2) are autocorrelations r ( n) · r ^* (n−2 ⁿ / 2) always indicates a value of 1 when there is no frequency offset because the phase rotation is 0 °.

Here, ^{assuming that} the transmission channel time-varying characteristics between r (n) and r (n−2 ⁿ / 2) do not change, the convolution amount due to the delay wave in the transmission line is the same, and the correlation of the delay wave Can also be 1. As a result, the influence of the delayed wave can be removed, and the influence of the noise is also removed by a random averaging process, and an autocorrelation value indicating only the frequency offset element is obtained.

  The 45 ° phase rotation circuit (phase rotation unit) 25 rotates the complex autocorrelation value output from the complex autocorrelation calculation circuit 24 by 45 °. As a result, the coordinates of the complex autocorrelation value are converted into the symbol arrangement position on the complex plane. Here, by rotating the 45 ° phase, the symbol point is in four quadrants ([++], [+ −], [−−], [− +]) of the complex plane composed of the real part and the imaginary part. It will always be placed in either.

In the real part / imaginary part polarity detection circuit (real part / imaginary part polarity detection part) 29, the symbol point rotated by 45 ° is four quadrants ([++] (the real part and the imaginary part are [+]). ), [+-] (Real part is [+], imaginary part is [-]), [-] real part and imaginary part is [-]), [-+] (real part is [-], imaginary part It is detected whether the part is in [+])).
The transmission symbol deviation estimation circuit (transmission symbol deviation estimation unit) 30 calculates the phase deviation (phase rotation amount) according to the polarities (signs) of the real part and the imaginary part detected by the real part / imaginary part polarity detection circuit 29. presume. Here, when the real part and the imaginary part detected by the real part / imaginary part polarity detection circuit 29 are [++], the transmitted current symbol s (n) and the symbol s (n− ²ⁿ / 2) before are transmitted. ²ⁿ / 2) means that the same symbol has been transmitted, and the transmission symbol shift estimation circuit 30 can estimate the phase rotation amount to be 0 °.
Similarly, when the real part and the imaginary part are [− +], the phase rotation amount can be estimated to be 90 °, and when the real part and the imaginary part are [−−], the phase rotation amount is 180 °. When the real part and the imaginary part are [+ −], the phase rotation amount can be estimated to be 270 °.

The transmission symbol shift estimation circuit 30 outputs one of the values 1, j, −1, and −j according to the estimated amount of phase rotation. Here, when the symbol point detected by the real part / imaginary part polarity detection circuit 29 is in the [++] quadrant, that is, when the phase rotation is estimated to be 0 °, 1 is output.
When the symbol point is in the [− +] quadrant, that is, when the phase rotation is estimated to be 90 °, −j is output, and when the symbol point is in the [−−] quadrant, that is, the phase rotation is 180. When the angle is estimated to be °, −1 is output, and when the symbol point is in the [+ −] quadrant, that is, when the phase rotation is estimated to be 270 °, −j is output.

Since the autocorrelation of the transmitted symbol is represented by s (n) · s ^* (n−2 ⁿ / 2), 2 ⁿ / 2 symbols that have been subjected to 4PSK modulation are used as a frequency offset estimation training pattern by this method. In the case of transmission, the complex autocorrelation value rotated by 45 ° is always [++], and a value of 1 is obtained as the complex autocorrelation value. This theory will be described more specifically below.

The autocorrelation value calculated by the complex autocorrelation calculation circuit 24 is calculated in the presence of a frequency offset. When there is a frequency offset, for example, in order to determine that the autocorrelation value at intervals of 64 symbols (n = 7 in 2 ⁿ / 2 symbols) is always in the “++” quadrant, the phase is rotated by 45 °. The frequency offset must fall within the range of ± 45 °.

Here, since the error of the crystal oscillator is specified to be ± 30 ppm or less, no further error is shown. Since the maximum frequency used for communication in the communication system is 425 kHz, the frequency offset amount when there is an error of ± 30 ppm is about ± 13 Hz, and the rotation amount at this time is a symbol rate of 64 QAM of 32 kbps (31.25 μs). ) Then:
Rotation amount ≒ 360 x freq.offset x Ts
≒ 360 × 13Hz × 31.25 × 10-6
≒ ± 0.146 °

Thus, between 64 symbols, ± 0.146 × 64≈ ± 9.36 °, which does not exceed ± 45 °. Therefore, when the 2 ⁿ code string at the time of training is received, when the autocorrelation value is rotated by 45 °, it always enters the [++] quadrant of the complex plane, and the transmission symbol shift estimation circuit 30 Then, the phase rotation is estimated to be 0 °, and 1 is always output. That is, when the 2 ⁿ / 2 symbols 4PSK modulated as a training pattern for frequency offset estimation is transmitted, it is possible to always output 1 from the transmission symbol shift estimation circuit 30.
If there is a concern that the phase rotation will exceed ± 45 °, the transmission symbol shift estimation circuit 30 can ensure that the sampling symbol interval is as short as 32 symbols or 16 symbols. 1 can be output.

  The phase rotation amount calculation circuit (phase rotation amount calculation unit) 26 calculates the phase rotation amount due to the frequency offset by the following equation (4).

In the above equation (4), the denominator is the amount of phase rotation in the symbol interval (2 ⁿ / 2) estimated as transmitted on the transmission side, and the output output from the transmission symbol shift estimation circuit 30 Use the value. The numerator of equation (4) is the amount of phase rotation between symbols actually received via the transmission path.
Here, since the 2 ⁿ / 2 symbol pattern is transmitted as the frequency offset estimation training pattern as described above, 1 is output from the transmission symbol shift estimation circuit 30, so that the equation (4) The denominator is always 1, and the amount of phase rotation between 2 ⁿ / 2 symbols received via the transmission path is calculated as Δr. This phase rotation amount is an averaged phase rotation amount due to a frequency offset from which the cause of the delay wave and noise is removed.

The forgetting factor averaging circuit 27 uses the following equation (5) to average Δr (n) for each symbol.
R (n) = βR (n−1) + (1-β) ΔR (n) (5)
Here, β is a forgetting factor having a value of about 0.998.

In the ATA calculation circuit 32, the Atan (Arctangent) calculation is performed by the real part and the imaginary part of R (n) obtained by the forgetting factor averaging circuit 27, and the rotation angle of one symbol is obtained by dividing by 2 ⁿ / 2. Δθ (n) is obtained.

  The second complex multiplier 33 and the 1-symbol delay circuit 34 calculate the phase correction amount Δφ (k) of the k-th symbol of the demodulator operating as a 4PSK demodulator from the average phase rotation angle Δθ (n) of 1 symbol. In order to calculate, the processing shown in the following equation (6) is performed.

e ^−j Δφ ^(k) = e ^{−j (} Δφ ^{(k−1) +} Δθ ⁽ⁿ⁾⁾ (6)

In the first complex multiplier 22, the kth symbol estimated from the phase ej ⁽ ωt ⁺ φ ^{(k)) of the kth} symbol of the baseband signal output from the demodulator operating as a 4PSK demodulator. In order to correct the phase correction amount Δφ _(k), the processing shown in the following equation (7) is performed, and finally the frequency offset is corrected.

e ^j ω ^t = e ^{j (} ω ^{t +} φ ^(k) -Δφ ^(k)) (7)

  FIG. 15 is a diagram showing a configuration example of the offset estimation PN code end determination circuit 31 shown in FIG. In the offset estimation PN code end determination circuit 31, the code conversion circuit 311 converts the output value (+1, j, −1, −j) from the transmission symbol shift estimation circuit 30 to 1 when the correlation is +1. When the inverse correlation is (−1), the value is converted to −1, the other values are converted to 0, and n symbols are input to the shift register 312. The shift register 312 inputs the tap output value to the adder 313. The adder 313 receives a value of 1, −1, or 0 corresponding to the number of taps T + 1 of the shift register 312, and the output of the adder 313 is the sum of the input ones. The maximum output value is T + 1. Therefore, in this case, since all the n symbols input to the shift register are 1 in the time domain in which the frequency offset estimation training pattern is transmitted, the output value of the adder 313 always indicates the n value. .

However, when the transmission apparatus on the transmission side shifts from the frequency offset estimation training pattern to the adaptive equalizer training pattern, the 2 ^m -1 code sequence does not always have a correlation of 1 at 2 ⁿ / 2 symbol intervals. As for the output from the transmission symbol deviation estimation circuit 30, the values +1, j, -1, and -j are output at random. Alternatively, the initial value of the shift register (m stage) of the PN generator 10 is set to a code that is opposite in sign to the 1st to m-th bit strings generated by the PN generator 10, so that the transmission symbol shift is performed. As for the output from the estimation circuit 30, −1 is m / 2 symbols continuously output. In this case, +1, −1, and 0 are input to the shift register 312 randomly or continuously, and the output value from the adder 313 is not an n value.

  In the threshold determination circuit 314, the threshold value of (na) is set to the output value of the adder 313, so that when the value becomes (na) or less, the adaptive equalizer training pattern has been switched. Can be detected. When it is detected that the frequency offset estimation training pattern is switched to the adaptive equalizer training pattern, the threshold determination circuit 314 outputs a PN code switching detection signal. This makes it easy to switch the training pattern from the transmitted training pattern, even if the frequency offset is compensated based on the training pattern transmitted from the transmitting side without generating a training pattern on the receiving side. Can be determined.

When the PN code switching detection signal from the threshold determination circuit 314 is input to the signal output control circuit 23 shown in FIG. 14, the signal output control circuit 23 releases the signal output suppression to the adaptive equalizer so far. The signal is output to the adaptive equalizer. As a result, an adaptive equalizer training pattern is output to the adaptive equalizer, and training in the adaptive equalizer is started.
In addition, the PN code switching detection signal from the threshold value determination circuit 314 in the offset estimation PN code end determination circuit 31 is also output to the ATRAN calculation circuit 32 at the same time, ends the averaging process after the elapse of time t symbols, and rotates one symbol. The angle is fixed at Δθ (t−M + 1) to the previous value. M is the number of registers of the shift register 312.
After completion of the above training, the demodulator is switched from the 4PSK demodulator to 2 ⁿ QAM demodulation, and the data signal sequence is demodulated.

  The PN code switching signal from the threshold determination circuit 314 is input to the condition satisfaction detection unit 9 according to the embodiment of the present invention. The condition establishment detection unit 9 generates an activation signal for activating the reception-side PN generator based on the input PN code switching detection signal when synchronization is acquired.

  FIG. 16 is a block diagram for explaining a transmission circuit configuration of a communication device on the transmission side applied to the communication system according to the present invention. In a communication system, a communication device on the transmission side that transmits a training pattern for compensating for a frequency offset between communication devices during training when starting communication, and a communication on the reception side that receives the training pattern and performs frequency offset compensation The device is connected via a wired transmission path. FIG. 16 illustrates a circuit configuration of the communication device 50 on the transmission side that transmits a training pattern during training.

The communication device 50 on the transmission side includes a frequency offset estimation PN generator 51 that generates a 2 ⁿ −1 bit PN code sequence (2 ⁿ −1 code sequence), which is a frequency offset estimation training pattern, and adaptive equalization. And an adaptive equalizer training PN generator 52 that generates a 2 ^m -1 bit PN code string (2 ^m -1 code string), which is a training pattern for devices.

One bit of “0” generated by the bit generation unit 54 is added to the 2 ⁿ −1 code sequence generated by the frequency offset estimation PN generator 51 by the bit addition unit 55, and a 2 ⁿ bit code is generated. It becomes a sequence (2 ⁿ code sequence). The 2 ⁿ code string is used to estimate the frequency offset in the communication device on the receiving side.
The 2 ⁿ code sequence and the 2 ^m −1 code sequence generated by each PN generator are switched by a switch 56 serving as a switching unit and output to the modulator 53. In this case, ^{n of} the 2 ⁿ code string is about 6 to 8, and ^{m of} the 2 ^m −1 code string is about 11 to 13.

When initial training is started in the communication apparatus on the transmission side, a 2 ⁿ code string generated by the frequency offset estimation PN generator 51 and added with 1 bit is input to the modulator 53. Here, the modulator 53 operates as a 4PSK modulator, 4PSK-modulates a 2 ⁿ code string that is a training pattern for frequency offset estimation, and outputs it to the RF circuit. Then, when a predetermined time t has elapsed from the start of the initial training, the 2 ^m -1 code string generated by the adaptive equalizer training PN generator 52 is switched to the 2 ^m -1 code string. It is input to the modulator 53. Also in this case, the modulator 53 operates as a 4PSK modulator, and 4PSK modulates the input 2 ^m -1 code string.

The modulator 53 converts a 2-bit code into one symbol by 4PSK modulation, and outputs a 2 ⁿ / 2 symbol pattern and a 2 ^m / 2 symbol pattern for a set time.
After the end of training, the modulator 53 is switched from the 4PSK modulator to the 2 ⁿ QAM modulator, and the input data signal sequence is modulated.
The code string signal output from the modulator 53 is frequency-converted by the RF circuit and transmitted to the communication device on the receiving side.

DESCRIPTION OF SYMBOLS 1 ... Adaptive equalizer, 2 ... Matched filter, 3 ... Shift register part, 4 ... Tap coefficient setting part, 5 ... Addition part, 6 ... Complex conjugate calculation part, 7 ... Multiplier, 8 ... Timing generation part, 9 ... Condition establishment detection unit, 10 ... PN generator, 11 ... 4PSK mapping unit, 12 ... complex conjugate generation unit, 13 ... mapping data storage unit, 14 ... arc tangent unit, 15 ... phase correction value generation unit, 16 ... adder, DESCRIPTION OF SYMBOLS 17 ... Symbol delay circuit, 18 ... Complex transformation part, 19 ... Multiplier, 20 ... Frequency offset estimation / correction part, 21 ... PN code switching detection signal receiving part, 22 ... Complex multiplier, 23 ... Signal output control circuit, 24 ... complex autocorrelation calculation circuit, 25 ... 45 ° phase rotation circuit, 26 ... phase rotation amount calculation circuit, 27 ... forgetting factor averaging circuit, 28 ... symbol delay circuit, 29 ... imaginary part polarity detection circuit, 30 ... transmission Symbol shift estimation circuit 31... Offset estimation PN code end determination circuit 32... ATRAN calculation circuit 33. Complex multiplier 34. Symbol delay circuit 40. Synchronization acquisition monitoring unit 50. PN generator for offset estimation 52... PN generator for adaptive equalizer training 53 53 modulator 54 bit generator 55 bit adder 56 switch 100 adaptive equalizer 101 filter , 102 ... determining unit, 103 ... error amount calculation unit, 104 ... LMS algorithm processing unit, 105 ... demapping unit, 106 ... PN m-stage register, 107 ... AND gate, 108 ... n-bit counter, 200 ... automatic equalization Circuit: 201 ... Automatic equalizer for data reproduction, 202 ... Identifier, 203 ... Automatic equalizer for equalization training, 204 ... Error amount calculation unit, 20 ... training signal synchronization detector, 206 ... training pattern signal generator, 207 ... mapping circuit, 311 ... code conversion circuit, 312 ... shift register, 313 ... adder, 314 ... threshold judgment circuit.

Claims (7)

  In a communication system using two signals having different training code strings for frequency offset and adaptive equalizer, the timing at which the training signal transmitted from the transmission side is switched from the frequency offset training signal to the adaptive equalizer training signal. The receiving unit that receives the timing signal, the PN generator that starts the creation of the PN code sequence using the timing signal, the 4PSK mapping unit that performs 4PSK mapping of the PN code sequence, and the 4PSK mapping unit Whether synchronization between the adaptive equalizer that inputs the symbol data signal as a training signal on the receiving side and the training signal mapped by the 4PSK mapping unit and the training signal for the adaptive equalizer transmitted from the transmitting side is captured A synchronization acquisition monitoring unit for monitoring Communication system, comprising a condition satisfaction detecting unit for outputting a detection result of the visual portion.   The synchronization acquisition monitoring unit inputs a mapping data accumulation unit that accumulates a predetermined number of complex conjugate values of the symbol data output from the 4PSK mapping unit, and a frequency offset training signal transmitted from the transmission side. A matched filter unit for calculating a periodic correlation function from a shift register value of the signal and a tap coefficient value updated to the value of the symbol data stored in the mapping data storage unit, and a 4PSK code generated by a frequency offset training signal The communication system according to claim 1, further comprising: a peak power detection timing generation unit that detects a code having the largest power value within a repetition period of the sequence and generates a timing of the detected code.   In the condition establishment detection unit, when the timing signal is input, the timing generated by the peak power detection timing generation unit matches the symbol period of the code sequence of the frequency offset training signal transmitted from the transmission side. In this case, the communication system according to claim 1 or 2, wherein a signal for starting the PN generator is output. The PN generator includes a shift register,
The initial value of the shift register is
A frequency offset estimation / correction unit that detects that the frequency offset training signal has been switched to the adaptive equalizer training signal after the frequency offset training signal has been switched on the transmission side, and outputs the PN code switching detection signal Is set to a value shifted by a predetermined bit with respect to the initial value of the PN generator on the transmission side based on the number of symbols required until the switching is detected,
The communication system according to claim 1, wherein the PN generator starts a shift operation in accordance with the activation signal from the condition satisfaction detection unit. The matched filter unit includes a shift register having the same number of registers as the number of repetition symbols of the received frequency offset training signal;
Tap coefficients equal to the number of registers of the shift register are set, and a tap coefficient setting unit that multiplies the tap value output from the shift register by the tap coefficient;
5. The communication system according to claim 2, further comprising: an addition unit that adds the multiplication values output from the tap coefficient setting unit for a predetermined symbol and outputs the periodic correlation function.   The mapping data storage unit, at a timing when the accumulation of symbol data of the same number of symbols as the number of tap coefficients set in the tap coefficient setting unit is completed, tap coefficients set in the tap coefficient setting unit, The communication system according to claim 2, wherein the value is updated to a value of symbol data stored in the mapping data storage unit. An arc tangent unit that inputs a periodic correlation function output from the matched filter unit and outputs phase information indicating a slope of a phase with reference to a transmission side phase based on the periodic correlation function as a radian value;
The phase information output from the arc tangent unit and the timing signal indicating the timing of the code detected by the peak power / timing signal generation unit are input, and the arc tangent unit is only at the timing indicated by the timing signal. Output phase information as a phase correction value, and a phase correction value generator that outputs zero at other timings;
A one-symbol delay circuit that delays the phase correction value output from the phase correction value generation unit by one symbol;
An adder that adds the phase correction value delayed by the one-symbol delay circuit to the phase correction value output from the phase correction value generation unit;
A complex conversion unit that performs complex conversion on the phase correction value added by the adder, and
The communication system according to claim 2, wherein a value input to the adaptive equalizer is multiplied by a value subjected to complex conversion by the complex conversion unit.

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