JP6263538B2 - マルチメディアデータ処理のための方法及びシステム - Google Patents

マルチメディアデータ処理のための方法及びシステム Download PDF

Info

Publication number
JP6263538B2
JP6263538B2 JP2015531281A JP2015531281A JP6263538B2 JP 6263538 B2 JP6263538 B2 JP 6263538B2 JP 2015531281 A JP2015531281 A JP 2015531281A JP 2015531281 A JP2015531281 A JP 2015531281A JP 6263538 B2 JP6263538 B2 JP 6263538B2
Authority
JP
Japan
Prior art keywords
cache
pixel block
data
memory
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2015531281A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015534169A (ja
JP2015534169A5 (enExample
Inventor
サンギヴィ ヘトゥル
サンギヴィ ヘトゥル
ヴェンカタ ラトゥナ レディ ムランギ
ヴェンカタ ラトゥナ レディ ムランギ
ディーパック グプテ アジト
ディーパック グプテ アジト
バサク アリンダム
バサク アリンダム
Original Assignee
日本テキサス・インスツルメンツ株式会社
テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本テキサス・インスツルメンツ株式会社, テキサス インスツルメンツ インコーポレイテッド, テキサス インスツルメンツ インコーポレイテッド filed Critical 日本テキサス・インスツルメンツ株式会社
Publication of JP2015534169A publication Critical patent/JP2015534169A/ja
Publication of JP2015534169A5 publication Critical patent/JP2015534169A5/ja
Application granted granted Critical
Publication of JP6263538B2 publication Critical patent/JP6263538B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0848—Partitioned cache, e.g. separate instruction and operand caches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/28—Using a specific disk cache architecture
    • G06F2212/282—Partitioned cache
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2015531281A 2012-09-07 2013-09-09 マルチメディアデータ処理のための方法及びシステム Active JP6263538B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/606,237 2012-09-07
US13/606,237 US20140071146A1 (en) 2012-09-07 2012-09-07 Methods and systems for multimedia data processing
PCT/US2013/058765 WO2014039969A1 (en) 2012-09-07 2013-09-09 Methods and systems for multimedia data processing

Publications (3)

Publication Number Publication Date
JP2015534169A JP2015534169A (ja) 2015-11-26
JP2015534169A5 JP2015534169A5 (enExample) 2016-10-27
JP6263538B2 true JP6263538B2 (ja) 2018-01-17

Family

ID=50232825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015531281A Active JP6263538B2 (ja) 2012-09-07 2013-09-09 マルチメディアデータ処理のための方法及びシステム

Country Status (4)

Country Link
US (2) US20140071146A1 (enExample)
JP (1) JP6263538B2 (enExample)
CN (1) CN104603834A (enExample)
WO (1) WO2014039969A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10085016B1 (en) * 2013-01-18 2018-09-25 Ovics Video prediction cache indexing systems and methods
US20150193907A1 (en) * 2014-01-08 2015-07-09 Nvidia Corporation Efficient cache management in a tiled architecture
US9762919B2 (en) 2014-08-28 2017-09-12 Apple Inc. Chroma cache architecture in block processing pipelines
WO2016143336A1 (ja) * 2015-03-10 2016-09-15 日本電気株式会社 動画像符号化装置、動画像符号化方法及び動画像符号化プログラムを記憶する記録媒体
CN105323586B (zh) * 2015-04-07 2016-11-09 佛山世寰智能科技有限公司 一种用于多核并行视频编码和解码的共享内存接口
US10809928B2 (en) 2017-06-02 2020-10-20 Western Digital Technologies, Inc. Efficient data deduplication leveraging sequential chunks or auxiliary databases
CN107273310A (zh) * 2017-06-30 2017-10-20 浙江大华技术股份有限公司 一种多媒体数据的读取方法、装置、介质及设备
US10503608B2 (en) 2017-07-24 2019-12-10 Western Digital Technologies, Inc. Efficient management of reference blocks used in data deduplication
WO2019041222A1 (zh) * 2017-08-31 2019-03-07 深圳市大疆创新科技有限公司 编码方法、解码方法以及编码装置和解码装置
US10863190B2 (en) * 2018-06-14 2020-12-08 Tencent America LLC Techniques for memory bandwidth optimization in bi-predicted motion vector refinement
EP3981147A1 (en) * 2019-06-07 2022-04-13 FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung e.V. Region based intra block copy
TW202129591A (zh) * 2019-09-20 2021-08-01 日商索尼股份有限公司 圖像處理裝置及圖像處理方法以及程式
CN112862725B (zh) * 2021-03-12 2023-10-27 上海壁仞智能科技有限公司 用于计算的方法、计算设备和计算机可读存储介质

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353418A (en) * 1989-05-26 1994-10-04 Massachusetts Institute Of Technology System storing thread descriptor identifying one of plural threads of computation in storage only when all data for operating on thread is ready and independently of resultant imperative processing of thread
US6219688B1 (en) * 1993-11-30 2001-04-17 Texas Instruments Incorporated Method, apparatus and system for sum of plural absolute differences
US20030163643A1 (en) * 2002-02-22 2003-08-28 Riedlinger Reid James Bank conflict determination
US9137541B2 (en) * 2003-05-23 2015-09-15 Broadcom Corporation Video data cache
US7336284B2 (en) * 2004-04-08 2008-02-26 Ati Technologies Inc. Two level cache memory architecture
US20050286777A1 (en) * 2004-06-27 2005-12-29 Roger Kumar Encoding and decoding images
US20060050976A1 (en) * 2004-09-09 2006-03-09 Stephen Molloy Caching method and apparatus for video motion compensation
US20070008323A1 (en) * 2005-07-08 2007-01-11 Yaxiong Zhou Reference picture loading cache for motion prediction
US7427990B2 (en) * 2006-01-30 2008-09-23 Ati Technologies, Inc. Data replacement method and circuit for motion prediction cache
JP2007279829A (ja) * 2006-04-03 2007-10-25 Fuji Xerox Co Ltd 画像処理装置およびプログラム
US7649538B1 (en) * 2006-11-03 2010-01-19 Nvidia Corporation Reconfigurable high performance texture pipeline with advanced filtering
JP2010102623A (ja) * 2008-10-27 2010-05-06 Nec Electronics Corp キャッシュメモリ及びその制御方法
US8510496B1 (en) * 2009-04-27 2013-08-13 Netapp, Inc. Scheduling access requests for a multi-bank low-latency random read memory device
US8458405B2 (en) * 2010-06-23 2013-06-04 International Business Machines Corporation Cache bank modeling with variable access and busy times

Also Published As

Publication number Publication date
JP2015534169A (ja) 2015-11-26
US20140071146A1 (en) 2014-03-13
CN104603834A (zh) 2015-05-06
US20150074318A1 (en) 2015-03-12
WO2014039969A1 (en) 2014-03-13
US9612962B2 (en) 2017-04-04

Similar Documents

Publication Publication Date Title
JP6263538B2 (ja) マルチメディアデータ処理のための方法及びシステム
US10542276B2 (en) Data caching method and apparatus for video decoder
TWI586149B (zh) 用於在區塊處理管線中處理視訊圖框之視訊編碼器、方法及計算器件
US8619862B2 (en) Method and device for generating an image data stream, method and device for reconstructing a current image from an image data stream, image data stream and storage medium carrying an image data stream
US10070134B2 (en) Analytics assisted encoding
KR20120066305A (ko) 비디오 움직임 예측 및 보상용 캐싱 장치 및 방법
JP2010119084A (ja) 高速動き探索装置及びその方法
CN103634604B (zh) 一种面向多核dsp运动估计的数据预取方法
US10585803B2 (en) Systems and methods for addressing a cache with split-indexes
US8225043B1 (en) High performance caching for motion compensated video decoder
US10580107B2 (en) Automatic hardware ZLW insertion for IPU image streams
US20210233280A1 (en) Encoding device control method and device, and storage medium
CN1937773B (zh) 外部存储装置、存储图像数据的方法及图像处理器
JP2008141288A (ja) 動きベクトル検出装置および動きベクトル検出方法
US10757430B2 (en) Method of operating decoder using multiple channels to reduce memory usage and method of operating application processor including the decoder
CN104731519B (zh) 快取存储器管理装置及应用该快取存储器管理装置的动态影像系统及方法
US9363524B2 (en) Method and apparatus for motion compensation reference data caching
Afonso et al. Energy-aware motion and disparity estimation system for 3D-HEVC with run-time adaptive memory hierarchy
TWI513282B (zh) 快取記憶體管理裝置及應用該快取記憶體管理裝置之動態影像系統及方法
JP5020391B2 (ja) 復号化装置及び復号化方法
TWI597979B (zh) 與影像處理系統中之快取記憶體相關的記憶體管理方法及記憶體管理裝置
JP6740549B2 (ja) 動画像符号化装置、方法、プログラム、および動画像符号化システム
US20100158123A1 (en) Picture processing apparatus, picture processing method, and program
CN101443808B (zh) 用于图像和视频处理的存储器组织方案和控制器结构
TW201347520A (zh) 晶片內／晶片外記憶體管理

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20150309

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160903

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160903

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170517

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170606

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20170906

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170907

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20171128

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20171218

R150 Certificate of patent or registration of utility model

Ref document number: 6263538

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313117

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250