JP6230647B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a ball ball game machine or a spinning cylinder game machine, and more particularly to effect control in the game machine.

Japanese Patent No. 4613191

  In ball and ball game machines (so-called pachinko game machines) and swing game machines (so-called slot game machines), etc. for production using liquid crystal display units that display various images such as production images, LED (Light Emitting Diode), etc. Illumination means for performing lighting operations, such as a light emitting section for lighting and blinking, a sound output section for performing effects by sound such as music, sound effects, and speech, and a movable body accessory driven by a motor are mounted. These effect means are controlled in cooperation with each other, thereby realizing a game effect that improves interest.

  Patent Document 1 discloses a technique in which an effect control unit outputs and controls drive data for light emission drive as serial data for an LED driver for light emission effect.

In such a gaming machine, in addition to the control of the original game operation, various effects and display operations using a liquid crystal display, a light emitting unit, an audio output unit, a movable body accessory, etc. are performed. There is a tendency that the control load of the microcomputer for controlling is increased.
In view of the above, an object of the present invention is to improve the efficiency of control processing of an effect control microcomputer or the like so that appropriate effect control is executed.

The gaming machine of the present invention includes a plurality of effect means including display means for displaying effect images, and a control means for controlling the operation of the effect means according to the received command, wherein the control means is the display means. After the image control process for displaying the effect image is performed within one frame period of the image displayed in step 1, the received command is analyzed. The analysis process is performed by the display means. The display is started only in the frame front end side period until a predetermined time elapses from the frame start timing within one frame period of the displayed image.
The frame front end side period is a period until a predetermined time elapses from the frame start time within the frame period. For example, it is the first half period when one frame period is divided into the first half and the second half.
The received command will be analyzed and the content of the presentation will be determined by the result of the analysis. The analysis of this command starts only during the frame front end period, and after a predetermined time has elapsed from the start of the frame. Do not start the analysis process.
In the above gaming machine, the control means detects a frame start timing and an end timing of the frame front end side period by a counter that performs counting based on a frame synchronization signal of an image displayed on the display means. Can be considered.
For example, the frame start timing and the end timing of the frame front end side period are recognized by a counter that performs counting based on a signal synchronized with an image frame such as a vertical blanking signal. Thereby, timing management can be facilitated.
The gaming machine also includes a plurality of effect means including display means for displaying effect images, and a control means for controlling the operation of the effect means according to the received command, wherein the control means analyzes the received command. The processing is executed once according to the frame start timing within one frame period of the image displayed by the display means.
As a result, the command analysis process is started immediately after the start timing of the frame. Since it is performed only once, the command analysis process usually does not start in the second half of the frame period.

  According to the present invention, it is possible to improve the efficiency of control processing of a microcomputer for effect control and to realize appropriate effect control.

1 is a perspective view of a pachinko gaming machine according to an embodiment of the present invention. It is a front view of the board surface of the pachinko game machine of an embodiment. It is a block diagram of a control configuration of the pachinko gaming machine of the embodiment. It is a block diagram of the production control unit of the embodiment. It is a block diagram of a display control system of the effect control unit of the embodiment. It is explanatory drawing of the driver structure of embodiment. It is explanatory drawing of the LED driver of embodiment. It is explanatory drawing of the motor controller and motor driver of embodiment. It is a flowchart of the main control main process of an embodiment. It is a flowchart of the main control timer interruption process of an embodiment. It is explanatory drawing of the command of embodiment. It is explanatory drawing of scenario registration information, lamp data registration information, and motor data registration information of embodiment. It is explanatory drawing of the sound data registration information of embodiment. It is explanatory drawing of the main scenario table of embodiment. It is explanatory drawing of the sub scenario table of embodiment. It is a flowchart of the production control main process of the first embodiment. It is a flowchart of the process at the time of the frame end of embodiment. It is a flowchart of the command analysis process in presentation control of an embodiment. It is a flowchart of the command corresponding | compatible process in presentation control of embodiment. It is a flowchart of an effect control timer interrupt process of the embodiment. It is explanatory drawing of the motor operation | movement table of embodiment. It is explanatory drawing of the display control timing of 1st Embodiment. It is a flowchart of the production control main processing of the second embodiment. It is a flowchart of the production control main processing of the third embodiment. It is explanatory drawing of the display control timing of 3rd Embodiment.

Hereinafter, as an embodiment of the gaming machine according to the present invention, a pachinko gaming machine will be taken as an example and described in the following order.
<1. Pachinko machine structure>
<2. Control configuration of pachinko machine>
<3. Structure of production control unit>
<4. Overview of operation>
<5. Processing of main control unit>
<6. Processing of the production control unit of the first embodiment>
<7. Processing of production control unit of second embodiment>
<8. Processing of the production control unit of the third embodiment>
<9. Summary and Modification>

<1. Pachinko machine structure>
First, with reference to FIG. 1 and FIG. 2, the structure of the pachinko gaming machine 1 as an embodiment of the present invention will be schematically described.
FIG. 1 is a front perspective view showing the appearance of a pachinko gaming machine 1 according to the embodiment, and FIG. 2 is a front view of the game board.
The pachinko gaming machine 1 shown in FIGS. 1 and 2 mainly includes a “frame portion” and a “game board portion”.
The “frame portion” includes a front frame 2, an outer frame 4, a glass door 5, and an operation panel 7 described below. The “game board part” comprises the game board 3 of FIG. In the following description, “frame portion” or “frame side” is a generic term for the front frame 2, the outer frame 4, the glass door 5, and the operation panel 7. “Board” or “board side” indicates the game board 3.

As shown in FIG. 1, the pachinko gaming machine 1 has a frame-shaped front frame 2 attached to the front surface of a wooden outer frame 4 so as to be opened and closed. Although not shown, a game board storage frame is formed on the rear surface of the front frame 2, and the game board 3 shown in FIG. 2 is mounted in the game board storage frame. As a result, the gaming area 3a formed on the surface of the gaming board 3 faces the front side of the gaming machine in FIG.
A glass door 5 supporting transparent glass is provided on the front side of the game area 3a, and the game area 3a is exposed to the player on the front side through the transparent glass.

The glass door 5 is attached to the front frame 2 by a shaft support mechanism 6 so as to be opened and closed. Then, by operating a door lock release key cylinder (not shown) provided at a predetermined position of the glass door 5, the glass door 5 is unlocked from the front frame 2, and the glass door 5 can be opened to the front side. ing. Further, the lock state of the front frame 2 with respect to the outer frame 4 can be released by operating the door lock releasing key cylinder.
Further, on the front side of the glass door 5, light emitting portions 20w are provided in various places as light emitting means on the frame side. The light emitting unit 20w performs, for example, a light emitting operation for production, a light emitting operation for error notification, a light emitting operation according to an operation state, and the like as a light emitting operation by the LED.

An operation panel 7 is provided below the glass door 5. The operation panel 7 can also be opened and closed with respect to the front frame 2 by a shaft support mechanism (not shown).
The operation panel 7 is provided with an upper tray unit 8, a lower tray unit 9, and a firing operation handle 10.

The upper tray unit 8 is formed with an upper tray 8a for storing game balls to be used as bullets. The lower tray unit 9 is formed with a lower tray 9a that stores game balls that cannot be stored in the upper tray 8a.
The upper tray unit 8 is provided with a ball removal button 16 for removing the game balls stored in the upper tray 8a toward the lower tray 9a. The lower tray unit 9 is provided with a ball pulling lever 17 for pulling out the game balls stored in the lower tray 9a below the gaming machine.
Further, the upper tray unit 8 has a ball lending button 14 for requesting a game ball lending device to a game ball lending device (not shown) and a card for requesting the return of the valuable medium inserted in the game ball lending device. A return button 15 is provided.
The upper tray unit 8 is further provided with production buttons 11 and 12 and a cross key 13. The effect buttons 11 and 12 are push buttons that can be operated by turning on the built-in lamp during a predetermined input reception period and can be changed when the built-in lamp is turned on. Further, the cross key 13 is an operator for the player to perform an operation for an operation or an effect setting according to the effect situation.

The firing operation handle 10 is provided on the right end side of the operation panel 7 and is an operator for operating the launching device 32 shown in FIG.
In addition, speakers 25 that sound production effects are provided on both sides of the upper portion of the front frame 2 and in the vicinity of the firing operation handle 10.

  Next, the configuration of the game board 3 will be described with reference to FIG. The game board 3 is mainly composed of a substantially square wooden plywood or resin board. The game board 3 is provided with a ball guide rail 31 for guiding the launched game ball in a ring shape as a board surface partition member, and a substantially circular area surrounded by the ball guide rail 31 is a game area 3a. It has become.

A main liquid crystal display device 32M (LCD: Liquid Crystal Display) is provided at a substantially central portion of the game area 3a, and a sub liquid crystal display device 32S is provided on the right side of the main liquid crystal display device 32M.
In the main liquid crystal display device 32M, under the control of the effect control unit 51, which will be described later, for example, three decorative symbols of left, middle and right are displayed in a variable manner on the background image. Various effect images such as a normal effect, a reach effect, and a super reach effect are also displayed. Similarly, the sub liquid crystal display device 32S performs display according to various effects.

A center decoration 35C is provided in the game area 3a so as to surround the display surfaces of the main liquid crystal display device 32M and the sub liquid crystal display device 32S.
The center decoration 35C not only exhibits a decorative effect due to its design, but also has an action of protecting the display surfaces of the main liquid crystal display device 32M and the sub liquid crystal display device 32S from surrounding game balls. Furthermore, the center decoration 35C also functions as a member that enables the right and left shots of the flow path of the game ball depending on the strength or stroke length of the game ball. That is, the flow path of the game ball launched to the upper part of the game area 3a via the ball guide rail 31 flows down either the left game area 3b or the right game area 3c divided by the center decoration 35C. In the case of so-called left hit, the game ball flows down the left game area 3b, and in the case of right hit, the game ball flows down the right game area 3c.

In addition, a lower left decoration 35L is provided below the left game area 3b to exhibit a decorative effect and define a range as the left game area 3b.
Similarly, a lower right decoration 35R is provided below the right game area 3c, which exhibits a decorative effect and defines a range as the left game area 3b.
In the game area 3a (the left game area 3b and the right game area 3c), nails 49 and windmills 47 are provided at various places to form various flow paths for game balls.
Further, a center stage 35S is provided below the main liquid crystal display device 32M, which exhibits a decorative effect and functions as a play area for a game ball.
Although not shown in the drawing, the center ornament 35C is provided with a movable body accessory that provides a visual effect in an appropriate place.

In the vicinity of the upper right edge of the game area 3a, a symbol display unit 33 is provided by a dot display formed by arranging a plurality of LEDs.
In the symbol display unit 33, a first special symbol display unit, a second special symbol display unit, and a normal symbol display unit are formed by a predetermined dot area, and the first special symbol, the second special symbol, and the normal symbol Each variation display operation (variation display operation for setting variation start and variation stop as one set) is performed.
The main liquid crystal display device 32M variably displays the decorative symbols based on the images in time synchronization with the variable display of the first and second special symbols by the symbol display unit 33.

A winning device having an upper start port 41 (first special symbol start port) is provided below the center ornament 35C, and a lower start port 42a (second special symbol start port) is further provided below that. A variable winning device 42 is provided.
Inside the upper start opening 41 and the lower start opening 42a, detection sensors (upper start opening sensor 71 and lower start opening sensor 72 shown in FIG. 3) for detecting the passage of the game ball are formed.

  The upper starting port 41 is a winning port related to the starting condition of the variable display operation of the first special symbol in the symbol display unit 33, and does not have a starting port opening / closing means (means for opening or expanding the starting port). It is a type winning device.

The normal variation winning device 42 having the lower starting port 42a is configured as a winning rate variation type winning device capable of changing the winning rate of the game ball at the starting port by the starting port opening / closing means. That is, it is a so-called electric tulip type winning device including a pair of left and right movable blades (movable members) 42b that can open or enlarge the lower start port 42a.
The lower start opening 42 a of the normal variation winning device 42 is a winning opening relating to the start condition of the variable display operation of the second special symbol in the symbol display unit 33. The winning rate of the lower start port 42a varies depending on the operating state of the movable blade piece 42b. That is, it is configured such that winning is easy when the movable blade piece 42b is open, and winning is difficult or impossible when the movable blade piece 42b is closed.

In addition, a plurality of general winning ports 43 are provided on the left and right sides of the normal variation winning device 42. A detection sensor (general winning opening sensor 74 shown in FIG. 3) for detecting the passage of the game ball is formed inside each general winning opening 42.
In addition, a normal symbol start port 44 including a gate (specific passage region) through which a game ball can pass is provided on the lower side of the right game region 3c. The normal symbol starting port 44 is a winning port related to a normal symbol variation display operation in the symbol display unit 33, and a sensor (gate sensor 73 shown in FIG. 3) for detecting a passing game ball is formed in the normal symbol starting port 44. Has been.

A first special variable winning device 45 (special electric accessory) is provided along the flow path from the normal symbol starting port 44 to the normal variable winning device 42 in the right game area 3c.
The first special variable winning device 45 is configured to close / open the first big winning opening 45a by a retractable opening door 45b. In addition, a sensor for detecting the passage of the game ball to the first big prize opening 45a (the first big prize port sensor 75 in FIG. 3) is formed inside.
The lower right decoration 35R bulges from the surface of the game board 3 around the first grand prize winning opening 45a, and the upper side of the bulged portion and the upper surface of the open door 45b guide downstream of the right flow path 3c. Forming part. Therefore, when the opening door 45b is drawn into the board, the game ball that has reached the downstream guide portion easily enters the first big winning opening 45a.

A second special variable winning device 46 (special electric accessory) is provided below the normal variable winning device 42. The second special variable winning device 46 is configured to close / open the second large winning port 46a on the inside by an open door 46b that is pivotally supported at the lower part and can be opened and closed. In addition, a sensor (second big prize port sensor 76 in FIG. 3) for detecting the passage of the game ball to the second big prize port 46a is formed inside.
The second big prize opening 46a is opened by opening the open door 46b. In this state, the game balls that have flowed down the left game area 3b or the right game area 3c will enter the second big prize opening 50 with a high probability.

As described above, the upper starting port 41, the lower starting port 42a, the normal symbol starting port 44, the first large winning port 45a, the second large winning port 46a, and the general winning port 43 are formed in the game area of the board as winning ports. Has been.
In the pachinko gaming machine 1 according to the present embodiment, when a winning is made to a winning port other than the normal symbol starting port 44 among these winning ports, per winning ball set for each winning port. The number of prize balls is paid out from the game ball payout device 55 (see FIG. 3).
For example, the upper start opening 41 and the lower start opening 42a are set to three, the first big winning opening 45a and the second big winning opening 46a are set to 13, the general winning opening 43 is set to 10 and the like.
Note that the game balls that have not won the prize holes are discharged from the game area 3 a through the out port 48.
Here, “winning” means that the winning opening takes the game ball inside, or the game ball passes through the gate. Actually, when a game ball is detected by a sensor (each winning detection switch) formed for each winning opening, it is treated that a “winning” has occurred in that winning opening. The game ball related to the winning is also referred to as “winning ball”.

On the board as described above, the center ornament 35C, the lower left ornament 35L, the lower right ornament 35R, the center stage 35S, the first special variable winning device 45, the second special variable winning device 46, and a movable object not shown in the figure. Although not shown in detail, light emitting units 20b, 20Z, 20H, and 20J using LEDs, for example, are provided at various places as light emitting means on the panel side.
The light emitting unit 20b performs a light emitting operation for production and a light emitting operation for error notification.
The light emitting units 20Z, 20H, and 20J are light emitting units for presenting various situations.
The light emitting unit 20Z performs a light emitting operation for identifying a varying symbol. There are three light emitting units 20Z corresponding to, for example, the first special symbol, the second special symbol, and the normal symbol, and for each corresponding symbol, for example, when the symbol variation is stopped, changing, and hitting A light emitting operation for identifying is performed.
The light emitting unit 20H performs a light emission operation for displaying the number of holds. The light emitting unit 20H displays, for example, a maximum of four reserved numbers for the first special symbol variation, and displays a maximum of four reserved numbers for the second special symbol variation, for example, a total of eight are provided. The hold number is displayed in the light emission state.
The light emitting unit 20J performs a light emitting operation for game state notification. The required number of light emitting units 20J is provided (three in this example), and in each of the light emitting states, notifications such as during a big hit, during probability change, during a short time, etc. are made.
In this example, the light emitting units 20Z, 20H, and 20J are provided on the board side, but all or part of the light emitting units 20Z, 20H, and 20J may be provided on the frame side.

Hereinafter, for the sake of explanation, the board-side light emitting unit 20w and the frame-side light emitting unit 20b may be referred to as “production light-emitting units”.
The light emitting unit 20Z may be referred to as a “fluctuating symbol identifying light emitting unit”, the light emitting unit 20H may be referred to as a “holding number display light emitting unit”, and the light emitting unit 20J may be referred to as a “game state notification light emitting unit”.
Furthermore, the light emitting units 20Z, 20H, and 20J may be collectively referred to as “situation presentation light emitting unit”.

<2. Control configuration of pachinko machine>
Next, the configuration of the control system of the pachinko gaming machine 1 according to the present embodiment will be described. FIG. 3 is a schematic block diagram of the internal configuration of the pachinko gaming machine 1.
The pachinko gaming machine 1 according to the present embodiment is mainly provided with a main control board 50, an effect control board 51, a payout control board 53, a launch control board 54, and a power supply board 58 as the boards forming the control configuration. .

The main control board 50 is equipped with a microcomputer or the like, and performs overall control related to the entire game operation of the pachinko gaming machine 1. In the following description, a component of the main control board 50 including a microcomputer mounted on the main control board 50 is referred to as a “main control unit 50”.
The effect control board 51 is equipped with a microcomputer or the like, receives an effect control command from the main control unit 50, and performs control for executing various effect operations using image display, light emission, sound output, and movable object. I do. Hereinafter, the structure of the effect control board 51 including the microcomputer mounted on the effect control board 51 is referred to as an “effect control unit 51”.

The payout control board 53 performs payout control of prize balls by the game ball payout device 55 connected to the pachinko gaming machine 1.
The launch control board 54 controls the launch operation of the game ball by the launch device 56 provided in the player's pachinko gaming machine 1.
The power supply board 58 performs AC / DC conversion and further DC / DC conversion from an external power supply (for example, AC 24 V), and supplies an operation power supply voltage Vcc to each unit. The power supply path is not shown.

First, the main controller 50 and its peripheral circuits will be described.
The main control unit 50 includes a microprocessor with a built-in CPU 100 (hereinafter referred to as “main control CPU 100”), a ROM 101 (hereinafter referred to as “main control ROM 101”), a RAM 102 (hereinafter referred to as “main control RAM 102”), and the like. ing.
The main control CPU 100 executes various calculations and control processes according to the progress of the game based on the control program.
The main control ROM 101 stores a game operation control program by the main control CPU 100 and various data necessary for game operation control.
The main control RAM 102 is used as a work area used by the main control CPU 100 for various arithmetic processing, and as a buffer area for various input / output data and processing data.
Although not shown, the main control unit 50 includes an interface circuit with each unit, a random number generation circuit that generates random numbers for lottery related to special symbol variation display, a CTC (Counter Timer Circuit) for various time counts, An interrupt controller circuit for giving an interrupt signal to the control CPU 100 is also provided.

As described above, the main control unit 50 receives each winning means in the game area on the board (upper start port 41, lower start port 42a, normal symbol start port 44, first big win port 45a, second big win port 46a, general It is configured to receive a detection signal of a sensor provided at the winning opening 43).
That is, the detection signals of the upper start opening sensor 71, the lower start opening sensor 72, the gate sensor 73, the general winning opening sensor 74, the first large winning opening sensor 75, and the second large winning opening sensor 76 are sent to the main control unit 50. Supplied.
These sensors (71 to 76) are configured by detection switches that detect a game ball that has entered, but specifically, contactless switches such as photoswitches and proximity switches, and contact points such as microswitches. It can consist of switches.

  The main control unit 50 receives the detection signals of the upper start opening sensor 71, the lower start opening sensor 72, the gate sensor 73, the general winning opening sensor 74, the first large winning opening sensor 75, and the second large winning opening sensor 76. Depending on the process. For example, lottery processing, symbol variation control, prize ball payout control, effect control command transmission control, external data transmission processing, and the like are performed.

The main control unit 50 is connected to a normal electric accessory solenoid 77 that opens and closes the movable wing piece 42b of the lower start port 42, and the main control unit 50 transmits a control signal according to the progress of the game to perform normal electric operation. The driving operation of the accessory solenoid 77 is executed, and the opening / closing operation of the movable blade piece 42b is executed.
Further, the main control unit 50 has a first grand prize opening solenoid 78 that opens and closes the opening door 45b of the first big prize opening 45 and a second big prize that opens and closes the opening door 46b of the second big prize opening 46. A mouth solenoid 79 is connected. The main control unit 50 drives and controls the first big prize opening solenoid 78 or the second big prize opening solenoid 79 in accordance with the so-called jackpot situation, and opens the first big prize opening 45 or the second big prize opening 46. Is executed.

  In addition, a symbol display unit 33 is connected to the main control unit 50, and a control signal is transmitted to the symbol display unit 33 to execute various symbol displays (LED OFF / ON / flashing). Thereby, the display operation in the 1st special symbol display part 80 in the symbol display part 33, the 2nd special symbol display part 81, and the normal symbol display part 82 is performed.

  The main control unit 50 is connected to a frame external terminal board 57. The main control unit 50 can transmit information related to game progress to a hall computer (not shown) via the frame external terminal board 57. The information related to the game progress is information such as jackpot winning information, prize ball number information, symbol variation display execution number information, and the like. The hall computer is a management computer that comprehensively manages pachinko hall gaming machines, and is installed outside the gaming machine.

In addition, a payout control board 53 is connected to the main control unit 50. Connected to the payout control board 53 are a launch control board 54 for controlling the launch device 56 and a game ball payout device 55 for paying out game balls.
The main control unit 50 transmits a payout control command (payout control command for designating the number of prize balls) to the payout control board 53. The payout control board 53 controls the game ball payout device 55 in accordance with the control command to cause the game ball to be paid out.
The payout control board 53 can transmit information (payout state signal) regarding the payout operation state to the main control unit 50. The main controller 50 monitors whether or not the game ball payout device 55 is functioning normally based on this payout state signal. Specifically, it is monitored whether or not a problem such as a clogged ball or insufficient payout of a prize ball has occurred during a prize ball payout operation.

  The main control unit 50 transmits an effect control command including information related to the special symbol variation display to the effect control unit 51. The transmission of the effect control command from the main control unit 50 to the effect control unit 51 is executed by one-way communication. This is to prevent an unauthorized signal due to an illegal act from the outside from being input to the main control unit 50 via the effect control unit 51.

Next, the production control unit 51 and its peripheral circuits will be described.
The effect control unit 51 includes a microprocessor incorporating a CPU 200 (hereinafter referred to as “effect control CPU 200”), a ROM 201 (hereinafter referred to as “effect control ROM 201”), and a RAM 202 (hereinafter referred to as “effect control RAM 202”). A microcomputer is configured.

The effect control CPU 200 performs arithmetic processing for various effect operations and controls each effect means based on the effect control program and the effect control command received from the main control unit 50. In the case of the pachinko gaming machine 1 according to the present embodiment, the effect means are the main liquid crystal display device 32M, the sub liquid crystal display device 32S, the light emitting units 20w and 20b, the speaker 25, and a movable object that is not shown.
The effect control CPU 200 also performs control for presenting various situations. Specifically, this is light emission control of the light emitting units 20Z, 20H, and 20J.
The effect control ROM 201 stores a control program of the effect operation by the effect control CPU 200 and various data necessary for effect operation control.
The effect control RAM 202 (D-RAM 202a in FIG. 4, built-in CPU work memory 202b) is used as a work area used by the effect control CPU 200 for various arithmetic processes, a table data area, a buffer area for various input / output data and processing data, and the like. Used.
As will be described later, the calculation control unit 51 shows an example in which a one-chip microcomputer and its peripheral circuits are mounted, but various configurations of the effect control unit 51 are conceivable. For example, in addition to a microcomputer, an interface circuit with each part, a random number generation circuit for generating random numbers for lottery for production, a CTC for various time counting, a watchdog timer (WDT) circuit, an interrupt signal to the production control CPU 200 In some cases, an interrupt controller circuit for providing sound and a sound source IC for sound production are provided.

  The main roles of the effect control unit 51 are to receive an effect control command from the main control unit 50, to select an effect based on the effect control command, and to perform display control (display data) of the main liquid crystal display device 32M and the sub liquid crystal display device 32S. Supply), sound output control of the speaker 45, light emission control of the light emitting units 20w, 20b, 20Z, 20H, and 20J (LED), operation control of the movable body accessory (drive control of the movable body accessory motor 65), and the like.

Since the effect control unit 51 also has a function as a control device for the main liquid crystal display device 32M and the sub liquid crystal display device 32S, the effect control unit 51 includes a so-called VDP (Video Display Processor), image ROM, VRAM ( Video RAM) is also provided, and the effect control CPU 200 also functions as a liquid crystal control unit.
VDP refers to a function for performing overall control of video output processing such as image development processing and image drawing.
The image ROM refers to a memory in which image data (effect image data) on which the VDP performs image expansion processing is stored.
The VRAM is an image memory area that temporarily stores image data developed by the VDP.

  With these configurations, the effect control unit 51 generates various image data based on commands from the main control unit 50 and outputs them to the main liquid crystal display device 32M and the sub liquid crystal display device 32S. As a result, various effect images are displayed on the main liquid crystal display device 32M and the sub liquid crystal display device 32S.

In addition, a frame driver unit 61 and a panel driver unit 62 are connected to the effect control unit 51.
The frame driver unit 61 performs light emission driving for the LEDs of the lamp unit 63 on the frame side. In addition, the lamp part 63 generally shows the light emission part 20w provided in the frame side as shown in FIG.
The panel driver unit 62 performs light emission driving for the LEDs of the lamp unit 64 on the panel side. Note that the lamp portion 64 is a general view of the light emitting portions 20b, 20Z, 20H, and 20J provided on the panel side as shown in FIG.

A motor driver unit 70 is connected to the effect control unit 51.
The motor driver unit 70 drives the movable body accessory motor 65 to execute the operation of the movable body accessory provided on the panel side.
As the movable body accessory motor 65, for example, a stepping motor is used.
An origin position is defined for each movable body accessory motor 65. The origin position is, for example, a position where an accessory does not normally appear on the board surface of FIG.
Each movable body accessory motor 65 is provided with an origin switch 68 so that it can be confirmed on the side of the effect control unit 51 whether or not each movable body accessory motor 65 is at the origin position. For example, a photo interrupter is used. The information of the origin switch 68 is configured to be detected by the effect control CPU 200.

  Although details will be described later with reference to FIGS. 6, 7, and 8, in the case of the present embodiment, the effect control unit 51 uses the light emission drive data and the motor drive data as serial data, the frame driver unit 61, and the board driver. Output to the unit 62 and the motor driver unit 70.

In addition, the effect control unit 51 executes sound output control from the speaker 25. The production control unit 51 outputs audio signals as production music and voice to the amplifier unit 67 as, for example, two-channel stereo output signals of Lch and Rch. The audio signal is amplified by the amplifier unit 67 and then given to the speaker 25.
In FIG. 3, only one system of the amplifier unit 67 and the speaker 25 is shown for the sake of illustration. Stereo sound reproduction is possible.

The effect control unit 51 is connected to an operation unit 60 that can be operated by the player, and can receive an operation detection signal from the operation unit 60. The operation unit 60 refers to the effect buttons 11 and 12 and the cross key 13 described with reference to FIG. 1 and their operation detection mechanisms.
The effect control unit 51 can perform various effect controls according to the operation detection signal from the operation unit 60.

  The production control unit 51 determines a production pattern by lottery or uniquely from a plurality of types of production patterns prepared in advance based on the production control command sent from the main control unit 50, and performs various productions at necessary timing. Control means. Thereby, the display of the effect image by the main liquid crystal display device 32M or the sub liquid crystal display device 32S corresponding to the effect pattern, the reproduction of the sound from the speaker 25, the lamp units 63, 64 (light emitting units 20w, 20b, 20Z, 20H, 20J). ), The operation of the movable body accessory by the movable body accessory motor 65 is realized, and various effect patterns are developed in time series. Thereby, the production along the “production scenario” is realized.

The effect control command defines a function by a 2-byte structure consisting of a 1-byte length mode (MODE) and a 1-byte length event (EVENT).
In order to distinguish between MODE and EVENT, MODE Bit 7 is ON, and EVENT Bit 7 is OFF.
The effect control command from the main control unit 50 is taken into the reception buffer by the effect control unit 51. The effect control CPU 200 confirms the reception buffer at a predetermined timing, analyzes the received effect control command, and determines the effect control to be executed.

<3. Structure of production control unit>
A specific configuration example of the effect control unit 51 is shown in FIG.
The effect control unit 51 in the example of FIG. 4 is configured by connecting an effect control ROM 201, a D-RAM 202a, a CG-ROM 206, a WDT (watchdog timer) circuit 210, and the like to a one-chip microcomputer 250, for example. Yes.

The one-chip microcomputer 250 includes an effect control CPU 200 and has functions such as the above-described VDP, VRAM, and the like, as well as functions for performing light emission control, motor control, and sound control by the components shown in the figure.
Each component will be described.

The one-chip microcomputer 250 is equipped with an effect control CPU 200. The effect control CPU 200 performs various control processes as described above.
The effect control CPU 200 uses an internal device or an external device of the microcomputer 250 via the CPU interface 203.
That is, the effect control CPU 200 is connected to the host interface 204 via the CPU interface 203, receives a command from the main control unit 50, reads access to the effect control ROM 201, and transmits / receives a signal to / from the WDT circuit 210 via the host interface 204. And communication with each internal unit via the bus 251.

The effect control CPU 200 uses a D-RAM 202a and a built-in CPU work memory 202b as the effect control RAM 202 described above.
The D-RAM 202 a is connected to the RAM interface 208, and the effect control CPU 200 performs writing to and reading from the D-RAM 202 a via the RAM interface 208.

A system control register 205 is a register for initializing the system.
The transfer circuit 212 performs transfer using the internal resources and external peripherals of the microcomputer 250 as input / output.

The CG-ROM 206 is an image ROM and stores character image data to be displayed.
The CG-ROM 206 is connected to a CG bus interface 207 provided in the microcomputer 250. Thereby, a required part in the microcomputer 250 can access the CG-ROM 206 via the CG bus interface 207.

The microcomputer 250 includes a VRAM 209 having a capacity of 48 Mbytes, for example. The VRAM 209 stores drawing materials and frame data.
There are various ways of using the VRAM 209 depending on the setting. In this example, two frame buffers 209A and 209B are set as storage areas for display frame data, and the frame buffers 209A and 209B are alternately used for each frame. To perform drawing and display data output.

In this embodiment, since two display devices (main liquid crystal display device 32M and sub liquid crystal display device 32S) are used, the main liquid crystal display device 32M and sub liquid crystal display device 32S are used as the frame buffers 209A and 209B, respectively. It is prepared corresponding to.
That is, the illustrated frame buffer 209A includes a frame buffer area for the main liquid crystal display device 32 and a frame buffer area for the sub liquid crystal display device 32S, and the frame buffer 209B includes a frame buffer area for the main liquid crystal display device 32 and a sub buffer liquid crystal display device. A frame buffer area for the liquid crystal display device 32S is included.
Image data for one frame for the main liquid crystal display device 32M and the sub liquid crystal display device 32S is generated in the frame buffers 209A and 209B of the VRAM 209, respectively. A location is identified.

  The index table 211 manages the VRAM 209 such as setting a storage area of the VRAM 209.

The preloader 220, display circuits 221, 222, and 223, GDEC (graphic decoder) 223, and drawing circuit 225 perform various processes as a video processor (VDP).
The effect control CPU 200 creates a display list for setting image contents to be displayed on the main liquid crystal display device 32M and the sub liquid crystal display device 32S according to the effect control command. This display list is a collection of drawing commands.
The display list is composed of a group of drawing commands written in the drawing order. The drawing command includes a command that defines what image is to be drawn at which position in one frame, and the storage position (source address) of the CG-ROM 206 or the like of the image to be drawn is also specified.

The drawing circuit 225 draws a figure in the frame buffer (209A or 209B) on the VRAM 209.
The GDEC 223 decodes the compressed image data used for drawing and develops it in the VRAM 209.

The preloader 220 analyzes the display list transmitted by the transfer circuit 212 and transfers the image material referred to in the display list, that is, the image data on the CG-ROM 206 to a designated area of either the DRAM 202a or the VRAM 209. .
At this time, the preloader 220 outputs a display list in which the reference destination of the image data is rewritten to the address after transfer. Rewritten display list is sent to the drawing circuit 225 by transfer circuit 212.

  Since the random access to the image data occurs while the drawing circuit 225 performs the drawing, if the image data is directly referred to from the CG-ROM 206 that is vulnerable to random access such as a NAND flash memory, the drawing performance is greatly reduced. Therefore, by using the preloader 220, image data and a display list are transferred to the D-RAM 202a or the built-in VRAM 209 in advance, so that moving image decoding and drawing can be executed at high speed.

  As described above, since the preloader 220 is functioning in the present embodiment, the reference destination of the display list image data (CG data as the image material) is set not in the CG-ROM 206 but in the D-RAM 202a or VRAM 209. This is a preload area. Therefore, random access to image data generated during the execution of drawing by the drawing circuit 225 can be quickly executed, and high-resolution moving images with intense movement are advantageous for drawing processing.

The display circuits 221, 222, and 223 display and output the display data of the frame buffer (209A or 209B) of the VRAM 209 to the outside.
Here, the microcomputer 250 has three display circuits 221, 222, and 223 that are compatible with three screen outputs that enable one system of digital RGB output and two systems of LVDS (Low voltage differential signaling) output. This is because the structure is adopted. In the case of this example, for example, digital RGB output is used as display data output to the main liquid crystal display device 32M, and one LVDS output is used as display data output to the sub liquid crystal display device 32S.
Display data from the display circuits 221, 222, and 223 is selected by the LCD interface 226 and output to an external device, that is, the main liquid crystal display device 32M and the sub liquid crystal display device 32S.

The display circuits 221, 222, and 223 perform display data output as non-interlaced output. Further, the display data is provided with a scaling processing function for performing enlargement / reduction from 2 times to 1/2 times, a dithering function, and a color correction function, for example.
FIG. 5 shows a block diagram of the display circuits 221, 222, 223 and the LCD interface 226.

Each of the display circuits 221, 222, and 223 includes a synchronization signal generation unit 265, and performs processing in synchronization with each image frame. The synchronization signal generator 265 generates, for example, a V blank signal, a horizontal synchronization signal, and a vertical synchronization signal indicating a vertical blank period (ineffective line scanning period) as the synchronization signal. These synchronization signals can be used for control processing inside the microcomputer 250, and are also used for display data transfer and display control operations to the main liquid crystal display device 32M and the sub liquid crystal display device 32S.
Note that the synchronization signals used in the display circuits 221, 222, and 223 can be synchronized. For example, the display circuits 221, 222, and 223 can be forcibly synchronized with the falling of the vertical synchronizing signal of an external display such as the main liquid crystal display device 32M as a trigger.

Each display circuit 221, 222, 223 acquires the frame data read from the frame buffer 209A or 209B of the VRAM 210 by the VRAM reading unit 261.
For the display circuits 221, 222, the obtained frame data can be subjected to scaling processing by the scaler 262, color correction processing by the color correction unit 263, and dithering processing by the ditherer 264. Then, digital RGB output and LVDS output are performed as outputs after processing by the ditherer 264. The display circuit 223 is the same, but in the example of this figure, the display circuit 223 does not have the function of the scaler 262.

The LCD interface 226 includes a digital RGB output unit 226a and an LVDS output unit 226b.
Display data as digital RGB output from the display circuits 221, 222, and 223 is supplied to the digital RGB output unit 226a. The digital RGB output unit 226a selects one digital RGB output of the display circuits 221, 222, and 223 and supplies it to the main liquid crystal display device 32M.
The LVDS output unit 226b is supplied with display data as LVDS output from the display circuits 221, 222, and 223. The LVDS output unit 226b can select and output two LVDS outputs from the display circuits 221, 222, and 223. In the case of the pachinko gaming machine 1 of the present embodiment, the LVDS output of one of the display circuits 221, 222, 223 is supplied to the sub liquid crystal display device 32S.
Of course, this is merely an example, and it is conceivable to supply one LVDS output to the main liquid crystal display device 32M, or to supply digital RGB output to the sub liquid crystal display device 32S.

The microcomputer 250 in FIG. 4 has a sound controller 230.
The sound controller 230 has, for example, a sound source control unit and a sound data storage unit that stores compressed audio data. Based on the control of the effect control CPU 200, the sound controller 230 decodes the compressed audio data to generate an output audio signal, and an external amplifier. To the unit 67.
Regardless of whether or not the sound controller 230 is installed, the effect control CPU 200 may control the sound source IC outside the microcomputer 250 and output an audio signal to the amplifier unit 67.

  The microcomputer 250 has a general-purpose port 231. For example, an 8-bit input / output port is used. The general-purpose port 231 enables input / output with various external devices.

The serial output controller 240 outputs a control signal as serial data to the outside. In the case of this embodiment, the serial output controller 240 is provided with a lamp controller 241 and a motor controller 242, and outputs light emission drive data of the lamp units 63 and 64 and motor drive data of the movable body accessory motor 65. Is called.
FIG. 6 shows an output system of light emission drive data from the serial output controller 240 (lamp controller 241 and motor controller 242) to the frame driver unit 61 and the panel driver unit 62 and an output system of motor drive data to the motor driver unit 70. .

In the frame driver section 61, n LED drivers 90 are connected in parallel to the serial data output channel ch1 of the serial output controller 240.
As a signal line of the serial data output channel ch1, a clock line for supplying a clock signal CLK and a data line for supplying serial data DATA as light emission drive data (also referred to as “LED drive data” or “lamp drive data”) are provided. It has been. Each of these signal lines is connected so as to supply each signal in parallel to n LED drivers 90 constituting the frame driver unit 61.
In each LED driver 90 of the frame driver unit 61, a device ID used as a slave address by the effect control CPU 200 is set. That is, the identifier of each LED driver 90. For the sake of explanation, the device IDs (slave addresses) of the LED drivers 90 are denoted as w1, w2,.

In the panel driver unit 62, m LED drivers 90 are connected in parallel to the serial data output channel ch2 of the effect control CPU 200.
Similarly to the channel ch1, the signal line of the serial data output channel ch2 is provided with a clock line for supplying a clock signal CLK and a data line for supplying serial data DATA as light emission drive data. Each of these signal lines is connected so as to supply each signal in parallel to m LED drivers 90 constituting the panel driver unit 62.
In each LED driver 90 of the panel driver unit 62, a device ID (identifier of each LED driver 90) used as a slave address by the effect control CPU 200 is set. For the sake of explanation, the device IDs (slave addresses) of the LED drivers 90 are denoted as b1, b2,.

Each LED driver 90 in the frame driver unit 61 and the panel driver unit 62 is, for example, a 24-channel LED driver and includes 24 current terminals. Therefore, one LED driver 90 can supply LED drive current to a maximum of 24 lines. Specifically, for example, 8 series R (red) LED drive current supply, 8 series G (green) LED drive current supply, 8 series B (blue) LED drive current supply, and light emission of 8 full-color LEDs It can be driven. Here, one “series” refers to one LED connected to one current terminal or a group of a plurality of LEDs connected in series or in parallel to one current terminal. Yes.
The number n of LED drivers 90 in the frame driver unit 61 is determined by the number of LED sequences arranged on the frame side (the number of sequences of the light emitting unit 20w). Therefore, n may be 1 or may be 2 or more. The frame driver unit 61 has one or a plurality of LED drivers 90.
The number m of LED drivers 90 in the panel driver unit 62 is determined by the number of LED sequences (number of sequences of the light emitting units 20b, 20Z, 20H, and 20J) arranged on the panel side. Accordingly, m may be 1 or may be 2 or more. The panel driver unit 62 has one or a plurality of LED drivers 90.

FIG. 7 shows a schematic configuration example of a main part of the LED driver 90.
The LED driver 90 includes a serial bus interface 191, an address setting unit 192, a data buffer / PWM controller 193, a D / A converter 194, and drive current source circuits 195-1 to 195-24.
The drive current source circuits 195-1 to 195-24 are current sources that perform the 24 series drive current outputs from the current terminals 196-1 to 196-24, respectively.

The LED driver 90 receives the clock signal CLK and serial data DATA from the serial output controller 240 for the serial bus interface 191. The serial bus interface 191 takes in the serial data DATA at the timing of the clock signal CLK. The serial bus interface 191 converts the captured serial data into parallel data and transfers the parallel data to the data buffer / PWM controller 193.
The serial output controller 240 designates a slave address and transmits LED drive data.
The data buffer / PWM controller 193 performs slave address confirmation for the parallel data transferred from the serial bus interface 191. When it is confirmed that the slave address included in the parallel data matches the own slave address (either w1 to w (n) or b1 to b (m)) set in the address setting unit 192. The LED drive data included in the parallel data is stored as valid data in a designated register.

When the data buffer / PWM controller 193 fetches the LED drive data of each series, the data buffer / PWM controller 193 uses the values corresponding to the luminance information (gradation values) indicated by the LED drive data as D / A drive control values for the 24 series. Output to the converter 194.
The D / A converter 194 converts a value corresponding to the luminance information into an analog signal, and uses it as a control signal to each current source circuit 195-1 to 195-24.

Twenty-four series LEDs 120 are connected to all (or part of) the current terminals 196 (196-1 to 196-24). Note that the drawing shows a simplified state in which one LED 120 is connected to one series of current terminals 196, but a configuration in which a plurality of LEDs are connected to one series of current terminals 196 (for example, series connection) is also possible. Of course this is possible.
In each series (current terminals 196-1 to 196-24), the power supply voltage Vcc is applied to the series connection of the LED 120 and the resistor R. Current is supplied to each series of LEDs 120 by the current source circuits 195-1 to 195-24 to emit light.
That is, each of the current source circuits 195-1 to 195-24 operates so that a drive current having a current amount corresponding to the signal supplied from the D / A converter 194 flows through the corresponding LED 120.

Specifically, such LED drive control is described for one series. The data buffer / PWM controller 193 converts the digital data string corresponding to the pulse duty corresponding to the gradation value of the series to the D / A converter 194. The D / A converter 194 converts the digital data string into a pulse signal as an analog signal and supplies it to the current source circuit 195 of the series. The output of the current source circuit 195 is controlled by the pulse signal H / L, and outputs currents of 0 mA and 5 mA, for example. For example, in such an operation, a driving current having an average current value corresponding to the gradation value flows to the LED 120 as a result.
In this embodiment, the current value is set to, for example, 0 mA and 5 mA by the PWM driving method, and gradation control is performed (integrally) in the time axis direction. Needless to say, the current value may actually be changed according to the gradation. Regardless of duty control or level control, appropriate gradation expression can be realized by setting the average current value per unit time to a level corresponding to the gradation.

The number n of LED drivers 90 in the frame driver unit 61 is determined by the number of LED sequences arranged on the frame side (the number of sequences of the light emitting unit 20w). Therefore, n may be 1 or may be 2 or more. The frame driver unit 61 has one or a plurality of LED drivers 90.
The number m of LED drivers 90 in the panel driver unit 62 is determined by the number of LED sequences (number of sequences of the light emitting units 20b, 20Z, 20H, and 20J) arranged on the panel side. Accordingly, m may be 1 or may be 2 or more. The panel driver unit 62 has one or a plurality of LED drivers 90.

  In addition, although the lamp | ramp parts 63 and 64 by LED etc. gave the example of one system (one serial data output channel) on the frame side, and one system on the panel side, of course, it is not restricted to this. A plurality of systems may be provided for the frame-side lamp unit 63, and a plurality of systems may be provided in the panel-side lamp unit 64.

Next, output of motor drive data will be described. As shown in FIG. 5, serial data DATA as motor drive data is output from the serial output controller 240 to the motor driver unit 70.
In the motor driver unit 70, p motor drivers 91 are connected in parallel to the serial data output channel ch 3 of the serial output controller 240.
Similarly, the signal line of the serial data output channel ch3 is provided with a clock line for supplying the clock signal CLK and a data line for supplying serial data DATA as motor drive data. Each of these signal lines is connected so as to supply each signal in parallel to the p motor drivers 91 constituting the motor driver unit 70.
In each motor driver 91 of the motor driver unit 70, a device ID (identifier of each motor driver 91) used as a slave address by the effect control CPU 200 is set. For the sake of explanation, the device IDs (slave addresses) of the motor drivers 91 are denoted as mt1, mt2,.

Each motor driver 91 in the motor driver unit 70 may have the configuration shown in FIG. That is, the same driver can be used.
The number p of the motor drivers 91 in the motor driver unit 70 is determined by the number of motors used for the movable body accessory 65 and the like. Therefore, p may be 1 or may be 2 or more. The motor driver unit 70 has one or a plurality of motor drivers 91.

A movable body accessory motor 65 that drives the movable body accessory is connected to the motor driver 91.
FIG. 8 shows an example in which, for example, a stepping motor 121 is connected to all (or part of) the current terminals 196-1 to 196-24 of the motor driver 91 as the movable body accessory motor 65.
Here, a drive current is supplied to the four-phase stepping motor 121 through current terminals 96-1 to 96-4, current terminals 96-5 to 96-8,..., Current terminals 96-21 to 96-24, respectively. A configuration example is shown.
The driver having the configuration described above with reference to FIG. 7 is a circuit that outputs a current instructed by a given command (serial data) from the current terminals 196-1 to 196-24. It can also be used as a motor driver 91 for a physically movable body drive device such as a solenoid.
The operation of the movable body accessory is finely set according to the production scenario, and the production control unit 51 controls the driving direction, the driving amount, and the like accordingly. The movable body using the motor driver 91 in the motor driver unit 70 is used. By driving the accessory, it becomes possible to control the movable accessory according to the serial data together with the light emitting parts (LEDs 20w, 20b) of the lamp parts 63, 64, and the control processing and configuration can be made efficient.

  In one LED driver 90, a method may be adopted in which a part of current terminals are used for LED driving and another part of current terminals is used for driving a stepping motor, a solenoid, or the like.

Further, for each movable body accessory motor 65 (stepping motor 121), a sensor 68s described as the origin switch 68 in FIG. A signal from each sensor 68 s is input to the parallel / serial converter 260.
Further, an example in which user operation information from the operation unit 60 is also input to the parallel / serial conversion unit 92 is shown. The user operation information is a signal corresponding to the operation of the production buttons 11 and 12, the cross key 13, and the like.
For example, the parallel / serial converter 260 is mounted on the effect control unit (effect control board) 51 as an IC separate from the one-chip microcomputer 250, but may be included in the one-chip microcomputer 250.

The parallel / serial converter 260 receives, for example, 32 systems of signals, converts the input data into serial data Is, and supplies the serial data Is to the motor controller 242.
The operation of the parallel / serial converter 260 is controlled by a control signal CNT from the motor controller 242. The parallel / serial converter 260 performs serial data transfer using the clock signal CLK.
With this configuration, the serial output controller 240 collects the origin detection state of each movable body accessory motor 65 and the user operations on the operation unit 60 such as the effect switches 11 and 12, that is, collects inputs necessary for effect control. Can be detected. Therefore, the production control CPU 200 can grasp the production state efficiently.

<4. Overview of operation>
An outline of operation of the pachinko gaming machine 1 will be described.
[Design variation display game]
In the pachinko gaming machine 1, a big hit lottery is performed by a random lottery in the main control unit 50 on condition that a predetermined start condition, specifically, a game ball wins the upper start opening 41 or the lower start opening 42. Based on the lottery result, the special symbol (identification symbol for notifying the jackpot lottery result) is variably displayed on the first special symbol display unit 80 or the second special symbol display unit 81 to start the special symbol variation display game. After a certain period of time, the result is displayed on the special symbol display section (80 or 81).

In the present embodiment, the big hit lottery based on the winning at the upper start opening 41 and the big hit lottery based on the winning at the lower starting opening 42 are performed independently. For this reason, the big hit lottery result regarding the upper start port 41 is derived and displayed on the first special symbol display unit 80 side, and the big hit lottery result regarding the lower start port 42 is derived and displayed on the second special symbol display unit 81 side.
For the sake of explanation, the special symbol variation display game on the first special symbol display unit 80 side is referred to as “first special symbol variation display game”, and the special symbol variation display game on the second special symbol display unit 81 side is referred to as “second special symbol variation display game”. This is referred to as a “display game”. However, the first and second special symbols are collectively referred to as “special symbols”, and the first and second special symbol variation display games are collectively referred to as “special symbol variation display games”.

  When the special symbol variation display game is started, a decoration symbol variation display game in which a decoration symbol (game symbol) is variably displayed on the main liquid crystal display device 32M is started, and various effects are accompanied by this. Is issued. When the lottery result is displayed on the first and second special symbol display sections (80, 81), the result is also displayed on the main liquid crystal display device 32M by the decorative symbol. That is, in this decorative symbol variation display game, an effect display reflecting the lottery result in the special symbol variation display game, that is, an effect reflecting the jackpot lottery result appears.

  For example, when the result of the special symbol variation display game is “big hit”, the result of the decorative symbol variation display game is also an effect reflecting “big hit”. The special symbol display unit (80, 81) displays a special symbol indicating a big hit in a predetermined display mode, and the main liquid crystal display device 32M has “left”, “middle”, and “right” display areas. In the predetermined display mode in which the decorative symbol reflects the big hit lottery result on the winning effective line (for example, in the display areas of “left”, “middle”, and “right”, the three decorative symbols are “7” and “7”. The display is stopped in the “7” display state).

When this “big hit” is reached, for example, the first big prize opening solenoid 78 or the second big prize opening solenoid 79 is driven, and the opening operation of the first big prize opening 45 or the second big prize opening 46 in a predetermined pattern is performed. A special game state (big hit game) that is executed and is more advantageous to the player than the normal game state occurs. In this jackpot game, the big prize opening is determined until either the opening time of the big prize opening elapses for a predetermined time or until a predetermined number of game balls are won in the big prize opening. A round game such as closing time is repeated a predetermined number of times.
When the big hit game is started, an opening effect for informing that the big win is started is performed first, and after the opening effect is finished, the round game is performed for the specified number of rounds. In addition, during the round game, a round effect corresponding to each round is performed. Then, after the specified number of rounds is finished, an ending effect for notifying that the jackpot is finished is performed, and thereby the jackpot game is finished.

  In this way, the special symbol variation display game and the decorative symbol variation display game have substantially the same game time (from the start timing of the variation display to the stop display timing), and reflect the result of the special symbol variation display game. Since the thing is expressed in the decorative symbol variation display game, the two symbol variation display games can be regarded as equivalent symbol games. For the sake of explanation, the two symbol variation display games may be simply referred to as “symbol variation display game”.

  In addition, based on the fact that the game ball has passed through the gate 44 (normal symbol start opening), the main control unit 50 performs a lottery per assistance by random number lottery. In accordance with the lottery result, the normal symbol represented by the LEDs of the normal symbol display unit 82 is variably displayed and the normal symbol variation display game is started. After a predetermined time has elapsed, the result is determined by whether the LED is lit or not lit. Stop display by combination.

  When “subsidiary hit” is reached, the ordinary electric accessory solenoid 77 is activated, the movable wing piece 42b is opened, the lower start opening 42 is opened or enlarged, and the game ball is likely to flow (open start opening). State), and an auxiliary gaming state (hereinafter referred to as “open-game”) that is more advantageous to the player than the normal gaming state occurs. In this open electric game, the movable wing piece 42b is released for a predetermined time (for example, 0.2 seconds) or until a predetermined number (for example, 4) of game balls are won, and then for a predetermined time (for example, 0.5 second) The operation of closing the movable blade piece 42b is repeated a predetermined number of times. It should be noted that the special symbol variation display game is also performed in the same manner when the game ball wins the lower start opening 42 during the open-circuit game, and the decorative symbol variation display game is performed accordingly.

Here, during the special symbol variation display game, the normal symbol variation display game, the big hit game, or the general electric open game, the upper start port sensor 71, the lower start port sensor 72, or the gate sensor 73 When a detection signal is input and the start condition is satisfied, game information to be used for the winning lottery is acquired based on the detection signal, and this is used as data related to the start right for causing each variable display game to be played. As (holding data), except for those related during the variable display, it is possible to hold and store up to a predetermined upper limit maximum number of stored memories (for example, up to 4). In order to make the number of holds clear to the player, a hold indicator provided as an icon image on the screen by the hold number display section 20H or the main liquid crystal display device 32M is lit up.
Normally, a variation display game for each held ball is executed in the order of generation of the held balls. In the present embodiment, the same number as the maximum number of reserved storage is handled as the upper limit predetermined number, and up to four pieces of reserved data relating to the first special symbol and the second special symbol are stored, respectively, and fluctuations in the special symbol or the normal symbol Hold as fixed number of times.

[Game state]
The pachinko gaming machine 1 according to the present embodiment is configured to be capable of generating a plurality of types of gaming states.
First, the pachinko gaming machine 1 according to the present embodiment includes a “probability variation (hereinafter referred to as“ probability variation ”) function” that the main control unit 50 (CPU 100) serves as its function unit. There are two types: a probability changing function related to a special symbol (hereinafter referred to as “special symbol probability changing function”) and a probability changing function related to a normal symbol (hereinafter referred to as “normal symbol probability changing function”).

The special symbol probability changing function is advantageous over the normal gaming state by changing the probability of winning a big hit from a low probability (for example, 1/399) to a high probability (for example, 1 / 9.9). This is a function that generates a “high probability state”. Under this high probability state, the jackpot lottery probability is high, so that the jackpot is likely to occur.
The normal symbol probability changing function is more advantageous than the normal gaming state by changing from a low probability (for example, 1/256) to a high probability (for example, 255/256) that the lottery probability per auxiliary is a predetermined probability (normal probability). This is a function that generates a "probability per auxiliary change state". Under this sub-probability variation state, the per-subsidiary lottery probability is high, so sub-prone is more likely to occur, and open-ended games occur more frequently, and the movable wings per unit time than in the normal game state. It will be in the operating rate improvement state which the operating rate of the piece 42b improves.

  In addition, the pachinko gaming machine 1 of the present embodiment includes a “variable time reduction (hereinafter referred to as“ time reduction ”) function” that the main control unit 50 serves as a functional unit. There are two types of time-shortening functions relating to special symbols (hereinafter referred to as “special symbol time-shortening functions”) and time-shortening functions relating to normal symbols (hereinafter referred to as “normal symbol time-shortening functions”).

The special symbol time reduction function shortens the average time required for one special symbol fluctuation display game (the time from when the special symbol starts to change until it is fixedly displayed. That is, the special symbol fluctuation time) This is a function for generating a “short-time state”. Under the special symbol short-time state, the average variation time of the special symbol in one special symbol variation display game is shortened, and the lottery number improvement state is improved in which the number of big lotteries per unit time is improved as compared with the normal gaming state.
In the pachinko gaming machine 1, the special symbol variation display time may be shortened due to the difference in the number of holds, but in this case, the special symbol time-short state does not occur and is caused by other control processing. Is.

  The normal symbol time shortening function shortens the average time required for one normal symbol fluctuation display game (the time from the start of normal symbols to the final display, that is, the normal symbol fluctuation time). This is a function for generating a “short-time state”. Under the normal symbol short-time state, the average variation time of the normal symbol in one normal symbol fluctuation display game is shortened, and the lottery number improvement state is improved in which the number of lotteries per auxiliary time per unit time is improved as compared with the normal game state. .

In addition, the pachinko gaming machine 1 according to the present embodiment includes an “open extension function” in which the main control unit 50 serves as its function unit.
The opening extension function is a function of generating an “open extension state” in which the movable blade piece 42 b is opened and the number of times of opening is extended. This open extended state is referred to as a so-called “electric chew support state”. Under the open extended state, the opening operation period (starting port open state time) of the movable blade piece 42b is extended from 0.2 seconds to 1.7 seconds, for example, and the number of times of opening and closing is changed from 1 to 2 times, for example. The operation rate is improved and the operation rate of the movable wing piece 42b per unit time is improved compared to the normal game state.

By operating one or more types of the functions as described above, it is possible to change the internal gaming state of the gaming machine.
Here, in this embodiment, the operation start conditions of the normal symbol probability changing function, the normal symbol short-time function, and the open extension function are the same as the operation start conditions of the special symbol short-time function, and each function operates at the same opportunity. Will do.

[About hits]
In the pachinko gaming machine 1 of the present embodiment, “15R low base non-probable big hit”, “15R low base probable big change” are selected as the types of winning lotteries in the special symbol variation display game, that is, the hit types subject to the big hit lottery. There are multiple types of hits such as “Big hit”, “15R low base probability variation β big hit”, “15R high base probability variation big hit”, “2R low base probability variation big hit”, and “Small hit”.

<5. Processing of main control unit>
Hereinafter, control processing according to the present embodiment will be described. First, main processing by the main control unit (main control board) 50 will be described here.
FIG. 9 is a flowchart showing main processing of the main control unit 50. The main process starts when the power is turned on without operating the initialization switch (not shown), such as when recovering from a power failure, and when the initialization switch is turned on. May turn on. In any case, when the pachinko gaming machine 1 is powered on, the power board 58 supplies a voltage to each control board. In this case, the main control unit 50 (main control CPU 100) starts the main process shown in FIG.

In the main control side main process, the main control CPU 100 first executes a necessary initial setting process before starting the game operation in step S11. For example, it first sets itself to the interrupt disabled state, sets to a predetermined interrupt mode (interrupt mode 2), and initializes the register values in the CPU including each part of the microcomputer.
Next, in step S12, the main control CPU 100 determines the state (ON, OFF) of a RAM clear signal that is an output signal of a RAM clear switch that is input via an input port (not shown). The RAM clear signal is a signal that determines whether or not to initialize all the areas of the RAM. The RAM clear signal usually has a value corresponding to the ON / OFF state of the initialization switch operated by the store clerk of the pachinko parlor.

When the RAM clear signal is in the ON state, the main control CPU 100 advances the process from step S12 to S16, and performs zero clear of the entire area of the RAM. Therefore, the value of the backup flag set at the time of power-off becomes zero together with other checksum values.
Subsequently, in step S17, the main control CPU 100 transmits a “RAM clear display command” for notifying that the RAM area has been cleared to zero to each control board as an initialization command. In step S18, for example, 30 seconds is stored in the RAM clear notification timer as a time for notifying that the RAM has been cleared.

Next, in step S19, the main control CPU 100 initializes a CTC that outputs an interrupt signal for starting a timer interrupt operation, and sets the CPU to an interrupt enabled state.
Thereafter, as the processing of steps S20, S21, and S22, the interrupt disabled state and the interrupt enabled state are repeated until an interrupt occurs, and various random number update processes are executed during that time. In the various random number update processing in step S21, random numbers used for changing initial values (start values) of various random numbers used for special symbol fluctuation display and normal symbol fluctuation display, and fluctuations used for selection of fluctuation patterns. Update pattern random numbers.
The various random numbers used for the special symbol variation display and the normal symbol variation display are, for example, random numbers related to jackpot lotteries circulating through a predetermined numerical range by increment processing (special symbol determination random numbers used for symbol lottery). Or a random number related to a lottery per assistance (a random number for judging per assistance used in winning lottery per assistance). The random numbers used for changing the initial value include an initial value random number for special symbol determination, an initial value random number for auxiliary hit determination, and the like.

The main control RAM 102 has a special symbol determination random number counter initial value generation counter and a special symbol determination random number counter as various random number counters used for symbol lottery related to big hit lottery, auxiliary lottery, or variation pattern lottery. There are provided a counter for generating an initial value per auxiliary sub-counting counter, a random counter for sub-peripheral determining, a random number 1 counter for variation pattern, a random number 2 counter for variation pattern, and the like. These counters serve as random number generation means for generating random numbers in software.
In the various random number update processing in step S21, two initial value generation counters for generating initial values of the special symbol determination random number counter and the auxiliary hit determination random number counter, a variation pattern random number 1 counter, and a variation pattern random number 2 The counter is updated to generate the above various soft random numbers. For example, if the range of values that can be taken as the variation pattern random number 1 counter is 0 to 238, a value is acquired from the count value storage area for generating the value of the variation pattern random number 1 in the main control RAM 102, and the acquired value is 1 Are stored in the original count value storage area. At this time, if the result of adding 1 to the acquired value is 239, 0 is stored in the original random number counter storage area. Other initial value generation random number counters are updated in the same manner. The main control CPU 100 is configured to repeatedly execute various random number update processes except during the intermittently executed timer interrupt process.

The above describes the case where it is determined in step S12 that the RAM clear switch is ON. Next, the case where the RAM clear switch is OFF will be described. For example, at the time of recovery from a power failure state, the initialization switch (RAM clear signal) is in an OFF state. In such a case, the main control CPU 100 advances the process from step S12 to S13, and determines the backup flag value. The backup flag is set to the ON state when the power is shut off, and is reset to the OFF state in the first timer interrupt processing after the power is restored.
Therefore, when the power is turned on or when recovering from a power failure, the backup flag should normally be in the ON state. However, the backup flag is reset (OFF) if the predetermined processing is not completed before the power is cut off for some reason. Therefore, when the backup flag is in the OFF state, the main control CPU 100 advances the process from step S13 to S16, and returns the operation of the gaming machine to the initial state.

On the other hand, if the backup flag is in the ON state, the main control CPU 100 advances the process from step S13 to S14, and executes a checksum calculation for calculating a checksum value. Here, the checksum operation is an 8-bit addition operation for the work area of the main control RAM 102.
When the checksum value is calculated, the calculation result is compared with the stored value at the SUM address in the main control RAM 102. This SUM address stores a checksum value obtained by the same checksum calculation when the power is shut off. The stored calculation result is maintained by the backup power source together with other data of the main control RAM 102. Therefore, originally, both should match according to the determination in step S14.
However, there may be a case where the checksum operation cannot be executed when the power is turned off, or even if it can be executed, the data in the work area is damaged after the checksum operation of the main process is executed. In such a case, the determination result in step S14 is inconsistent.
If data corruption is detected due to the discrepancy of the determination results, the main control CPU 100 proceeds from step S14 to step S16, executes RAM clear processing, and returns the operating state of the gaming machine to the initial state.

If the checksum value obtained by the checksum calculation in step S14 matches the stored value at the SUM address, the main control CPU 100 proceeds to step S15, and returns the stack pointer before power-off based on the backup data. A game restoration process necessary for starting a game from the processing state at the time of power-off is executed.
When the game recovery process at step S15 is completed, the process proceeds to the process at step S19, the CTC is initialized and the CPU is set in the interrupt enabled state, and thereafter, the interrupt disabled state and the interrupt enabled state are generated until an interrupt occurs. In the meantime, various random number update processes described above are executed (steps S20 to S22).

  Next, timer interrupt processing of the main control CPU 100 will be described. FIG. 10 shows the timer interrupt process of the main control CPU 100. This main control timer interrupt process is activated by interruption every predetermined time (about 4 ms) from the CTC, and is interrupted and executed during execution of the main process described above.

  When a timer interrupt occurs, the main control CPU 100 saves the contents of the register in the stack area, and first performs a power supply abnormality check process for monitoring the power supply state from the power supply board 58 in step S51 of FIG. In this power abnormality check process, it is mainly monitored whether the power is normally supplied. Here, for example, when an abnormality such as a power interruption occurs, a backup process for storing predetermined game information in the RAM at the time of power interruption is performed so that the game can be restored without any trouble when the power is restored.

  In step S52, the main control CPU 100 performs a timer management process for managing a timer used for gaming operation control. Timer values of various timers (for example, special symbol accessory operation timer) used for game operation control of the pachinko gaming machine 1 are managed (updated) by this processing.

In step S53, the main control CPU 100 performs input management processing. In this input management process, information detected by various sensors provided in the pachinko gaming machine 1 is stored in the winning counter. Here, the detection information by the various sensors includes, for example, an upper start opening sensor 71, a lower start opening sensor 72, a gate sensor (ordinary symbol start opening sensor) 73, a first large winning opening sensor 75, and a second large winning opening sensor 76. This is ON / OFF information (winning detection information) of a switch signal output from a winning detection switch such as the general winning opening sensor 74.
Through the processing in step S53, it is monitored for each interrupt whether or not a winning is detected (winning has occurred) at each winning opening. The “winning counter” is a counter provided corresponding to each winning opening and counting the number of game balls (winning balls) won. In the present embodiment, in a predetermined area of the main control RAM 102, an upper start opening winning counter for the upper starting opening 41, a lower starting opening winning counter for the lower starting opening 42a, an ordinary symbol starting opening winning counter for the gate 44, A first grand prize winning counter for the first grand prize winning opening 45a, a second big winning prize winning prize counter for the second big winning prize opening 46a, a general winning prize winning counter for the general winning opening 43, and the like are provided. .
Further, in this input management process, it is also monitored whether or not there is an illegal prize based on whether or not the detection information from the prize detection switch has won a prize during a period in which the prize should be allowed. For example, when the first and second big prize opening sensors 75 and 76 detect a game ball even though the big hit game is not being played, the prize detection information is invalidated by invalidating the prize detection information. In order to notify the outside of the fact, a predetermined error process is performed in an error management process in step S55 described later.

  In step S54, the main control CPU 100 performs a timer interrupt random number management process for periodically updating the random numbers related to each variation display. In this periodic random number update process, a special symbol determination random number or auxiliary per-subject determination random number is updated (+1 is added for each interrupt), and a process for changing the start value of the random number counter is performed each time the random number counter makes a round. For example, the value of the special symbol judgment random number counter is updated (added by +1) within a predetermined range, and the special symbol judgment random number counter initial value generation counter value is read each time the special symbol judgment random number counter makes one round, The value of the generation counter is stored in a special symbol determination random number counter. As a result, the start value of the special symbol determination random number counter is changed according to the value of the generation counter, so that the count value of the special symbol determination random number counter is random while the update cycle is constant.

In step S55, the main control CPU 100 performs an error management process for monitoring whether or not there is an abnormality in the gaming operation state. In this error management process, as abnormalities in the gaming operation state, for example, monitoring whether or not a break has occurred between the boards, monitoring whether or not there was an illegal winning, etc., these operation abnormalities (errors) occurred In such a case, predetermined error processing corresponding to the error is performed.
As error processing, for example, the progress of a predetermined game operation (for example, a game ball payout operation or game ball launch operation) is stopped, or an error notification command is transmitted to the effect control unit 51, and an error is generated by the effect means. Or that the occurrence has occurred.

In step S56, the main control CPU 100 performs prize ball management processing. In this prize ball management process, the data stored in the input management process in step S53 is grasped, and the above-mentioned prize counter is checked. Transmit to the substrate 53.
Upon receiving this payout control command, the payout control board 53 controls the game ball payout device 55 to perform a payout operation for the designated number of prize balls. Thereby, the number of winning balls corresponding to each winning opening is paid out. The number of winning balls corresponding to a winning opening is the predetermined number of winning balls per winning ball set for each winning opening × the number of winning balls corresponding to the value of the winning counter.

  In step S57, the main control CPU 100 performs normal symbol management processing. In this normal symbol management process, a lottery per auxiliary in the normal symbol variation display is performed, and based on the lottery result, the variation pattern of the normal symbol and the stop display mode of the normal symbol are determined, or the blinking is repeated every predetermined time. Create symbol data (data for LED blinking display during normal symbol variation), or create data for stop display (data for LED blinking display during normal symbol stop display) if normal symbol is not varying Or

In step S <b> 58, the main control CPU 100 performs a normal electric accessory management process. In this ordinary electric accessory management process, generation of an excitation signal for solenoid control for the ordinary electric accessory solenoid 77 and its data (solenoid control data) based on the lottery result of the auxiliary symbol lottery in the normal symbol management process in step S57. Set up. Based on the data set here, an excitation signal is output to the ordinary electric utility solenoid 77 in a solenoid management process in step S64 described later, whereby the operation of the movable blade piece 42b is controlled.
In step S59, the main control CPU 100 performs special symbol management processing. In this special symbol management process, the big hit lottery in the special symbol variation display is mainly performed, and based on the lottery result, the variation pattern of the special symbol (look-ahead variation pattern, variation pattern at the start of variation), the special stop symbol, etc. decide.
In step S60, the main control CPU 100 performs a special electric accessory management process. In this special electric utility management process, when the big hit lottery result is “big hit” or “small win”, a setting process necessary to execute and control the hit game corresponding to the win is performed.

In step S61, the main control CPU 100 performs a right-handed notification information management process. In this right-handed notification information management process, for example, a right-handed instruction is given in situations where right-handed is advantageous, such as when the first and second big prize winning holes 45a and 46a are opened or when the movable blade piece 42b is driven. A process for making a “launch position guidance effect (right-handed notification effect)” for performing the notification appears. Specifically, the right-handed instruction is an effect operation instructing the player to aim at the right game area 3c. For example, an image prompting the player to “right-hand” is displayed on the main liquid crystal display device 32M. Or a right-handed message sound is generated from the speaker 25.
When a right-handed notification effect is performed, in this right-handed notification information management process, a “right-handed instruction command” instructing execution of a right-handed notification effect is transmitted to the effect control unit 51 as an effect control command. Then, the production control unit 51 performs execution control of right-handed notification using an image or sound.
In step S62, the main control CPU 100 performs LED management processing. This LED management process is a process of outputting display data for normal symbol display and first and second special symbol displays to the symbol display unit 33. By this processing, normal symbol and special symbol change display and stop display are performed. The normal symbol display data created in the normal symbol management process in step S57 and the special symbol display data created in the special symbol display data update process in the special symbol management process in step S59 are the LED management process. Is output.

In step S63, the main control CPU 100 performs an external terminal management process. In this external terminal management process, the operation state information of the pachinko gaming machine 1 is output to an external device such as a hall computer or an island lamp through the frame external terminal board 57. The operating state information includes that a big hit game has occurred (condition device has been activated), that a small hit game has occurred, that a symbol variation display has been executed (a special symbol variation display game has started or ended) , Information such as winning information (information indicating that the player has won a winning opening or a big winning opening and information on the number of winning balls) is included.
In step S64, the main control CPU 100 performs solenoid management processing. In this solenoid management process, an excitation signal output process for the ordinary electric accessory solenoid 77 based on the solenoid control data created in the ordinary electric accessory management process in step S58, or a special electric accessory management process in step S60. Excitation signal output processing for the first and second big prize opening solenoids 78 and 79 based on the solenoid control data is performed. Thereby, the movable wing piece 42b and the open doors 45b and 46b operate in a predetermined pattern, and the lower start port 42a and the big winning ports 45a and 46b are opened and closed.

  After completing the above steps S51 to S64, the main control CPU 100 restores the saved register contents and sets the interrupt permitted state in step S65. Thus, the timer interrupt process is terminated, the process returns to the main process on the main control side in FIG. 9 before the interruption, and the main control main process is performed until the next timer interruption occurs.

In the above processing, the main control unit 50 (main control CPU 100) sequentially transmits necessary commands to the effect control unit 51.
As examples of commands, FIG. 11A shows a part of a variation pattern command and a winning command relating to a winning lottery of the special symbol variation display game, and FIG. 11B shows a part of a symbol designation command.
The variation pattern command and the winning command are configured such that the variation pattern type is defined by the upper byte and the lower byte, and the upper byte is different depending on the deviation / hit.
The symbol designating command has a configuration in which the first and second special symbols are indicated in the upper byte and the hit type is specified in the lower byte.

<6. Processing of the production control unit of the first embodiment>
Subsequently, processing of the effect control unit 51 will be described. First, an example of the structure of scenario data for effect control will be described.
The structure of scenario registration information will be described with reference to FIGS. FIG. 12A shows the structure of scenario registration information as a main scenario and a sub-scenario. The scenario registration information is set using a work area provided in the effect control RAM 202 (for example, the built-in CPU work memory 202b).
In the present embodiment, the scenario registration information has 64 channels of scenario channels sCH0 to sCH63. Scenarios registered in each scenario channel sCH can be executed simultaneously.

  As shown in the figure, information that can be registered in each scenario channel sCH includes a sub-scenario execution line indicating a sub-scenario timer (scTm) used in the sub-scenario update process, a previous time (scPrevTm), and a sound / motor sub-scenario table execution line. (ScIx), a sub-scenario execution line lmp (lmpIx) indicating an execution line of the ramp sub-scenario table, a main scenario timer (msTm) used for scenario update processing, a main scenario execution line (mcIx) indicating an execution line of the main scenario table, There are a main scenario number (mcNo), a main scenario option (mcOpt) that is optional data that can be added to the main scenario, a user option (userFn), a waiting time (delay), and a checksum (checkSum).

When starting production of sound output by the speaker unit 59, light emission by the lamp units 63 and 64, and driving of the movable body accessory by the movable body accessory motor 65, the standby time (delay) and the main scenario number (mcNo) are set as scenarios. It registers in an empty scenario channel among channels sCH0 to sCH63.
The waiting time (delay) indicates the time from registration to the scenario channel sCH until the scenario is started. The waiting time (delay) is decremented by 1 at a predetermined processing timing (for example, step S104 in FIG. 16 described later). When the waiting time (delay) is 0, processing corresponding to the registered data is executed.

FIG. 14 shows examples of scenario numbers 1, 2, and 3 as a part of the main scenario table. As the scenario of each scenario number, the main scenario timer (msTm) value is described as time data in each line (row) of the scenario, and the sub-scenario number (scNo) and option (OPT) can be described. . That is, in the main scenario table, a sub-scenario (and optional in some cases) to be executed is designated as the time by the main scenario timer (msTm). In the last line of the scenario, a scenario data end code D_SEEND or a scenario data loop code D_SELOP is described.
The value of the main scenario timer (msTm) is incremented by 1 at a predetermined processing timing (for example, step S104 in FIG. 16 described later) from the start of the main scenario.
The scenario table of each scenario number advances to the next line when the time of the main scenario timer (msTm) in a certain line has elapsed. The time data of each line indicates the timing when the line ends.
For example, in the case of scenario number 2, the operation of sub-scenario number 2 is designated as the time of timer value “1500”, the operation of sub-scenario number 20 is designated as the time of next timer value “500”, and the next timer value “ The operation of the sub-scenario number 21 is designated as a time of 2000 ”. The next line is the scenario data end code D_SEEND. In the case of scenario data end code D_SEEND, this scenario is deleted from the scenario registration information (work).

Next, the structure of the lamp data registration information will be described with reference to FIG. 12B. As the lamp data registration information, a scenario selected from the lamp sub-scenario table, that is, information indicating a rendering operation (lighting pattern) by the lamp units 63 and 64 is registered. This lamp data registration information is also set using the work area of the effect control RAM 202.
In the present embodiment, the ramp data registration information has 16 channels of ramp channels dwCH0 to dwCH15. Priorities are set for each of the ramp channels dwCH0 to dwCH15, and the priority increases in order from the ramp channels dwCH0 to dwCH15. Therefore, the scenario (lamp sub-scenario) registered in the ramp channel dwCH15 is executed with the highest priority. For example, if a scenario is registered in the ramp channels dwCH3 and dwCH10, the scenario registered in the ramp channel dwCH10 is preferentially executed.
The ramp channel dwCH0 is mainly used for a lamp effect associated with BGM (Back Ground Music), the lamp channel dwCH15 is used for an error-related lamp effect, and the lamp channels dwCH1 to dwCH14 are used for a normal effect.

  As shown in the figure, information that can be registered in each lamp channel dwCH includes a registered lighting number (lmpNew) indicating the number of the registered lighting pattern, an execution lighting number (lmpNo) indicating the number of the lighting pattern to be executed, and a lamp sub-scenario. There are an offset indicating an execution line (offset), an execution time (time), and a checksum (checkSum).

  FIG. 15A shows examples of lamp sub-scenario numbers 1, 2, and 3 as part of the lamp sub-scenario table. For each number of lamp sub-scenarios, time data (time) values are described in each line (row) of the scenario, and lamp channels and lamp numbers indicating various lighting patterns are described. In the last line, a lamp scenario data end code D_LSEND is described.

In this ramp sub-scenario table, the time data (time) of each line indicates the time at which the line is started after the sub-scenario is started.
When the above-mentioned main scenario timer (msTm) and the time data in the table are compared, and they match, the lamp number of that line is registered in the lamp data registration information of FIG. 12B. The registered ramp channel dwCH is the channel indicated in the line.
For example, it is assumed that scenario number 2 shown in FIG. 14 is registered and sub-scenario number 2 is referred to in a certain scenario channel sCH described above. In the lamp sub-scenario number 2 shown in FIG. 15A, the lamp channel 5 (dwCH5) and the lamp number 5 are described as time data (time) = 0 on the first line. In this case, when the main scenario timer (msTm) = 0, the information on the first line is first registered as the registered lighting number (lmpNew) = 5 in the lamp channel dwCH5 of the lamp data registration information in FIG. 12B. The value of the sub-scenario execution line lmp (lmpIx) in the scenario registration information is updated to the value of the next line (second line). This is a registration for performing the lighting pattern operation of the lighting number 5 with a relatively low priority of the lamp channel dwCH5.
For the second line, the same processing is performed when the main scenario timer (msTm) reaches “500”. That is, the registered lighting number (lmpNew) = 6 (that is, the lighting pattern 6 lighting instruction) is registered in the lamp channel dwCH5 of the lamp data registration information.
If the time data (time) has the same value for two consecutive lines, the processing for each line is started simultaneously.
In the lamp drive data creation process described later, lamp drive data is created based on the lamp data registration information updated in this way.

Next, the structure of the motor data registration information will be described with reference to FIG. 12C. As the motor data registration information, information indicating a scenario selected from the motor sub-scenario table is registered. This motor data registration information is also set using the work area of the effect control RAM 202.
In the present embodiment, the motor data registration information includes, for example, eight channels of motor channels mCH0 to mCH7 corresponding to eight motors.
Information that can be registered in each motor channel mCH includes execution operation number (no), registration operation number (noNew), operation count (lcnt), excitation counter (tcnt), execution step (step), operation line as shown in the figure. (Offset), parent (migration source) / child (migration destination) attribute (attribute), parent number (retNo), return address (retAddr), loop start point (roopAddr), loop count (roopCnt), error counter (errCnt) ), Current input information (currentSw), software switch information (softSw), and software count (softCnt).

  FIG. 15C shows an example of the motor sub scenario number 1 as a part of the motor sub scenario table. As the motor sub-scenario of each number, the time data (time) value (ms) is described in each line (row) of the scenario, and information on the motor and solenoid / user option is described. In the last line, a scenario data end code D_MSEND is described.

For this motor sub-scenario table, when the sub-scenario timer (scTm) reaches 0 (initially 0), the time data (time) value of this motor sub-scenario table is set in the sub-scenario timer (scTm). To do. The time data (time) of each line indicates the timing when the line ends. The sub-scenario timer (scTm) describes the absolute time. Therefore, the time data value to be set is a value of (time data of the relevant line) − (time data of the previous line).
The motor data (motors 0 to 3, 4 to 7) is configured to indicate a motor operation pattern number (a motor operation table number in FIG. 21 described later) with one byte per motor. The operation pattern number is set in the registration operation number (noNew) and execution operation number (no) of the motor channel corresponding to the motor number.
In step S202 of FIG. 20 described later, the motor data registration information is updated. In step S203, motor drive data is created based on the update of the motor data registration information.

FIG. 13 shows sound data registration information. As the sound data registration information, information indicating a scenario selected from the sound sub-scenario table is registered. This sound data registration information is also set using the work area of the effect control RAM 202.
In the present embodiment, the sound data registration information has 16 channels of sound channels aCH0 to aCH15.
Information that can be registered in each sound channel aCH includes volume transition amount (frzVq), volume (frzVl), transition amount change (rsv2), volume change (rsv1), phrase change (rsv0), stereo (frzSt) as shown in the figure. ), Loop (frzLp), phrase number hi (frzHi), and phrase number low (frzLo).

FIG. 15B shows an example of sound sub-scenario numbers 1 and 2 as part of the sound sub-scenario table. As the sound / motor sub-scenario for each number, the time data (time) value (ms) is described in each line (row) of the scenario, and information on BGM, warning sound, error sound, and sound control is described. The In the last line, a scenario data end code D_SEEND is described.
For this sound sub-scenario table, when the sub-scenario timer (scTm) becomes 0 (initially 0), the time data (time) value of this sound sub-scenario table is set in the sub-scenario timer (scTm). To do. The time data (time) of each line indicates the timing when the line ends. The sub-scenario timer (scTm) describes the absolute time. Therefore, the time data value to be set is a value of (time data of the relevant line) − (time data of the previous line).
The BGM data of the line is composed of information registered in the sound data registration information such as the BGM phrase number and volume value, and is set in the sound channel aCH0 (aCH1 in the case of stereo) in the sound data registration information. .
The notice sound data of the line is composed of information registered in the sound data registration information such as the phrase number and volume value of the notice sound, and is set in the space where the sound channels aCH2 to aCH14 are vacant.
The error sound data of the line includes information registered in sound data registration information such as the error sound phrase number and volume value, and is set in the sound channel aCH15.
The sound control data is channel information in the lower 6 bytes and control information in the upper 2 bytes.
In step S133 of FIG. 16, which will be described later, reproduction output control is performed based on the scenario update process and the updated sound data registration information.

  Note that the sound sub-scenario table and the motor sub-scenario table may have a table structure integrated with respect to each line of time.

An example of the process of the effect control unit 51 that performs the effect control using the scenario data structure as described above, in particular, the process of the effect control CPU 200 will be described with reference to FIG.
The effect control CPU 200 starts the process of FIG. 16 when the gaming machine body is powered on. In step S100, the effect control CPU 200 first performs necessary initial setting processing before starting the game operation. For example, as initialization processing, interface system initialization, interrupt setting, external memory initialization, WDT initialization, movable body starting point return processing and control initialization, sound source control initialization, serial output controller 240 Initialization, initialization of a scheduler (scenario scheduler, device scheduler, lamp scheduler, sound scheduler), initialization of a system timer, initialization of liquid crystal control, and the like are performed.
Each scheduler refers to the above-described scenario registration information, motor data registration information, lamp data registration information, sound data registration information, or the progress of scenario control based on these. As an initialization process, a work area for storing the scenario registration information and the like is initialized.

When the initial setting process in step S100 is completed, the effect control CPU 200 repeats the processes in and after step S101.
In particular, in the present embodiment, the effect control CPU 200 executes the processes after step S101 while monitoring the frame timing of the display data in order to perform the liquid crystal control simultaneously. In this example, control based on a V blank signal which is a synchronization signal used for display control is performed. A synchronization signal of display data such as a V blank signal is generated at a site that implements the VDP function in the one-chip microcomputer 250. For example, it is generated by the synchronization signal generator 265. In the present embodiment, the V blank signal is generated twice during 1/30 seconds (33.3 ms), which is one frame period of the display image.
The effect control CPU 200 counts up the V blank interrupt counter in response to the V blank signal, so the V blank interrupt counter is counted up every 1/60 seconds (16.6 ms).
Naturally, each process of the effect control CPU 200 is performed based on a processing clock having a frequency extremely higher than the frequency of the V blank signal. Each process in FIG. 16 is performed while grasping the period from the start to the end of the frame in accordance with the V blank signal. Steps S121 to S143 are repeated until the end of one frame period is confirmed by the value of the interrupt counter. Steps S150 to S151 are performed when the end of one frame period is detected.

In step S <b> 101, the effect control CPU 200 performs clear control on the WDT circuit 210. Therefore, the WDT circuit 210 is reset for each frame if the effect control CPU 200 is in a normal processing state.
In step S102, the effect control CPU 200 confirms the frame update flag. The frame update flag is a flag for managing scheduler updates and the like in the frame period.
The frame update flag is turned off at the start of a certain frame of display data (because it is turned off in step S151 described later at the end of the frame).
Therefore, at the frame start timing, the effect control CPU 200 proceeds from step S102 to S103.

  In step S103, the effect control CPU 200 performs drawing update. For example, a display list, which is a group of drawing commands described in the drawing order as described above, and preload execution start control are performed.

In step S104, the effect control CPU 200 updates the scenario scheduler frame. Specifically, this is a process of updating the standby time (delay) and the sub-scenario timer (scTm) of the scenario registration information in FIG. 12A. That is, it can be said that the timer of the effect scenario is advanced by one timing at the start of the frame.
Then, the effect control CPU 200 turns on the frame update flag in step S105. This is information indicating that the timer of the scenario has progressed in the current frame.
The effect control CPU 200 turns off the scheduler update flag in step S106. This is information indicating that the scheduler has been updated, that is, the scenario contents (scenario registration information, lamp data registration information, sound data registration information) have not yet been updated as the timer progresses.
Then, the process returns to step S101. After the effect control CPU 200 clears the WDT circuit 210, since the frame update flag is ON in step S102, the process proceeds to step S120.

  As described above, steps S103 to S106 are performed only once for the first time after the frame start timing. In step S104, the timer of scenario registration information is updated. As will be described below, content updating and control are executed according to the progress of the timer of the scenario. For this reason, the scenario for production proceeds every 33.3 ms, which is one frame period. For example, the main scenario timer (msTm) advances every 33.3 ms. The time of the main scenario timer (msTm) in one line in the main scenario table of FIG. 14 corresponds to the time of notation value × 33.3 ms. Also, the time of one line indicated by time in the sub-scenario table in FIG. 15 corresponds to the time of expressed value × 33.3 ms.

In step S120, the effect control CPU 200 branches the process depending on the value of the V blank interrupt counter. If the V blank interrupt counter has not reached "2" (that is, if it is "0" or "1"), the process proceeds to step S121.
The V blank interrupt counter is cleared at the end of the frame in step S150 and incremented twice per frame. Therefore, V blank interrupt counter = 0 indicates the first half period of the frame, and V blank interrupt counter = 1 indicates the second half period of the frame. The V blank interrupt counter = 2 at the V blank signal at the end of the frame.
The effect control CPU 200 proceeds from step S120 to step S121 so as to repeat steps S121 to S143 as many times as possible during the frame period in which the V blank interrupt counter is “0” or “1”.

In step S121, the effect control CPU 200 branches the process depending on whether the V blank interrupt counter is “0” or “1”. That is, whether the present is the first half or the second half of a certain frame period.
If V blank interrupt counter = 0, that is, the first half of the frame, the process proceeds to step S122 to check the received command from the main control unit 50. That is, it is confirmed whether or not one or more reception commands are stored in the command reception buffer. If there is no reception command, the process proceeds to step S130.
If there is one or more received commands, the effect control CPU 200 performs command analysis processing in step S123.
Then, the effect control CPU 200 turns off the scheduler update flag in step S124. It should be noted that turning off the scheduler update flag in step S124 means that if a command has been received during the current frame period, even after the scheduler update flag has been turned off once in step S131, the scheduler update flag is turned off again. Means to turn off.

An example of command analysis processing in step S123 will be described with reference to FIGS.
As described above, the effect control CPU 200 confirms whether or not the effect control command supplied from the main control unit 50 is stored in the command reception buffer in step S122 of FIG. 16, and if the effect control command is stored. The command is read out by the process of FIG.

The effect control unit 51 is provided with a command reception buffer for capturing the effect control command transmitted from the main control unit 50 in the effect control RAM 202 (for example, the D-RAM 202a).
In step S301 in FIG. 18, the effect control CPU 200 first checks the read pointer indicating the read address of the command reception buffer and the write pointer indicating the write address.
The light pointer is updated in response to the command reception, and the received effect control command is stored in the address indicated by the light pointer accordingly. The read pointer is updated when reading from the command reception buffer is performed (step S302). Therefore, if the read pointer is not the write pointer, the effect control command that has not been read is stored in the command reception buffer. Therefore, if the read pointer is not the write pointer, the process goes to step S302, and the effect control CPU 200 loads 1-byte command data from the address indicated by the read pointer in the command reception buffer. In this case, the read pointer is incremented for the next reading (loading).

  Actually, the determination of the presence or absence of the received command in step S122 in FIG. 16 can also be made based on whether or not the read pointer is equal to the write pointer. As an actual program, if the read pointer is equal to the write pointer at the time of first proceeding to the command check process, it may be determined that there is no received command in step S122 in FIG.

As described above, one presentation control command is formed of two bytes, one byte as a mode and one byte as an event. In step S303 in FIG. 18, the effect control CPU 200 confirms whether the loaded 1-byte command data is a mode or an event. This confirmation is performed by the value of Bit 7 out of 8 bits (Bit 0 to Bit 7).
If it is the mode, the process proceeds to step S304 as a process for receiving the upper data of the command, and the read command data is saved in the register “command HI byte”. Also, the “command LO byte” register is cleared. Then, the process returns to step S301.
Even if the read pointer is not equal to the write pointer, the effect control command that has not yet been read is stored in the command reception buffer, and the process proceeds to step S302, where the effect control CPU 200 uses the read pointer in the command reception buffer. Load 1 byte of command data from the indicated address. In addition, the read pointer is incremented.
If the read command is an event, the process proceeds from step S303 to S305 as processing for receiving lower-order data of the command, and the read command data is saved in the register “command LO byte”.

The command data of the mode and the event is saved in the registers “command HI byte” and “command LO byte”, so that the effect control CPU 200 takes in one command.
Therefore, the effect control CPU 200 performs processing according to the fetched command in step S306. A specific example will be described later with reference to FIG.

  The read pointer = write pointer is when the effect control command that has not yet been captured by the effect control CPU 200 does not exist in the command reception buffer. When the read pointer = write pointer is confirmed in step S301, the command analysis processing as step S123 in FIG.

An example of the command response process in step S306 will be described with reference to FIG.
FIG. 19A shows basic processing as command response processing. In response to the reception of the 2-byte production control command, the production control CPU 200 first checks in step S321 in FIG. 19A whether or not it is currently in the test mode. If it is in the test mode, all the production scenarios are cleared, the sound output is stopped, and the LEDs in the lamp units 63 and 64 are turned off in step S322. In step S323, the test mode ends.
These processes are not performed unless in the test mode.
Then, in step S330, the effect control CPU 200 performs processing for the acquired effect control command.

  As the effect control command, for example, a special symbol variation pattern designation command, a special symbol designation command, a holding ball subtraction command, a holding ball addition command, an error display designation command, a jackpot start designation command, etc. are variously set. In step S330, the effect control CPU 200 performs a process specified by the program in response to the received command. Here, four production control commands are given in FIGS. 19B to 19E to illustrate specific processing.

FIG. 19B shows a process S330a when a variation pattern command is fetched as the command process in step S330.
In this case, the effect control CPU 200 performs a process of setting a symbol command waiting state in step S331. This is because the effect control CPU 200 controls the variation display of the symbols by sequentially receiving the variation pattern command and the symbol commands.

FIG. 19C shows a process S330b in the case where a symbol designation command is fetched as the command process in step S330.
In this case, the effect control CPU 200 first confirms whether or not the variation pattern command has been received in step S332. If it has not been received, the process ends.
When the symbol designating command is received, if the variation pattern command has already been received, the process proceeds to step S333, and first, scenario registration for the operation of correcting the accessory origin is performed. In step S334, the symbol variation flag is set. The symbol variation flag is provided corresponding to each of the first special symbol, the second special symbol, and the normal symbol, and each flag represents a variation state. For example, a 1-bit special symbol variation flag FZ1, a second special symbol variation flag FZ2, and a normal symbol variation flag FZ3 each having 2 bits are prepared, and each of them indicates variation, stopping (winning), and stopping (disconnection). Here, as the fluctuation starts, the corresponding symbol fluctuation flag (any one of FZ1, FZ2, and FZ3) is set to a value indicating “in fluctuation”.
In the case of winning, the symbol variation flag is set to a value indicating “stopped (winning)” for a predetermined time at the end of symbol variation, and then a value indicating “stopped (out)” until symbol variation is started. Set to
In step S335, the effect control CPU 200 performs variation start processing. Thereafter, the change pattern command is deleted in step S336 in response to the start of change.

FIG. 19D shows a process S330c when a power-on command is fetched as the command process in step S330.
In this case, the effect control CPU 200 clears the effect control RAM 202 in step S337. For example, the command reception / transmission buffer and the contents of the input information buffer for the operation unit 60 and the checksum storage area are cleared.
Then, in step S338, an error release command is transmitted, in step S339 the accessory error information is cleared, in step S340, the accessory operation is stopped, in step S341, a power-on scenario is registered, and in step S342, the power is transmitted to the liquid crystal control board 52. Perform a set of commands sequentially.

FIG. 19E shows a process S330d when the RAM clear command is fetched as the command process in step S330.
In this case, the effect control CPU 200 clears the effect control RAM 202 in step S343. For example, the command reception / transmission buffer and the contents of the input information buffer for the operation unit 60 and the checksum storage area are cleared.
In step S344, an error cancel command is transmitted, and in step S345, a RAM clear error set and an error notification timer are set. In step S346, information related to the lottery process in the effect control RAM 202 is cleared. In step S347, information related to the scenario is cleared. In step S348, an initial power-on display (RAM clear) command to be transmitted to the liquid crystal control board 52 is set.

The processing according to command reception has been described above.
The processing of steps S122 to S124 in FIG. 16 as processing in response to the above command reception is started only during the period of V blank interrupt counter = 0.

Subsequently, the effect control CPU 200 checks the scheduler update flag in step S130 of FIG. 16 and branches the process. Here, only when the scheduler update flag is off, the processes of steps S131 to S134 are performed.
In step S131, the frame update flag is turned on.
Since the scheduler update flag is turned off in step S106 immediately after the start of the frame, the processing in steps S131 to S134 is performed when the processing proceeds to step S130 for the first time in the current frame period. Further, since the scheduler update flag is turned off in step S124, the processes in steps S131 to S134 are performed even when a command is received.

The effect control CPU 200 performs processing as scenario scheduler execution in step S132. This is a scenario registration information update process. For example, for the information registered in the scenario channel sCH, the processing corresponding to the registered data is executed for the information whose waiting time (delay) is 0. That is, processing corresponding to the scenario number designated in the main scenario table is performed. The main scenario execution line (mcIx), sub-scenario execution line (scIx), sub-scenario execution line lmp (lmpIx), etc. are also updated.
In step S133, the effect control CPU 200 performs sound scheduler execution and output processing. This is update processing of sound data registration information corresponding to the sound sub-scenario specified in the scenario table, and output processing of a sound control signal based on the sound data registration information. The effect control CPU 200 causes the sound controller 230 to execute sound output corresponding to the current scenario progress.

In step S134, the effect control CPU 200 performs lamp scheduler execution processing.
This is update processing of lamp data registration information corresponding to the lamp sub-scenario specified in the scenario table.
For example, the effect control CPU 200 performs the following processing for each of the lamp channels dwCH0 to dwCH15. First, the main scenario timer (msTm) and the time data (time) in the lamp sub-scenario table are compared. The time data (time) in the lamp sub-scenario table indicates the time (ms) at which the line (the line indicated by the sub-scenario execution line lmp (lmpIx)) is started. Therefore, if the time of the main scenario timer is equal to or greater than the time data (time), the process for that line is performed.
For example, first, it is determined whether or not the current line is a line in which the lamp scenario data end code D_LSEND is described. If it is not the line in which the lamp scenario data end code D_LSEND is described, the effect control CPU 200 acquires the lamp channel dwCH and the lamp number described in the line, and registers the lighting pattern number in the acquired lamp channel dwCH. .
Also, a registration lighting number (lmpNew) and an execution lighting number (lmpNo) are set in an area corresponding to the lamp channel dwCH. That is, the lamp number acquired from the relevant line in the lamp sub-scenario table is set in the registered lighting number (lmpNew), and “0” is set in the execution lighting number (lmpNo). Also, the value of the sub-scenario execution line lmp (lmpIx) is incremented by one. As described above, the lamp data registration information is updated to a state in which the lamp effect operation to be executed is registered.

  In step S134, the lamp data registration information is updated as described above. The lamp driving data creation and the lamp driving data output based on the updated lamp data registration information are performed in later steps S141 and S142.

In step S140, the effect control CPU 200 branches the process depending on the value of the V blank interrupt counter. If the V blank interrupt counter is “0”, the processes of steps S141 to S143 are executed, and if “1”, these processes are not executed.
In step S141, the effect control CPU 200 creates lamp drive data. That is, based on the information registered in each lamp channel dwCH of the lamp data registration information, the lamp drive data that is actually output from the serial output controller 240 to the frame driver unit 61 and the panel driver unit 62 is generated.
In step S142, the generated lamp driving data is transferred to the serial output controller 240 and controlled so as to be output as serial data.
In step S143, the effect control CPU 200 performs key event processing. Then, the process returns to step S101.
The process of creating and outputting the lamp driving data in steps S141 and S142 is started only when the V blank interrupt counter = 0. That is, these processes are started only in the first half of the frame.

After V blank interrupt counter = 2, that is, when the end of the frame period is detected, the effect control CPU 200 performs the process at the end of the frame from step S120 to S150.
Here, the effect control CPU 200 performs processing such as waiting for drawing completion, clearing the V blank interrupt counter, switching the display screen, waiting for completion of preloading, and starting drawing.

A specific example of the frame end process is shown in FIG.
In step S171, the effect control CPU 200 waits for completion of drawing. This waits for completion of drawing of an image to be displayed in the next frame period.
As described above, frame buffers 209A and 209B are prepared in the VRAM 209. During the frame period in which the display circuit 221 or the like reads and displays one display data, the display data of the next frame is stored in the other frame buffer. Drawing is performed. In step S171, it is confirmed that this drawing has been completed.

Normally, the display data of the next frame is designed to be drawn at the end of this frame period. The fact that the drawing has not been completed at this point is assumed to be a case where there is some trouble in the drawing process.
Therefore, when drawing completion waiting occurs, the waiting time may be counted, and depending on the waiting time, changes such as reducing the number of drawing accessed in one frame period may be performed.
Further, if the standby is somewhat (about 1 ms), the processing of the next frame is only slightly delayed, so that there may be no particular problem.
If the drawing does not end after a long time, the WDT circuit 210 resets the processing of the effect control CPU 200.

After confirming the completion of drawing, the effect control CPU 200 clears the V blank interrupt counter in step S172.
In step S173, the display screen is swapped. That is, for the frame buffers 209A and 209B, the frame buffer for reading display data is switched in the VRAM 209.
Although it is conceivable that the frame buffer is switched unconditionally because the V blank interrupt counter = 2, in the present embodiment, the frame buffer switching is performed after the drawing completion is confirmed in step S171. Is called. Therefore, the display data transferred to the display circuit 221 or the like is display data that has been correctly drawn. That is, if the drawing is not completed by the second time of the vertical synchronization signal, the display data of the frame buffer being drawn will not be displayed.

In step S174, the effect control CPU 200 confirms completion of preloading.
The preload is normally designed to end within one frame period, but is confirmed in step S174.
Even if the preload is somewhat delayed, since the output of the display data of the next frame is already started in step S173, it does not cause a big problem.
Thereafter, the display list preloaded in step S175 is written into the frame buffer opposite to the frame buffer switched to the display data reading target in step S173.

  When the above frame end processing is performed, the frame update flag is turned off in step S151 of FIG. 16, and the process returns to step S101. Then, as described above, processing for a new frame period is performed.

In addition to the process of FIG. 16 described above, the effect control CPU 200 executes the process of FIG. 20 as an interrupt process every 1 ms, for example. That is, the process of FIG. 20 is a process executed every 1 ms regardless of the frame timing of the display data.
The effect control CPU 200 performs a WDT pulse generation process in step S200. The WDT circuit 210 counts every 1 ms by this WDT pulse.
In step S201, the effect control CPU 200 performs sensor and solenoid sensor update processing. This is a process of detecting information of each sensor 68S as the origin switch 68 described above.

In step S202, the effect control CPU 200 performs device scheduler execution processing. Specifically, the motor data registration information is updated. In step S203, motor drive data output processing to the motor driver 70 is performed as device scheduler output processing.
That is, the effect control CPU 200 performs motor operation control every 1 ms, which is about 1/30 time interval compared to the frame period.

  Here, a motor operation table used for motor operation control according to the motor data registration information will be described. 21A to 21D illustrate four motor operation tables. Each motor operation table is numbered. For example, these are motor operation tables 1, 71, 72, x.

The motor operation table is a table in which one row (one control item) is composed of three contents of option (OPT), speed (SPEED), and step (STEP). Option (OPT) indicates a control type, speed (SPEED), and step (STEP) indicates an instruction value for the control content indicated by the control type.
With this structure, one row (one control item) is used as information defining one control process, and a series of operation patterns are designated in principle in such a manner that each row is processed sequentially.

As an option (OPT) indicating a control type, in this example, various operation types are defined as an operation system option indicating a control content of a motor operation and a non-operation system option indicating a control content not accompanied by a motor operation. .
In the case of the operation system option, the speed (SPEED) is an instruction value indicating the motor driving speed, and the step (STEP) is an instruction value indicating the motor operation range (the number of steps of the stepping motor).
On the other hand, in the case of a non-operating option, the speed (SPEED) is an instruction value that designates the next process, such as the next line to be moved (the number of progressing lines), the link destination, and the loop count. Step (STEP) is not usually used.
As described above, the speed (SPEED), which is an instruction value, is shared between the operation system option and the non-operation system option, but the meaning of the instruction content is different.

  Note that the execution step (step) of the motor data registration information in FIG. 12C is different from the step (STEP) of the motor operation table. The execution step (step) is a variable updated in the motor operation update process in step S202, and the step (STEP) of the motor operation table is information for designating the number of drive steps of the motor operation.

The operating system options are as follows. The “origin SW” is an origin switch 68 for detecting the position of the movable body accessory operated by each motor.
cw_all ・ ・ ・ Forward rotation: Operates when origin SW is on / off
cw_on ・ ・ ・ Forward rotation: Stop when origin SW is on, Operation when origin SW is off
cw_off ・ ・ ・ Forward rotation operation: Operation when origin SW is on, stop when origin SW is off
ccw_all ・ ・ ・ Reverse operation: Operates when origin SW is on / off
ccw_on ・ ・ ・ Reverse operation: Stop when origin SW is on, Operation when origin SW is off
ccw_off ・ ・ ・ Reverse operation: Operation when origin SW is on, stop when origin SW is off
stop ・ ・ ・ Stop operation (no excitation)
keep ・ ・ ・ Stop operation (excitation)
cw_on2 ・ ・ ・ Forward rotation: Stop when origin SW is on, Operation when origin SW is off
cw_off2 ・ ・ ・ Forward rotation: Operation when origin SW is on, stop when origin SW is off
ccw_on2 ・ ・ ・ Reverse operation: Stop when origin SW is on, Operation when origin SW is off
ccw_off2 ・ ・ ・ Reverse operation: Operation when origin SW is on, stop when origin SW is off
cw_btn ・ ・ ・ Forward operation: Operation when the button is pressed, Stop when not pressed
ccw_btn ・ ・ ・ Reverse operation: Operation when the button is pressed, Stop when not pressed

Non-operational options include the following.
sys_ck1 ... Origin SW off: Move to the next line, Origin SW on: Move the specified number of lines (SPEED value)
sys_ck2 ... Origin SW off: Moves the specified number of lines (SPEED value), Origin SW on: Moves to the next line
sys_ck3: Origin SW off: Move to the next line, Origin SW on: Move the specified number of lines (SPEED value)
sys_ck4: Origin SW off: Moves the specified number of lines (SPEED value), Origin SW on: Moves to the next line
roop_s ・ ・ ・ Loop start point: Loop count = SPEED value
roop_e ・ ・ ・ Loop end point
link ... Link command: The link destination is the motor operation table with the number indicated in the SPEED value.
err_cnt: Error counter + 1
sys_err ・ ・ ・ No error command
sys_erc ・ ・ ・ There is an error command
nor_end ・ ・ ・ Normal end: No origin check
chk_end ・ ・ ・ End of check: Origin check is performed.

Each motor operation table as shown in FIG. 21 defines an operation pattern.
For example, in the motor operation table 1 of FIG. 21A, an operation pattern as an initial operation process is defined. This operation pattern is as follows.
In sys_ck1 (system check 1) on the first line, it is checked whether it is within the origin.
If it is within the origin, it shifts to a link (link command) of “7” destination specified by the speed (SPEED: the number of progressing lines in this case).
If it is outside the origin, the process proceeds to the second line, which is the next line. The second line is moved toward the origin by ccw_on (reverse operation). Here, by “6” designated by the speed (SPEED), one-step driving is performed “8” times indicated by the step (STEP) at 6 count intervals of the operation count (lcnt) (see FIG. 16C). Since the operation count (lcnt) is updated every 1 ms, the operation in the second row is that the stepping motor is driven to return to the origin by 8 steps at a speed of 1 step in 6 ms. Become.
Therefore, in the case of the operation system option, the time required for processing one line is SPEED × STEP × 1 ms.

  Next, it is moved toward the origin by ccw_on (reverse operation) in the third line. In the operation on the third row, the stepping motor is driven at a speed of one step every 3 ms by a number of steps twice the total number of steps. That is, the operation of returning to the origin is performed at a higher speed than the second line. Since ccw_on is stopped when the origin switch is turned on, the process on the third line ends when it is within the origin.

Since it should have returned to the origin by the above processing of the second line and the third line, it is checked whether or not it is within the origin by sys_ck1 (system check 1) on the fourth line.
If it is within the origin, the process shifts to ccw_all (reverse operation) on the sixth line of the “2” destination specified by the speed (SPEED: the number of progressing lines in this case).
If it is outside the origin, the process proceeds to the link (link command) on the fifth line, which is the next line. In the link (link command) on the fifth line, the motor operation table 71 (FIG. 21B) is designated, so the retry operation of the motor operation table 71 is executed. When the retry operation of the motor operation table 71 is normally completed (nor_end), the link (link command) on the fifth line is completed, and the process proceeds to the next sixth line.

In the sixth line, as the ccw_all (reverse operation), the stepping motor is driven to return toward the origin by 58 steps at a speed of 1 step (high speed) every 3 ms.
Further, in the next seventh line, similarly, as ccw_all (reverse operation), the stepping motor is driven to return toward the origin by 8 steps at a speed of 1 step (low speed) in 6 ms.
The sixth and seventh lines are further pushed in after confirming that they are within the origin, and this push-in action is performed in two stages from high speed to low speed.

When the origin is confirmed in the first line, or after the 6th and 7th lines are pushed in, the process proceeds to the link (link command) on the 8th line, and the speed (SPEED: link destination in this case) ) To move to the motor operation table 72 (FIG. 21C) designated.
In the motor operation table 72, an operation pattern as a reciprocal operation is defined. When this is normally completed (nor_end), the link (link command) on the eighth line of the motor operation table 1 is completed, and the next nine lines Go to the eyes. The ninth line is nor_end (normal end), and the initial operation process as the motor operation table 1 is ended here.

Here, the initial operation process as the motor operation table 1 has been described. However, each motor operation table specifies a necessary operation for each row as in this example, and the number of rows to be skipped according to circumstances, the link destination The operation pattern is defined as a structure in which the motor operation table number, the number of loops, etc. can be specified.
Although the explanation is omitted, the motor operation tables of FIGS. 21B, 21C, and 21D and many other motor operation tables not shown are also based on the option (OPT), speed (SPEED), and step (STEP) in each row. The operation is specified and a series of operation patterns is defined.
FIG. 21B is a motor operation pattern for a retry operation, FIG. 21C is a motor operation pattern for a reciprocating operation, and FIG. 21D is a motor operation for causing an accessory to perform an operation of “appearance → swing 10 times → return”. It is an example of the motor operation | movement table which each showed the operation | movement pattern.

  Regarding motor control, detailed motor operation is defined by such a motor operation table. In steps S202 and S203 in FIG. 20, registration of a sub-scenario in the motor data registration information in FIG. 12C and control according to the motor operation table specified in this sub-scenario are executed.

The effect control CPU 200 sets the motor operation table number described in the motor sub-scenario table in the motor registration information (work) for the motor data registration information shown in FIG. 12C, for example. In other words, in the motor data registration information, the execution operation number (no) and the registration operation number (noNew) are set in the motor channel mCHn corresponding to the motor MT (n) that is currently registered.
In this case, the motor operation table number described in the motor sub scenario table is written in the registered operation number (noNew). The execution operation number (no) is updated to the motor operation table number (operation pattern number) when it is actually executed. At this time, “0” is set.
As a result, the motor operation table number is registered in each motor channel mCH of the motor data registration information (work) according to the contents of the motor sub-scenario table.

After the motor operation table number is registered, the operation indicated in each row of the motor operation table of that number is sequentially designated as the operation to be controlled.
For example, the following processing is roughly performed for each of the motors MT (n) (n = 0 to 7) corresponding to the motor channels mCH0 to mCH7 of the motor data registration information.
In the following explanation, the data described in the option (OPT) of the motor operation table is “D_OPT”, the data described in the speed (SPEED) is “D_SPEED”, and the data described in the step (STEP) is “ D_STEP ”.

The production control CPU 200 first checks whether or not the execution operation number (no) and the registered operation number (noNew) in the target motor channel mCHn match, and if they do not match, the operation start is set to the motor channel mCHn. Clear the corresponding excitation output data, and substitute the value of the registered operation number (noNew) for the execution operation number (no).
In addition, the production control CPU 200 performs an operation count (lcnt), an operation line (ofset), an execution step (step), a loop start point (roopAddr), a loop count (roopCnt), a parent number (retNo), a return address of the motor channel mCHn. (RetAddr) and error counter (errCnt) are set to 0, respectively. Further, the value of “5A” indicating the parent is set in the attribute of the parent (migration source) / child (migration destination).
The above is processing when control based on the registered motor operation table is started.

Thereafter, the following processing is performed.
The effect control CPU 200 acquires data of the motor operation table corresponding to the motor MT (n), the execution operation number (no), and the operation line (ofset).
That is, data “D_OPT”, “D_SPEED”, and “D_STEP” in the row indicated by the operation line (ofset) in the motor operation table indicated by the execution operation number (no) are acquired. Since the operation line (ofset) is initially set to 0, data “D_OPT”, “D_SPEED”, and “D_STEP” in the first row of the designated motor operation table are acquired. For example, if the execution operation number (no) is set to 72, “cw_off”, “6”, and “8” in the first row of the motor operation table 72 in FIG. 21C are acquired as “D_OPT”, “D_SPEED”, and “D_STEP”. become.

Then, the effect control CPU 200 confirms whether the data “D_OPT” is data of an operation system option or data of a non-operation system option.
If the data is for a non-operational option, processing is performed according to the non-operational option. For example, the processing specified by “sys_ck1”, “roop_s”, etc. is performed.

If it is data of an operation system option, a process with drive control is performed. For example, the value of the operation count (lcnt) is compared with the value of “D_SPEED” to determine whether or not it is the update timing of the excitation output data.
In the case of the operation system option, the value of “D_SPEED” indicates a one-step driving interval of the stepping motor. If “D_SPEED” = 6, one-step driving is performed once every six times. The operation count (lcnt) is a value that is incremented after being first set to “0” in step S1604, that is, incremented by 1 for each 1 ms timer interrupt process.
Therefore, when the operation count (lcnt) = “D_SPEED” −1, the excitation output data update timing is reached.

If it is not the update timing of the excitation output data, the operation count (lcnt) is incremented, the processing of the current motor channel mCHn is finished, and the processing of the next motor channel mCH is started.
If it is the update timing of the excitation output data, the effect control CPU 200 increments the execution step (step) by 1 on the motor data registration information. The execution step (step) is a variable for counting whether or not the number of steps indicated by “D_STEP” acquired from the motor operation table has been reached. Then, processing corresponding to the operation system option indicated by “D_OPT”, for example, processing for operations indicated as “cw_all”, “cw_on”...

The above is an outline of the process, but as the device scheduler execution process in step S202 of FIG. 20, the motor data registration information is updated so as to indicate the contents to be sequentially executed as described above. That is, the contents of the line (operation line) to be executed every 1 ms are specified for the motor operation table registered in the motor data registration information.
In step S203, the effect control CPU 200 generates motor drive data corresponding to the contents of the designated motor operation table row for each motor channel mCHn, and controls the motor output data to be output from the serial output controller 240.

In step S204 of FIG. 20, the effect control CPU 200 performs key input processing. That is, a signal corresponding to the operation of the effect buttons 11 and 12, the cross key 13 and the like is confirmed.
4 and 8, the detection information of the sensor 68s and the operation information of the effect buttons 11, 12 and the cross key 13 can be detected as serial input data. Therefore, the key input process may be confirmed simultaneously with the detection information of the sensor 68s in step S201. Thereby, the detection process can be made efficient.

The processing examples of the effect control CPU 200 have been described so far. In the above processing examples, the effect control CPU 200 performs various processes according to the frame of the display data.
FIG. 22 shows various timings for each frame period of the display data.
Each frame of the display data is referred to as frames FR0, FR1, FR2,. For example, the frame FR0 is displayed at time points T0 to T1, and the frame FR1 is displayed at time points T1 to T2.
Since the value of the V blank interrupt counter is cleared in step S150 of FIG. 16 (S172 of FIG. 17), as shown in the figure, “0” at the frame start time, and at a frame intermediate time (time T0m, T1m, etc.). Cleared immediately after “1” and “2”.

The drawing process by the drawing circuit 225 is executed for the display data of the next frame within the frame period. For example, the drawing of the display data of the frame FR1 is executed within the time point T0 to T1, which is the display period of the frame FR0. Specifically, since drawing is started in step S150, drawing for the next frame is started at the beginning of the frame. This drawing is usually completed within a frame period.
If, for example, the drawing started at time T0 is not completed at time T1, completion is waited at step S171 in FIG.

Preloading by the preloader 220 is executed in a period one frame before as preparation for drawing. For example, preloading for rendering the display data of the frame FR2 is executed within a time point T0 to T1 that is a display period of the frame FR0. Specifically, since the process starts in step S103, preloading for the next two frames starts at the beginning of the frame. Preloading is usually completed within a frame period.
For example, if the preload started at time T0 is not completed at time T1, completion is waited at step S174 in FIG. If the preload is somewhat delayed, the start of drawing will be somewhat delayed.

As processing of the effect control CPU 200, steps S150, S151, S101, and S103 are performed at each frame start timing SLs. As shown in FIG. 22, the main processing is control of switching frame buffers 209A and 209B, starting drawing, creating a display list, and starting preloading.
Here, during the frame period indicated by the arrow SL, the processes of steps S121 to S143 are repeated.
However, the received command processing (S122 to S124) is executed only during the first half of the frame indicated by the arrow CA. This is because these are executed only when the V blank interrupt counter = 0.
The received command analysis processing is as shown in FIGS. 18 and 19, which is a processing with a relatively heavy processing load, and the processing increases depending on the number of received commands. Depending on the type of command, it may be necessary to perform a lottery or the like for production. In the present embodiment, such processing is performed only during the first half of the frame.
For this reason, with respect to the command signal, for example, for the command signal received in the period indicated by the broken line as time points T0m to T1m, the command analysis is performed in the period of time points T1 to T1m.

The ramp data creation / output process (S141 to S143) is also executed only during the first half frame period indicated by the arrow CA. This is because these are also executed only when the V blank interrupt counter = 0.
This prevents the frame end process (S150) from being delayed with respect to the frame end timing due to the creation and output of the lamp drive data.
It is assumed that the lamp drive data output in step S142 is not performed in the second half period of the frame, so that it is assumed that the lamp drive data is not output from the serial output controller 240. Since the immediately preceding lamp driving data is maintained, the immediately preceding light emission operation is executed.

<7. Processing of production control unit of second embodiment>
The processing of the effect control CPU 200 of the second embodiment is shown in FIG. This is an example in which the lamp drive data output control in step S142 in FIG. 16 is changed to be performed at the timing shown as step S144. That is, the output of the lamp driving data is an example of processing to be executed regardless of the first half / second half of the frame.
However, since the creation of the lamp driving data in step S141 is not performed in the second half of the frame, the lamp driving data created in the first half of the immediately preceding frame is repeatedly output in the second half of the frame.
The other processes in the second embodiment are the same as those described with reference to FIGS.

<8. Processing of the production control unit of the third embodiment>
FIG. 24 shows the processing of the effect control CPU 200 of the third embodiment.
After the power is turned on, the effect control CPU 200 performs various initial settings in step S300, and then repeats the processes in and after step S301.

In step S302, the effect control CPU 200 initializes the image processing relationship. This initialization refers to initialization processing of various variables of frame start timing.
In step S302, the effect control CPU 200 performs command analysis processing. For example, the process is specifically described with reference to FIGS.
In step S303, the effect control CPU 200 performs scenario management processing. This scenario management process indicates the process of steps S104 and S132 in FIG.
In step S304, the effect control CPU 200 performs a drawing update process. This is control of display list creation and preload execution start in step S103 of FIG.

In step S305, the effect control CPU 200 performs sound management processing. This sound management process is the same as the process in step S133 of FIG.
In step S306, drawing completion waiting and preload completion waiting are performed. The waiting for the completion of drawing means waiting for the completion of drawing of the display data of the next frame, which was started in the immediately preceding step S312. The waiting for completion of preloading means waiting for completion of preloading for drawing the next two frames started in the immediately preceding step S304.

  The effect control CPU 200 proceeds from step S307 to step S312 only for the first time when the power is turned on, and starts drawing the first frame. Thereafter, the process proceeds from step S307 to S308.

In step S308, the effect control CPU 200 branches the process depending on the value of the V blank interrupt counter. If the V blank interrupt counter is “0”, in step S309 , creation of lamp drive data and output control are performed. That is, based on the information registered in each lamp channel dwCH of the lamp data registration information, the lamp drive data that is actually output from the serial output controller 240 to the frame driver unit 61 and the panel driver unit 62 is generated.
Then, the generated lamp driving data is transferred to the serial output controller 240 and controlled so as to be output as serial data.

  When V blank interrupt counter = 1, step S309 is not performed. That is, the process of generating and outputting the lamp driving data in step S309 is performed only during the first half of the frame in which V blank interrupt counter = 0.

  In step S310, the process waits for V blank interrupt counter = 2. When the V blank interrupt counter = 2, the frame buffer is switched and the V blank interrupt counter is cleared in step S311, and the drawing start control is performed in step S312. Then, the process returns to step S301.

The above processing of FIG. 24 is different from the processing of FIG. 16 in the following points.
The command analysis process is performed once immediately after the start of the frame (S302).
Sound management (S305) is performed immediately after scenario management.
As scenario management, the scheduler frame update and scenario scheduler execution processing of FIG. 16 are performed once in a lump.
After waiting for the completion of drawing and preloading (S306), ramp data creation / output (S309) is performed.
Since the process waits until the end of the frame period (S310), steps S301 to S312 are performed once per frame period. Therefore, sound data output (S305) and ramp data creation / output (S309) are performed once per frame.

As described above, the processing is simpler than that of the first and second embodiments, and the processing load of the effect control CPU 200 is reduced.
The motor control is performed, for example, by an interrupt process every 1 ms as shown in FIG.

Various timings for each frame period of the third embodiment are shown in FIG. The notation format is the same as in FIG.
The display frame, V blank interrupt counter value, drawing circuit drawing, and preloader preload processing timing are the same as those in FIG.

  As the processing of the effect control CPU 200, steps S311, S312, and S301 to S310 are sequentially performed during the frame period indicated by the arrow SL immediately after each frame start timing SLs. As shown in FIG. 22, the main processes are switching of frame buffers 209A and 209B, drawing start, command analysis processing, scenario management, display list creation, preload start, sound management, ramp data creation / output control in sequence. It is performed once within the frame period.

However, the ramp data creation / output is not executed unless it is started within the first half period of the frame indicated by the arrow CA.
This prevents the frame end processing (S311 and S312) from being delayed with respect to the frame end timing due to the creation and output of the lamp drive data.
It is assumed that the lamp drive data output in step S309 is not performed in the latter half of the frame, so that it is assumed that the lamp drive data is not output from the serial output controller 240. Since the lamp drive data of the immediately preceding frame is maintained, the immediately preceding light emission operation is continuously executed.

In this case, the command analysis process (S302) is executed only once immediately after the start of the frame. The received command analysis process is a process with a relatively heavy processing load as described above. In the present embodiment, this process is performed once immediately after the start of the frame, so that the series of processes in FIG. 24 can be completed by the end of the frame period unless a special abnormality occurs. .
For this reason, with respect to the command signal, for example, for the command signal received during the period indicated by the broken line as the time points T1 to T2, the command analysis is performed immediately after the time point T2.

<9. Summary and Modification>
According to the pachinko gaming machine 1 according to the above-described embodiment, the processing for effect control can be made more efficient, and appropriate effect control can be realized.
Moreover, the production control processing load can be reduced.

In addition, the pachinko gaming machine 1 according to the embodiment includes display means (for example, a main liquid crystal display device 32M and a sub liquid crystal display device 32S) for displaying effect images, and light emitting means (for example, lamp units 63 and 64) for performing a light emitting operation. , At least control means for controlling the light emission of the light emitting means (eg, the effect control unit 51). Then, the control means performs all or part of the processing for light emission control of the light emitting means on the frame front end side until a predetermined time elapses from the frame start timing within one frame period of the image displayed on the display means. The period starts if it is a period, and does not start in the frame end period, which is a period after the passage of a predetermined time.
The frame end side period is a period from the start of the frame within a frame period to the timing at which the frame ends after a predetermined time has elapsed. For example, it is the latter half period when one frame period is divided into the first half and the second half. In the present embodiment, all or part of the processing for light emission control is skipped in this frame end side period.
For example, in the case of the first embodiment, the process of generating the lamp driving data and outputting the lamp driving data in steps S141 and S142 in FIG. 16 is not started in the frame end side period.
In the case of the second embodiment, the lamp drive data creation process in step S141 of FIG. 23 is not started in the frame end side period.
In the case of the third embodiment, the lamp drive data creation and lamp drive data output processes in step S309 in FIG. 24 are not started in the frame end side period.
As a result, it is possible to prevent the control for various effects and the like performed together with the image display of the display means from being in time for the next frame. Therefore, when the frame start timing is detected and various effect controls are performed in accordance with the frame period, it is possible to provide a processing procedure that does not increase the processing load of the effect control unit 51 (particularly the one-chip microcomputer 250).
Then, it is possible to avoid a delay in effect control in accordance with the frame timing of the display image, and realize an appropriate effect operation.
In particular, in the embodiment, the control means (production control unit 51) also controls the display means. In this case, by adjusting the processing for the light emission effect to the display control (that is, the frame period), it is possible to improve the processing efficiency, simplify the timing control and the register configuration therefor, etc. It is also assumed that the processing such as the light emission effect performed in such a manner does not end within the frame period, thereby delaying the processing. Therefore, the occurrence of such a situation can be eliminated by not performing the light emission control in the frame end side period.
Note that the entire light emission effect is skipped in the second half of the frame because the LED light emission operation remains the previous light emission operation during the period of 16.6 ms without significant influence. In contrast to the control of the light emission effect, it is also meaningful to realize the appropriate effect that the sound effect and the movable effect effect are not skipped even in the latter half of the frame period. In other words, skipping all part of the light emission effect in the second half of the frame and not skipping the sound effect process in step S133 and the motor control (movable body effect effect process) in steps S202 and S203 This is effective in that the processing delay until the end timing can be eliminated.

In the first, second, and third embodiments, the light emission drive data creation process (S141, S309) is performed as part of the process for the light emission control that the effect control unit 51 does not start in the frame end side period. Including.
As control for the light emission effect, effect scenario management, progression (update) of effect contents according to the effect scenario, acquisition of control data according to the effect contents to be executed, generation of drive data for the control, drive data Output. Of these, at least light emission drive data (lamp drive data) is not generated during the frame end period.
By not creating the light emission drive data, the processing load in the second half of the frame is reduced, and it is prevented that the frame switching timing is not met. As a result, there is no problem in effect control at the frame timing.
The light emission drive data may be output. In this case, lighting is performed according to the previous drive data. However, as described above, no problem occurs in actual operation.

Further, in the first and third embodiments, the serial transmission process (S142, S309) of the light emission drive data is included as part of the process for the light emission control that the effect control unit 51 does not start in the frame end side period. That is, in the control for the light emission effect, at least light emission drive data output, particularly serial output, is not executed during the frame end side period.
The serial transmission output of the light emission drive data is a process that requires a relatively long time, and if executed in the latter half of the frame, there is a high possibility that it will not be completed by the frame switching timing. Therefore, by not executing this in the frame end side period, it is possible to prevent the situation from becoming in time for the next frame.

  In the first, second and third embodiments, the effect control unit 51 starts (ends) a frame by a V blank interrupt counter which counts based on a V blank signal which is a frame synchronization signal of a displayed image. ) The timing and the start timing of the frame end side period are detected (S120, S140). Thereby, timing management can be facilitated.

By the way, as a modification of the first and second embodiments, step S134 may also be performed only when V blank interrupt counter = 0 in step S140. That is, the scenario update (update of lamp data registration information) is not performed during the latter half of the frame. That is, all the processes for light emission control (S134, S141, S142) are not performed in the latter half of the frame. Note that “all” means all processes related only to lamp control.
By doing in this way, the effect which reduces the processing burden of the above-mentioned frame second half can be exhibited more. Particularly in the case of the embodiment, the scenario timer is advanced as the scenario scheduler frame update in step S104. In other words, the scenario always proceeds one timing per frame. Accordingly, the progress of the scenario of the lamp effect is ensured, and even if the step S134 is not executed, the scenario does not progress and the appropriate effect cannot be performed.
Even during the period in which steps S134, S141, and S142 are not performed, the LED driver 90 drives the LED 120 with the previous light emission drive data, so that the player is not in a light emitting state that is uncomfortable.
Of course, also in the first and second embodiments, the scenario timer is advanced in step S104. Therefore, the scenario always advances by one timing every frame, and the progression of the lamp effect scenario is ensured. For this reason, the progress of the scenario is not delayed.

The pachinko gaming machine 1 according to the embodiment includes a plurality of effect means including display means (a main liquid crystal display device 32M and a sub liquid crystal display device 32S) for displaying effect images. That is, there are also rendering means such as the lamp parts 63 and 64, a movable body accessory and a sound output system. The control means (production control unit 51) detects the frame start timing of the image displayed on the display means, and the received command analysis process (S123) is performed within a frame period from the frame start timing. It starts only in the frame front end side period until it elapses.
The frame front end side period is a period until a predetermined time elapses from the frame start time within the frame period. For example, it is the first half period when one frame period is divided into the first half and the second half.
The received command will be analyzed and the content of the presentation will be determined by the result of the analysis. The analysis of this command starts only during the frame front end period, and after a predetermined time has elapsed from the start of the frame. The analysis process is not started.
As a result, it is possible to prevent the control for various effects and the like performed together with the image display of the display means from being in time for the next frame. The analysis process is a process with a relatively large burden, such as grasping the contents of the received command and including a corresponding process according to the contents of the command. Therefore, this command analysis is started only in the frame front end side period in time for the next frame start timing.
Accordingly, it is possible to provide a processing procedure that does not increase the processing load when detecting the frame start timing and performing various effects control in frame synchronization.
In particular, when the effect control unit 51 also controls the display means, display control of processing for the light emission effect, that is, frame synchronization, can improve processing efficiency, simplify timing control and register configuration therefor, and the like. However, it may be assumed that the received command analysis process does not end within the frame period, thereby delaying the process. Therefore, by limiting the period for starting the command analysis process to the frame front end side period, it is possible to avoid a situation in which the process is delayed.

  In the first and second embodiments, the effect control unit 51 uses the V blank interrupt counter that counts based on the V blank signal that is the frame synchronization signal of the image displayed on the display means to start the frame start timing. And the end timing of the frame front end side period is detected (S121). Thereby, timing management can be facilitated.

In the third embodiment, the control means (production control unit 51) detects the frame start timing of the image displayed on the display means, and the analysis processing of the received command is performed within one frame period. The process is executed once in response to detection of the start timing (S302).
As a result, the command analysis process is started immediately after the start timing of the frame. Since it is performed only once, the command analysis process usually does not start in the second half of the frame period. Therefore, it is possible to prevent the processing from being in time for the frame end timing by the heavy command analysis processing.

As can be understood from the above, in the processing and modification examples of FIGS. 16 and 23 of the first and second embodiments, the received command analysis processing (S123) is started in the frame end side period. In addition, all or part of the process for controlling light emission is not started.
Thereby, the processing amount of the effect control unit 51 in the frame rear end side period is further reduced, and the effect of preventing the control for various effects performed together with the image display of the display unit from being in time for the next frame is further improved. Can be increased.

The pachinko gaming machine 1 according to the embodiment includes a plurality of effect means including display means for displaying effect images, a movable body driven by a motor, and light emission means. Moreover, the control means (effect control part 51 or effect control CPU200) which controls operation | movement of an effect means according to the received command is provided.
The effect control CPU 200 executes drive control relating to the light emitting means as one of the first processes performed in accordance with the frame timing of the display data displayed on the display means. The process performed in accordance with the frame timing is a process that proceeds with a process corresponding to the frame period, for example, a process in which various process timings are defined by monitoring the frame timing. That is, the first process in the embodiment is the main process of FIG. 16 in which the execution timing is defined by the frame timing.
On the other hand, the drive control of the motor related to the movable body is executed as one of the second processes executed at a predetermined interval shorter than the frame period regardless of the frame timing. The second process is the timer interrupt process of FIG.
As a result, the lighting effect can be realized in accordance with the frame of the display data. On the other hand, the motor control of the movable body accessory can be performed at a shorter time interval regardless of the frame timing, thereby enabling a fine accessory operation. It becomes.
The ramp control (and sound control) is output at each frame timing, so that the processing load is not excessive. On the other hand, it is possible to avoid the motor operation being delayed by performing the motor processing at a cycle shorter than the frame timing.

In the embodiment, display control means (functional part as VDP) for controlling the display means based on a drawing instruction from the control means (effect control CPU 200) is provided. The frame timing is a timing based on a frame synchronization signal output from the display control means.
By checking the frame timing based on the frame synchronization signal, timing control is facilitated.

  In addition, the effect control unit 51 executes detection of information on the origin switch of the motor as one of the second processes in step S201 in FIG. That is, the detection of the origin switch information is combined with the motor drive control so that the motor control of the movable body accessory can be appropriately executed. In this case, by performing origin sensing at the same 1 ms cycle as the device scheduler execution process in step S202, it is possible to facilitate the control of the movable body accessory operation (scenario progression, etc.).

In addition, the effect control unit 51 also detects the operation information of the user operation means for the effect as one of the second processes in step S204 of FIG. As a result, the operation information can be detected precisely.
As described above, the one-chip microcomputer 250 can collectively detect user operation information detection and origin sensing as inputs from the parallel / serial converter 260 in FIG. Therefore, by performing the processing in step S204 and the processing in step S201 at the same time, it is possible to detect external information more efficiently.

In the first and second embodiments, the control means (production control unit 51) includes the first area for reading the display data of the image displayed on the display means for the plurality of frame buffers 209A and 209B, and the next. The allocation as the second area for drawing the display data of the frames is sequentially switched. At this time, in the embodiment, at the end of one frame period of the image displayed on the display means (S150), rendering of the display data of the image of the next frame in the frame buffer area as the second area is completed. (Step S171 in FIG. 17), after confirming the completion of drawing, the first area and the second area are switched (S173), and drawing using the frame buffer area switched to the second area is started (S175). ).
By thus confirming the completion of drawing and switching the frame buffer area of the VRAM 209, the influence on the display image can be minimized. That is, the display data transferred to the display circuit 221 or the like is display data that has been correctly drawn, and if the drawing is not completed by the second time of the vertical synchronization signal, the display data of the frame buffer being drawn is displayed. This does not happen.
In addition, an image display effect based on appropriate display data output can be realized even in a situation in which a plurality of effect means including a display means for displaying an effect image is controlled, which causes a relatively high processing load.

In the first and second embodiments, the control means (production control unit 51) assigns the plurality of frame buffers 209A and 209B as the first area and the second area according to the end of one frame period. with switch (S173), and checks whether preloaded to a predetermined storage area of the image data material for drawing stored in the CG-ROM206 (D-RAM202a or VRAM209) has been completed (S174), After the completion of the preload is confirmed, drawing using the frame buffer area set as the second area by switching is started (S175).
As described above, the reference destination of the display list image data (CG data as the image material) is not the CG-ROM 206 but the preload area set in the D-RAM 202a or the VRAM 209, so that the drawing circuit 225 performs drawing. Random access to image data that occurs during execution can be speeded up, and high-resolution moving images with intense movement can be used for drawing processing. That is, by starting drawing after confirming completion of preloading, it is possible to maintain a state in which drawing having such superiority can be reliably executed. Accordingly, the drawing process using the preloaded image material is appropriately executed. In particular, it is effective to perform drawing after waiting for completion of preloading as processing of the one-chip microcomputer 250 that tends to increase the processing load.

The gaming machine according to the embodiment includes a first effect means that is a display means (a main liquid crystal display device 32M and a sub liquid crystal display device 32S) for displaying effect images, and a movable object role driven by a movable object accessory motor 65. 2nd effect means and 3rd effect means which are things are provided. The third effect means is a sound output system (amplifier section 67, speaker 25) and lamp sections 63 and 64.
In the first and second embodiments, the control means (effect control unit 51) controls the third effect means (S133 in FIGS. 16 and 23) by the frame period of the display data displayed by the display means. Running. That is, it is basically performed once per frame.
On the other hand, the drive control of the movable body accessory motor 65 relating to the movable body of the second effect means is executed at 1 ms intervals shorter than the frame period regardless of the frame timing (S202 and S203 in FIG. 20).
Thereby, the control of the third effect means can be realized in accordance with the frame of the display data, while the movable body accessory motor can be controlled more finely.
For example, in sound control, the processing load does not become excessive by setting the output for each frame timing. On the other hand, it is possible to avoid the motor operation being delayed by performing the motor processing at a cycle shorter than the frame timing. Therefore, a fine movable body accessory operation is possible.

In addition, when the reception command is acquired, the effect control unit 51 further executes control related to the third effect means regardless of the frame period. That is, when there is a reception command in FIGS. 16 and 23, the scheduler update flag is turned off in step S124, so that steps S132, S133, and S134 are performed.
Thereby, the effect according to command acquisition can be performed rapidly.

In the first and second embodiments, the scenario is not updated (frame update flag is OFF) at the timing when the display frame of the image is detected, which is detected by a display synchronization signal (V blank signal or the like) (S151). In response to this unupdated state, at least the timer of the scenario is updated (S102 → S103 → S104).
Therefore, in the processing of the effect control CPU 200, the scenario progress management can be performed at the optimum timing in relation to the frame timing of the display data.

In the first and second embodiments, scenario scheduler frame update / non-update is managed by the first information (frame update flag), and execution / non-execution of scenario update (scheduler execution) is managed by the second information (scheduler). Update flag) (S105, S106, S130, S151).
The frame update flag is turned off (not updated) based on the frame synchronization signal (V blank signal). The scheduler update flag is turned off (unexecuted) according to the scheduler frame update, and then the state is confirmed according to the frame synchronization signal. If it is off (unexecuted), the scenario update is executed.
As a result, scenario timer progress and scenario update are managed to be performed at different timings, and execution once per frame can be managed by simple processing.

In the first and second embodiments, the scenario update information (scheduler update flag) is turned on together with the scenario update execution (S132) (S131). After turning ON, the scenario update (S131 to S134) is not performed even during the frame period (regardless of the value of the V blank interrupt counter). The scheduler update flag is returned to OFF at the beginning of the next frame period (S106).
However, if a command is received, it is immediately turned off (S124), and scenario update is executed.
Depending on such processes, the main process of the effect control CPU 200 can update the scenario appropriately once in the frame without updating the scenario unnecessarily, and easily ensure the synchronism between the display and other effects. it can.
On the other hand, by executing the scenario update immediately according to the command analysis, it is possible to quickly respond to the command regardless of the progress of the display frame.

Although the embodiment has been described above, the present invention is not limited to the example given in the embodiment, and various modifications and application examples are conceivable.
The example of managing the timing based on the V blank signal as a signal synchronized with the frame of the display data has been described. However, the timing management within the frame period is performed by using a vertical synchronizing signal other than the V blank signal or counting the horizontal synchronizing signal. May be performed. For example, it is also conceivable to use a vertical synchronization signal or a horizontal synchronization signal for timing management as the above-mentioned frame front end side period and frame rear end side period.
The frame front end side period is not necessarily the 16.6 ms period of the first half of the frame. A period from the frame start timing to a certain point in the middle of the frame period may be used.
Similarly, the frame rear end side period is not necessarily the 16.6 ms period of the second half of the frame. Any period from a certain point in the middle of the frame to the end of the frame may be used.

  Moreover, although the present invention has been shown as being applied to a ball game machine such as the pachinko gaming machine 1, it can also be applied to a spinning-type game machine (so-called slot machine).

1 Pachinko machine 20w, 20b Light emitting unit 32M Main liquid crystal display device 32S Sub liquid crystal display device 50 Main control board (main control unit)
51 Production control board (production control unit)
61 Frame driver unit 62 Panel driver unit 63, 64 Light emitting unit 65 Movable body accessory motor 90 LED driver 200 Production control CPU
201 Production control ROM
202 Production control RAM
250 microcomputer

Claims (2)

A plurality of effect means including display means for displaying effect images;
Control means for controlling the operation of the effect means according to the received command;
With
The control means includes
An image control process for displaying the effect image is performed within one frame period of the image displayed by the display means, and then an analysis process of the received command is performed.
The analysis process is started only in a frame front end side period from a frame start timing until a predetermined time elapses within one frame period of an image displayed on the display means. The gaming machine according to claim 1, wherein the control unit detects a frame start timing and an end timing of the frame front end side period by a counter that performs counting based on a frame synchronization signal of an image displayed on the display unit.

Images