JP6230286B2 - Electronic device and method for manufacturing electronic device - Google Patents

Electronic device and method for manufacturing electronic device Download PDF

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JP6230286B2
JP6230286B2 JP2013125674A JP2013125674A JP6230286B2 JP 6230286 B2 JP6230286 B2 JP 6230286B2 JP 2013125674 A JP2013125674 A JP 2013125674A JP 2013125674 A JP2013125674 A JP 2013125674A JP 6230286 B2 JP6230286 B2 JP 6230286B2
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bonding
lid
film
recess
electronic device
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JP2014060699A (en
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吉田　宜史
宜史 吉田
賢志 唐澤
賢志 唐澤
剛 杉山
剛 杉山
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Seiko Instruments Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Description

本発明は、パッケージに電子素子を収納する電子デバイス及び電子デバイスの製造方法に関する。   The present invention relates to an electronic device that houses an electronic element in a package and a method for manufacturing the electronic device.

従来から、携帯電話や携帯情報端末機には表面実装型の電子デバイスが多く用いられている。このうち、水晶振動子やＭＥＭＳ、ジャイロ、加速度センサ等は、パッケージの内部に中空のキャビティが形成され、このキャビティに水晶振動子やＭＥＭＳ等の電子素子が封入されている。パッケージとしてガラス材料が用いられる。例えばガラス基板に電子素子が実装され、その上にガラス蓋が陽極接合により接合されて電子素子が密封される。ガラスどうしの陽極接合は気密性が高くしかも安価であるという利点がある。   2. Description of the Related Art Conventionally, surface-mounted electronic devices are often used for mobile phones and portable information terminals. Among these, a quartz resonator, a MEMS, a gyro, an acceleration sensor, and the like have a hollow cavity formed inside a package, and an electronic element such as a quartz resonator or MEMS is enclosed in the cavity. A glass material is used as the package. For example, an electronic element is mounted on a glass substrate, and a glass lid is bonded thereon by anodic bonding to seal the electronic element. Anodic bonding between glasses has the advantage of being highly airtight and inexpensive.

図６は、この種の電子デバイスの断面図である（特許文献１の図５）。圧電振動子１００は、ガラスからなる基板体１１０と、ガラスからなる蓋体１３０と、基板体１１０と蓋体１３０の凹部１３３との間に形成されるキャビティに収納される圧電振動素子１２０から構成される。基板体１１０には水晶片からなる圧電振動素子１２０が片持ち状に実装される。蓋体１３０には凹部１３３が形成され、この凹部１３３の周囲の上端面及び凹部１３３の内表面の全面にはアルミニウムからなる接合用金属膜１３４が形成される。基板体１１０には貫通電極が形成され、キャビティ側の表面に形成される配線とキャビティ側とは反対側の表面に形成される外部端子１１２とを電気的に接続する。蓋体１３０は基板体１１０に陽極接合により接合される。   FIG. 6 is a cross-sectional view of this type of electronic device (FIG. 5 of Patent Document 1). The piezoelectric vibrator 100 includes a substrate body 110 made of glass, a lid body 130 made of glass, and a piezoelectric vibration element 120 housed in a cavity formed between the substrate body 110 and the recess 133 of the lid body 130. Is done. A piezoelectric vibration element 120 made of a crystal piece is mounted on the substrate body 110 in a cantilever manner. A concave portion 133 is formed in the lid 130, and a bonding metal film 134 made of aluminum is formed on the upper end surface around the concave portion 133 and the entire inner surface of the concave portion 133. A through electrode is formed in the substrate body 110, and the wiring formed on the cavity side surface and the external terminal 112 formed on the surface opposite to the cavity side are electrically connected. The lid 130 is joined to the substrate body 110 by anodic bonding.

接合用金属膜１３４を蓋体１３０に設けるので基板体１１０のキャビティ側の配線とショートすることがなく、また、接合用金属膜１３４を蓋体１３０の凹部１３３の側の全面に、つまり凹部１３３の周囲の枠部の上端面及び凹部１３３の内表面に設けるので接合用金属膜１３４のパターニングが必要なく、容易に製造することができる。   Since the bonding metal film 134 is provided on the lid body 130, there is no short circuit with the wiring on the cavity side of the substrate body 110, and the bonding metal film 134 is formed on the entire surface of the lid body 130 on the concave portion 133 side, that is, the concave portion 133. Are provided on the upper end surface of the frame portion around the inner surface and the inner surface of the concave portion 133, so that the patterning of the bonding metal film 134 is not required, and can be easily manufactured.

特開２００９−１１１９３０号公報JP 2009-1111930 A

上記従来構造では、蓋体１３０に形成した接合用金属膜１３４の断面が外部に露出している。接合用金属膜１３４はアルミニウム膜からなり、その露出部は外気の水分等が付着して腐食する。腐食が進行するとアルミニウム膜は負に帯電する。すると、凹部１３３の内表面に形成されるアルミニウム膜にも負電荷が伝達され、ガラス内部からナトリウムイオンを引き寄せる。内表面のアルミニウム膜は、表面に付着する水分と引き寄せられたナトリウムイオンが反応して腐食する。この腐食に伴ってガスが発生し、キャビティ内に実装される電子素子の特性劣化を引き起こす原因となる。特に凹部１３３の内表面はサンドブラスト法やエッチング処理により、或いは軟化点以上での型成形により形成されるので表面が粗く、水分が付着しやすい。   In the conventional structure, the cross section of the bonding metal film 134 formed on the lid 130 is exposed to the outside. The bonding metal film 134 is made of an aluminum film, and the exposed portion is corroded by moisture from outside air. As corrosion progresses, the aluminum film becomes negatively charged. Then, a negative charge is also transmitted to the aluminum film formed on the inner surface of the recess 133, and sodium ions are attracted from the inside of the glass. The aluminum film on the inner surface corrodes when water adhering to the surface reacts with attracted sodium ions. Along with this corrosion, gas is generated, which causes deterioration of the characteristics of the electronic device mounted in the cavity. In particular, the inner surface of the recess 133 is formed by sandblasting or etching, or by molding at or above the softening point, so the surface is rough and moisture tends to adhere.

例えば、電子素子として音叉型の水晶片を用いる場合は、水晶片の振動が空気抵抗によって影響を受ける。これを避けるために、キャビティ内を真空に維持する。しかし、蓋体１３０を基板体１１０に陽極接合すると接合部から酸素ガスが発生する。この酸素ガスがキャビティ内に残留し真空度を低下させる。また、外気に露出するアルミニウム膜の腐食が進行すると凹部１３３の内表面側のアルミニウム膜も腐食し、表面に付着する水分が引き寄せられたナトリウムイオンと反応して水素ガスを発生する。この水素ガスがキャビティ内の真空度を低下させる。これらキャビティ内の圧力変動は水晶片の振動周期を変動させることになり、特性劣化の原因となる。   For example, when a tuning fork type crystal piece is used as the electronic element, the vibration of the crystal piece is affected by air resistance. In order to avoid this, the inside of the cavity is kept in a vacuum. However, when the lid 130 is anodically bonded to the substrate body 110, oxygen gas is generated from the bonded portion. This oxygen gas remains in the cavity and lowers the degree of vacuum. Further, when the corrosion of the aluminum film exposed to the outside air proceeds, the aluminum film on the inner surface side of the recess 133 also corrodes, and the water adhering to the surface reacts with the attracted sodium ions to generate hydrogen gas. This hydrogen gas lowers the degree of vacuum in the cavity. These pressure fluctuations in the cavity change the vibration period of the quartz piece, which causes characteristic deterioration.

本発明は、上記課題に鑑みてなされたものであり、キャビティ内の金属の腐食に伴って発生するガスにより内部に収納される電子素子の特性が劣化することを防止した電子デバイス、発信機及び電子デバイスの製造方法を提供することを目的とする。   The present invention has been made in view of the above problems, and an electronic device, a transmitter, and a transmitter that prevent deterioration of characteristics of an electronic element housed therein due to gas generated due to corrosion of a metal in a cavity. An object is to provide a method for manufacturing an electronic device.

本発明の電子デバイスは、基体と、前記基体との間にキャビティを形成して前記基体に陽極接合される蓋体と、前記キャビティに収納される電子素子と、前記蓋体と前記基体との接合面に設置される接合膜と、前記蓋体の前記キャビティの側の表面に設置され、ガス吸蔵性を有する吸蔵金属膜と、を備えることとした。   An electronic device according to the present invention includes a base, a lid formed with a cavity between the base and anodically bonded to the base, an electronic element housed in the cavity, the lid and the base A bonding film provided on the bonding surface, and an occlusion metal film provided on the surface of the lid on the cavity side and having gas occlusion properties are provided.

また、前記接合膜は、前記吸蔵金属膜と陽極接合用の接合導電膜とが積層する積層構造を有することとした。   The bonding film has a laminated structure in which the occlusion metal film and a bonding conductive film for anodic bonding are stacked.

また、前記接合膜と前記キャビティ側の表面に設置される前記吸蔵金属膜とは電気的に接続されることとした。   Further, the bonding film and the occlusion metal film installed on the cavity side surface are electrically connected.

また、前記蓋体は中央に凹部を有し、前記凹部の周囲の上端面に前記接合膜が形成され、前記凹部の底面に前記吸蔵金属膜が形成されることとした。   Further, the lid has a recess at the center, the bonding film is formed on the upper end surface around the recess, and the occlusion metal film is formed on the bottom surface of the recess.

また、前記接合導電膜はアルミニウム、クロム又はシリコンのいずれかを含み、前記吸蔵金属膜はチタン、白金、マンガン、ジルコニウム、ニッケル、バナジウム、パラジウム又はマグネシウムのいずれかを含むこととした。   Further, the bonding conductive film includes any of aluminum, chromium, and silicon, and the occlusion metal film includes any of titanium, platinum, manganese, zirconium, nickel, vanadium, palladium, or magnesium.

また、前記電子素子は水晶振動子であることとした。   The electronic element is a crystal resonator.

本発明の電子デバイスの製造方法は、基体に電子素子を実装する実装工程と、蓋体に凹部を形成する凹部形成工程と、前記蓋体の前記凹部が形成される側の表面にガス吸蔵性を有する吸蔵金属膜と陽極接合用の接合導電膜を堆積する導電膜堆積工程と、前記凹部の周囲の上端面に前記接合導電膜を残し、前記凹部の内表面から前記接合導電膜を除去するパターン形成工程と、前記凹部に前記電子素子を収納し、前記蓋体を前記基体に陽極接合する接合工程と、を備えることとした。   The electronic device manufacturing method of the present invention includes a mounting step of mounting an electronic element on a base, a recess forming step of forming a recess in the lid, and a gas occlusion property on the surface of the lid on the side where the recess is formed. A conductive film depositing step of depositing an occluded metal film and a bonding conductive film for anodic bonding, leaving the bonding conductive film on the upper end surface around the recess, and removing the bonding conductive film from the inner surface of the recess A pattern forming step and a bonding step of housing the electronic element in the recess and anodic bonding of the lid to the base.

本発明の電子デバイスは、基体と、基体との間にキャビティを形成して基体に陽極接合される蓋体と、キャビティに収納される電子素子と、蓋体と基体との接合面に設置される接合膜と、蓋体のキャビティの側の表面に設置され、ガス吸蔵性を有する吸蔵金属膜と、を備える。この構成により、吸蔵金属は陽極接合時に放出されるガスや内部で発生するガスを吸着してキャビティ内の圧力変動を低減し、電子素子の特性を安定させることができる。   The electronic device of the present invention is installed on a bonding surface between a base, a lid formed with a cavity between the base and anodically bonded to the base, an electronic element housed in the cavity, and the lid and the base. And a storage metal film that is installed on the surface of the lid on the cavity side and has a gas storage property. With this configuration, the occluded metal can adsorb the gas released during anodic bonding or the gas generated therein, thereby reducing pressure fluctuations in the cavity and stabilizing the characteristics of the electronic device.

本発明の第一実施形態に係る電子デバイスの断面模式図である。It is a cross-sectional schematic diagram of the electronic device which concerns on 1st embodiment of this invention. 本発明の第二実施形態に係る電子デバイスの製造方法を表す工程図である。It is process drawing showing the manufacturing method of the electronic device which concerns on 2nd embodiment of this invention. 本発明の第二実施形態に係る電子デバイスの製造方法における各工程の説明図である。It is explanatory drawing of each process in the manufacturing method of the electronic device which concerns on 2nd embodiment of this invention. 本発明の第三実施形態に係る電子デバイスの製造方法を表す工程図である。It is process drawing showing the manufacturing method of the electronic device which concerns on 3rd embodiment of this invention. 本発明の第四実施形態に係る発信機の上面模式図である。It is an upper surface schematic diagram of the transmitter which concerns on 4th embodiment of this invention. 従来公知の電子デバイスの断面図である。It is sectional drawing of a conventionally well-known electronic device.

＜電子デバイス＞
本発明に係る電子デバイスは、基体と、基体に陽極接合される蓋体と、基体と蓋体の間に形成されるキャビティに収納される電子素子と、蓋体と基体の接合面に設置される接合膜と、蓋体のキャビティ側の表面に設置される吸蔵金属膜とを備える。吸蔵金属膜はガス吸蔵性を有し、ガスを一旦吸着すると脱離し難い性質を有する。 <Electronic device>
An electronic device according to the present invention is disposed on a base, a lid that is anodically bonded to the base, an electronic element that is housed in a cavity formed between the base and the lid, and a joint between the lid and the base. And a storage metal film installed on the surface of the lid on the cavity side. The occlusion metal film has a gas occlusion property and is difficult to desorb once the gas is adsorbed.

吸蔵金属膜として、チタン、白金、マンガン、ジルコニウム、ニッケル、バナジウム、パラジウム、マグネシウム又はこれら材料のいずれかを含む合金を使用することができる。キャビティ側の表面に吸蔵金属膜を形成することにより、キャビティ内部に残留するガス或いは内部で発生するガスを吸着し、キャビティ内の圧力変動を低減させ、電子素子の特性を安定させることができる。   As the occlusion metal film, titanium, platinum, manganese, zirconium, nickel, vanadium, palladium, magnesium, or an alloy containing any of these materials can be used. By forming the occlusion metal film on the surface on the cavity side, the gas remaining inside the cavity or the gas generated inside can be adsorbed, the pressure fluctuation in the cavity can be reduced, and the characteristics of the electronic element can be stabilized.

（第一実施形態）
図１は本発明の第一実施形態に係る電子デバイス１の断面模式図である。蓋体３は中央に凹部８を有し、凹部８の周囲の上端面ＴＳには接合膜９が形成される。凹部８の底面ＢＳ及び内側面ＳＳには吸蔵金属膜７が形成される。接合膜９は、上端面ＴＳ側から順に吸蔵金属膜７と接合導電膜６とが積層する積層構造を有する。このように、凹部８の周囲の上端面ＴＳに吸蔵金属膜７と接合導電膜６を積層する接合膜９を形成し、凹部８の底面ＢＳ及び内側面ＳＳに吸蔵金属膜７を形成すれば、製造方法が容易となる。即ち、蓋体３の凹部８側から最初に吸蔵金属膜７を堆積し次に連続して接合導電膜６を堆積し、次に底面ＢＳ及び内側面ＳＳから接合導電膜６を除去すればよい。 (First embodiment)
FIG. 1 is a schematic cross-sectional view of an electronic device 1 according to the first embodiment of the present invention. The lid 3 has a recess 8 at the center, and a bonding film 9 is formed on the upper end surface TS around the recess 8. The occluded metal film 7 is formed on the bottom surface BS and the inner surface SS of the recess 8. The bonding film 9 has a stacked structure in which the occlusion metal film 7 and the bonding conductive film 6 are stacked in order from the upper end surface TS side. Thus, if the bonding film 9 which laminates the occlusion metal film 7 and the bonding conductive film 6 is formed on the upper end surface TS around the recess 8, and the occlusion metal film 7 is formed on the bottom surface BS and the inner side surface SS of the recess 8. The manufacturing method becomes easy. That is, the occlusion metal film 7 is first deposited from the concave portion 8 side of the lid 3, then the bonding conductive film 6 is continuously deposited, and then the bonding conductive film 6 is removed from the bottom surface BS and the inner surface SS. .

基体２は、蓋体３側の表面に配線１１が形成され、反対側の表面には外部電極１４が形成され、板厚方向に貫通する貫通電極１３により配線１１と貫通電極１３とは電気的に接続される。基体２の蓋体３側の表面には電子素子５が実装される。電子素子５の表面には図示しない電極が形成され、電子素子５の電極と配線１１とはワイヤー１２により電気的に接続される。蓋体３は基体２に接合膜９を介して陽極接合される。基体２と蓋体３の凹部８によりキャビティ４が形成され、キャビティ４に電子素子５が収納される。従って、電子素子５の図示しない電極と外部電極１４とはワイヤー１２、配線１１及び貫通電極１３を介して電気的に接続される。   The substrate 2 has a wiring 11 formed on the surface on the lid 3 side and an external electrode 14 formed on the opposite surface. Connected to. An electronic element 5 is mounted on the surface of the base 2 on the lid 3 side. An electrode (not shown) is formed on the surface of the electronic element 5, and the electrode of the electronic element 5 and the wiring 11 are electrically connected by a wire 12. The lid 3 is anodically bonded to the base 2 via a bonding film 9. A cavity 4 is formed by the recess 2 of the base 2 and the lid 3, and the electronic element 5 is accommodated in the cavity 4. Therefore, the electrode (not shown) of the electronic element 5 and the external electrode 14 are electrically connected via the wire 12, the wiring 11, and the through electrode 13.

基体２及び蓋体３はソーダ石灰ガラス、ホウケイ酸ガラス、その他のガラスからなる板を使用することができる。電子素子５は、水晶振動子、ＭＥＭＳ、発光ダイオード、受光素子、その他を使用することができる。接合導電膜６はアルミニウム、シリコン、クロム、その他の導電材料又はこれら材料のいずれかを含む複合物を使用することができる。   As the base 2 and the lid 3, a plate made of soda-lime glass, borosilicate glass, or other glass can be used. As the electronic element 5, a crystal resonator, MEMS, a light emitting diode, a light receiving element, or the like can be used. For the bonding conductive film 6, aluminum, silicon, chromium, other conductive materials, or a composite containing any of these materials can be used.

吸蔵金属膜７を蓋体３のキャビティ４側の表面に設置したので内部ガスを吸着するゲッタリング効果を利用することができる。蓋体３に設置した吸蔵金属膜７を陽極とし基体２を陰極として高電圧を印加して陽極接合すると酸素ガスが発生するが、吸蔵金属膜７はこの酸素ガスを吸着する。また、吸蔵金属膜７は、例えば接合導電膜６が水分等により腐食して負に帯電する場合でも、表面に付着する水分やガラス中のナトリウムイオンによって腐食され難く、腐食に伴うガスの発生も少ない。また、仮に腐食に伴って水素ガスが発生した場合でも、水素ガスは吸蔵金属膜７により吸着される。その結果、キャビティ４内の圧力変動が低減し、電子素子５の特性が安定する。   Since the occluded metal film 7 is provided on the surface of the lid 3 on the cavity 4 side, the gettering effect of adsorbing the internal gas can be used. Oxygen gas is generated when anodic bonding is performed by applying a high voltage using the occluded metal film 7 installed on the lid 3 as an anode and the substrate 2 as a cathode, and the occluded metal film 7 adsorbs the oxygen gas. Further, the occluded metal film 7 is not easily corroded by moisture adhering to the surface or sodium ions in the glass even when the bonding conductive film 6 is corroded negatively due to moisture or the like, and the generation of gas accompanying corrosion is also generated. Few. Even if hydrogen gas is generated due to corrosion, the hydrogen gas is adsorbed by the occluded metal film 7. As a result, the pressure fluctuation in the cavity 4 is reduced, and the characteristics of the electronic element 5 are stabilized.

本実施形態においては、蓋体３は中央部に凹部８を有する。凹部８の周囲の上端面ＴＳに接合膜９が形成される。凹部８の底面ＢＳ及び内側面ＳＳに吸蔵金属膜７が形成される。基体２は、板厚方向に貫通する２つの貫通電極１３を有し、キャビティ４側の表面には２つの配線１１が形成され、キャビティ４とは反対側の表面には２つの外部電極１４が形成される。各配線１１は貫通電極１３を介して外部電極１４にそれぞれ電気的に接続される。基体２のキャビティ４側の表面には電子素子５が実装される。電子素子５はその上面に図示しない電極が形成され、ワイヤー１２を介して配線１１に電気的に接続される。これにより、２つの外部電極１４から駆動電力や駆動信号をキャビティ４内の電子素子５に供給することができる。   In the present embodiment, the lid 3 has a recess 8 at the center. A bonding film 9 is formed on the upper end surface TS around the recess 8. The occluded metal film 7 is formed on the bottom surface BS and the inner surface SS of the recess 8. The substrate 2 has two through electrodes 13 penetrating in the plate thickness direction, two wirings 11 are formed on the surface on the cavity 4 side, and two external electrodes 14 are formed on the surface opposite to the cavity 4. It is formed. Each wiring 11 is electrically connected to the external electrode 14 through the through electrode 13. An electronic element 5 is mounted on the surface of the base 2 on the cavity 4 side. An electrode (not shown) is formed on the upper surface of the electronic element 5 and is electrically connected to the wiring 11 through the wire 12. Thereby, drive power and drive signal can be supplied from the two external electrodes 14 to the electronic element 5 in the cavity 4.

なお、本実施形態において電子素子５と配線１１との間をワイヤー１２により電気的に接続したが、これに代えて電子素子５を基体２に面実装することができる。例えば電子素子５として音叉型の水晶振動子を使用する場合には、音叉型の基部を配線１１に片持ち状に接合し、キャビティ４内を真空に引いて基体２と蓋体３とを陽極接合する。このとき、吸蔵金属膜７の表面がキャビティ４に露出するので、陽極接合の際に酸素ガスが発生しキャビティ４内に残留しても、その残留酸素ガスは吸蔵金属膜７により吸着され、キャビティ４内は所定の真空度に維持される。そのため音叉型の水晶振動子の振動を劣化させることがない。また、接合導電膜６の断面が外部に露出し、その端面が腐食して吸蔵金属膜７が負に帯電した場合でも、吸蔵金属膜７は腐食され難く、また、ガスが発生したときは吸蔵金属膜７により吸着されるので、キャビティ４内を所定の真空度に長期間維持することができる。   In the present embodiment, the electronic element 5 and the wiring 11 are electrically connected by the wire 12, but the electronic element 5 can be surface-mounted on the base 2 instead. For example, when a tuning fork type crystal resonator is used as the electronic element 5, the tuning fork type base is joined to the wiring 11 in a cantilever manner, and the inside of the cavity 4 is evacuated to connect the base 2 and the lid 3 to the anode. Join. At this time, since the surface of the occluded metal film 7 is exposed to the cavity 4, even if oxygen gas is generated during anodic bonding and remains in the cavity 4, the residual oxygen gas is adsorbed by the occluded metal film 7, The inside of 4 is maintained at a predetermined degree of vacuum. Therefore, the vibration of the tuning fork type crystal resonator is not deteriorated. Further, even when the cross section of the bonding conductive film 6 is exposed to the outside and the end surface corrodes and the occluded metal film 7 is negatively charged, the occluded metal film 7 is hardly corroded, and when gas is generated, the occluded metal film 7 is occluded. Since it is adsorbed by the metal film 7, the inside of the cavity 4 can be maintained at a predetermined degree of vacuum for a long time.

また、本実施形態では蓋体３に凹部８を形成し、この凹部８の底面ＢＳに接合導電膜６と電気的に接続する吸蔵金属膜７を形成したが、これに代えて、基体に凹部を形成し、基体と蓋体の間にキャビティを形成し、蓋体を平坦な板とすることができる。基体の凹部に電子素子を収納し、平坦な板からなる蓋体を凹部の上端面に陽極接合する。この場合も、蓋体のキャビティ側の表面には吸蔵金属膜７を設ける。   Further, in this embodiment, the recess 8 is formed in the lid 3 and the occlusion metal film 7 electrically connected to the bonding conductive film 6 is formed on the bottom surface BS of the recess 8. , A cavity is formed between the base body and the lid, and the lid can be a flat plate. An electronic element is accommodated in the recess of the base, and a lid made of a flat plate is anodically bonded to the upper end surface of the recess. Also in this case, the occluded metal film 7 is provided on the surface of the lid on the cavity side.

＜電子デバイスの製造方法＞
（第二実施形態）
図２及び図３は本発明の第二実施形態に係る電子デバイス１の製造方法を説明するための図である。図２は製造工程を表し、図３は同時に複数個の電子デバイスを製造する各工程の説明図である。同一の部分又は同一の機能を有する部分には同一の符号を付している。 <Method for manufacturing electronic device>
(Second embodiment)
FIG.2 and FIG.3 is a figure for demonstrating the manufacturing method of the electronic device 1 which concerns on 2nd embodiment of this invention. FIG. 2 shows a manufacturing process, and FIG. 3 is an explanatory diagram of each process for manufacturing a plurality of electronic devices simultaneously. The same portions or portions having the same function are denoted by the same reference numerals.

図３（ａ）は実装工程Ｓ１を表し、基体２に電子素子５を実装した断面模式図である。ここで、基体２はソーダ石灰ガラス、ホウケイ酸ガラス、又はその他のガラスからなるウエハーを使用し、電子素子５として水晶振動子を用いる。まず、基体２の各電子デバイス１に対応する領域に２つの貫通孔を形成する。基体２を軟化点以上の温度に加熱し型に押圧する型成形により複数の貫通孔を同時に形成することができる。また、基体２の表面にマスクを設置し、ガラスエッチング法やサンドブラスト法により複数の貫通孔を同時に形成することができる。次に、貫通孔に電極を埋め込んで貫通電極１３を形成する。例えば貫通孔に金属棒を埋め込み接着剤により固定する、また、貫通孔に印刷法等により導電性接着剤を充填し固化する、或いは、貫通孔に無電解メッキ法により金属材料を堆積し充填する、などの方法により貫通電極１３を形成することができる。次に、基体２の実装側の表面を研磨して平坦面とする。   FIG. 3A shows a mounting step S1 and is a schematic cross-sectional view in which the electronic element 5 is mounted on the base 2. Here, the substrate 2 uses a wafer made of soda-lime glass, borosilicate glass, or other glass, and uses a crystal resonator as the electronic element 5. First, two through holes are formed in a region corresponding to each electronic device 1 of the base 2. A plurality of through-holes can be formed simultaneously by mold forming in which the substrate 2 is heated to a temperature equal to or higher than the softening point and pressed against the mold. Moreover, a mask can be installed on the surface of the base 2 and a plurality of through holes can be formed simultaneously by a glass etching method or a sand blast method. Next, the through electrode 13 is formed by embedding an electrode in the through hole. For example, a metal rod is embedded in the through hole and fixed with an adhesive, and the through hole is filled with a conductive adhesive by a printing method or the like, or solidified by depositing a metal material into the through hole by an electroless plating method. The through electrode 13 can be formed by a method such as. Next, the surface on the mounting side of the substrate 2 is polished to a flat surface.

次に蒸着法やスパッタリング法等により基体２の表面に導電膜を形成し、フォトリソグラフィ及びエッチング法により配線１１を形成する。導電膜としてアルミニウム、金、クロム等の材料を使用することができる。次に、配線１１の上に導電性接着剤１５を設置し、その上に電子素子５としての水晶振動子を実装する。導電性接着剤１５に代えて金属バンプを設置し、水晶振動子の表面に形成したマウント電極に接合してもよい。水晶振動子が音叉型である場合は音叉型の基部が導電性接着剤１５により固定され、水晶振動子は片持ち状に支持される。   Next, a conductive film is formed on the surface of the substrate 2 by vapor deposition or sputtering, and wiring 11 is formed by photolithography and etching. A material such as aluminum, gold, or chromium can be used for the conductive film. Next, a conductive adhesive 15 is installed on the wiring 11, and a crystal resonator as the electronic element 5 is mounted thereon. Metal bumps may be installed in place of the conductive adhesive 15 and bonded to a mount electrode formed on the surface of the crystal resonator. When the crystal resonator is a tuning fork type, the tuning fork base is fixed by the conductive adhesive 15, and the crystal resonator is supported in a cantilever manner.

図３（ｂ）は凹部形成工程Ｓ２を表し、蓋体３に凹部８を形成する。蓋体３はソーダ石灰ガラス、ホウケイ酸ガラス、又はその他のガラスからなるウエハーを使用する。凹部８は蓋体３を軟化点以上の温度に加熱し型成形により複数同時に形成することができる。あるいは、ウエハーの表面に凹部形成領域が開口するマスクを設置し、ガラスエッチング法やサンドブラスト法等により凹部形成領域のガラスを除去して凹部８を複数同時に形成することができる。なお、凹部８の内側面ＳＳを傾斜面とし、型成形の際の離型性を向上させている。   FIG. 3B shows the recess forming step S <b> 2, and the recess 8 is formed in the lid 3. The lid 3 uses a wafer made of soda-lime glass, borosilicate glass, or other glass. A plurality of recesses 8 can be formed simultaneously by heating the lid 3 to a temperature above the softening point and molding. Alternatively, a plurality of recesses 8 can be formed at the same time by installing a mask that opens the recess formation region on the surface of the wafer and removing the glass in the recess formation region by a glass etching method, a sandblasting method, or the like. In addition, the inner side surface SS of the recessed part 8 is made into the inclined surface, and the mold release property in the case of mold forming is improved.

図３（ｃ）は導電膜堆積工程Ｓ３を表す。まず、凹部８の周囲の上端面ＴＳを鏡面に研磨する。この場合、凹部８の底面ＢＳは研磨されないので粗面の状態が維持される。次に、蓋体３の凹部８が形成される側の表面に吸蔵金属膜７と接合導電膜６を連続して堆積する。吸蔵金属膜７としてチタン膜を、接合導電膜６としてアルミニウム膜をそれぞれスパッタリング法や蒸着法により連続して堆積する。吸蔵金属膜７の材料として、チタンの他に白金、マンガン、ジルコニウム、ニッケル、バナジウム、パラジウム、マグネシウム又はこれら材料のいずれかを含む合金を使用することができる。接合導電膜６の材料として、アルミニウムの他にシリコン、クロム、その他の導電材料又はこれら材料のいずれかを含む複合物を使用することができる。吸蔵金属膜７と接合導電膜６は各凹部の周囲の上端面ＴＳや底面ＢＳ、及び上端面ＴＳと底面ＢＳの間の内側面ＳＳの全面に堆積する。例えばチタン膜とアルミニウム膜をそれぞれ５０ｎｍ〜１５０ｎｍ形成する。   FIG. 3C shows the conductive film deposition step S3. First, the upper end surface TS around the recess 8 is polished into a mirror surface. In this case, since the bottom surface BS of the recess 8 is not polished, the rough surface state is maintained. Next, the occluded metal film 7 and the bonding conductive film 6 are successively deposited on the surface of the lid 3 on the side where the concave portion 8 is formed. A titanium film as the occlusion metal film 7 and an aluminum film as the bonding conductive film 6 are successively deposited by sputtering or vapor deposition. As a material for the occlusion metal film 7, platinum, manganese, zirconium, nickel, vanadium, palladium, magnesium, or an alloy containing any of these materials can be used in addition to titanium. As a material of the bonding conductive film 6, in addition to aluminum, silicon, chromium, other conductive materials, or a composite containing any of these materials can be used. The occluded metal film 7 and the bonding conductive film 6 are deposited on the entire upper surface TS and bottom surface BS around each recess and the inner surface SS between the upper surface TS and the bottom surface BS. For example, a titanium film and an aluminum film are formed to 50 nm to 150 nm, respectively.

図３（ｄ）はパターン形成工程Ｓ４を表し、各凹部８の底面ＢＳと内側面ＳＳ、つまり凹部８の内表面に堆積した接合導電膜６を除去し、吸蔵金属膜７の表面を露出させる。フォトリソグラフィ及びエッチング法により接合導電膜６を底面ＢＳと内側面ＳＳから除去し、凹部８の周囲の上端面ＴＳに接合導電膜６を残す。   FIG. 3D shows a pattern forming step S4, where the bottom surface BS and the inner side surface SS of each recess 8, that is, the bonding conductive film 6 deposited on the inner surface of the recess 8 is removed, and the surface of the occlusion metal film 7 is exposed. . The bonding conductive film 6 is removed from the bottom surface BS and the inner surface SS by photolithography and etching, and the bonding conductive film 6 is left on the upper end surface TS around the recess 8.

図３（ｅ）は接合工程Ｓ５を表し、凹部８に電子素子５を収納するように蓋体３を基体２の表面に載置し、真空中において蓋体３を基体２に陽極接合する。陽極接合は、基体２及び蓋体３を２００℃以上の温度に加熱し、蓋体３に堆積した接合導電膜６を陽極に基体２を陰極にして数百Ｖの電圧を印加し、接合導電膜６及び吸蔵金属膜７を介して基体２の電子素子５側の表面と蓋体３の上端面ＴＳとを接合する。この陽極接合の際に発生する酸素ガスがキャビティ４内に残留する場合でも、吸蔵金属膜７のゲッタリング効果により酸素ガスが吸蔵金属膜７に吸着され、所定の真空度に維持される。次に、基体２の蓋体３とは反対側の表面に印刷法により外部電極１４を形成する。外部電極１４は貫通電極１３に電気的に接続する。また、印刷法に代えてメッキ法、蒸着法又はスパッタリング法等により外部電極１４を形成することができる。   FIG. 3E shows a joining step S5, in which the lid 3 is placed on the surface of the base 2 so that the electronic element 5 is accommodated in the recess 8, and the lid 3 is anodically bonded to the base 2 in a vacuum. In anodic bonding, the base 2 and the lid 3 are heated to a temperature of 200 ° C. or higher, and a voltage of several hundred volts is applied using the bonding conductive film 6 deposited on the lid 3 as an anode and the base 2 as a cathode. The surface of the base 2 on the electronic element 5 side and the upper end surface TS of the lid 3 are joined via the film 6 and the occluded metal film 7. Even when oxygen gas generated during the anodic bonding remains in the cavity 4, the oxygen gas is adsorbed by the occluded metal film 7 due to the gettering effect of the occluded metal film 7 and is maintained at a predetermined degree of vacuum. Next, the external electrode 14 is formed on the surface of the base 2 opposite to the lid 3 by a printing method. The external electrode 14 is electrically connected to the through electrode 13. Further, the external electrode 14 can be formed by a plating method, a vapor deposition method, a sputtering method or the like instead of the printing method.

図３（ｆ）は切断工程Ｓ６を表し、ダイシングブレードやダイシングソー等を用いて、或いはガラス表面にスクライブ線を刻印し、スクライブ線に沿って割断して個々の電子デバイス１ａ、１ｂに分離する。この分離した電子デバイス１ａ、１ｂの接合導電膜６は外部に露出する。外気の水分が接合導電膜６に付着して腐食が始まると、接合導電膜６には負電荷が帯電する。しかし、吸蔵金属膜７は腐食し難く、表面に付着する水分や引き寄せられるナトリウムイオンと反応せず、これに伴うガスの発生もない。また、仮に吸蔵金属膜７の腐食に伴って水素ガスが発生した場合でも、水素ガスは吸蔵金属膜７により吸着されるので、キャビティ４内は所定の真空度に長期間維持される。   FIG. 3F shows the cutting step S6, using a dicing blade, a dicing saw, or the like, or by marking a scribe line on the glass surface and cleaving along the scribe line to separate the individual electronic devices 1a and 1b. . The separated conductive films 6 of the separated electronic devices 1a and 1b are exposed to the outside. When moisture from outside air adheres to the bonding conductive film 6 and corrosion starts, the bonding conductive film 6 is charged with a negative charge. However, the occluded metal film 7 is hardly corroded, does not react with moisture adhering to the surface or attracted sodium ions, and does not generate gas. Further, even if hydrogen gas is generated due to corrosion of the occluded metal film 7, the hydrogen gas is adsorbed by the occluded metal film 7, so that the inside of the cavity 4 is maintained at a predetermined degree of vacuum for a long time.

（第三実施形態）
図４は、本発明の第三実施形態に係る電子デバイス１の製造方法を説明するための工程図であり、上記第二実施形態の具体例である。同一の工程には同一の符号を付している。 (Third embodiment)
FIG. 4 is a process diagram for explaining the manufacturing method of the electronic device 1 according to the third embodiment of the present invention, and is a specific example of the second embodiment. The same steps are denoted by the same reference numerals.

基体２に実装する電子素子５は水晶振動子などからなる圧電振動片である。蓋体形成工程Ｓ２０を説明する。ソーダ石灰ガラスからなる板状のガラスウエハーを準備する。まず、研磨、洗浄、エッチング工程Ｓ２１においてガラスウエハーを所定の厚さまで研磨し、洗浄した後にエッチング処理を行って最表面の加工変質層を除去する。次に、凹部形成工程Ｓ２において、各電子デバイス１が形成される領域の中央部に加熱プレスの型成形により凹部８を形成する。次に、研磨工程Ｓ２２において、凹部８の周囲の上端面を平坦な鏡面に研磨加工する。次に、導電膜堆積工程Ｓ３において、蓋体３の凹部８を形成した表面にスパッタリング法又は蒸着法により例えばチタンからなる吸蔵金属膜７とアルミニウムからなる接合導電膜６をそれぞれ５０ｎｍ〜１５０ｎｍの厚さで連続して堆積する。次に、パターン形成工程Ｓ４において、フォトリソグラフィ及びエッチング法により、凹部８の底面ＢＳ及び内側面ＳＳから接合導電膜６を除去する。このようにしてガラスウエハーからなる蓋体３を形成する。   The electronic element 5 mounted on the base 2 is a piezoelectric vibrating piece made of a quartz vibrator or the like. The lid forming step S20 will be described. A plate-like glass wafer made of soda-lime glass is prepared. First, in the polishing, cleaning, and etching step S21, the glass wafer is polished to a predetermined thickness, and after cleaning, an etching process is performed to remove the outermost work-affected layer. Next, in the concave portion forming step S2, the concave portion 8 is formed in the central portion of the region where each electronic device 1 is formed by hot press molding. Next, in the polishing step S22, the upper end surface around the recess 8 is polished into a flat mirror surface. Next, in the conductive film deposition step S3, the occlusion metal film 7 made of, for example, titanium and the bonding conductive film 6 made of aluminum, for example, have a thickness of 50 nm to 150 nm on the surface of the lid 3 where the concave portion 8 is formed by sputtering or vapor deposition. Now it is deposited continuously. Next, in the pattern formation step S4, the bonding conductive film 6 is removed from the bottom surface BS and the inner surface SS of the recess 8 by photolithography and etching. In this way, the lid 3 made of a glass wafer is formed.

圧電振動片作成工程Ｓ３０を説明する。水晶の原石を所定角度でスライスし、水晶ウエハーを形成し、次に、水晶ウエハーを研削及び研磨加工して一定の厚みとする。次に、水晶ウエハーの加工変質層をエッチング除去する。次に、水晶ウエハーの両表面に金属膜を堆積し、フォトリソグラフィ及びエッチング法により金属膜をパターニングし、所定形状の励振電極、配線電極、マウント電極に加工する。次にフォトリソグラフィ及びエッチング法あるいはダイシングにより水晶ウエハーを圧電振動片の外形形状に加工する。   The piezoelectric vibrating piece creating step S30 will be described. The quartz crystal is sliced at a predetermined angle to form a quartz wafer, and then the quartz wafer is ground and polished to a constant thickness. Next, the work-affected layer of the quartz wafer is removed by etching. Next, metal films are deposited on both surfaces of the quartz wafer, the metal film is patterned by photolithography and etching, and processed into excitation electrodes, wiring electrodes, and mount electrodes having a predetermined shape. Next, the quartz wafer is processed into the outer shape of the piezoelectric vibrating piece by photolithography and etching or dicing.

基体形成工程Ｓ４０を説明する。ソーダ石灰ガラスからなる板状のガラスウエハーを準備する。まず、研磨、洗浄、エッチング工程Ｓ４１においてガラスウエハーを所定の厚さまで研磨し、洗浄した後にエッチング処理を行って最表面の加工変質層を除去する。次に、貫通電極形成工程Ｓ４２において加熱プレスの型成形により、或いは表面にマスクを設置後にエッチング処理あるいはサンドブラスにより研削してガラスウエハーの板厚方向に貫通孔を形成する。次に、この貫通孔に導電体を充填して貫通電極１３を形成し、貫通電極１３の両端部及びガラスウエハーの両面を研磨して平坦化する。次に、配線電極形成工程Ｓ４３において、スパッタリング法あるいは蒸着法により基体２の表面に金属膜を堆積し、フォトリソグラフィ及びエッチング法により配線１１にパターニングする。   The substrate forming step S40 will be described. A plate-like glass wafer made of soda-lime glass is prepared. First, in the polishing, cleaning and etching step S41, the glass wafer is polished to a predetermined thickness, and after cleaning, an etching process is performed to remove the outermost work-affected layer. Next, in the through electrode forming step S42, through holes are formed in the thickness direction of the glass wafer by molding by hot pressing, or after setting a mask on the surface and grinding by etching or sandblasting. Next, the through hole is filled with a conductor to form the through electrode 13, and both ends of the through electrode 13 and both surfaces of the glass wafer are polished and flattened. Next, in a wiring electrode forming step S43, a metal film is deposited on the surface of the substrate 2 by sputtering or vapor deposition, and patterned on the wiring 11 by photolithography and etching.

次に、実装工程Ｓ１において、圧電振動片を基体２の表面に実装する。実装の際に、基体２の配線１１に導電性接着剤１５や金属バンプを設置し、その上に圧電振動片のマウント電極を接合して基体２上に圧電振動片を片持ち状に固定する。これにより、貫通電極１３と圧電振動片の励振電極とを電気的に接続する。このように多数の圧電振動片が実装されるガラスウエハーからなる基体２を形成する。   Next, in the mounting step S <b> 1, the piezoelectric vibrating piece is mounted on the surface of the base 2. At the time of mounting, a conductive adhesive 15 or a metal bump is placed on the wiring 11 of the base 2, and a mount electrode of the piezoelectric vibrating piece is bonded thereon to fix the piezoelectric vibrating piece on the base 2 in a cantilevered manner. . Thereby, the penetration electrode 13 and the excitation electrode of the piezoelectric vibrating piece are electrically connected. In this way, the base 2 made of a glass wafer on which a large number of piezoelectric vibrating pieces are mounted is formed.

次に、重ね合わせ工程Ｓ１１において、蓋体３の各凹部８に各圧電振動片が収納されるように蓋体３を基体２の上に載置し、上下方向から押圧する。次に、接合工程Ｓ５において、基体２及び蓋体３を２００℃以上の温度に加熱し、蓋体３の吸蔵金属膜７及び接合導電膜６を陽極に基体２を陰極にして数百Ｖの電圧を印加し、接合導電膜６を介して基体２と蓋体３とを接合する。接合の際には周囲を真空に保持する。次に、外部電極形成工程Ｓ１２において、基体２の蓋体３とは反対側の表面に印刷法により外部電極１４を形成する。次に、切断工程Ｓ６において、接合体の表面にスクライブ線を設け、切断刃を押し当てて割断する、あるいはダイシングブレードやダイシングソーを用いて分割し、個々の電子デバイス１を得る。次に、電気特性検査工程Ｓ１３において、電子デバイス１の共振周波数や共振抵抗値等を測定して検査する。   Next, in the overlaying step S <b> 11, the lid 3 is placed on the base 2 so that the piezoelectric vibrating reeds are accommodated in the concave portions 8 of the lid 3 and pressed from above and below. Next, in the bonding step S5, the base body 2 and the lid body 3 are heated to a temperature of 200 ° C. or higher, and the storage metal film 7 and the bonding conductive film 6 of the lid body 3 are used as an anode, and the base body 2 is used as a cathode. A voltage is applied, and the base 2 and the lid 3 are bonded via the bonding conductive film 6. When joining, the surroundings are kept in a vacuum. Next, in the external electrode forming step S12, the external electrode 14 is formed on the surface of the base 2 opposite to the lid 3 by a printing method. Next, in the cutting step S6, a scribe line is provided on the surface of the joined body, and the cutting blade is pressed to cleave, or is divided using a dicing blade or a dicing saw, and individual electronic devices 1 are obtained. Next, in the electrical characteristic inspection step S13, the resonance frequency, resonance resistance value, and the like of the electronic device 1 are measured and inspected.

＜発信機＞
（第四実施形態）
図５は、本発明の第四実施形態に係る発信機４０の上面模式図であり、上記第二又は第三実施形態において説明した製造方法により製造した電子デバイス１を組み込んでいる。図５に示すように、発振器４０は、基板４３、この基板上に設置した電子デバイス１、集積回路４１及び電子部品４２を備えている。電子デバイス１は、外部電極１４に与えられる駆動信号に基づいて一定周波数の信号を生成し、集積回路４１及び電子部品４２は、電子デバイス１から供給される一定周波数の信号を処理して、クロック信号等の基準信号を生成する。本発明による電子デバイス１は、高信頼性でかつ小型に形成することができるので、発振器４０の全体をコンパクトに構成することができる。 <Transmitter>
(Fourth embodiment)
FIG. 5 is a schematic top view of a transmitter 40 according to the fourth embodiment of the present invention, and incorporates the electronic device 1 manufactured by the manufacturing method described in the second or third embodiment. As shown in FIG. 5, the oscillator 40 includes a substrate 43, the electronic device 1 installed on the substrate, an integrated circuit 41, and an electronic component 42. The electronic device 1 generates a signal having a constant frequency based on the drive signal applied to the external electrode 14, and the integrated circuit 41 and the electronic component 42 process the signal having the constant frequency supplied from the electronic device 1 to generate a clock signal. A reference signal such as a signal is generated. Since the electronic device 1 according to the present invention can be formed with high reliability and a small size, the entire oscillator 40 can be configured compactly.

＜ＭＥＭＳセンサ＞
本発明の第五実施形態に係るＭＥＭＳセンサについて説明する。ＭＥＭＳセンサは、例えば、加速度又は振動を検出する。ＭＥＭＳセンサは、電子素子としてＭＥＭＳを使用し、第四実施形態と同様に上記第二又は第三実施形態において説明した製造方法により製造した電子デバイスを組み込んでいる。ＭＥＭＳセンサは、基板と、この基板上に設置した電子デバイスと、信号処理回路とを備えている。電子デバイスは、加速度を検出し、検出した加速度を電気信号に変換し、電気信号を信号処理回路に送る。信号処理回路は、電気信号を増幅、調整など信号処理して出力する。本発明の電子デバイスは、高信頼性でかつ小型に形成することができるので、ＭＥＭＳセンサの全体をコンパクトに構成することができる。 <MEMS sensor>
A MEMS sensor according to a fifth embodiment of the present invention will be described. The MEMS sensor detects, for example, acceleration or vibration. The MEMS sensor uses MEMS as an electronic element, and incorporates an electronic device manufactured by the manufacturing method described in the second or third embodiment as in the fourth embodiment. The MEMS sensor includes a substrate, an electronic device installed on the substrate, and a signal processing circuit. The electronic device detects acceleration, converts the detected acceleration into an electrical signal, and sends the electrical signal to a signal processing circuit. The signal processing circuit performs signal processing such as amplification and adjustment on the electrical signal and outputs the processed signal. Since the electronic device of the present invention can be formed with high reliability and a small size, the entire MEMS sensor can be configured compactly.

１、１ａ、１ｂ 電子デバイス
２ 基体
３ 蓋体
４ キャビティ
５ 電子素子
６ 接合導電膜
７ 吸蔵金属膜
８ 凹部
９ 接合膜
１１ 配線
１２ ワイヤー
１３ 貫通電極
１４ 外部電極
１５ 導電性接着剤
ＴＳ 上端面
ＢＳ 底面
ＳＳ 内側面 1, 1a, 1b Electronic device 2 Base body 3 Lid 4 Cavity 5 Electronic element 6 Bonding conductive film 7 Occlusion metal film 8 Recess 9 Bonding film 11 Wiring 12 Wire 13 Through electrode 14 External electrode 15 Conductive adhesive TS Upper end surface BS Bottom SS inner surface

Claims (6)

基体と、
前記基体との間にキャビティを形成して前記基体に陽極接合される蓋体と、
前記キャビティに収納される電子素子と、
前記蓋体と前記基体との接合面に設置される接合膜と、
前記蓋体の前記キャビティの側の表面に設置され、前記接合膜と材質が異なりガス吸収性を有する収蔵金属膜と、を備え、
前記接合膜は、前記収蔵金属膜と、前記収蔵金属膜と材質の異なる陽極接合用の接合導電膜と、が積層する積層構造を有する電子デバイス。 A substrate;
A lid that forms a cavity with the substrate and is anodically bonded to the substrate;
An electronic element housed in the cavity;
A bonding film installed on a bonding surface between the lid and the base;
Installed on the surface of the lid on the side of the cavity, and a storage metal film that is different in material from the bonding film and has gas absorbency,
The bonding film is an electronic device having a stacked structure in which the storage metal film and a bonding conductive film for anodic bonding made of a material different from the storage metal film are stacked . 前記接合膜と前記キャビティ側の表面に設置される前記収蔵金属とは電気的に接続される請求項１に記載の電子デバイス。The electronic device according to claim 1, wherein the bonding film and the storage metal installed on the cavity-side surface are electrically connected. 前記蓋体は中央に凹部を有し、The lid has a recess in the center;
前記凹部の周囲の上端面に前記接合膜が形成され、  The bonding film is formed on the upper end surface around the recess,
前記凹部の底面に前記収蔵金属膜が形成される請求項１又は２に記載の電子デバイス。  The electronic device according to claim 1, wherein the storage metal film is formed on a bottom surface of the recess. 前記接合導電膜はアルミニウム、クロム又はシリコンのいずれかを含み、前記収蔵金属膜はチタン、白金、マンガン、ジルコニウム、ニッケル、バナジウム、パラジウム又はマグネシウムのいずれかを含む請求項１〜３のいずれか１項に記載の電子デバイス。4. The method according to claim 1, wherein the bonding conductive film includes any one of aluminum, chromium, and silicon, and the storage metal film includes any of titanium, platinum, manganese, zirconium, nickel, vanadium, palladium, and magnesium. The electronic device according to item. 前記電子素子はMEMSである請求項１〜４のいずれか１項に記載の電子デバイス。The electronic device according to claim 1, wherein the electronic element is MEMS. 基体に電子素子を実装する実装工程と、A mounting process for mounting electronic elements on a substrate;
蓋体に凹部を形成する凹部形成工程と、  A recess forming step of forming a recess in the lid;
前記蓋体の前記凹部が形成される側の表面に、ガス収蔵性を有する収蔵金属膜と、前記収蔵金属膜と材質の異なる陽極接合用の接合導電膜を堆積する導電膜堆積工程と、  A conductive film deposition step of depositing a storage metal film having gas storage properties on the surface of the lid on which the concave portion is formed, and a bonding conductive film for anodic bonding made of a material different from the storage metal film;
前記凹部の周囲の上端面に前記接合導電膜を残し、前記凹部の内表面から前記接合導電膜を除去するパターン形成工程と、  A pattern forming step of leaving the bonding conductive film on the upper end surface around the recess and removing the bonding conductive film from the inner surface of the recess;
前記凹部に前記電子素子を収納し、前記蓋体を前記基体に陽極接合する接合工程と、を備える電子デバイスの製造方法。  And a bonding step of housing the electronic element in the recess and anodically bonding the lid to the base.
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