JP6225882B2 - Electronic apparatus and image forming apparatus - Google Patents

Description

  The present invention relates to an electronic apparatus and an image forming apparatus, and more particularly to a technique for controlling on / off of a plurality of power supply systems.

  In recent years, the need for energy saving of electronic devices has increased. Reduction in power consumption is also demanded for controller boards of image forming apparatuses such as printers and multifunction peripherals, and a method for realizing this is to subdivide and control the power supply voltage. As a result, power consumption can be reduced by reducing unnecessary power supply power as much as possible during sleep of the device. However, the control in which the power supply voltage is subdivided increases the power supply system (power supply circuit), and as a result, the power supply input and disconnection sequence is complicated.

  As a means for easily controlling this complicated power supply sequence, for example, there is a configuration in which a microcomputer for controlling the power supply sequence that is not directly involved in the control of the system is prepared, as in Patent Document 1 below. The power supply sequence control as described above is performed by programming the microcomputer with power supply sequence control in advance.

JP 2010-176356 A

  However, if the microcomputer that controls the power supply sequence is locked for some reason during the operation of the device, the power may be suddenly turned off. At this time, on the main system side, for example, the power may be cut off while the CPU rewrites the firmware program in the nonvolatile memory. In this case, the firmware program will not function normally after that, and the device may not be able to start normally at the next startup.

  The present invention has been made to solve the above problem, and even when the microcomputer for power supply sequence control falls into an abnormal state, the system power can be safely turned on without causing the system to go into an abnormal state. The purpose is to drop.

An image forming apparatus according to an aspect of the present invention includes a power sequence control unit that outputs each power control signal for starting and stopping each of a plurality of power systems.
A power on / off control circuit for individually starting / stopping each of the plurality of power supply systems in accordance with the given power control signals;
A buffer circuit that switches between transmission and non-transmission of the power control signal output from the power sequence control unit to the power on / off control circuit;
After the plurality of power systems are activated by the power on / off control circuit via the buffer circuit by the output of the power control signal from the power sequence control unit, the buffer circuit is connected to the power control signal. And a main control unit for switching to a state where the power is not transmitted to the power on / off control circuit.

  According to the present invention, after the power supply system is started, the buffer circuit is in a state where the power supply control signal output from the power supply sequence control unit is not transmitted to the power supply on / off control circuit. Even in such a case, the power on / off control circuit is prevented from operating by the power control signal output from the abnormal power sequence control unit, and the situation in which each power-related system operates abnormally can be avoided. For this reason, even if, for example, an unexpected power interruption occurs due to an abnormality in the power sequence control unit, the software or memory being rewritten is prevented from being destroyed, and even after such an unexpected power interruption occurs. The next time the system is started, the system can be started normally.

1 is a front sectional view showing a structure of an image forming apparatus according to an embodiment of the present invention. 2 is a functional block diagram illustrating a main internal configuration of the image forming apparatus. FIG. It is an electrical block diagram which shows the structure of a power supply control circuit. 6 is a flowchart illustrating an operation at the time of starting the image forming apparatus. It is a flowchart which shows the operation | movement at the time of transfer to power saving mode.

  Hereinafter, an electronic apparatus and an image forming apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a front sectional view showing the structure of an image forming apparatus according to an embodiment of the present invention.

  An image forming apparatus 1 according to an embodiment of the present invention is a multifunction machine having a plurality of functions such as a copy function, a printer function, a scanner function, and a facsimile function. The image forming apparatus 1 includes an apparatus main body 11 that includes an operation unit 47, an image forming unit 12, a fixing unit 13, a paper feeding unit 14, a document feeding unit 6, a document reading unit 5, and the like. The image forming apparatus 1 is an example of an electronic apparatus according to the present invention.

  The operation unit 47 receives instructions such as an image forming operation execution instruction and a document reading operation execution instruction from the operator regarding various operations and processes that can be executed by the image forming apparatus 1. The operation unit 47 includes a display unit 473. The display unit 473 is configured by an LCD (Liquid Crystal Display) having a touch panel function.

  When the image forming apparatus 1 performs a document reading operation, the document reading unit 5 optically reads a document fed by the document feeding unit 6 or a document placed on the document placing glass 161, Generate image data. Image data generated by the document reading unit 5 is stored in a built-in HDD or a network-connected computer.

  When the image forming apparatus 1 performs an image forming operation, it is based on image data generated by the document reading operation, image data received from a computer connected to a network, image data stored in a built-in HDD, or the like. Then, the image forming unit 12 forms a toner image on a sheet P as a recording medium fed from the sheet feeding unit 14. When performing color printing, the magenta image forming unit 12M, the cyan image forming unit 12C, the yellow image forming unit 12Y, and the black image forming unit 12Bk of the image forming unit 12 respectively A toner image is formed on the photosensitive drum 121 by charging, exposure, and development processes based on an image composed of each color component constituting data, and the toner image is formed on the intermediate transfer belt 125 by the primary transfer roller 126. Let them transcribe.

  The toner images of the respective colors transferred onto the intermediate transfer belt 125 are superimposed on the intermediate transfer belt 125 with the transfer timing adjusted to form a color toner image. The secondary transfer roller 210 passes the toner image of the color formed on the surface of the intermediate transfer belt 125 from the paper supply unit 14 through the conveyance path 190 at a nip N between the intermediate transfer belt 125 and the driving roller 125a. Transfer is performed on the conveyed paper P. Thereafter, the fixing unit 13 fixes the toner image on the paper P to the paper P by thermocompression bonding. The sheet P on which the color image has been formed after the fixing process is completed is discharged to the discharge tray 151.

  In the image forming apparatus 1, when performing double-sided printing, the sheet P on which an image is formed on one side by the image forming unit 12 is nipped by the discharge roller pair 159, and then the sheet P is loaded. The sheet is switched back by the discharge roller pair 159 and sent to the reverse conveyance path 195, and is conveyed again to the upstream area in the conveyance direction of the paper P with respect to the nip portion N and the fixing unit 13 by the conveyance roller pair 19. As a result, an image is formed on the other side of the sheet by the image forming unit 12.

  Next, the configuration of the image forming apparatus 1 will be described. FIG. 2 is a functional block diagram showing the main internal configuration of the image forming apparatus 1. The image forming apparatus 1 includes a control unit 10, an operation unit 47, a document feeding unit 6, a document reading unit 5, an image forming unit 12, an image processing unit 31, an image memory 32, a drive motor 70, a facsimile communication unit 71, a network interface. Unit 91, HDD 92, power supply control circuit 100, and the like.

  The document reading unit 5 includes a reading mechanism 163 (see FIG. 1) having a light irradiation unit, a CCD sensor, and the like under the control of the control unit 10. The document reading unit 5 reads an image from the document by irradiating the document with the light irradiating unit and receiving the reflected light with a CCD sensor.

  The image processing unit 31 performs image processing on the image data of the image read by the document reading unit 5 as necessary. For example, the image processing unit 31 performs predetermined image processing such as shading correction in order to improve the quality after the image read by the document reading unit 5 is formed by the image forming unit 12.

  The image memory 32 is an area for temporarily storing document image data obtained by reading by the document reading unit 5 and temporarily storing data to be printed by the image forming unit 12.

  The image forming unit 12 forms an image such as print data read by the document reading unit 5 and print data received from the computer 200 connected to the network.

  The operation unit 47 receives instructions from the operator regarding various operations and processes that can be executed by the image forming apparatus 1. The operation unit 47 includes a display unit 473.

  The display unit 473 displays various displays such as an operation screen, a preview screen, and a print job status confirmation screen.

  The facsimile communication unit 71 includes an unillustrated encoding / decoding unit, modulation / demodulation unit, and NCU (Network Control Unit), and performs facsimile transmission using a public telephone network.

  The network interface unit 91 includes a communication module such as a LAN board, and transmits / receives various data to / from the computer 200 in the local area via a LAN connected to the network interface unit 91.

  The HDD 92 is a large-capacity storage device that stores document images and the like read by the document reading unit 5.

  The driving motor 70 is a driving source that applies a rotational driving force to each rotating member of the image forming unit 12, the conveyance roller pair 19, and the like.

  The control unit 10 includes a CPU (Central Processing Unit), a RAM, a ROM, a dedicated hardware circuit, and the like, and controls overall operation of the image forming apparatus 1. The control unit 10 includes a main control unit 101 that controls overall operation of the image forming apparatus 1.

  The main control unit 101 includes an operation unit 47, a document feeding unit 6, a document reading unit 5, an image processing unit 31, an image memory 32, an image forming unit 12, a drive motor 70, a facsimile communication unit 71, a network interface unit 91, and an HDD 92. , And the power supply control circuit 100, etc., to control these units.

  The image forming apparatus 1 is supplied with a commercial voltage (for example, AC 100 V), and the commercial voltage is converted into a DC voltage (for example, DC 24 V) by a power supply circuit (not shown). For example, the DC voltage is converted into various DC voltages by a DC / DC converter (not shown), and the DC voltage is supplied to various electric members and electronic components in the image forming apparatus 1. In the image forming apparatus 1, a power circuit (hereinafter referred to as a power system) is provided for each member or component that controls power supply in order to control power supply to the various electric members and electronic components.

  The power supply control circuit 100 is a circuit that controls the plurality of power supply systems provided in the image forming apparatus 1.

  Next, the configuration of the power supply control circuit 100 will be described. FIG. 3 is an electrical block diagram showing the configuration of the power supply control circuit 100.

  The power supply control circuit 100 includes a sequence control microcomputer 102, a buffer circuit 103, a power supply on / off control circuit 104, and an instantaneous power failure detection circuit 80.

  The sequence control microcomputer 102 outputs a power control signal for sequentially starting or stopping each of the plurality of power systems when the image forming apparatus 1 is turned on or when the image forming apparatus 1 is shifted to a power saving mode (sleep state). It is a dedicated microcomputer. The sequence control microcomputer 102 stores a program for controlling a predetermined power supply sequence for starting or stopping the plurality of power supply systems in order. The sequence control microcomputer 102 outputs a power control signal for each power system by an operation according to the program. The sequence control microcomputer 102 corresponds to a power supply sequence control unit in the claims.

  The sequence control microcomputer 102 starts a power supply sequence in accordance with a request from the main control unit 101. In addition, when the sequence control microcomputer 102 receives the instantaneous power failure detection signal from the instantaneous power failure detection circuit 80, the sequence control microcomputer 102 outputs each power control signal to stop each of the plurality of power supply systems.

  The buffer circuit 103 is a circuit that transmits the power control signal output from the sequence control microcomputer 102 to the power on / off control circuit 104. Further, the buffer circuit 103 switches whether to transmit the power control signal input from the sequence control microcomputer 102 to the power on / off control circuit 104 according to the output enable (OE) signal.

  For example, when the OE signal is active (for example, H level), the buffer circuit 103 transmits the power control signal to the power on / off control circuit 104. On the other hand, when the OE signal is inactive (for example, L level), the output of the buffer circuit 103 becomes high impedance, and the buffer circuit 103 uses the power control signal output from the sequence control microcomputer 102 as the power on / off control circuit. 104 is not transmitted.

  The power on / off control circuit 104 is a circuit for individually starting or stopping each of the plurality of power systems in accordance with the power control signals given through the buffer circuit 103.

  The main control unit 101 requests the sequence control microcomputer 102 to start control for starting or stopping the plurality of power supply systems. The main control unit 101 also outputs an OE signal to the buffer circuit 103 to control whether or not to stop the transmission of the power control signal to the buffer circuit 103. More specifically, the main control unit 101 causes the sequence control microcomputer 102 to start activation or stop of the plurality of power supply systems when the image forming apparatus 1 is turned on or when the image forming apparatus 1 is shifted to the power saving mode (sleep state). , The OE signal is made active, and the buffer circuit 103 transmits the power control signal to the power on / off control circuit 104. On the other hand, for example, after the power supply system is activated by the power on / off control circuit 104, the main control unit 101 deactivates the OE signal during the period when the power supply sequence is not required. The transmission of the power control signal to the power on / off control circuit 104 by 103 is stopped.

  Thus, even if the sequence control microcomputer 102 malfunctions due to the influence of external noise or the like and an unintended power sequence is started, the power control signal is not transmitted to the power on / off control circuit 104. For this reason, for example, even when the sequence control microcomputer 102 becomes abnormal, the power on / off control circuit 104 is prevented from operating by the power control signal output from the abnormal sequence control microcomputer 102, and the power system The situation where each power supply related system operates abnormally can be avoided. For example, even when the sequence control microcomputer 102 falls into an abnormal state, the system can be safely turned off without the system falling into an abnormal state. As a result, even if, for example, an unexpected power interruption occurs due to an abnormality in the sequence control microcomputer 102, the software or memory being rewritten by the main control unit 101 is prevented from being destroyed, and such an unexpected power interruption occurred. Even later, the system can be started up normally at the next startup of the system.

  In addition to the control of the OE signal, at least the main control unit 101 deactivates the OE signal and supplies power to the buffer circuit 103 when executing a predetermined operation that should not cause power interruption. Control for stopping transmission of the control signal may be performed. The predetermined operation that should not cause the power interruption is, for example, an operation in which the main control unit 101 writes data to a nonvolatile memory (not shown). However, the predetermined operation is not limited to the memory write operation.

  In this way, the main control unit 101 stops the transmission of the power control signal to the buffer circuit 103 during the execution of the predetermined operation that should not cause the power interruption, so that the sequence control microcomputer Even when 102 falls into an abnormal state, various power supply systems can be prevented from being suddenly turned off.

  The instantaneous power failure detection circuit 80 is a circuit that detects an instantaneous power failure of the original power source of a power supply system for supplying various drive powers to the image forming unit 12, the fixing unit 13 (FIG. 1), and the like. The instantaneous power failure detection circuit 80 detects an instantaneous power failure of a DC voltage (for example, DC 24V) as the main power source, and upon detection of the instantaneous power failure, an instantaneous power failure detection signal is transmitted to the sequence control microcomputer 102, the buffer circuit 103, and the main control. Output to the unit 101.

  The OE signal input to the buffer circuit 103 is a logical sum signal of the OE signal output from the main control unit 101 and the instantaneous power failure detection signal output from the instantaneous power failure detection circuit 80. Therefore, when the buffer circuit 103 receives the instantaneous power failure detection signal, the power supply control output from the sequence control microcomputer 102 regardless of whether the OE signal output from the main control unit 101 is active or inactive. The signal is transmitted to the power on / off control circuit 104.

  When an instantaneous power failure occurs in the main power supplies of a plurality of power supply systems, the main control unit 101 receives the instantaneous power failure detection signal from the instantaneous power failure detection circuit 80 and deactivates the OE signal of the buffer circuit 103. Stop operation cannot be performed. Therefore, as described above, by activating the OE signal solely by the instantaneous power failure detection signal, the buffer circuit 103 is output from the sequence control microcomputer 102 regardless of a command from the main control unit 101 when an instantaneous power failure occurs. The power supply control signal is transmitted to the power supply on / off control circuit 104, and the power supply sequence corresponding to the instantaneous power failure is made possible promptly.

  At this time, for example, when the main control unit 101 receives a momentary power failure detection signal from the momentary power failure detection circuit 80 while data is being written in a nonvolatile memory (not shown), Stop writing data to the memory after the memory is not damaged. That is, when the main control unit 101 receives a momentary power failure detection signal, the main control unit 101 performs a process of setting a state in which data and memory are not damaged even when the power is cut off as a predetermined sequence for the power cut. To complete.

  The reason for completing the sequence is that when an instantaneous power failure of the original power source is detected by the instantaneous power failure detection circuit 80, the instantaneous power failure detection signal is also transmitted to the sequence control microcomputer 102, and the sequence control microcomputer 102 starts the power supply stop sequence. This is because the power source of the main control unit 101 and the nonvolatile memory may be stopped during data writing.

  Here, the instantaneous power failure detection signal output from the instantaneous power failure detection circuit 80 is configured to be input to the main control unit 101 before the buffer circuit 103. For example, the instantaneous power failure detection circuit 80 sets the instantaneous power failure detection signal output to the main control unit 101 to 18 (V) and the instantaneous power failure detection signal output to the buffer circuit 103 to 6 (V). A potential difference is provided in the voltage. When the drive voltage of the instantaneous power failure detection circuit 80 is 24 (V), the instantaneous power failure detection circuit 80 internally generates the instantaneous power failure detection signal by dropping the drive voltage 24 (V) to 18 (V). An instantaneous power failure detection signal is output to the control unit 101, the drive voltage 24 (V) is reduced to 6 (V), an instantaneous power failure detection signal for the buffer circuit 103 is generated, and the instantaneous power failure detection signal is output to the buffer circuit 103. . As a result, the timing at which the instantaneous power failure detection signal is output from the instantaneous power failure detection circuit 80 to the buffer circuit 103 is delayed from the timing at which it is output to the main control unit 101 by the time required for the voltage drop. As a result, the main control unit 101 receives the instantaneous power failure detection signal at a timing earlier than that of the buffer circuit 103. Therefore, the main control unit 101 uses the time difference between the timings of receiving the instantaneous power failure detection signal between the two to determine the predetermined value. Complete the sequence.

  That is, an instantaneous blackout detection signal is input to the buffer circuit 103 at a timing after the completion of the predetermined sequence by the main control unit 101, and the buffer circuit 103 performs sequence control according to the instantaneous blackout detection signal. The power supply control signal output from the microcomputer 102 is switched to a state where the power supply control signal is transmitted to the power supply on / off control circuit 104.

  When the image forming apparatus 1 shifts to the power saving mode (sleep state), the main control unit 101 communicates with the sequence control microcomputer 102 to check whether the operation state of the sequence control microcomputer 102 is normal. May be. If the operation state of the sequence control microcomputer 102 is normal, as described above, the main control unit 101 activates the OE signal, and then requests the sequence control microcomputer 102 to start a power supply stop sequence.

  On the other hand, if the operation state of the sequence control microcomputer 102 is abnormal, the power supply stop sequence cannot be correctly performed. Therefore, the main control unit 101 determines that the operation state of the sequence control microcomputer 102 is abnormal, and outputs, for example, an OE signal. After the predetermined sequence (such as interruption of data writing to the memory) is executed in preparation for the power-off state of the image forming apparatus 1 while being inactive, the image forming apparatus 1 is turned on by the display unit 473. A message prompting to turn it off or restart may be displayed. As a result, the image forming apparatus 1 is turned off or restarted by the user, and the operation of the sequence control microcomputer 102 in an abnormal state can be stopped or the sequence control microcomputer 102 can be reset.

  Next, an operation when the image forming apparatus 1 is started will be described. FIG. 4 is a flowchart showing an operation at the time of starting the image forming apparatus 1.

  The user turns on the image forming apparatus 1 and the image forming apparatus 1 is activated (S11). Immediately after the image forming apparatus 1 is activated, the main control unit 101 activates the OE signal of the buffer circuit 103 so that the power control signal is transmitted to the power on / off control circuit 104 (S12). When the sequence control microcomputer 102 starts operation, the predetermined power supply sequence for starting and stopping the plurality of power supply systems in order is executed (S13), and the power supply control signal output from the sequence control microcomputer 102 is a buffer circuit. It is transmitted to the power on / off control circuit 104 via 103 (S14). As a result, various power supply systems in the image forming apparatus 1 are sequentially started, and power is also supplied to the main control unit 101.

  The main control unit 101 starts operation when power is supplied (S15), and deactivates the OE signal of the buffer circuit 103 (S16).

  As a result, even if the sequence control microcomputer 102 falls into an abnormal state and an unintended power control signal is output, the power control signal is transmitted to the power on / off control circuit 104 via the buffer circuit 103. The power is not suddenly turned off.

  Next, an operation when the image forming apparatus 1 shifts to the power saving mode will be described. FIG. 5 is a flowchart showing an operation when shifting to the power saving mode.

  Before the transition to the power saving mode, the OE signal of the buffer circuit 103 is inactive as described above. Prior to shifting to the power saving mode, the main control unit 101 communicates with the sequence control microcomputer 102 to confirm the operation state of the sequence control microcomputer 102 (S21). Here, if the sequence control microcomputer 102 is operating normally (YES in S22), the main control unit 101 activates the OE signal of the buffer circuit 103, and the power control signal is sent to the power on / off control circuit 104. A state where transmission is possible is set (S23). The main control unit 101 requests the sequence control microcomputer 102 to start a predetermined power supply stop sequence (S24). When receiving the request from the main control unit 101, the sequence control microcomputer 102 executes the power supply stop sequence (S25). As a result, a power control signal is transmitted from the sequence control microcomputer 102 to the power on / off control circuit 104 via the buffer circuit 103, and various power systems are stopped.

  On the other hand, if the operation state of the sequence control microcomputer 102 is abnormal (NO in S22), the main control unit 101 performs the above-described predetermined sequence for preparing for the power-off state (S26). For example, the main control unit 101 interrupts data writing to a non-illustrated non-volatile memory. Then, the main control unit 101 causes the display unit 473 to display a message that prompts the user to turn off or restart the image forming apparatus 1 (S27). Accordingly, when the user turns off or restarts the image forming apparatus 1, the operation of the sequence control microcomputer 102 in an abnormal state can be stopped or the sequence control microcomputer 102 can be reset.

  As described above, according to the present embodiment, the power of the image forming apparatus 1 can be turned off without the image forming apparatus 1 being in an abnormal state even when the sequence control microcomputer 102 is locked. . As a result, it is possible to prevent the program or data being written or the memory from being damaged or the memory from being destroyed due to an unexpected power interruption, and to start the image forming apparatus 1 normally properly.

  The present invention is not limited to the configuration of the above embodiment, and various modifications can be made. For example, the multifunction apparatus is used as an embodiment of the image forming apparatus according to the present invention. However, this is only an example, and other image forming apparatuses such as a printer and a FAX machine may be used. Further, since the image forming apparatus 1 is merely an example of the electronic apparatus according to the present invention, the electronic apparatus according to the present invention is not limited to the image forming apparatus 1.

  Moreover, the structure and process shown by the said embodiment using FIG. 1 thru | or FIG. 5 are only one Embodiment of this invention, and are not the meaning which limits this invention to the said structure and process.

DESCRIPTION OF SYMBOLS 1 Image forming apparatus 80 Instantaneous power failure detection circuit 100 Power supply control circuit 101 Main control part 102 Sequence control microcomputer (Power supply sequence control part)
103 Buffer Circuit 104 Power On / Off Control Circuit 473 Display Unit

Claims (4)

A power sequence control unit that outputs each power control signal for starting and stopping each of a plurality of power systems;
A power on / off control circuit for individually starting / stopping each of the plurality of power supply systems in accordance with the given power control signals;
A buffer circuit that switches between transmission and non-transmission of the power control signal output from the power sequence control unit to the power on / off control circuit;
After the plurality of power systems are activated by the power on / off control circuit via the buffer circuit by the output of the power control signal from the power sequence control unit, the buffer circuit is connected to the power control signal. A main controller that switches to a state in which the power is not transmitted to the power on / off control circuit ,
The main control unit switches the buffer circuit to a state in which the power control signal output from the power sequence control unit is transmitted to the power on / off control circuit when terminating the plurality of power systems. machine. Detecting an instantaneous power failure of the original power supply of the plurality of power supply systems, comprising an instantaneous power failure detection signal for outputting an instantaneous power failure detection signal to the power sequence control unit, the buffer circuit, and the main control unit,
The main control unit, when executing a predetermined operation that should not cause a power interruption, when receiving the instantaneous power failure detection signal, to complete a predetermined sequence to prepare for power interruption,
The power supply sequence control unit outputs a power supply control signal for sequentially stopping each of the plurality of power supply systems when receiving the instantaneous power failure detection signal,
The buffer circuit receives the instantaneous power failure detection signal at a timing after the completion of the predetermined sequence by the main control unit, and the buffer circuit responds to the instantaneous power failure detection signal with the power supply sequence. The electronic device according to claim 1 , wherein the electronic device is switched to a state in which a power control signal output from the control unit is transmitted to the power on / off control circuit. It is equipped with a display unit that displays various information.
When the main control unit determines that the operation state of the power sequence control unit is abnormal, the main control unit completes a predetermined sequence to prepare for power shutdown, and then causes the display unit to power off or the electronic device according to claim 1 or claim 2 to display a message prompting a restart. An electronic device according to any one of claims 1 to 3 ,
An image forming apparatus including an image forming unit that forms an image on a recording medium.

Images