JP6265116B2 - Image forming apparatus - Google Patents

Description

  The present invention relates to an image forming apparatus including an image processing circuit that performs image processing and an engine processing circuit that controls a portion that performs printing.

  An image forming apparatus such as a multifunction machine, a copier, a printer, or a facsimile machine performs printing based on received image data obtained by scanning. The image forming apparatus includes a circuit that performs image processing of image data and a circuit that controls a printing operation such as a motor operation control. In some cases, a signal for instructing an operation mode is given to a circuit that controls the printing operation. An example of such an image forming apparatus is described in Patent Document 1.

  Specifically, Patent Document 1 discloses a video control unit that generates a video signal from image information, a recording control unit that records an image represented by the video signal generated by the video control unit, and a connection between the video control unit and the recording control unit. The recording control means has a plurality of levels of energy saving modes, and the communication means has means for designating one mode of the video control means among the plurality of levels of energy saving modes. Including an image recording device is described. With this configuration, it is attempted to perform energy saving control of the recording control means in accordance with various usage states of the printer (see Patent Document 1: Claim 1, paragraph [0007], etc.).

JP 07-336486 A

  The image forming apparatus is provided with an image processing circuit. The image processing circuit generates image information used for image formation such as toner image formation. The image processing circuit outputs the image information to an image forming unit that forms an image based on the image information. The image processing circuit is provided with a register for outputting image information in accordance with the specifications of the image forming unit. The image processing circuit outputs image information to the image forming unit at the communication speed and transmission mode set by the register. If the register is not set, the image processing circuit cannot properly send out image information. Further, the image forming unit cannot properly receive the image information. The register is set when the main power supply of the image forming apparatus is turned on or when the power saving mode is returned to the normal mode.

  The image forming apparatus may be provided with an engine processing circuit that is different from the image processing circuit and controls a printing unit that performs printing such as an image forming unit. The engine processing circuit may set the register.

  The image processing circuit may be designed on the assumption that it is installed in many models (for example, ASIC). There is a merit that the price of the image processing circuit (ASIC) can be suppressed by the mass production effect based on the installation in many models. Such an image processing circuit is not limited to which model of the image forming apparatus.

  Therefore, information on the specifications of the image forming apparatus (image forming unit) is provided on the engine processing circuit side. Then, the engine processing circuit sets the register of the image processing circuit in accordance with the specifications of the image forming unit. Accordingly, the image information can be output at an appropriate speed, interval, and transmission mode to the video unit of the image processing circuit in accordance with the specifications of the image forming unit. As described above, the engine processing circuit may set the register of the image processing circuit.

  Here, the register is set as one of start-up processing (warm-up processing) when the main power is turned on or when returning from the power saving mode to the normal mode. Further, since the image processing circuit and the engine processing circuit are separate circuits, power supply to the image processing circuit and the engine processing circuit is started separately when the main power is turned on or when the power saving mode is returned to the normal mode.

  In order to set the register, it is necessary that the image processing circuit starts up and that the register in the image processing circuit can be set. However, the engine processing circuit and the image processing circuit perform activation processing separately. Also, even if the image processing circuit and the engine processing circuit are connected by a signal line such as a bus, the image processing circuit is in a state where the register in the image processing circuit can be set because the startup process is in progress. The data communication line between the engine processing circuit and the engine processing circuit may not be open.

  For these reasons, the engine processing circuit cannot know without any time difference that the registers in the image processing circuit can be set. Therefore, the engine processing circuit starts the register setting after a predetermined waiting time has elapsed from the start of activation. In any case, an excessive margin (temporal margin) is added to the waiting time so that the setting of the register is started after the register can be set.

  However, by giving an excessive margin to the waiting time, the time until the completion of activation becomes longer. For example, the waiting time is a time obtained by adding a margin of one to several seconds to the average time from the start of the engine processing circuit until the register can be set. Therefore, when the main power is turned on or when returning from the power saving mode to the normal mode, there is a problem that the time until warming up (warm-up time) may become long.

  In this regard, setting of the register in the conventional image forming apparatus will be described with reference to FIG. FIG. 8 is a timing chart for explaining the conventional register setting.

  The uppermost chart in FIG. 8 is a chart showing the ON / OFF timing of power supply to the image processing circuit. The middle chart in FIG. 8 is a chart showing ON / OFF timing of power supply to the engine processing circuit. The bottom chart in FIG. 8 is a signal line that has been provided conventionally, and the state transition of the signal line (power saving mode signal line) that notifies the engine processing circuit to shift to the power saving mode is shown. It is a chart which shows. Note that High of the power saving mode signal line indicates a normal mode, and Low indicates a power saving mode.

  B1 in FIG. 8 is the time when the main power supply of the multi-function peripheral is turned on. Thereby, power supply to the image processing circuit and the engine processing circuit is started. B2 in FIG. 8 shows an example of a point in time when the register of the image processing circuit can be set. Then, after the main power supply is turned on, the image forming apparatus starts up in the normal mode, so that the image processing circuit sets the state of the power saving mode signal line to High between b1 and b2, for example.

  B3 in FIG. 8 is an example of a time point when a signal line for data communication provided between the engine processing circuit and the image processing circuit is opened (a time point when data communication between the engine processing circuit and the image processing circuit becomes possible). Show. Further, a time point b4 in FIG. 8 is a time point when the engine processing circuit starts setting the register of the image processing circuit as one of the activation processes. B5 in FIG. 8 is a time point when the mode is shifted from the normal mode to the power saving mode. Since the image processing circuit shifts to the power saving mode, the image processing circuit sets the state of the power saving mode signal line to Low. In accordance with this, the engine processing circuit performs predetermined processing (for example, saving of data to a nonvolatile memory) when it is performed in the power saving mode. In addition, power supply to the image processing circuit and the engine processing circuit is stopped at time b5.

  B6 in FIG. 8 is a time point when the power saving mode returns to the normal mode. Since the normal mode is restored, the power supply to the image processing circuit and the engine processing circuit is resumed at time b6. The image processing circuit sets the state of the power saving mode signal line to High at the time point b6. B7 in FIG. 8 illustrates an example of a point in time at which the register of the image processing circuit can be set during the startup process associated with the return to the normal mode. B8 in FIG. 8 illustrates an example of a point in time at which the signal line for data communication between the engine processing circuit and the image processing circuit resumes during the startup process associated with the return to the normal mode. Further, a time point b9 in FIG. 8 is a time point when the engine processing circuit starts setting the registers of the image processing circuit again.

  In FIG. 8, B1 represents a predetermined waiting time from the start of the engine processing circuit to the start of register setting. A margin from when the register can be set to when setting is actually started is indicated by B2.

  Note that the technique described in Patent Document 1 is a technique for designating one mode of the video control means among a plurality of levels of energy saving modes, and when the main power is turned on or during the startup process accompanying the return to the normal mode. There is no description about the register setting. Therefore, the technique described in Patent Document 1 cannot solve the problem that the time until warming up (warm-up time) is long due to a margin.

  In view of the above-described problems of the prior art, the present invention enables the setting of a register to be started as soon as the register can be set, and shortens the time until completion of activation (warm-up time).

In order to solve the above problem, an image forming apparatus according to claim 1 includes a power supply unit that supplies power, an image forming unit that forms an image, a printing unit that prints on paper, and image information of an image to be formed. An image processing circuit including a video unit to be output to the image forming unit and an operation setting register for the video unit, an engine processing circuit for controlling the operation of the printing unit and setting the register, and the engine processing circuit And a signal line for register setting, which is a signal line for setting the register, and a signal line different from the signal line for register setting, the engine processing circuit and the image processing circuit including a single notification signal line connecting circuit. The image processing circuit sets the state of the notification signal line of the register in accordance with the state that the register is settable during the start-up process associated with turning on the main power or returning from the power saving mode to the normal mode. from the state indicating the Call Setup Ru is changed to a state indicating the register can be set. The engine processing circuit, when the activation processing said notification signal line in the state is ready available to indicate the register setting, then starts setting of said register. Specifically, the image processing circuit also uses the notification signal line as a sleep signal line for notifying the shift to the power saving mode. The image processing circuit changes the notification signal line to a state indicating the normal mode before starting the setting of the register and before shifting to the power saving mode, and enters the state indicating the power saving mode when shifting to the power saving mode. The state of the notification signal line is changed. The power supply unit stops power supply to the image processing circuit and the engine processing circuit in accordance with the shift to the power saving mode.

  According to the present invention, when the register can be set, the register setting can be started immediately. Accordingly, the time until the completion of activation (warm-up time) is significantly shortened, and the waiting time of the user until the image forming apparatus becomes usable can be shortened.

1 is a diagram illustrating an example of a multifunction machine according to an embodiment. 1 is a diagram illustrating an example of a configuration of a multifunction machine. It is a figure for demonstrating the transfer to power saving mode and the return to normal mode from power saving mode. It is a figure for demonstrating the electric power supply to the main control part and engine control part in the multifunctional device which concerns on embodiment. It is a figure for demonstrating the setting of the register by engine CPU. 5 is a flowchart illustrating an example of a register setting flow in the multifunction peripheral according to the embodiment. 6 is a timing chart for explaining register settings in the multifunction peripheral according to the embodiment. It is a timing chart for demonstrating the conventional register setting.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. In the following description, the multifunction peripheral 100 (corresponding to an image forming apparatus) will be described as an example. However, each element such as configuration and arrangement described in this embodiment does not limit the scope of the invention and is merely an illustrative example.

(Outline of image forming apparatus)
Next, an outline of the multifunction peripheral 100 according to the embodiment will be described with reference to FIG. FIG. 1 is a diagram illustrating an example of a multifunction peripheral 100 according to the embodiment.

  As shown in FIG. 1, an operation panel 1 (illustrated by a broken line) is provided on the front surface of the multifunction peripheral 100, and a document conveying portion 2a and an image reading portion 2b are provided on the upper portion. In addition, a printing unit 3 that performs printing on a sheet is provided in the multifunction peripheral 100. The printing unit 3 includes a paper feeding unit 3a, a conveying unit 3b, an image forming unit 3c, and a fixing unit 3d.

  The operation panel 1 includes a display unit 11 that displays the status of the multifunction peripheral 100, a message, and a setting screen. A touch panel unit 12 is provided on the upper surface of the display unit 11. The touch panel unit 12 is for detecting a soft key displayed on the display unit 11 and operated (pressed) by the user. The operation panel 1 is also provided with a hard key group 13 including a plurality of hard keys such as a start key, a numeric keypad, a main power switch 14 and a power saving key 15. The operation panel 1 accepts an input by the user to the touch panel unit 12 and the hard key group 13 as a setting operation.

  The document transport unit 2a automatically and continuously transports the set documents one by one toward the feed reading contact glass (reading position, not shown). The image reading unit 2b reads a document passing through the feed reading contact glass and a document set on a placement reading contact glass (not shown) to generate image data.

  Of the printing unit 3, the paper feeding unit 3a accommodates a plurality of sheets. In the multifunction machine 100 of the present embodiment, two cassettes 3f are provided as the paper feed unit 3a. When executing a print job, one of the cassettes 3f feeds the sheets one by one to the transport unit 3b. The transport unit 3b transports the paper supplied from the paper feed unit 3a. The image forming unit 3c forms a toner image (image) based on the image data (image information), and transfers the toner image onto the conveyance sheet. The fixing unit 3d fixes the toner image transferred to the paper. The paper after toner fixing is discharged to the discharge tray 3e.

(Hardware configuration of image forming apparatus)
Next, an example of a hardware configuration of the image forming apparatus (multifunction peripheral 100) according to the embodiment will be described with reference to FIG. FIG. 2 is a diagram illustrating an example of the configuration of the multifunction peripheral 100.

  A main control unit 4 is provided in the multifunction peripheral 100. The main control unit 4 is a substrate (controller substrate). The main control unit 4 controls the operation of the image forming apparatus. A CPU 40 and an image processing circuit 5 (a dedicated circuit related to image processing such as ASIC) are attached to the main control unit 4. In this description, an example in which the CPU 40 and the image processing circuit 5 are separate from each other will be described. However, the CPU 40 may include the image processing circuit 5. In other words, the CPU 40 and the image processing circuit 5 may be integrated into one chip.

  A storage unit 41 is attached to the main control unit 4. The storage unit 41 is a combination of a nonvolatile storage device such as a ROM, a flash ROM, and an HDD (hard disk drive) and a volatile storage device such as a RAM.

  The CPU 40 performs calculation, control, and processing based on data and programs stored in the storage unit 41. The CPU 40 controls the operation of the multifunction device 100. On the other hand, the image processing circuit 5 performs image processing on image data obtained by reading an original document by the image reading unit 2 b and image data input to the multifunction peripheral 100. This image processing is performed based on the settings made on the operation panel 1 and the print settings attached to the data input to the multifunction peripheral 100. The image processing circuit 5 performs image processing necessary for printing and transmission such as density conversion, enlargement, reduction, and format conversion according to the setting.

  In addition to the main control unit 4, an engine control unit 6 is provided. The engine control unit 6 receives an instruction from the main control unit 4 and actually controls the operation of the printing unit 3. The engine control unit 6 is a board (engine board).

  Further, the multifunction device 100 is provided with a communication unit 42 including various sockets and a communication control chip. The communication unit 42 is communicably connected to the network 300 (for example, LAN) and the facsimile apparatus 400. The communication unit 42 can exchange data with the computer 200 (for example, a PC or a server) via the network 300. In addition, by directly connecting the computer 200 and the communication unit 42 with a cable, data communication between the communication unit 42 and the computer 200 can be performed without using a network.

  The multi-function device 100 can receive print data including data and image data described in a page description language from the computer 200 and the facsimile apparatus 400. The image processing circuit 5 performs image processing on the print data to generate image information. The printing unit 3 performs printing based on the image information (printer function, facsimile function). Further, the multi-function device 100 can transmit image data for transmission generated by the image processing circuit 5 performing image processing on image data obtained by reading an original document to the computer 200 or the facsimile apparatus 400 (transmission function).

  The main control unit 4 is connected to each part of the operation panel 1, the document conveying unit 2a, the image reading unit 2b, the engine control unit 6, and the communication unit 42 through signal lines such as a bus. The main control unit 4 recognizes the presence and state of each unit via the signal line. The main control unit 4 gives operation commands to the operation panel 1, the document conveying unit 2 a, the image reading unit 2 b, the engine control unit 6, and the communication unit 42, and controls the operation (scanning operation and printing operation) of the multifunction peripheral 100. To do.

(Normal mode and power saving mode)
Next, the mode of the multifunction peripheral 100 according to the embodiment will be described with reference to FIGS. 3 and 4. FIG. 3 is a diagram for explaining the transition to the power saving mode and the return from the power saving mode to the normal mode. FIG. 4 is a diagram for explaining power supply to the main control unit 4 and the engine control unit 6 in the multifunction peripheral 100 according to the embodiment.

  First, the multifunction device 100 of the present embodiment is provided with a power supply unit 8. The electric power from the commercial power source P is input to the power supply unit 8 by connecting a power cord (not shown) and an outlet. The power supply unit 8 generates a DC voltage based on the power from the commercial power supply P. Specifically, the power supply unit 8 includes a primary power supply circuit 81 that rectifies an AC voltage supplied from the commercial power supply P and generates a DC voltage. For example, the primary power supply circuit 81 is a switching power supply including elements such as a transformer, a transistor, and a capacitor.

  When the main power is turned on by the main power switch 14 of the multifunction device 100, the multifunction device 100 starts in the normal mode. The normal mode is a mode in which all functions of the multifunction device 100 can be used. Therefore, in the normal mode, the power supply unit 8 includes the power supply unit 8 constituting the multifunction peripheral 100 such as the document conveyance unit 2a, the image reading unit 2b, the operation panel 1, the main control unit 4, the engine control unit 6, and the printing unit 3. Power is supplied to all parts other than. When the main power supply is turned off by the main power switch 14, the power supply unit 8 stops supplying power to the portion that supplies power in the normal mode.

  Specifically, in the normal mode, the power supply unit 8 supplies power to circuits such as the main control unit 4, the storage unit 41, and the engine control unit 6 to operate them. Further, in order to maintain the temperature of the fixing unit 3d of the printing unit 3 at a temperature suitable for fixing, the heater 310 is energized. Therefore, even if no job is being executed, the multifunction peripheral 100 consumes a relatively large amount of power.

  Therefore, when a predetermined transition condition is satisfied in the normal mode, the main control unit 4 sets the multifunction peripheral 100 to the power saving mode. The power saving mode is a mode for reducing power consumption by stopping power supply to a predetermined supply stop portion among portions where power is supplied in the normal mode. For example, the document conveying unit 2a, the image reading unit 2b, the operation panel 1, the printing unit 3, the main control unit 4, and the engine control unit 6 are the supply stop portions. As described above, the multifunction peripheral 100 according to the present embodiment has the normal mode and the power saving mode. Note that, in order to be able to receive data from a computer or a facsimile machine, power is supplied to at least the communication unit 42 in the power saving mode.

  The power supply destination of the power supply unit 8 changes between the normal mode and the power saving mode. Therefore, in the normal mode, the power supply unit 8 supplies power to the supply stop portion, and in the power saving mode, stops the power supply to the supply stop portion. A supply control unit 82 that performs OFF control is provided. The supply control unit 82 includes a switching element such as one or a plurality of semiconductor switches. The supply control unit 82 supplies power to the supply stop portion by turning on the switching element in the normal mode, and stops supplying power to the supply stop portion by turning off the switching element in the power saving mode. (See FIGS. 3 and 4).

<Normal mode → Power saving mode>
Transition conditions from the normal mode to the power saving mode are determined in advance. In the MFP 100 of this embodiment, an operation (pressing) of the power saving key 15 provided on the operation panel 1 and instructing the transition from the normal mode to the power saving mode is one of the conditions for shifting to the power saving mode. The When the power saving key 15 is pressed, the operation panel 1 notifies the CPU 40 of the main control unit 4 that the power saving key 15 has been pressed. Thereby, the CPU 40 recognizes that the transition condition is satisfied.

  In addition, after entering the normal mode or after completion of the job, the operation detection unit does not detect any operation or input to the multifunction device 100 (no operation and remains in a standby state), and a predetermined power saving mode transition time. Elapsed time (for example, several tens of seconds to several minutes) is also a condition for shifting to the power saving mode. For example, the CPU 40 of the main control unit 4 measures the power saving mode transition time.

  Here, as illustrated in FIG. 3, a plurality of operation detection units that detect operations and inputs to the multifunction peripheral 100 are provided. The multifunction device 100 includes a communication unit 42, a touch panel unit 12, an insertion / removal detection sensor S1, a cover open / close detection sensor S2, a document placement detection sensor S3, and an open / close detection sensor S4 as operation detection units. The power supply unit 8 (supply control unit 82) supplies power to the operation detection unit even in the power saving mode.

  The communication unit 42 receives print data and image data transmitted from the computer 200 and the facsimile apparatus 400. When receiving the printing data or the image data, the communication unit 42 transfers the printing data to the main control unit 4 or the storage unit 41. Further, the touch panel unit 12 detects an operation on the operation panel 1 by the user, and notifies the CPU 40 of the main control unit 4 when there is an operation.

  The insertion / removal detection sensor S1 is a sensor for detecting insertion / removal of a cassette 3f (see FIG. 1) that accommodates paper in the paper feed unit 3a. For example, the insertion / removal detection sensor S1 is an interlock switch that contacts the cassette 3f. The cover opening / closing detection sensor S2 is a sensor that detects opening / closing of a cover (for example, a cover on the right side surface) of the multifunction peripheral 100 provided for jam processing, maintenance, and the like. For example, the cover open / close detection sensor S2 is an interlock switch in contact with the optical sensor or the cover.

  The document placement detection sensor S3 is provided in the document transport unit 2a and is a sensor for detecting the presence or absence of a document on a document tray for placing a document. For example, the document placement detection sensor S3 is an optical sensor. The open / close detection sensor S4 is a sensor for detecting whether or not the document conveying portion 2a is lifted (opened / closed). For example, the open / close detection sensor S4 is an optical sensor.

  Outputs of these operation detection units are input to the main control unit 4. Accordingly, the main control unit 4 recognizes whether or not there is an operation on the multifunction device 100, and when the power saving mode transition time has elapsed while detecting that there is no operation or input to the multifunction device 100, the power saving mode transition condition Is determined to be satisfied. When the main control unit 4 (CPU 40) recognizes that the power saving mode shift condition is satisfied, the main control unit 4 (CPU 40) instructs the supply control unit 82 of the power supply unit 8 to shift to the power saving mode. Thereby, the power supply part 8 stops the electric power supply to a supply stop part.

<Power saving mode → Normal mode>
In the power saving mode, a job such as printing cannot be executed. In order to execute the job, it is necessary to return the multifunction peripheral 100 to the normal mode. Therefore, when a predetermined normal mode return condition is satisfied, the multifunction peripheral 100 returns to the normal mode. The conditions for returning from the power saving mode to the normal mode are predetermined. In the MFP 100 of the present embodiment, the operation (pressing) of the main power switch 14 provided on the operation panel 1 is one of the conditions for returning to the normal mode. In the multifunction device 100 of the present embodiment, the return condition is that the operation detection unit described above detects an operation or an input to the multifunction device 100.

  Outputs of the main power switch 14 and each operation detection unit are input to the power supply unit 8 (supply control unit 82). Thereby, the power supply unit 8 recognizes that the return condition is satisfied. And the supply control part 82 of the power supply part 8 restarts the electric power supply to a supply stop part. As a result, the mode of the multifunction device 100 returns from the power saving mode to the normal mode.

  In this description, the example in which the supply control unit 82 detects that the return condition is satisfied has been described. However, the CPU 40 may detect that the return condition is satisfied. In this case, power is supplied to necessary circuits in the CPU 40 of the main control unit 4 even in the power saving mode. And the output of the main power switch 14 and each operation detection part is input into CPU40, and CPU40 is made to detect that return conditions were satisfy | filled. Then, the CPU 40 instructs the power supply unit 8 to return to the normal mode, and in response thereto, the power supply unit 8 resumes the power supply to the supply stop portion.

(Power supply to the main control unit 4 and the engine control unit 6)
Next, based on FIG. 4, power supply to the main control unit 4 and the engine control unit 6 in the multifunction peripheral 100 according to the embodiment will be described. In FIG. 4, the power supply path is indicated by a thick broken line.

  The DC voltage generated by the primary power supply circuit 81 is input to the secondary power supply circuit 831 of the main control unit 4 via the supply control unit 82. The DC voltage generated by the primary power supply circuit 81 is input to the secondary power supply circuit 832 of the engine control unit 6 and the printing unit 3 via the supply control unit 82.

  The secondary power supply circuit 831 of the main control unit 4 converts the DC voltage generated by the primary power supply circuit 81. In other words, the secondary power supply circuit 831 steps down the DC voltage generated by the primary power supply circuit 81. The secondary power supply circuit 831 generates a voltage required for driving elements, circuits, and devices attached to the main control unit 4 such as the CPU 40, the storage unit 41, and the image processing circuit 5. A DCDC converter or a regulator can be used as the secondary power supply circuit 831. A secondary power supply circuit 831 for the main control unit 4 may be provided in the power supply unit 8 (power supply board).

  Here, there may be a plurality of types of voltages necessary for driving the circuits, elements, and devices attached to the main control unit 4 so that the CPU 40 alone may need to input a plurality of types of voltages. In such a case, the secondary power supply circuit 831 includes a plurality of DCDC converters and regulators, and generates a plurality of types of voltages. For convenience, in FIG. 4, the power supply output of the secondary power supply circuit 831 is indicated by a single thick broken line.

  When the main power supply of the multifunction peripheral 100 is turned on by the main power switch 14, the power supply unit 8 starts supplying power to the secondary power supply circuit 831 of the main control unit 4. For example, the supply control unit 82 starts supplying power to the main control unit 4 in accordance with the operation of the main power switch 14.

  The main control unit 4 is provided with a power supply control circuit 841. The power supply control circuit 841 starts supplying power to elements, circuits, and devices attached to the main control unit 4 such as the CPU 40, the storage unit 41, and the image processing circuit 5 in a predetermined order when the main power supply is turned on. To do. This is because if power is supplied in an appropriate order, malfunctions may occur and current may flow in an inappropriate direction. For example, the CPU 40 is the first power supply order. In other words, the power supply control circuit 841 is a sequence circuit that controls the order of power supply to each part in the main control unit 4.

  Along with the start of power supply, the start-up process is started in each of the elements, circuits, and devices attached to the main control unit 4 such as the CPU 40, the storage unit 41, and the image processing circuit 5. In the activation process, the activation program and data stored in the storage unit 41 are read and the read program is executed.

  When the main power supply of the multifunction peripheral 100 is turned off by the main power switch 14, the power supply unit 8 (supply control unit 82) stops supplying power to the secondary power supply circuit 831. The CPU 40 recognizes that the main power has been turned off by operating the main power switch 14. Then, the CPU 40 performs a predetermined process at the time of shut-off, and then notifies the power supply unit 8 (supply control unit 82) that the main power supply is turned off. Then, the power supply unit 8 stops power supply to the main control unit 4.

  Further, the power supply unit 8 (supply control unit 82) stops supplying power to the main control unit 4 when shifting to the power saving mode. Thereby, the power supply to the CPU 40, the image processing circuit 5, and the storage unit 41 is stopped.

  When returning from the power saving mode to the normal mode based on a signal from the operation detection unit or the main power switch 14 based on the operation and input, the power supply to the main control unit 4 is resumed. Then, the power supply control circuit 841 resumes power supply to the elements, circuits, and devices attached to the main control unit 4 in a predetermined order. Thereby, the start-up process in the circuit of the main control unit 4 such as the image processing circuit 5 is started.

  Next, power supply to the engine control unit 6 (engine board) will be described. First, the engine control unit 6 is a board on which circuits such as an engine CPU 7 (corresponding to an engine processing unit) and an engine memory 60 are attached (mounted).

  The engine memory 60 includes ROM and RAM, and stores data and programs for controlling the printing unit 3. When a print job such as copying or printing is executed, an instruction indicating what printing operation should be performed (print contents) is transmitted from the main control unit 4 to the engine control unit 6 (engine CPU 7). . The engine CPU 7 controls the operation of the printing unit 3 based on an instruction from the main control unit 4 and a program and data stored in the engine memory 60 and causes the printing unit 3 to perform printing.

  The engine control unit 6 is provided with a secondary power supply circuit 832. The DC voltage generated by the primary power supply circuit 81 is input to the secondary power supply circuit 832 of the engine control unit 6 via the supply control unit 82. A secondary power supply circuit 832 for the engine control unit 6 may be provided in the power supply unit 8 (power supply board).

  The secondary power supply circuit 832 of the engine control unit 6 converts the DC voltage generated by the primary power supply circuit 81. In other words, the secondary power supply circuit 832 steps down the DC voltage generated by the primary power supply circuit 81. The secondary power supply circuit 832 generates a voltage required for driving elements, circuits, and devices attached to the engine control unit 6 such as the engine CPU 7 and the engine memory 60. Similarly to the secondary power supply circuit 831, a DCDC converter or a regulator can be used as the secondary power supply circuit 832.

  Here, there are cases where a plurality of types of voltages necessary for driving circuits, elements, and devices attached to the engine control unit 6 are required, so that only a plurality of types of voltages need to be input by the engine CPU 7 alone. Therefore, the secondary power supply circuit 832 also includes a plurality of DCDC converters and regulators, and generates a plurality of types of voltages. For convenience, in FIG. 4, the power supply line from the secondary power supply circuit 832 to the engine CPU 7 and the engine memory 60 is indicated by only one thick broken line.

  When the main power supply is turned on by the main power switch 14, the power supply unit 8 starts supplying power to the secondary power supply circuit 832 of the engine control unit 6. For example, the operation of the main power switch 14 causes the supply control unit 82 to start supplying power to the engine control unit 6.

  The engine control unit 6 is provided with a power supply control circuit 842. The power supply control circuit 842 starts power supply to elements, circuits, and devices attached to the engine control unit 6 such as the engine CPU 7 and the engine memory 60 in a predetermined order when the main power supply is turned on. For example, power supply is started from the engine CPU 7. In other words, the power supply control circuit 842 is a sequence circuit that controls the order of power supply to each part in the engine control unit 6. With the start of power supply, start-up processing is started in each of the elements, circuits, and devices attached to the engine control unit 6 such as the engine CPU 7 and the engine memory 60. In the activation process, the activation program and data stored in the engine memory 60 and the storage unit 41 are read and the read program is executed.

  When the main power supply is turned off by the main power switch 14, the power supply unit 8 stops supplying power to the secondary power supply circuit 832 of the engine control unit 6. For example, the CPU 40 recognizes that the main power is turned off by operating the main power switch 14. Then, the main control unit 4 notifies the engine CPU 7 that the main power is turned off. The engine CPU 7 performs processing that is determined to be necessary when the main power is turned off (processing when shutting off). Then, the power supply unit 8 (supply control unit 82) stops power supply to the engine control unit 6. Thereby, the power supply to the engine control unit 6 is stopped, and the operation of the engine control unit 6 (engine CPU 7) is stopped.

  Also when shifting to the power saving mode, the power supply unit 8 (supply control unit 82) stops the power supply to the engine control unit 6. When shifting to the power saving mode, the image processing circuit 5 notifies the engine CPU 7 of shifting to the power saving mode. The engine CPU 7 performs a predetermined process (transition process) when shifting to the power saving mode. For example, the transition process is a process of saving the data held by the engine CPU 7 and the state of the printing unit 3 recognized by the engine CPU 7 to a non-volatile area of the engine memory 60 or the storage unit 41. Then, the power supply unit 8 (supply control unit 82) stops power supply to the engine control unit 6. Thereby, the power supply to the engine control unit 6 is stopped.

  When returning from the power saving mode to the normal mode, the supply control unit 82 of the power supply unit 8 resumes power supply to the engine control unit 6. When the power supply to the engine control unit 6 is restarted, the power supply control circuit 842 restarts the power supply to the engine CPU 7 and the engine CPU 7 in a predetermined order. Thereby, the startup process of the engine CPU 7 is started.

(Register 51 setting by engine CPU 7)
Next, the setting of the register 51 by the engine CPU 7 will be described with reference to FIG. FIG. 5 is a diagram for explaining the setting of the register 51 by the engine CPU 7.

  First, the image forming unit 3c of the multifunction peripheral 100 according to the embodiment includes an exposure device 30 and a photosensitive drum 31 (see FIG. 1). The image forming unit 3c includes a charging device 32, a developing device 33, and a transfer roller 34 (see FIG. 1). The charging device 32 charges the photosensitive drum 31 to a predetermined potential. The exposure device 30 scans and exposes the charged photosensitive drum 31 with a laser to generate an electrostatic latent image on the photosensitive drum 31 based on image information. The developing device 33 develops the electrostatic latent image with toner. The transfer roller 34 transfers the toner image formed on the photosensitive drum 31 to a sheet. The fixing unit 3d heats and pressurizes the transferred paper to fix the toner image on the paper.

  The engine CPU 7 is a voltage application circuit for forming a toner image included in the paper feed motor 35 included in the paper feed unit 3a of the printing unit 3, the clutch 36 and the transport motor 37 included in the transport unit 3b, and the image forming unit 3c. 38, the main motor 39 that rotates the rotating body for toner image formation, the exposure device 30, the heater 310 included in the fixing unit 3d, and the fixing motor 311 that rotates the rotating body for fixing are controlled. Thus, the engine CPU 7 controls paper feeding, conveyance, image formation, and fixing in printing.

  On the other hand, as described above, the main control unit 4 is provided with the image processing circuit 5. The image processing circuit 5 includes a video unit 50 and a register 51. The video unit 50 outputs image information of an image to be formed to the image forming unit 3c (exposure device 30). The register 51 is used for operation setting of the video unit 50.

  The image processing circuit 5 performs image processing on image data obtained by reading a document or image data input to the multifunction peripheral 100 in accordance with the setting. The video unit 50 converts the image data that has been subjected to image processing in accordance with the setting, and generates image information used for exposure in the exposure apparatus 30. The image information is information (signal) indicating whether a semiconductor laser (not shown) of the exposure apparatus 30 is turned on or off at each pixel (laser scanning position). Then, the video unit 50 outputs the generated image information to the exposure device 30 (see FIG. 5). The exposure device 30 performs scanning exposure of the photosensitive drum 31 based on the image information.

  Here, the image processing circuit 5 of the present embodiment is designed to be mounted on various models. The printing speed (number of printed sheets per minute) varies depending on the image forming apparatus. The video section 50 is configured so that the buffer of the exposure apparatus 30 does not overflow and the image information of the line to be scanned and exposed reaches the exposure apparatus 30 without delay. It is necessary to transmit the image information to the exposure device 30 at an appropriate speed that matches the printing speed of the forming apparatus. In addition, as in the case of the 1-beam type or the 2-beam type, the type of the exposure apparatus 30 to be mounted may differ depending on the image forming apparatus. The video section 50 needs to transmit image information in a data format suitable for the exposure apparatus 30 mounted on the image forming apparatus.

  Therefore, the image processing circuit 5 is provided with a register 51 for setting the operation of the video unit 50 (see FIG. 5). The video unit 50 transmits image information to the exposure device 30 at a speed and format corresponding to the value set in the register 51. In the multifunction peripheral 100 of the present embodiment, the engine CPU 7 sets the register 51. The engine CPU 7 controls the operation of the printing unit 3 and sets the register 51. Note that the value of the register 51 is lost because the power supply to the image processing circuit 5 is stopped by turning off the main power supply or shifting to the power saving mode. Therefore, the engine CPU 7 sets the setting value of the register 51 when the main power supply is turned on by the main power switch 14 or during start-up processing accompanying the return from the power saving mode to the normal mode.

  In order to set the register 51, the engine CPU 7 (engine processing circuit) and the image processing circuit 5 are connected, and a register setting signal line 90 which is a signal line for setting the register 51 is provided (see FIG. 5). The register setting signal line 90 includes a clock signal line 901 that transmits a clock signal from the engine CPU 7 to the image processing circuit 5, a setting value line 902 that transmits a value to be set in the register 51, and an interrupt signal line 903.

  The engine memory 60 stores a set value (register set value D1) to be set in the register 51. Then, the engine CPU 7 transmits the register setting value D1 read from the engine memory 60 to the image processing circuit 5 using the register setting signal line 90. Thereby, a setting value corresponding to the specification of the exposure apparatus 30 and the printing speed is set in the register 51.

  Further, a signal line 91 that is a signal line different from the register setting signal line 90 and connects the engine CPU 7 (engine processing circuit) and the video unit 50 is provided. The notification signal line 91 notifies the engine CPU 7 that the register 51 is in a settable state during the startup process when the main power is turned on or when returning from the power saving mode to the normal mode. It is used as a signal line for notifying the engine CPU 7 of the transition to the power saving mode.

  Further, a signal for performing communication between the image processing circuit 5 and the engine CPU 7 (engine processing circuit) is provided between the engine CPU 7 and the image processing circuit 5 separately from the register setting signal line 90 and the notification signal line 91. A data communication signal line 92 that connects the engine CPU 7 and the image processing circuit 5 is provided. The data communication signal line 92 includes a clock signal line 921 that transmits a clock signal from the image processing circuit 5 to the engine CPU 7, a data line 922 that transmits data from the image processing circuit 5 to the engine CPU 7, and data from the engine CPU 7 to the image processing circuit 5. Including a data line 923.

  For example, using the data communication signal line 92, data indicating the contents of the print job such as the size of the paper used in the print job, the number of print jobs, the density, and the print speed is transmitted from the image processing circuit 5 to the engine CPU 7. Is done. Also, data indicating the state of the printing unit 3, the start and completion of a print job, and the occurrence of an error in printing is transmitted from the engine CPU 7 to the image processing circuit 5 using the data communication signal line 92.

(Register 51 setting)
Next, the flow of setting the register 51 in the multifunction peripheral 100 according to the embodiment will be described with reference to FIGS. FIG. 6 is a flowchart illustrating an example of a flow of setting the register 51 in the multifunction peripheral 100 according to the embodiment. FIG. 7 is a timing chart for explaining the setting of the register 51 in the multifunction peripheral 100 according to the embodiment.

  The start of FIG. 6 is when the main power supply of the multifunction peripheral 100 is turned on by the operation of the main power switch 14. In other words, this is the time when the power supply unit 8 starts to supply power to the main control unit 4 (image processing circuit 5) and the engine control unit 6 (engine CPU 7) (corresponding to the time point a1 in FIG. 7). Thereby, the image processing circuit 5 and the engine CPU 7 start a startup process (warm-up process).

  As the main power is turned on, the image processing circuit 5 and the engine CPU 7 start activation (step # 1). Then, at the start of activation, the image processing circuit 5 changes the state of the notification signal line 91 from Low to High (step # 2, corresponding to time point a2 in FIG. 7).

  Then, the image processing circuit 5 continues to check whether or not the register 51 can be set (Step # 3, No in Step # 3 → Step # 3). When setting is possible (Yes in step # 3), the image processing circuit 5 changes the state of the notification signal line 91 from High to Low in order to notify the engine CPU 7 that the register 51 can be set. (Step # 4, corresponding to the time point a3 in FIG. 7). That is, the image processing circuit 5 registers the state of the notification signal line 91 in accordance with the state in which the register 51 is settable during the start-up process associated with turning on the main power or returning from the power saving mode to the normal mode. The state of 51 indicating that setting is not possible is changed to the state indicating that register 51 can be set. Upon receiving this notification, the engine CPU 7 sets the register 51 using the register setting signal line 90 (step # 5, corresponding to the time point a4 in FIG. 7). That is, the engine CPU 7 starts the setting of the register 51 when the state of the notification signal line 91 becomes a state indicating that the register 51 can be set during the startup process.

  Thereafter, the data communication signal line 92 is opened (step # 6, corresponding to the time point a5 in FIG. 7). Subsequently, the image processing circuit 5 raises the state of the notification signal line 91 from Low to High, and sets the state of the notification signal line 91 to the state indicating the normal mode (step # 7, a6 in FIG. 7). Equivalent to the time). That is, the image processing circuit 5 changes the notification signal line 91 to the state indicating the normal mode after the setting of the register 51 is started and before the shift to the power saving mode. Then, multifunction device 100 (main control unit 4, engine control unit 6, power supply unit 8) completes the startup process and maintains the normal mode (step # 8).

  During the normal mode, the main control unit 4 (CPU 40) confirms whether or not to shift to the power saving mode (whether or not the power saving mode transition condition is met) (step # 9). When the normal mode is to be maintained (No in step # 9), the flow returns to step # 8. On the other hand, when shifting to the power saving mode (Yes in step # 9), the image processing circuit 5 sets the state of the notification signal line 91 from High to Low based on the notification from the CPU 40 that the mode is shifted to the power saving mode. The state of the notification signal line 91 is changed to a state indicating the power saving mode (step # 10, corresponding to the time point a8 in FIG. 7). In other words, the image processing circuit 5 changes the state of the notification signal line 91 to the state indicating the power saving mode when shifting to the power saving mode, thereby causing the notification signal line 91 to notify the transition to the power saving mode. Also used as a signal line.

  The engine CPU 7 recognizes the shift to the power saving mode based on the state change of the notification signal line 91, and performs a predetermined process (processing at the time of transition) when it is performed at the time of shifting to the power saving mode (step # 11). Then, the multifunction device 100 (the main control unit 4 and the engine control unit 6) shifts to the power saving mode, and the power supply unit 8 supplies power to the supply stop portions such as the image forming unit 3c, the image processing circuit 5, and the engine CPU 7. The supply is stopped (step # 12, corresponding to the time point a8 in FIG. 7).

  During the power saving mode, the main control unit 4 (CPU 40) checks whether or not to return to the normal mode (whether or not a return condition is met) (step # 13). When the power saving mode should be maintained (No in Step # 13), the flow returns to Step # 12. On the other hand, when returning to the normal mode (Yes in step # 13), the image processing circuit 5 sets the state of the notification signal line 91 to the state indicating the normal mode (step # 14, time point a9 in FIG. 7). The state of the notification signal line 91 is Low → High). The power supply unit 8 resumes power supply to the main control unit 4 (image processing circuit 5) and the engine control unit 6 (engine CPU 7) (step # 15, corresponding to the time point a9 in FIG. 7). Then, the flow returns to step # 1.

  Specifically, when the register 51 can be set even after returning from the power saving mode to the normal mode (Yes in step # 3), the image processing circuit 5 determines that the register 51 can be set. In order to notify the CPU 7, the state of the notification signal line 91 is lowered from High to Low (corresponding to step # 4, time point a10 in FIG. 7). Upon receiving this notification, the engine CPU 7 uses the register setting signal line 90 to transmit the register setting value D1 read from the engine memory 60 to the image processing circuit 5, and registers lost due to the shift to the power saving mode. 51 data is reset (step # 5, corresponding to the time point a11 in FIG. 7). The time point a12 in FIG. 7 is the time point when the data communication signal line 92 between the engine CPU 7 and the image processing circuit 5 is opened again by returning to the normal mode (step # 6).

  In summary, the image processing circuit 5 changes the state of the notification signal line 91 to the first state (High) in accordance with the start-up based on turning on the main power or returning from the power saving mode to the normal mode, and during the start-up process. When the register 51 is in a settable state, the state of the notification signal line 91 is changed to the second state (Low). After the setting of the register 51 is completed, the state of the notification signal line 91 is changed to the first state (before the transition to the power saving mode). When changing to High) and shifting to the power saving mode, the state of the notification signal line 91 is changed to the second state (Low). Thereby, four types of notifications can be performed with one signal line.

(Advance notification before entering power saving mode)
Next, prior notification before shifting to the power saving mode will be described with reference to FIG.

  When the main power supply is turned on or the return to the normal mode is started, the image processing circuit 5 sets the state of the notification signal line 91 to a state (High) indicating the normal mode (time points a2 and a9 in FIG. 7).

  The image processing circuit 5 changes the state of the notification signal line 91 to Low based on the fact that the condition for shifting to the power saving mode is satisfied as when the power saving key 15 is operated. On the other hand, even when the register 51 can be set, the image processing circuit 5 changes the state of the notification signal line 91 to Low. As described above, the change from the first state to the second state of the notification signal line 91 sometimes means a shift to the power saving mode, and may mean that the register 51 can be set. .

  Thus, since the change from the first state to the second state of the notification signal line 91 has a plurality of meanings, when the state of the notification signal line 91 is set to Low, the engine CPU 7 is in the power saving mode. In some cases, it is not possible to distinguish whether the state of the notification signal line 91 for notifying the transition of the state changes or the state of the notification signal line 91 due to the fact that the register 51 can be set.

  Therefore, the image processing circuit 5 notifies the engine CPU 7 in advance of the transition to the power saving mode through the data communication signal line 92 before changing the state of the notification signal line 91 to the state indicating the power saving mode. In the example of FIG. 7, the image processing circuit 5 notifies the engine CPU 7 in advance at the time point a <b> 7 before shifting to the power saving mode. When the condition for shifting to the power saving mode is satisfied, the image processing circuit 5 receives a notification from the CPU 40 to shift to the power saving mode, and based on this notification, the image processing circuit 5 issues a prior notification. Do. Further, the engine CPU 7 indicates that the register 51 can be set when the state of the notification signal line 91 is changed from the first state to the second state (when changing from High to Low) without receiving a prior notification. What is necessary is just to judge it.

  In addition, during the startup process, if the power saving key 15 is irregular before the data communication signal line 92 is opened (before the advance notification can be made), the image processing circuit 5 The state of the notification signal line 91 is once fixed to the first state after the advance notification can be performed, the advance notification is transmitted to the engine CPU 7, and the state of the notification signal line 91 is changed from the first state. What is necessary is just to change to a 2nd state. Since the time required for activation of the MFP 100 according to the present embodiment is shortened, it seems to the user that the MFP 100 has immediately shifted to the power saving mode.

    Even if a long time elapses after receiving the prior notification, there is a possibility that the notification signal line 91 is an erroneous notification when the state of the notification signal line 91 does not indicate the power saving mode. Therefore, on the engine control unit 6 side, after receiving the advance notification, the engine CPU 7 is in a state of the notification signal line 91 only when the state of the notification signal line 91 becomes a state indicating the power saving mode within a predetermined time. You may make it recognize that a change is a signal to transfer to a power saving mode. As a result, the engine CPU 7 starts the transition processing as in step # 11 of FIG.

  As described above, the image forming apparatus (multifunction peripheral 100) according to the present embodiment includes the power supply unit 8 that supplies power and the image forming unit 3c that forms images, and the printing unit 3 (feeding) that prints on paper. An image including a paper unit 3a, a conveyance unit 3b, an image forming unit 3c, and a fixing unit 3d), a video unit 50 for outputting image information of an image to be formed to the image forming unit 3c, and an operation setting register 51 for the video unit 50. The processing circuit 5, the engine processing circuit (engine CPU 7) for controlling the operation of the printing unit 3 and setting the register 51, the engine processing circuit and the image processing circuit 5 are connected, and the signal line for setting the register 51 is used. A register setting signal line 90 and a signal line different from the register setting signal line 90 include one notification signal line 91 that connects the engine processing circuit and the image processing circuit 5. The image processing circuit 5 changes the state of the notification signal line 91 in the register 51 in accordance with the state where the register 51 is settable during the start-up process associated with turning on the main power or returning from the power saving mode to the normal mode. The state is changed from a state indicating that setting is impossible to a state indicating that register 51 can be set. The engine processing circuit starts the setting of the register 51 when the state of the notification signal line 91 indicates that the register 51 can be set during the startup process.

  As a result, when the register 51 of the video unit 50 of the image processing circuit 5 can be set, the fact that it can be set is notified to the engine processing circuit (engine CPU 7). Therefore, the engine processing circuit can quickly know that the register 51 can be set. The engine processing circuit can start setting the register 51 as soon as the register 51 can be set. Compared to the case where the setting of the register 51 is started after the waiting time including the margin has elapsed since the start of the engine processing circuit as in the prior art, the time until the setting of the register 51 is completed can be shortened. Therefore, the time required for starting the engine processing circuit and the image processing circuit 5 can be shortened. As a result, it is possible to shorten the time (warm-up time) until the start-up processing of all of the image forming apparatus (multifunction peripheral 100) is completed when the main power is turned on or when the power saving mode is returned to the normal mode.

  In addition, the image processing circuit 5 changes the notification signal line 91 to the state indicating the normal mode after the setting of the register 51 is started and before shifting to the power saving mode, and when the transition to the power saving mode is performed, the notification signal line 91 is changed. The notification signal line 91 is also used as a sleep signal line for notifying the transition to the power saving mode by changing the state to the state indicating the power saving mode, and the power supply unit 8 performs image processing along with the transition to the power saving mode. The power supply to the circuit 5 and the engine processing circuit (engine CPU 7) is stopped. As described above, the conventionally provided sleeve signal line is also used as a signal line for notifying that the register 51 is settable. Therefore, without increasing the signal line between the engine processing circuit (engine CPU 7) and the image processing circuit 5, it is possible to promptly notify the engine processing circuit that the register 51 has become settable.

  One notification signal line 91 is used as a signal line notifying the transition to the power saving mode and also as a signal line notifying that the register 51 is in a settable state. Therefore, the image processing circuit 5 changes the state of the notification signal line 91 in order to notify that the register 51 is in a settable state, but the engine processing circuit (engine CPU 7) shifts to the power saving mode. It may be mistaken for a notification to notify. On the contrary, the image processing circuit 5 changes the state of the notification signal line 91 to notify the shift to the power saving mode, but the engine processing circuit (engine CPU 7) is in a state where the register 51 can be set. May be mistaken for this notification.

  Therefore, the image forming apparatus (multifunction device 100) is provided separately from the register setting signal line 90 and the notification signal line 91, and is a signal line for performing communication between the image processing circuit 5 and the engine processing circuit (engine CPU 7). In addition, a data communication signal line 92 for connecting the engine processing circuit and the image processing circuit 5 is included. Then, before changing the state of the notification signal line 91 to a state indicating the power saving mode, the image processing circuit 5 notifies the engine processing circuit in advance of the shift to the power saving mode through the data communication signal line 92. After receiving the advance notification, the engine processing circuit recognizes that the notification signal line 91 is in the power saving mode when the state of the notification signal line 91 becomes a state indicating the power saving mode. Thereby, since the shift to the power saving mode is performed only when there is a prior notification, the shift to the power saving mode based on the misidentification can be prevented.

  In addition, the image processing circuit 5 changes the state of the notification signal line 91 to the first state (High state) in accordance with the start of activation based on turning on the main power or returning from the power saving mode to the normal mode, and during the activation process. When the register 51 is in a settable state, the state of the notification signal line 91 is changed to the second state (Low state). After the setting of the register 51 is completed, the state of the notification signal line 91 is changed to the first state before entering the power saving mode. When changing to the power saving mode, the state of the notification signal line 91 is changed to the second state. Thus, four signals can be notified by one signal line, and four state transitions can be shown to the engine processing circuit (engine CPU 7) by only one signal line.

  Although the embodiment of the present invention has been described, the scope of the present invention is not limited to this, and various modifications can be made without departing from the spirit of the invention.

  The present invention is applicable to an image forming apparatus.

100 MFP (image forming apparatus) 3 printing unit 3c image forming unit (printing unit) 3a paper feeding unit (printing unit)
3b Conveying section (printing section) 3c Image forming section (printing section)
3d fixing unit (printing unit) 5 image processing circuit 50 video unit 51 register 7 engine CPU (engine processing circuit)
8 Power supply section 90 Register setting signal line 91 Notification signal line 92 Data communication signal line

Claims (3)

A power supply for supplying power;
A printing unit that includes an image forming unit that forms an image, and that prints on paper;
An image processing circuit including a video unit that outputs image information of an image to be formed to the image forming unit, and an operation setting register of the video unit;
An engine processing circuit for controlling the operation of the printing unit and setting the register;
Connecting the engine processing circuit and the image processing circuit, a register setting signal line which is a signal line for setting the register;
A signal line different from the register setting signal line, including one notification signal line connecting the engine processing circuit and the image processing circuit;
The image processing circuit sets the state of the notification signal line of the register in accordance with the state that the register is settable during the start-up process associated with turning on the main power or returning from the power saving mode to the normal mode. Change from a state indicating that setting is not possible to a state indicating that register setting is possible,
The engine processing circuit starts setting the register when the state of the notification signal line is in a state indicating that the register can be set during the startup process ,
The image processing circuit includes:
Using the notification signal line as a sleep signal line for notifying the transition to the power saving mode,
After the setting of the register is started, before the transition to the power saving mode, the notification signal line is changed to the state indicating the normal mode, and the state of the notification signal line is changed to the state indicating the power saving mode when shifting to the power saving mode. Change
The power supply unit stops power supply to the image processing circuit and the engine processing circuit in accordance with a shift to a power saving mode . A signal line provided separately from the register setting signal line and the notification signal line, for communicating between the image processing circuit and the engine processing circuit, and connecting the engine processing circuit and the image processing circuit Including data communication signal lines
The image processing circuit notifies the engine processing circuit in advance of the transition to the power saving mode by the data communication signal line before changing the state of the notification signal line to a state indicating the power saving mode.
The engine processing circuit recognizes that it is a notification to shift to the power saving mode when the state of the notification signal line is in a state indicating the power saving mode within a predetermined time after receiving the prior notification. The image forming apparatus according to claim 1 . The image processing circuit includes:
In accordance with the start-up based on turning on the main power or returning from the power saving mode to the normal mode, the state of the notification signal line is changed to the first state,
When the register becomes a settable state during the startup process, the state of the notification signal line is changed to the second state,
After completing the setting of the register, before changing to the power saving mode, change the state of the notification signal line to the first state,
3. The image forming apparatus according to claim 1, wherein when the mode is shifted to the power saving mode, the state of the notification signal line is changed to the second state. 4.

Images