JP6198396B2 - Semiconductor light emitting device - Google Patents

Description

  The present invention relates to a semiconductor light emitting device, and more particularly to a light emitting diode (LED) device.

  A light-emitting device equipped with an LED element has been conventionally used in lighting, backlights, industrial equipment and the like. The LED element as described in Patent Document 1 epitaxially grows a semiconductor layer such as AlGaInP or GaN on a growth substrate such as a GaAs substrate or a sapphire substrate using a MOCVD (Metal-Organic Chemical Vapor Deposition) method or the like, After the semiconductor layer grown on the growth substrate is bonded to a conductive support substrate, the growth substrate is removed to manufacture the semiconductor layer.

JP 2011-165853 A JP 2009-21416 A

  In the light emitting device as described above, in order to uniformly diffuse the current throughout the active layer and eliminate unevenness of light emission, a translucent insulator layer is inserted into the reflective surface side electrode immediately below the n electrode, and the p electrode and the n electrode There is a method in which current concentration just below an n electrode is suppressed and current is diffused by arranging the electrodes alternately (Patent Document 1). In such a light emitting device, by increasing the thickness of the n-type semiconductor layer on the light extraction surface side as viewed from the active layer (for example, several thousand nm), horizontal current diffusion in the n-type semiconductor layer There is one that promotes (current diffusion in a plane parallel to the active layer) and causes the entire active layer to emit light uniformly (Patent Document 2).

  However, when the thickness of the n-type semiconductor layer is increased, light absorption by the impurity carriers in the semiconductor layer is increased, so that the light extraction efficiency of the light emitting element is lowered. Furthermore, increasing the thickness of the semiconductor layer increases the time for growing the semiconductor film, resulting in an increase in manufacturing cost.

method for the improvement of the horizontal current spreading to the low resistance resistors n-type semiconductor layer also, but to reduce this case _{(Al Z Ga 1-Z)} 0.5 In 0.5 P Al composition Z Since it is necessary, the effect of absorption of light emitted from the active layer on the short wavelength side is produced, and the output of the LED is lowered.

  In addition, if the thickness of the n-type semiconductor layer is reduced to suppress light absorption, horizontal diffusion of current in the n-type semiconductor layer becomes insufficient, and the light emitting area of the active layer is reduced. . Furthermore, current concentration occurs in the thin n-type semiconductor layer, thereby reducing the electrostatic breakdown voltage (ESD breakdown voltage), particularly the electrostatic breakdown voltage when a reverse bias current flows.

  The present invention has been made in view of the above-described points. A semiconductor light-emitting element such as a high-performance LED element that emits light uniformly, has high light emission efficiency, is highly reliable, and is low in manufacturing cost. The purpose is to provide.

  The light-emitting element of the present invention includes a semiconductor structure layer made of an AlGaInP-based semiconductor in which a first semiconductor layer of a first conductivity type, an active layer, and a second semiconductor layer of a second conductivity type are stacked in this order. A first electrode formed on a part of the first semiconductor layer and a second electrode formed on a part of the second semiconductor layer, and the first electrode The electrode is formed in a region other than the region where the second electrode is formed and the region facing the semiconductor structure layer, and the second electrode includes a power supply wiring and the power supply wiring. The first semiconductor layer in a region that includes a wiring electrode that extends from the first electrode and forms an ohmic junction with the second semiconductor layer, and that faces the region where the power supply wiring is formed and sandwiches the semiconductor structure layer A counter electrode is formed on the second electrode, and the power supply wiring is connected to the second electrode. A Schottky junction is formed with the conductor layer, and the counter electrode forms an ohmic junction with the first semiconductor layer, or the power supply wiring forms an ohmic junction with the second semiconductor layer, and the counter electrode Form a Schottky junction with the first semiconductor layer, and an end of the wiring electrode and an end of the first electrode in a direction parallel to the upper surface of the semiconductor structure layer Is shorter than the shortest distance between the end of the wiring electrode and the end of the counter electrode in the direction parallel to the upper surface of the semiconductor structure layer, and the second semiconductor layer It includes at least a configuration in which a cladding layer and a current spreading function layer are sequentially formed from the layer side, and the current spreading function layer is sandwiched between the plurality of low resistance layers and the plurality of low resistance layers. The plurality of low resistance layers Wherein the remote resistivity composed of a high high-resistance layer

It is a top view of the light emitting element concerning the example of the present invention. FIG. 2 is a cross-sectional view taken along line 2-2 in FIG. It is a figure which shows the flow of the electric current at the time of the forward bias in a light emitting element. It is a figure which shows the flow of the electric current at the time of reverse direction bias in a light emitting element. It is a figure which shows the light emission element light emission distribution of an Example and a comparative example, and a relative luminance. It is a graph which shows the relative light emission intensity of the light emitting element of an Example and a comparative example. It is sectional drawing which shows the manufacturing process of the light emitting element of FIG. It is sectional drawing which shows the manufacturing process of the light emitting element of FIG.

Hereinafter, a red LED element (emission peak wavelength: λ ₀ = about 615 nm) will be described as an example, and a light emitting element 10 according to an embodiment of the present invention will be described with reference to FIGS.

The semiconductor structure layer 11 includes a first conductivity type p-type semiconductor layer 13 composed of a p-type contact layer and a p-type cladding layer, an active layer 15 having a multiple quantum well structure (MQW), an n-type cladding layer 17, a current diffusion. The n-type semiconductor layer 23 of the second conductivity type composed of the functional layer 19 and the surface processed layer 21 is laminated. For example, the p-type contact layer is a layer of In _0.05 Ga _0.95 P having a thickness of 500 nm doped with Mg and having a carrier concentration of 3 × 10 ¹⁸ cm ⁻³ in the layer, and the p-type cladding layer Is a layer of Al _0.5 In _0.5 P with a thickness of 500 nm doped with Mg and having a carrier concentration in the layer of 5 × 10 ¹⁷ cm ⁻³ .

The multiple quantum well structure constituting the active layer 15 includes, for example, a well layer (Al _0.1 Ga _0.9 ) _0.5 In _0.5 P layer (thickness 20 nm) and a barrier layer (Al _0.5 It is a Ga _0.5 ) _0.5 In _0.5 P layer (thickness 10 nm) and has 15 well layers. Note that the composition ratio and the layer thickness of each of the p-type semiconductor layer 13 and the active layer are not limited to those described above, and can be appropriately changed according to the emission wavelength or the like.

As described above, the n-type semiconductor layer 23 is configured by laminating the n-type cladding layer 17, the current spreading function layer 19, and the surface processing layer 21 in this order. That is, the n-type semiconductor layer 23 has a three-layer structure, and has the current spreading function layer 19 as a central layer. The n-type cladding layer 17 is a 500 nm thick Al _0.5 In _0.5 P layer doped with Si and having a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ in the layer. , Si _{0.5 and} a layer of Al _0.5 In _0.5 P with a thickness of 500 nm having a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ in the layer.

The current spreading function layer 19 is an n-type semiconductor layer doped with Si and having a carrier concentration of 2 × 10 ¹⁸ cm ⁻³ in the layer. The current spreading function layer 19 is composed of a plurality of layers having different electrical resistivity due to a difference in Al composition, and a structure in which a high resistance layer having a relatively high resistance is sandwiched between a plurality of low resistance layers having a relatively low resistance. It has become. Note that the lower the Al composition in the layer, the lower the electrical resistivity and the higher the refractive index. The current diffusion functional layer 19 is, for example, a first low-resistance layer 25 having a composition of (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P and a layer thickness of 150 nm from the n-type cladding layer 17 side. A high resistance layer 27 having a composition of (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P and a layer thickness of 100 nm, and a composition of (Al _0.4 Ga _0.6 ) _0.5 In _{0 It} consists of a second low resistance layer 29 with a thickness of 150 nm and a thickness of _.5 P.

As described above, the electrical resistivity in each layer of the n-type semiconductor layer 23 decreases as the Al composition decreases, and decreases as the carrier concentration in the layer increases. The electrical resistivity of each layer is 0.14 Ω · cm for the n-type cladding layer 17 and the surface processed layer 21, and 0.01 Ω · for the first low resistance layer 25 and the second low resistance layer 29 of the current spreading function layer 19. cm, and the high resistance layer 27 is 0.13 Ω · cm. That is, the n-type semiconductor layer 23 includes a structure in which a high-resistance layer having a high resistance and a low-resistance layer having a resistance lower than that of the high-resistance layer are alternately arranged, including the n-type cladding layer 17 and the surface processed layer 21. It has become. The specific resistance of the high resistance layer 27 with respect to the first low resistance layer 25 and the second low resistance layer 29 is the current diffusion in the horizontal direction of the element described later, that is, in the in-plane direction parallel to the upper surface of the active layer 15. In order to maintain favorable, it is preferable that it is 10 times or more. The thicknesses of the first low resistance layer 25 and the second low resistance layer 29 are as follows: the first low resistance layer 25 and the second low resistance layer 29, the high resistance layer 27, and the n-type cladding layer 17. In order to prevent the occurrence of light confinement in the current diffusion function layer 19 generated by total reflection occurring at the interface with the surface processing layer 21, the first low resistance layer 25 of light emitted from the active layer 15 and It is preferable that the wavelength within the second low resistance layer 29 is less than the wavelength λ (= λ ₀ / n, where n is the refractive index of the first and second low resistance layers).

The compositions of the n-type cladding layer 17 and the surface processed layer 21 are not limited to those described above, but can be grown on a GaAs substrate and can transmit light sufficiently from the active layer 15. a range with a light resistance, a composition such as _{(Al Z Ga 1-Z)} x in 1-x P (0.65 ≦ Z ≦ 1.0,0.45 ≦ x ≦ 0.55) Is preferred. Further, the composition of the first low resistance layer 25 and the second low resistance layer 29 of the current spreading function layer 19 is not limited to the above, but as will be described later, an n-type semiconductor including the current spreading function layer 19 is used. In the layer 23, the current spreads sufficiently in the horizontal direction so that the active layer 15 can emit light uniformly, and the influence of the absorption of light emitted from the active layer 15 by the current spreading function layer 19 can be ignored. _{Z Ga 1-Z) x in} 1-x P ( is preferably a composition as 0.30 ≦ Z ≦ 0.50,0.45 ≦ x ≦ 0.55).

  On the upper surface of the n-type semiconductor layer 23 of the semiconductor structure layer 11, that is, on the light extraction surface, an n wiring electrode 31 and an n power supply wiring 33 for supplying power to the n wiring electrode 31 are formed. The n wiring electrode 31 is made of AuGeNi, and is formed as a linear electrode that is arranged in parallel to each other on the n type semiconductor layer 23 and forms an ohmic junction with the n type semiconductor layer 23 (in this embodiment, Are arranged on three parallel straight lines). The n wiring electrode 31 may be formed of another metal that can form an ohmic junction with the n-type semiconductor layer 23, such as AuGe, AuSn, or AuSnNi.

The n power supply wiring 33 extends in a cross direction from a circular region on the upper surface of the n-type semiconductor layer 23 where a bonding pad 35 described later is formed at the center of the upper surface of the n-type semiconductor layer 23. It is formed so as to cover a part and is electrically connected to the n wiring electrode 31. The n power supply wiring 33 is formed by depositing 100 nm of Ti on the n type semiconductor layer 23 and the n wiring electrode 31, and forms a Schottky junction with the n type semiconductor layer 23. The material of the n power supply wiring 33 may be any metal that forms a Schottky junction with the n-type semiconductor layer 23. TaN, Au, Ag, Cu, Fe, Ni, Pd, Pt, Mo, Ta, Ti, It is also possible to use W, their nitrides, or their silicides. In addition, the Schottky barrier of the Schottky junction formed between the n power supply wiring 33 and the n-type semiconductor layer 23 has a forward voltage drop including a wiring resistance until an operating current starts flowing in the semiconductor structure layer 11 ( V _F ) (for example, 0.2 V) and preferably 0.5 V or more.

  A bonding pad 35 is formed at the center of the upper surface of the n power supply wiring 33. The bonding pad 35 is formed by depositing 1000 nm of Au on the n power supply wiring 33 and has a cylindrical shape with a diameter of 70 μm. When the n power supply wiring 33 is formed of a material other than Ti, the bonding pad 35 is formed by forming a metal having high adhesion such as Ti in a region where the bonding pad 35 is formed on the upper surface of the n power supply wiring 33. It may be formed by depositing Au thereon. The bonding pad 35 can take any shape such as a prism shape or a frustum shape.

  A p-electrode 37 is formed in a partial region on the surface opposite to the light extraction surface of the semiconductor structure layer 11 (that is, the surface of the p-type semiconductor layer 13). The p electrode 37 is formed in a region other than a region facing the region where the n wiring electrode 31 and the n power supply wiring 33 are formed with the semiconductor structure layer 11 interposed therebetween. That is, the p electrode 37, the n wiring electrode 31, and the n power supply wiring 33 are arranged so as not to overlap each other on a projection plane parallel to the main surface (growth surface) of the semiconductor structure layer 11. In the present embodiment, the p-electrode 37 is an electrode that extends in parallel with the extending direction of the n-wiring electrode 31, and when viewed from the upper surface direction of the semiconductor structure layer, the p-electrode 37 is on four straight lines sandwiching the n-wiring electrode 31. Is formed. The p-electrode 37 is made of a metal that forms an ohmic junction with the p-type semiconductor layer, for example, AuZn, and has a thickness of 100 nm.

  On the surface of the p-type semiconductor layer 13 in a region facing the region where the bonding pad 35 is formed with the semiconductor structure layer 11 interposed therebetween (just below the bonding pad 35), the facing that forms an ohmic junction with the p-type semiconductor layer 13 An electrode 39 is formed. The counter electrode 39 is a cylindrical body having a thickness of 100 nm and a diameter of 70 μm made of a metal that forms an ohmic junction with the p-type semiconductor layer 13, for example, AuZn. Note that the counter electrode 25 can have an arbitrary shape such as a prismatic shape or a frustum shape.

A translucent insulating layer 41 is formed in a region exposed through the p-electrode 37 and the counter electrode 39 on the surface of the p-type semiconductor layer 13. The translucent insulating layer 41 is a layer having a thickness of 100 nm made of a translucent material having insulating properties, for example, SiO ₂ . As a material for the light-transmitting insulating layer 41, other light-transmitting insulating materials such as Si ₃ N ₄ and Al ₂ O ₃ can be used in addition to SiO ₂ .

  A reflective metal layer 43 is formed on the surface of the p-electrode 37, the counter electrode 39, and the translucent insulating layer 41 opposite to the surface in contact with the semiconductor structure layer 11. The reflective metal layer 43 is made of a metal having high light reflectivity, for example, AuZn, and has a layer thickness of 200 nm. The reflective metal layer 43 may be made of another highly light reflective metal such as Au, Ag, Al, or Rh.

  The semiconductor-side bonding layer 45 is formed on the surface of the reflective metal layer 43 opposite to the surface in contact with the p-electrode 37, the counter electrode 39, and the translucent insulating layer 41. The semiconductor side bonding layer 45 is formed by stacking TaN (layer thickness 100 nm), TiW (layer thickness 100 nm), TaN (100 nm), Ni (layer thickness 300 nm), Au (layer thickness 30 nm) in this order from the reflective metal layer 43 side. It is a layer.

  The support substrate side bonding layer 47 is formed on a support substrate 49 which is a conductive substrate such as Si having an ohmic metal layer (not shown) made of Pt on the upper surface and the lower surface, and Ti (layer thickness 150 nm), Ni (layer thickness). 150 nm) and AuSn (layer thickness 600 nm) are formed in this order, and are eutectic bonded to the semiconductor side bonding layer 45. The support substrate 49 has, for example, a square upper surface shape with a side of 350 μm. The support substrate 49 may be made of other materials such as Ge, Al, Cu, and CuW as long as the material has conductivity and high thermal conductivity.

  Here, a current flow in the semiconductor structure layer 11 of the light-emitting element 10 during normal operation (for example, when a forward voltage of 10 V or less is applied) will be described with reference to FIG. FIG. 3 is a partially enlarged view of region A in FIG. As indicated by a thick arrow in FIG. 3, a current flows between the p electrode 37 and the n wiring electrode 31 in the semiconductor structure layer 11 during normal operation. As shown in FIG. 3, a current flows from the first low resistance layer 25 and the second low resistance layer 29 having a relatively low electrical resistivity to the high resistance layer 27 and the surface processed layer 21 having a relatively high electrical resistivity. Difficult to flow in. Therefore, the current diffuses in the first low resistance layer 25 and the second low resistance layer 29 in the horizontal direction, that is, in the in-plane direction parallel to the upper surface of the active layer 15. Note that, since the n power supply wiring 33 forms a Schottky junction with the n-type semiconductor layer 23, during normal operation, no current flows between the n power supply wiring 33 and the p electrode 37 or the counter electrode 39. Not flowing.

  As in this embodiment, the current spreading function layer 19 is made of the first low resistance layer, the second low resistance layer, and the high resistance sandwiched between them and having a higher resistivity than the first and second low resistance layers. By forming the layers, the current spreads sufficiently in the horizontal direction in the current diffusion function layer 19, and the active layer 15 can emit light uniformly. Further, among the current spreading function layer 19, the low resistance layers 25 and 29 that have a low Al composition and easily absorb light emitted from the active layer 15 can be formed very thin. It is possible to improve the light extraction efficiency of the light emitting element while reducing the absorption of light.

As described above, the thickness of the low resistance layers 25 and 29 having a lower Al composition and a higher refractive index than those of the n-type cladding layer 17, the high resistance layer 27, and the surface processed layer 21 is the current of the light emitted from the active layer 15. The first low resistance layer 25, the second low resistance layer 29, the high resistance layer 27, the n-type cladding layer 17, and the surface are set to be less than the wavelength λ (= λ ₀ / n) in the diffusion functional layer 19. It is possible to prevent light confinement from occurring in the current spreading function layer 19 caused by total reflection occurring at the interface with the processed layer 21. In addition, by improving the horizontal current diffusion, it is possible to reduce the light shielded immediately below the counter electrode 39, so that the light output can be improved.

  Furthermore, in this example, by making it possible to make the thin current diffusion functional layer 19 of, for example, 500 nm or less, the entire n-type semiconductor layer 23 can be thinned, and the growth time of the semiconductor structure layer can be shortened. The manufacturing cost of the light emitting element can be reduced. Furthermore, since the low-resistance layer with low light transmittance can be set to, for example, 300 nm or less, the current diffusion effect in the horizontal direction of the element can be reduced while suppressing light absorption in the n-type semiconductor layer 23. It is possible to obtain.

  Next, FIG. 4 shows a current flow when a reverse bias voltage is applied in the light emitting element 10 (for example, when a high voltage of 100 V or more is applied). 4 is a partially enlarged view of region A in FIG. 2 as in FIG. As indicated by the thick arrows in FIG. 4, when a reverse current flows, the current forms not only between the n wiring electrode 31 and the p electrode 37 but also with the n-type semiconductor layer 23 and a Schottky junction. It also flows between the n power supply wiring 33 under the bonding pad 35 and the counter electrode 39. Accordingly, the current that should flow in the path between the n wiring electrode 31 and the p electrode 37 is also distributed to the path between the n power supply wiring 33 and the counter electrode 39 under the bonding pad 35, and the n wiring electrode 31 The amount of current flowing in the path between the p electrode 37 can be reduced. Therefore, it is possible to improve the electrostatic breakdown voltage of the light emitting element, particularly the electrostatic breakdown voltage when a reverse bias voltage is applied.

  As in the light emitting element 10 of this embodiment, a structure in which low resistance layers 25 and 29 that are relatively low in electrical resistivity and thin layers (for example, layers of 100 nm or less) are inserted in the current spreading function layer 19 is employed. In this case, current concentration tends to occur in the low resistance layers 25 and 29, and the electrostatic breakdown voltage is likely to decrease. However, as described above, by forming the counter electrode 39, it is possible to obtain a high current diffusion effect while suppressing light absorption by using the thin-film current diffusion function layer 19, and it is very reliable. A light emitting element can be obtained.

For comparison with the above examples, samples of comparative examples were prepared and their characteristics were evaluated. In the light-emitting element of Comparative Example 1, the current diffusion functional layer 19 has a carrier concentration of 2 × 10 ¹⁸ cm ⁻³ , a composition of (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P, and a layer thickness of 300 nm. Except for a single-layer structure composed of a low-resistance layer, it has the same configuration as the light-emitting element 10 of the example. In the light-emitting element of Comparative Example 2, the current diffusion functional layer 19 has a carrier concentration of 2 × 10 ¹⁸ cm ⁻³ , a composition of (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P, and a layer thickness of 500 nm. Except for a single-layer structure composed of a low-resistance layer, it has the same configuration as the light-emitting element 10 of the example.

  FIG. 5 shows a light emission distribution (NFP: near-field pattern) when viewed from the top surface of the light emitting elements of the example and comparative examples 1 and 2, and the light emission intensity in the vicinity of the n wiring electrode 31 of each light emitting element is 1. In this case, the relative luminance of the light emitting element end region is shown. FIG. 6 shows the relationship between the distance from the n-wiring electrode 31 and the light emission intensity with respect to the light emission distribution (NFP: near-field pattern) when viewed from the top surface of the light emitting elements of the example and comparative examples 1 and 2. Show. In the light emission distribution of FIG. 5, the intensity of light is shown in shades of color, and the darker the portion, the brighter the light. The light emission distribution depends on the current distribution in a plane parallel to the light extraction surface on the upper surface of the light emitting element. Uniform light emission means that the current is diffused well and flows uniformly throughout the light emitting element. It shows that there is. As is clear from FIGS. 5 and 6, in the case of the light emitting element of Comparative Example 1, only the vicinity of the n wiring electrode 31 on the light extraction surface side emits light strongly, and the relative luminance of the end region is 0.26. Therefore, it can be seen that the current concentrates directly under the n wiring electrode, and the current does not flow uniformly throughout the light emitting element.

  In the case of the light emitting element of Comparative Example 2, the low resistance layer having a low Al composition and low electrical resistivity is made thicker than the light emitting element of Comparative Example 1, so that the current in the current diffusion functional layer is larger than that of the light emitting element of Comparative Example 1. The horizontal diffusion is further promoted, and the relative luminance of the end region is 0.87, so that the entire light emitting element is uniformly illuminated.

  In the case of the light emitting element of the above example, as in the light emitting element of Comparative Example 2, the light emission distribution is uniform, so that it can be seen that the current is uniformly diffused in the plane. Further, the relative luminance in the end region is 0.91 higher than that of the light emitting element of Comparative Example 2, and it can be seen that the current diffusion is further improved as compared with the light emitting element of Comparative Example 2. In addition, since the low resistance layer that absorbs the light emitted from the active layer 15 with a low Al composition is thinner than the light emitting element of Comparative Example 2, the light absorption by the current diffusion function layer is more than that of the light emitting element of Comparative Example 2. Few. Further, in the example, unlike Comparative Example 1, the film thickness of the low resistance layer having a low Al composition and a higher refractive index than the adjacent layer is less than the wavelength in the medium of the light emitted from the active layer 15. The light confinement effect caused by total reflection occurring at the interface between the low resistance layer and the adjacent layer does not occur. Therefore, also from this comparison, it can be seen that the light-emitting elements of the above examples are light-emitting elements that uniformly emit light as a whole, have high luminous efficiency, and excellent reliability.

  FIG. 7A to FIG. 7D and FIG. 8A, which are diagrams showing a manufacturing process in the cross section of the light emitting device 10 taken along line 2-2 of FIG. )-(B). First, an n-type GaAs substrate having a thickness of 300 μm inclined by 15 ° from the (100) plane in the [011] direction is prepared as a growth substrate 37 used for crystal growth of the semiconductor structure layer 11, and the semiconductor structure layer 11 is formed by MOCVD. The film is formed by the method.

First, the surface processed layer 21, the current diffusion functional layer 19, and the n-type cladding layer 17 were formed on the growth substrate 37 (FIG. 7A). The surface processed layer 21 is a layer of Al _0.5 In _0.5 P having a thickness of 500 nm doped with Si and having a carrier concentration in the layer of 1 × 10 ¹⁸ cm ⁻³ , and the n-type cladding layer 17 is A layer of Al _0.5 In _0.5 P with a thickness of 500 nm, doped with Si and having a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ in the layer. The current spreading function layer 19 is formed by sequentially growing a second low resistance layer 29, a high resistance layer 27, and a first low resistance layer 25 from the upper surface of the surface processed layer 21, and each layer is doped with Si. The carrier concentration in the layer is 2 × 10 ¹⁸ cm ⁻³ . The second low resistance layer 29 has a composition of (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P and a layer thickness of 150 nm, and the high resistance layer 27 has a composition of (Al _{0. 7} Ga _0.3 ) _0.5 In _0.5 P with a layer thickness of 100 nm, and the first low resistance layer 25 has a composition of (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P The layer thickness is 150 nm.

Next, the active layer 15 and the p-type semiconductor layer 13 composed of the p-type cladding layer and the p-type contact layer are formed in this order to complete the semiconductor structure layer 11 (FIG. 7B). The p-type cladding layer is an Al _0.5 In _0.5 P layer with a thickness of 500 nm doped with Mg and having a carrier concentration of 5 × 10 ¹⁷ cm ⁻³ in the layer, and the p-type contact layer is Mg And an In _0.05 Ga _0.95 P layer having a thickness of 500 nm with a carrier concentration of 3 × 10 ¹⁸ cm ⁻³ in the layer. The multiple quantum well structure constituting the active layer 15 includes, for example, a well layer (Al _0.1 Ga _0.9 ) _0.5 In _0.5 P layer (thickness 20 nm) and a barrier layer (Al _0.5 A Ga _0.5 ) _0.5 In _0.5 P layer (thickness: 10 nm) was formed so as to have 15 well layers.

The p-type contact layer can contain In as long as light from the active layer 15 is not absorbed, and the Al composition ratio Z of the well layer is in the range of 0 ≦ Z ≦ 0.4 in accordance with the emission wavelength. Can be adjusted. Further, phosphine (PH ₃ ) was used as a group V raw material, and organometallic metals such as trimethylgallium (TMGa), trimethylaluminum (TMAl), and trimethylindium (TMI) were used as a group III raw material. Further, silane (SiH ₄ ) was used as a raw material for Si that is an n-type impurity, and biscyclopentadienyl magnesium (Cp ₂ Mg) was used as a raw material for Mg that was a p-type impurity. The growth temperature was 750 to 850 ° C., hydrogen was used as the carrier gas, and the growth pressure was 10 kPa.

Next, a SiO ₂ film constituting the light-transmitting insulating layer 41 is formed with a thickness of 100 nm on the p-type semiconductor layer 13 by plasma CVD. Subsequently, after forming a resist mask on the SiO ₂ film, facilities by etching using buffered hydrofluoric acid (BHF), a patterned corresponding to the pattern of p electrodes 37 and the counter electrode 39 to the SiO ₂ film did. An opening is formed in the portion from which the SiO ₂ film is removed, and the p-type semiconductor layer 13 is exposed in this opening (FIG. 7C). Note that a thermal CVD method or a sputtering method can also be used as a method for forming the SiO ₂ film. It is also possible to use a dry etching method as a method for etching the SiO ₂ film. As a material for the light-transmitting insulating layer 41, other light-transmitting insulating materials such as Si ₃ N ₄ and Al ₂ O ₃ can be used in addition to SiO ₂ .

  Next, a p-electrode 37 and a counter electrode 39 are formed on the p-type semiconductor layer 13 exposed through the opening of the translucent insulating layer 41 by EB vapor deposition. Specifically, a resist is formed on the light-transmitting insulating layer 41, and AuZn is deposited thereon to a thickness of 100 nm by EB vapor deposition, and AuZn deposited on the light-transmitting insulating layer 41 is removed by lift-off. To form. Thereafter, AuZn was deposited to a thickness of 200 nm on the p-electrode 37, the counter electrode 39, and the translucent insulating layer 41 by EB vapor deposition to form a reflective metal layer 43 (FIG. 7D). When the p-electrode 37, the counter electrode 39, and the reflective metal layer 43 are formed of the same material, the light-transmitting insulating layer 41 is formed on the light-transmitting insulating layer 41 in order to form them in one step. Alternatively, a 300 nm metal material may be deposited by EB vapor deposition or the like.

  Next, the semiconductor side bonding layer 45 is formed on the reflective metal layer 43. Specifically, for example, TaN (layer thickness: 100 nm), TiW (layer thickness: 100 nm), TaN (100 nm), Ni (layer thickness: 200 nm), and Au (layer thickness: 30 nm) are sequentially formed by an electron beam vacuum deposition method. Are stacked (FIG. 8A). Note that the resistance heating vapor deposition method or the sputtering method can be used to form the semiconductor side bonding layer 45.

  Next, a support substrate 49 having a support substrate side bonding layer 47 formed on the upper surface is prepared. For example, the support substrate 49 is a Si substrate in which an ohmic metal layer (not shown) made of Pt and having a layer thickness of 200 nm is formed on the upper and lower surfaces by EB vapor deposition. In the support substrate side bonding layer 47, Ti (layer thickness 150 nm), Ni (layer thickness 150 nm), and AuSn (layer thickness 600 nm) are formed in this order on the support substrate 49 by sputtering or the like.

  Next, the surface of the semiconductor-side bonding layer 45 and the surface of the support substrate-side bonding layer 47 are brought into contact with each other and pressed against each other at a pressure of 1 MPa, and thermocompression bonding is performed in a nitrogen atmosphere at a temperature of 330 ° C. for 10 minutes. By doing so, the support substrate 49 is attached. Thereafter, for example, the growth substrate 37 is removed by wet etching using a mixed solution of ammonia water and hydrogen peroxide water (FIG. 8A). The growth substrate 37 may be removed by dry etching, mechanical polishing, chemical mechanical polishing (CMP), or a combination of these methods. In order to improve the light extraction efficiency, the exposed n-type semiconductor layer surface is preferably subjected to uneven processing by wet etching or the like.

  After completion of the above processing, an n wiring electrode 31, an n power supply wiring 33, and a bonding pad 35 are formed on the n type semiconductor layer 23 (FIG. 8B). The n wiring electrode 31 is formed by depositing AuGeNi on the n-type semiconductor layer 23 by EB vapor deposition and then patterning by lift-off. Subsequently, Ti (layer thickness: 100 nm) is sequentially deposited by EB vapor deposition or the like so as to cover the upper surface of the n-type semiconductor layer 23 and the n wiring electrode 31, and patterning is performed by a lift-off method to form the n power supply wiring 33. . Thereafter, 1000 nm of Au was deposited and patterned by a lift-off method to form a bonding pad 35. The n wiring electrode 31 may be formed of a material capable of forming an ohmic junction with the n-type semiconductor, and may be formed using, for example, AuGe, AuSn, AuSnNi, or the like.

  Finally, in order to promote the formation of an ohmic junction between the n-type semiconductor layer 23 and the n wiring electrode 31, heat treatment is performed in a nitrogen atmosphere at 400 ° C., whereby the light emitting element 10 is completed.

  In the above embodiment, the surface processed layer 21 is formed on the current spreading function layer 19, but the surface processed layer 21 may not be formed. That is, the n-type semiconductor layer 23 may include at least a configuration in which the n-type cladding layer 17 and the current spreading function layer 19 are stacked in this order. Even when the surface processed layer 21 is not formed, the current is sufficiently diffused in the horizontal direction in the current diffusion functional layer 19, and the active layer 15 emits light uniformly.

  In the above embodiment, the Al composition of the first low resistance layer 25 and the second low resistance layer 29 of the current spreading function layer 19 is the same, but the second low resistance layer 25 is more second than the first low resistance layer 25. By reducing the Al composition of the low-resistance layer 29 and increasing the refractive index, the effective refractive index of the current spreading functional layer 19 as a whole may increase toward the light extraction surface. By doing in this way, the light radiate | emitted from the active layer 15 will be guide | induced to the light extraction surface side, and the light extraction efficiency of a light emitting element will improve further. Further, in order to increase the effective refractive index toward the light extraction surface of the current spreading function layer 19 as a whole, the refractive index of the second low resistance layer 29 is set to be higher than the refractive index of the first low resistance 25. The layer thickness of the second low resistance layer 29 may be made larger than that of the first low resistance layer 25.

  Further, in the above embodiment, the current spreading function layer 19 has a three-layer structure of the first low resistance layer 25, the high resistance layer 27, and the second low resistance layer 29 in order from the n-type cladding layer 17 side. Although the case has been described, if the high resistance layer is sandwiched between the low resistance layers, a multilayer structure may be taken. For example, the current spreading function layer 19 includes three low resistance layers and two high resistance layers. From the n-type cladding layer 17 side, the low resistance layer, the high resistance layer, the low resistance layer, the high resistance layer, and the low resistance layer. It is good also as laminating with a layer. Even in this case, horizontal diffusion of current occurs in each low resistance layer, and the current spreads sufficiently and the active layer 15 emits light uniformly.

  In the above embodiment, when the reverse bias current flows, the current flows from the n wiring electrode 31 to the counter electrode 39 so that the electrostatic breakdown voltage characteristics are not deteriorated. The shortest distance between the end portion and the end portion of the p-electrode 37 is preferably smaller than the shortest distance between the end portion of the n wiring electrode 31 and the end portion of the counter electrode 39. That is, as shown in FIG. 1 in which the n wiring electrode 31, the p electrode 37, and the counter electrode 39 are projected on the upper surface of the semiconductor structure layer 11, the n wiring electrode in a direction parallel to the upper surface of the semiconductor structure layer 11. The shortest distance a between the end of 31 and the end of the p-electrode 37 is preferably smaller than the shortest distance b between the end of the n wiring electrode 31 and the end of the counter electrode 39.

  In the above embodiment, the case where the n power supply wiring 33 and the n-type semiconductor layer 23 form a Schottky junction and the counter electrode 39 and the p-type semiconductor layer 13 form an ohmic junction has been described as an example. The n power supply wiring 33 and the n-type semiconductor layer 23 may form an ohmic junction, and the counter electrode 39 and the p-type semiconductor layer 13 may form a Schottky junction. Even in this case, as in the above embodiment, when a reverse bias current flows, the current is distributed between the n power supply wiring 33 under the bonding pad 35 and the counter electrode 39, and the reverse bias current is reduced. It is possible to improve the electrostatic breakdown voltage when flowing.

  Further, in the above embodiment, the case where the first conductivity type is a p-type and the second conductivity type is an n-type light emitting element has been described, but the first conductivity type is an n-type, The conductivity type of 2 may be p-type. Even in this case, by forming a high resistance layer sandwiched between each of the plurality of low resistance layers in the p-type semiconductor layer, the light emitting element is improved while keeping the thickness of the semiconductor structure layer thin and improving the light extraction efficiency. It is possible to improve the horizontal current diffusion and improve the light emission efficiency.

  In the above embodiments, the light-emitting element having the AlGaInP-based semiconductor structure layer has been described. However, the configuration in which the high-resistance layer sandwiched between each of the plurality of low-resistance layers is formed as an AlGaN-based semiconductor structure. The present invention can also be applied to a semiconductor structure layer of another material system such as a layer. Even in that case, it is possible to improve the light emission efficiency by improving the light extraction efficiency while keeping the thickness of the semiconductor structure layer thin, and to improve the light emission efficiency.

  In the above embodiment, the so-called thin film type light-emitting element manufactured by peeling the growth substrate after the semiconductor structure layer is attached to the supporting substrate has been described. The present invention is also applicable to a type of light emitting device that is manufactured without removing the growth substrate later.

Various numerical values, dimensions, materials, electrode arrangements, and the like in the above-described embodiments are merely examples, and can be appropriately selected according to the application and the semiconductor light emitting element to be manufactured.
DESCRIPTION OF SYMBOLS 10 Light emitting element 11 Semiconductor structure layer 13 P-type semiconductor layer 15 Active layer 17 N-type clad layer 19 Current diffusion functional layer 21 Surface processed layer 23 N-type semiconductor layer 25 First low resistance layer 27 High resistance layer 29 Second low Resistance layer 31 n wiring electrode 33 n power supply wiring 35 bonding pad 37 p electrode 39 counter electrode 41 translucent insulating layer 43 reflective metal layer 45 semiconductor side bonding layer 47 support substrate side bonding layer 49 support substrate 51 growth substrate

Claims (5)

A semiconductor structure layer made of an AlGaInP-based semiconductor in which a first semiconductor layer of a first conductivity type, an active layer, and a second semiconductor layer of a second conductivity type are stacked in this order;
A first electrode formed on a part of the first semiconductor layer;
A second electrode formed on a part of the second semiconductor layer,
The first electrode is formed in a region other than a region facing the region where the second electrode is formed with the semiconductor structure layer interposed therebetween,
The second electrode, the feed includes wiring, before Symbol stretched and the second semiconductor layer and the ohmic contact formed to have the wiring electrodes from the power supply wiring, and a bonding pad formed on said power supply wiring,
A counter electrode is formed on the first semiconductor layer in a region facing the region where the bonding pad is formed and the semiconductor structure layer in between.
The power supply wiring just below the bonding pad forms a Schottky junction with the second semiconductor layer, and the counter electrode forms an ohmic junction with the first semiconductor layer, or the power supply just below the bonding pad The wiring forms an ohmic junction with the second semiconductor layer, and the counter electrode forms a Schottky junction with the first semiconductor layer,
The shortest distance between the end of the wiring electrode and the end of the first electrode in a direction parallel to the upper surface of the semiconductor structure layer is an end of the wiring electrode in a direction parallel to the upper surface of the semiconductor structure layer. Smaller than the shortest distance between the portion and the end of the counter electrode,
The second semiconductor layer includes at least a configuration in which a cladding layer and a current spreading function layer are sequentially formed from the active layer side, and the current spreading function layer includes a plurality of low resistance layers and the plurality of low resistance layers. And a high resistance layer having a higher resistivity than the plurality of low resistance layers.   2. The semiconductor light emitting element according to claim 1, wherein in the plurality of low resistance layers, a layer far from the active layer has a smaller Al composition than a layer close to the active layer.   3. The semiconductor light emitting element according to claim 1, wherein in the plurality of low resistance layers, a layer far from the active layer has a larger layer thickness than a layer close to the active layer.   4. The thickness of each of the plurality of low resistance layers is less than a wavelength of light emitted from the active layer within each of the plurality of low resistance layers. 5. The semiconductor light-emitting device described in 1.   5. The semiconductor light emitting element according to claim 1, wherein a specific resistance of the high resistance layer with respect to the plurality of low resistance layers is 10 times or more.