JP6195342B2 - 情報処理装置およびメモリアクセス制御方法 - Google Patents

情報処理装置およびメモリアクセス制御方法 Download PDF

Info

Publication number
JP6195342B2
JP6195342B2 JP2013067126A JP2013067126A JP6195342B2 JP 6195342 B2 JP6195342 B2 JP 6195342B2 JP 2013067126 A JP2013067126 A JP 2013067126A JP 2013067126 A JP2013067126 A JP 2013067126A JP 6195342 B2 JP6195342 B2 JP 6195342B2
Authority
JP
Japan
Prior art keywords
access
memory
bank
banks
information processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2013067126A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014191621A5 (enExample
JP2014191621A (ja
Inventor
智也 本條
智也 本條
山本　貴久
貴久 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2013067126A priority Critical patent/JP6195342B2/ja
Priority to US14/224,145 priority patent/US9946645B2/en
Publication of JP2014191621A publication Critical patent/JP2014191621A/ja
Publication of JP2014191621A5 publication Critical patent/JP2014191621A5/ja
Application granted granted Critical
Publication of JP6195342B2 publication Critical patent/JP6195342B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Image Analysis (AREA)
JP2013067126A 2013-03-27 2013-03-27 情報処理装置およびメモリアクセス制御方法 Expired - Fee Related JP6195342B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013067126A JP6195342B2 (ja) 2013-03-27 2013-03-27 情報処理装置およびメモリアクセス制御方法
US14/224,145 US9946645B2 (en) 2013-03-27 2014-03-25 Information processing apparatus and memory control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013067126A JP6195342B2 (ja) 2013-03-27 2013-03-27 情報処理装置およびメモリアクセス制御方法

Publications (3)

Publication Number Publication Date
JP2014191621A JP2014191621A (ja) 2014-10-06
JP2014191621A5 JP2014191621A5 (enExample) 2016-05-19
JP6195342B2 true JP6195342B2 (ja) 2017-09-13

Family

ID=51622020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013067126A Expired - Fee Related JP6195342B2 (ja) 2013-03-27 2013-03-27 情報処理装置およびメモリアクセス制御方法

Country Status (2)

Country Link
US (1) US9946645B2 (enExample)
JP (1) JP6195342B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9208086B1 (en) 2014-01-09 2015-12-08 Pure Storage, Inc. Using frequency domain to prioritize storage of metadata in a cache
KR102346629B1 (ko) * 2014-12-05 2022-01-03 삼성전자주식회사 메모리 접근 제어 방법 및 장치
JP6700712B2 (ja) 2015-10-21 2020-05-27 キヤノン株式会社 畳み込み演算装置
JP2019091191A (ja) * 2017-11-14 2019-06-13 ルネサスエレクトロニクス株式会社 半導体装置、データ処理システム、データ読取り方法、及びデータ読取りプログラム
JP2021047827A (ja) * 2019-09-20 2021-03-25 キヤノン株式会社 デバイス、システム、制御方法、及びプログラム
JP7361551B2 (ja) 2019-09-20 2023-10-16 キヤノン株式会社 デバイス、制御方法、及びプログラム
JP7733454B2 (ja) 2021-03-12 2025-09-03 キヤノン株式会社 情報処理装置、情報処理方法、画像識別システム、及びプログラム

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2169626A1 (en) * 1993-11-02 1995-05-11 Arthur W. Cabral Object-oriented graphic system
JP2003323339A (ja) * 2002-03-01 2003-11-14 Sony Computer Entertainment Inc メモリアクセス装置、半導体デバイス、メモリアクセス制御方法、コンピュータプログラム及び記録媒体
WO2007072324A2 (en) * 2005-12-20 2007-06-28 Nxp B.V. Multi-processor circuit with shared memory banks
JP2008269348A (ja) * 2007-04-20 2008-11-06 Toshiba Corp メモリ制御装置およびメモリ制御方法
US8032804B2 (en) * 2009-01-12 2011-10-04 Micron Technology, Inc. Systems and methods for monitoring a memory system
JP2010205002A (ja) * 2009-03-04 2010-09-16 Seiko Epson Corp 画像処理装置
JP5820973B2 (ja) * 2010-12-28 2015-11-24 パナソニックＩｐマネジメント株式会社 データ記録装置
JP2012242821A (ja) * 2011-05-16 2012-12-10 Sony Mobile Communications Inc 表示画像生成方法
US9183048B2 (en) * 2012-12-20 2015-11-10 Oracle International Corporation System and method for implementing scalable contention-adaptive statistics counters

Also Published As

Publication number Publication date
JP2014191621A (ja) 2014-10-06
US20140297989A1 (en) 2014-10-02
US9946645B2 (en) 2018-04-17

Similar Documents

Publication Publication Date Title
US11907726B2 (en) Systems and methods for virtually partitioning a machine perception and dense algorithm integrated circuit
JP2014191621A (ja) 情報処理装置およびメモリアクセス制御方法
CN101681449B (zh) 计算处理装置及方法
CN111295675B (zh) 用于使用内核来处理卷积运算的设备和方法
US20190095212A1 (en) Neural network system and operating method of neural network system
KR102402111B1 (ko) 콘볼루션 신경망 정방향 연산 실행용 장치와 방법
JP5058681B2 (ja) 情報処理方法及び装置、プログラム、記憶媒体
CN114026569A (zh) 使用脉动阵列的扩张卷积
US20150278634A1 (en) Information processing apparatus and information processing method
JP2011059819A (ja) 情報処理方法及び装置
US10782897B2 (en) Memory reduction for neural networks with fixed structures
US20200183833A1 (en) Virtual space memory bandwidth reduction
US20230083282A1 (en) Systems and methods for accelerating memory transfers and computation efficiency using a computation-informed partitioning of an on-chip data buffer and implementing computation-aware data transfer operations to the on-chip data buffer
US10078596B2 (en) Data processing method, computer readable medium and data processing device
JP2011134102A (ja) 情報処理装置及び情報処理方法
CN114913593B (zh) 手势跟踪方法、装置、终端设备及计算机可读存储介质
US10572969B2 (en) Method and device for processing data
CN117422608A (zh) 图像引导滤波方法及系统
JP7367365B2 (ja) タスク実行管理装置、タスク実行管理方法、および、タスク実行管理プログラム
CN116755752A (zh) Cuda架构中的线程块处理系统、方法及相关设备
CN106934757B (zh) 基于cuda的监控视频前景提取加速方法
KR101204866B1 (ko) 윈도우 기반 영상 처리에서 고속으로 윈도우 영역 내 화소 연산을 수행하기 위한 방법 및 장치
Paul et al. Resource-aware harris corner detection based on adaptive pruning
CN116069480B (zh) 一种处理器及计算设备
CN117575888A (zh) 对特征数据进行加速运算的方法、装置、介质及设备

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160328

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160328

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170119

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170213

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170413

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20170718

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20170810

R151 Written notification of patent or utility model registration

Ref document number: 6195342

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

LAPS Cancellation because of no payment of annual fees