JP6174003B2 - 制御装置状態検証システムおよび制御装置状態検証方法 - Google Patents

制御装置状態検証システムおよび制御装置状態検証方法 Download PDF

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Publication number
JP6174003B2
JP6174003B2 JP2014247649A JP2014247649A JP6174003B2 JP 6174003 B2 JP6174003 B2 JP 6174003B2 JP 2014247649 A JP2014247649 A JP 2014247649A JP 2014247649 A JP2014247649 A JP 2014247649A JP 6174003 B2 JP6174003 B2 JP 6174003B2
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Prior art keywords
information
control device
memory
memory map
evaluation target
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Expired - Fee Related
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JP2014247649A
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Japanese (ja)
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JP2016110411A (ja
Inventor
宏樹 内山
宏樹 内山
大和田 徹
徹 大和田
信 萱島
信 萱島
尚 寺江
尚 寺江
訓 大久保
訓 大久保
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2014247649A priority Critical patent/JP6174003B2/ja
Priority to PCT/JP2015/080251 priority patent/WO2016092962A1/fr
Publication of JP2016110411A publication Critical patent/JP2016110411A/ja
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Publication of JP6174003B2 publication Critical patent/JP6174003B2/ja
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/55Detecting local intrusion or implementing counter-measures
    • G06F21/56Computer malware detection or handling, e.g. anti-virus arrangements

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Health & Medical Sciences (AREA)
  • Virology (AREA)
  • Health & Medical Sciences (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
JP2014247649A 2014-12-08 2014-12-08 制御装置状態検証システムおよび制御装置状態検証方法 Expired - Fee Related JP6174003B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014247649A JP6174003B2 (ja) 2014-12-08 2014-12-08 制御装置状態検証システムおよび制御装置状態検証方法
PCT/JP2015/080251 WO2016092962A1 (fr) 2014-12-08 2015-10-27 Système et procédé de vérification d'état de dispositif de commande

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014247649A JP6174003B2 (ja) 2014-12-08 2014-12-08 制御装置状態検証システムおよび制御装置状態検証方法

Publications (2)

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JP2016110411A JP2016110411A (ja) 2016-06-20
JP6174003B2 true JP6174003B2 (ja) 2017-08-02

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JP2014247649A Expired - Fee Related JP6174003B2 (ja) 2014-12-08 2014-12-08 制御装置状態検証システムおよび制御装置状態検証方法

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JP (1) JP6174003B2 (fr)
WO (1) WO2016092962A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11096057B2 (en) * 2016-08-24 2021-08-17 Mitsubishi Electric Corporation Communication control device, communication system, and communication control method
DE112017005360T5 (de) 2016-10-24 2019-07-25 Panasonic Intellectual Property Management Co., Ltd. Produktherstellungssystem, malware-erkennungssystem, produktherstellungsverfahren und malware-erkennungsverfahren
FR3087911B1 (fr) * 2018-10-24 2021-11-12 Amadeus Sas Authentification par pointage et cliquage

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4143335B2 (ja) * 2002-05-27 2008-09-03 Necフィールディング株式会社 顧客システムの保守方式、保守装置、保守方法、及びプログラム
JP4938576B2 (ja) * 2007-07-24 2012-05-23 日本電信電話株式会社 情報収集システムおよび情報収集方法
JP2013218531A (ja) * 2012-04-09 2013-10-24 Hitachi Ltd 安全性評価システム及び安全性評価方法
JP6041727B2 (ja) * 2013-03-26 2016-12-14 株式会社富士通エフサス 管理装置、管理方法及び管理プログラム

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Publication number Publication date
JP2016110411A (ja) 2016-06-20
WO2016092962A1 (fr) 2016-06-16

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