JP6155848B2 - Defect correction method, semiconductor manufacturing apparatus, semiconductor manufacturing method, and defect correction program - Google Patents

Description

  The present invention relates to a defect correction method, a semiconductor manufacturing apparatus, a semiconductor manufacturing method, and a defect correction program caused by a photomask used in a semiconductor manufacturing process.

  In a semiconductor manufacturing process, a circuit pattern is generally formed on a wafer by using a lithography technique. With the demand for miniaturization of semiconductor devices, the miniaturization of patterns has progressed, and the level of defects allowed on the reticle has become very small. In particular, in EUV lithography using extreme ultraviolet (EUV), it is difficult to produce a defect-free reticle because the pattern on the reticle is very small. For this reason, there is a problem of increase in manufacturing time and cost, such as correcting a defective portion on the reticle after manufacturing the reticle, or re-creating the reticle itself when there are many defects.

  In the wavelength region of EUV light, a transmission mask cannot be used due to the light absorption of the substance. Therefore, a multilayer reflective film is used as a mask blank before pattern formation. An absorber pattern is formed on the multilayer reflective film, and a circuit pattern is formed by the light absorption part and the reflection part.

  As a reticle defect inspection in a conventional transmission type photomask, there is a method for judging the quality of a reticle by comparing the light intensity distribution of transmitted light of a reticle pattern to be inspected with the light intensity distribution of transmitted light of a defect-free reticle pattern. It is known (for example, refer to Patent Document 1). This method only determines the quality of the transmissive reticle.

JP-A-9-297109

  As defects generated in EUV lithography, a defect caused by an absorber pattern of an EUV photomask and a defect caused by a mask blank can be considered. Since the mask blank uses a multilayer reflective film, it is difficult to specify which part of the multilayer film has a defect, and partial correction of the photomask (reticle) itself is difficult. Further, it is costly to redo the fabrication of the EUV photomask (reticle).

  Therefore, there is a demand for a configuration and method that can easily correct a portion that appears as a defect on a resist pattern in a normal process flow even when a wafer is exposed using a defective photomask.

  An object of the present invention is to provide a defect correction technique and configuration capable of forming a pattern as designed on a wafer even when pattern exposure is performed using a photomask including defects.

In one aspect, the defect correction method comprises:
Acquires the location information of the defects present in the photomask and the design data of the photomask,
A first optical simulation information indicating the exposure state in the case of directly using the photomask defective as input position information of the defect, there is no defect in the photomask as input design data of the photomask generating a second optical simulation information indicating the exposure state of the case,
Generating defect correction data based on the difference between the first optical simulation information and the second optical simulation information;
Performing a first exposure, a second exposure using the defect correction data using the photomask of the defect,
It is characterized by that.

  Even when pattern exposure is performed using a photomask (reticle) including defects, a pattern as designed can be formed on the wafer.

1 is a schematic view of an EUV exposure apparatus to which the present invention is applied. It is a structural example of the EUV photomask used with the exposure apparatus of FIG. It is a flowchart which shows the method of embodiment. It is a figure for demonstrating the defect which arises in a mask blank in 1st Embodiment. It is a figure explaining the resist defect resulting from the defect of a mask blank. It is a simulation figure which shows the exposure defect resulting from the defect of a mask blank. It is a figure which shows the defect correction method of 1st Embodiment. It is a figure which shows the defect correction method of 1st Embodiment, and is a figure which shows the process following the process of FIG. In 2nd Embodiment, it is a figure explaining the resist defect resulting from the defect of an absorber pattern. It is a figure which shows the defect correction method of 2nd Embodiment. It is a figure which shows the defect correction method of 2nd Embodiment, and is a figure which shows the process following the process of FIG. It is a schematic block diagram of the semiconductor manufacturing apparatus used by embodiment. It is a figure which shows the semiconductor manufacturing process of embodiment.

  FIG. 1 is a schematic view of an EUV exposure apparatus 1 to which the present invention is applied. The EUV light output from the EUV light source 2 irradiates the EUV photomask 10 held on the mask stage 6 in the vacuum chamber 3 by the illumination optical system 4. The light reflected by the EUV photomask 10 is guided to the wafer 9 held on the wafer stage 8 by the projection optical system 5. As a result, the pattern formed on the EUV photomask 10 is projected onto the wafer 9.

  FIG. 2 is a schematic view of the EUV photomask 10. The EUV photomask 10 has a multilayer reflective film 12 formed on a substrate 11 and an absorber pattern 13 formed on the multilayer reflective film 12. The absorber pattern 13 is formed of a light absorber such as TaN, TaBN, or Cr. When the EUV photomask 10 is used in the EUV exposure apparatus 1 of FIG. 1, the absorber pattern 13 is held so as to face the wafer 9.

  The multilayer reflective film 12 is, for example, a film in which silicon (Si) 121 and molybdenum (Mo) 122 are alternately stacked. The multilayer reflective film 12 before the absorber pattern 13 is formed is called a mask blank 12. The period length of the mask blank 12 (total film thickness obtained by laminating Si and Mo once) is generally about 6 to 9 nm, and is selected so that the maximum reflectance can be obtained from the incident angle of EUV light. Of the light guided to the EUV photomask 10, the light component incident on the absorber pattern 13 is absorbed, and the light component incident on the multilayer reflective film 12 is reflected. A circuit pattern is formed by the light absorption region by the absorber pattern 13 and the reflection region by the multilayer reflective film 12.

  The inventors have found that there are two types of defects due to the EUV photomask 10. One is a defect in the multilayer reflective film 12 constituting the mask blank 12, and the other is a defect in the circuit pattern 13.

  Whether it is a defect due to the mask blank 12 or a defect due to the circuit pattern 13, correction or re-creation of the photomask 10 itself is avoided as much as possible, and the pattern on the wafer is used at the exposure stage using the photomask 10 as it is. It came to propose the method of correcting.

  Specifically, as shown in FIG. 3, as a detection result of detecting a defect on an actual photomask, position information of the defect on the photomask is acquired, and design data of the photomask is acquired (S101). ). First optical simulation information that receives defect position information as input and second optical simulation information that receives design data as input are generated (S103). The first optical simulation information is information representing an image obtained by simulating an exposure state when exposure is performed using a photomask including defects as it is, for example. The second optical simulation information is information representing an image obtained by simulating the exposure state when, for example, the photomask has no defect.

  Defect correction data is generated from the first optical simulation information and the second optical simulation information (S105). Then, first exposure (for example, EUV exposure) is performed using the photomask as it is, and second exposure (for example, electron beam exposure) is performed using the defect correction data (S107). By forming an exposure image that matches the design data on the wafer, a circuit pattern according to the design data is formed.

  According to this method, even if a fine defect is included on the photomask, a pattern according to the design data can be formed by correcting the exposure region at the exposure stage.

  In the following, the above-described method and the configuration for realizing it will be described in more detail. In the following description, the EUV photomask 10 is referred to as “reticle 10” in the sense of an original mask, and the absorber pattern 13 is referred to as “circuit pattern 13” or “reticle pattern 13”.

<First Embodiment>
In the first embodiment, defects caused by the mask blank 12 are corrected. FIG. 4 is a diagram showing defects that occur in the mask blank 12.

  In the mask blank 12 having no defect as shown in FIG. 4A, incident light passes through Si, is reflected by Mo periodically arranged, and light having a uniform phase is emitted. On the other hand, when dust or the like adheres to the inside of the multilayer reflective film 12 as shown in FIG. 4B, the multilayer reflective film 12 is distorted and the reflected light is scattered, resulting in a phase defect. A phase defect also occurs when there are steps or irregularities on the surface of the multilayer reflective film 12.

  FIG. 5 is a diagram showing how the resist pattern is affected when the mask blank 12 is defective. When there is no defect in the mask blank 12 as shown in FIG. 5B, an exposure image 21 having no exposure defect is formed on the resist film by the light reflected by the mask blank (multilayer reflective film) 12, and as designed. A resist pattern 26 is formed (positive resist).

  On the other hand, if there is a defect 15 in the mask blank 12 as shown in FIG. 5A, an exposure defect 22 due to a phase defect occurs in the exposure image 21 even if there is no problem in the reticle pattern 13. When the resist film is developed with the exposure defect 22, an unnecessary protrusion 27 is generated on the resist pattern 26. When etching is performed using such a resist pattern 26 as a mask, defects also occur in the circuit pattern on the wafer.

  FIG. 6A shows an optical simulation image when exposure is performed in the presence of a blank defect (phase defect). As a comparison, FIG. 6B shows an optical simulation image when exposure is performed using a reticle having no phase defect. As shown in FIG. 6A, if there is a phase defect, the exposed image of that portion is thin and pattern transfer cannot be performed accurately.

  Conventionally, the reticle 10 itself has been corrected or recreated in such a case. However, in the first embodiment, even when the mask blank 12 has a defect 15, the reticle 10 is used as it is to obtain exposure defect data. Then, defect correction is performed by additional exposure.

  7 and 8 are diagrams showing a defect correction method when the mask blank 12 has a defect 15. First, in FIG. 7A, blank defect data 31 of the reticle 10 is acquired. The blank defect data 31 can be obtained using any mask blank inspection method. For example, the presence of a phase defect and the coordinate position and range of the phase defect on the reticle 10 can be detected by obtaining an intensity distribution of reflected light using detection light having the same wavelength as EUV light used for exposure. These pieces of information are acquired as blank defect data 31.

  The reticle drawing data 32 is acquired together with the blank defect data 31. The reticle drawing data is basically circuit pattern design data generated in advance, but there are cases in which correction of proximity effect correction patterns and addition of auxiliary patterns such as an assist bar are performed as necessary. .

  In FIG. 7B, the detected blank defect data 31 and reticle drawing data 32 are combined to generate combined data 33.

  In FIG. 7C, an optical simulation image 37a (see FIG. 6A) with the composite data 33 as an input and an optical simulation image 37b (see FIG. 6B) with only the reticle drawing data 32 as an input. get. The optical simulation is performed under scheduled process conditions or predetermined process conditions. In the simulation image 37a based on the composite data 33, an exposure defect 34 caused by a blank defect has occurred. This simulation image 37 a is a predicted image of an exposure pattern obtained when the reticle pattern 13 is formed on the mask blank (multilayer reflective film) 12 including the blank defect 15 and the wafer is exposed. The optical simulation information may be any data as long as it can simulate the exposure state, and is not necessarily limited to the simulation image as shown in FIG.

  In FIG. 7D, difference data between the simulation image 37 a based on the composite data 33 and the simulation image 37 b based on the reticle drawing data 32 is acquired. This difference data is referred to as correction data (EB data) 35 for correction exposure.

  In FIG. 8A, a reticle pattern 13 is formed on a mask blank (multilayer reflective film) 12 including a blank defect 15 to produce a reticle 10, and EUV exposure is performed using the produced reticle 10. Further, exposure using an electron beam is performed using the correction data (EB data) 35 acquired in FIG. The exposure using the EB data 35 is exposure for compensating for an exposure defect 34 (see FIG. 7C) caused by the blank defect 15.

  FIG. 8B shows an exposure image formed on the wafer by exposure. In the EUV exposure using the reticle 10, a defect 22 occurs in the EUV exposure image 21, but an EB exposure image 41 that compensates for the defect 22 is generated by the EB exposure. EUV exposure and EB exposure may be performed simultaneously or sequentially. When performing simultaneously, a wafer is arranged in an exposure / development apparatus (not shown) having an EUV light source and an EB light source. In the case of separately exposing, the wafer is transferred between the EUV exposure apparatus and the EB exposure apparatus and sequentially exposed as described later. Depending on the configuration of the EUV exposure apparatus and the EB exposure apparatus, an EB exposure may be performed after an additional PEB (Post Exposure Bake) process after the EUV exposure.

  FIG. 8C shows an exposure region when the EUV exposure image 21 using the reticle of FIG. 8B and the EB exposure image 41 by the electron beam are superimposed on the wafer. The exposure defect 22 caused by the blank defect 15 of the reticle 10 is compensated by the EB exposure image 41, and the same exposure image as that expected from the reticle drawing data is obtained.

  FIG. 8D shows the resist pattern 26 after exposure and development. Regardless of the blank defect 15 existing on the reticle 10, the resist pattern 26 expected from the reticle drawing data 32 can be obtained without producing the protrusion 27 as shown in FIG. By performing etching using the resist pattern 26, a circuit pattern as designed can be formed on the wafer.

Second Embodiment
9 to 11 are diagrams for explaining a defect correction method according to the second embodiment. The second embodiment provides defect correction when the reticle pattern 13 has a defect.

  FIG. 9 is a diagram showing the influence on the resist pattern 26 when the reticle pattern 13 has a defect. When there is no defect in the reticle pattern 13 as shown in FIG. 9B, an EUV exposure image 21 is formed on the resist film by the light reflected by the mask blank (multilayer reflective film) 12 and developed. Then, a resist pattern 26 corresponding to the reticle pattern 13 is formed (positive resist).

  On the other hand, if the reticle pattern 13 has a defect 16 as shown in FIG. 9A, an exposure defect 23 occurs in the EUV exposure image 21 even if there is no problem in the mask blank 12. If there is an exposure defect 23, an unnecessary projection 28 is formed on the resist pattern 26, and a defect occurs in the wiring pattern after etching.

  In the second embodiment, even if there is a defect 15 in the reticle pattern 13, the reticle 10 is used as it is, and defect correction is performed by acquiring exposure defect data.

  10 and 11 are diagrams illustrating a defect correction method in the case where the reticle pattern 13 has a defect 16. First, in FIG. 10A, defect inspection data 61 obtained by defect inspection of the reticle 10 and reticle drawing data 62 are acquired. The defect inspection data 61 may be acquired based on, for example, the intensity distribution of reflected light obtained by irradiating the actual reticle 10 with EUV light, or image data with which a pattern boundary can be recognized by an arbitrary pattern recognition method. There may be. As a result of the defect inspection, defect inspection data 61 including a reticle pattern defect 66 is acquired.

  In FIG. 10B, an optical simulation image 67a having the defect inspection data 61 as input and an optical simulation image 67b having the reticle drawing data 62 as input are acquired. The optical simulation is performed under scheduled process conditions or predetermined process conditions. When the defect inspection data 61 includes a reticle pattern defect 66 different from the reticle drawing data 62, it appears as a defect 64 in the optical simulation image 67a. That is, when exposure is actually performed using the reticle 10, it is predicted that similar defects will occur in the exposure image on the wafer.

  10C, the optical simulation images 67a and 67b are compared, and the difference is extracted as correction data (EB data) 65 in FIG. 9D. In both the first embodiment and the second embodiment, the defect inspection data 61 including the defect position information and the reticle drawing data 62 are compared by the optical simulation image without directly comparing them, depending on the process conditions of the exposure apparatus. This is because the optical image obtained from the reticle drawing data 62 does not necessarily reflect the same shape and dimensions.

  In FIG. 10D, the defect 64 existing in the optical simulation image 67a is extracted as the EB data 65 as a comparison result. The EB data 65 includes, for example, the coordinate position, shape, and size of the pattern defect 66 on the reticle 10. The EB data 65 may be calculated only when a dimensional difference equal to or greater than a predetermined threshold is detected. Further, the difference between the optical simulation images 67a and 67b may be converted as an area, and may be extracted as the EB data 65 when the area exceeds a certain area. The coordinate position information of the EB data 65 can be acquired based on information from the defect inspection apparatus.

  In FIG. 11A, exposure is performed using the reticle 10 and the EB data 65. The reticle pattern 13 formed on the reticle 10 includes a pattern defect 16 (see FIG. 9A), which is used as it is for exposure.

  In FIG. 11B, an EUV exposure image 21 using the reticle 10 and an EB exposure image 71 using the EB data 6 are formed on the wafer. The EUV exposure image 21 has an exposure defect 23 caused by the pattern defect 16 of the reticle 10, but an EB exposure image 71 is formed at a position corresponding to the exposure defect 23. You may perform EB exposure, after inserting an additional PEB process after EUV exposure.

  As shown in FIG. 11C, as a result of the exposure, the EUV exposure image 21 and the EB exposure image 71 are overlapped on the upper side, and an exposure image similar to that exposed with a reticle pattern having no defect is obtained.

  In FIG. 11D, a resist pattern 26 corresponding to the reticle drawing data 62 is obtained after development.

  As described above, in the second embodiment, even when exposure is performed using a reticle including a reticle pattern defect, a circuit pattern having no defect can be formed by correcting the exposure image on the wafer by EB exposure.

<Semiconductor manufacturing equipment>
FIG. 12 is a schematic diagram of a semiconductor manufacturing apparatus 50 to which the correction methods of the first embodiment and the second embodiment are applied. The semiconductor manufacturing apparatus 50 includes a mask inspection apparatus 51, a correction data generation unit 55, an EUV exposure (first exposure) apparatus 57, and an EB exposure (second exposure) apparatus 58.

  The mask inspection apparatus 51 detects at least one of the mask blank defect (phase defect) 15 and the reticle pattern defect 16 as defect inspection data 54. As described above, the defect detection method is arbitrary, but it can be detected mainly from the optical intensity distribution.

  The mask inspection apparatus 51 is not necessarily a component of the semiconductor manufacturing apparatus 50. The defect inspection data 54 may be acquired by detecting a defect of the reticle 10 with an external inspection apparatus.

  The reticle 10 after the defect inspection is installed in the EUV exposure apparatus 57. When the defect inspection is a defect inspection of a mask blank, the reticle pattern 13 is formed on the mask blank 12 after the defect inspection to manufacture the reticle 10, and the manufactured reticle is installed in the EUV exposure apparatus 57.

  The correction data generation unit 55 performs an optical simulation using the defect inspection data 54 as an input and an optical simulation using the designed reticle drawing data 52 as an input, and uses the EB correction data 35 or 65 as the difference data between the two optical simulation images. Output as. The EB correction data 35 or 65 is input to the EB exposure device 58.

  The EUV exposure apparatus 57 includes an optical system as shown in FIG. 1 and a coating / developing apparatus (not shown). A resist is applied on the wafer 9 conveyed to the EUV exposure apparatus 57, and a circuit pattern of the reticle 10 is drawn on the resist by EUV irradiation. Baking (EPB) may be performed after EUV exposure to stably hold the resist on the wafer 9.

  The EB exposure device 58 performs exposure for correcting an exposure defect on the resist based on the EB correction data 35 or 65. Thereafter, baking and development are performed to form a resist pattern on the wafer 9.

  Note that either the transfer of the wafer to the EUV exposure apparatus 57 or the transfer of the wafer to the EB exposure apparatus 58 may be performed first. When EUV exposure and EB exposure are performed in one chamber, either exposure may be performed first.

  The defect correction in the semiconductor manufacturing apparatus 50 may be controlled by a defect correction program installed in advance. In that case, the defect correction program causes the CPU (not shown) of the semiconductor manufacturing apparatus 50 to perform the following procedure. That is, the defect inspection data 54 and reticle drawing data 52 of the reticle 10 are input to the correction data generation unit 55, and an optical simulation image based on the defect inspection data 54 and an optical simulation image based on the reticle drawing data 52 are generated. Based on the simulation image, EB correction data 65 is generated. The EB correction data 65 is supplied to the EB exposure device 58 and EB exposure based on the EB correction data 35 or 65 is performed.

  FIG. 13 is a manufacturing process diagram of a semiconductor device using the semiconductor manufacturing apparatus 50 of FIG. As shown in FIG. 12A, a resist film 82 is formed over the substrate 81. In FIG. 13B, EUV exposure is performed using the reticle 10. The reticle 10 has a circuit pattern 13 on a mask blank 12 made of a multilayer reflective film. EUV light from a light source (not shown) is absorbed at a place where the circuit pattern 13 is formed and reflected at a place where the circuit pattern 13 is not formed, thereby forming an EVU exposure region 83 on the resist film 82.

  In FIG. 13C, EB exposure is performed on a predetermined portion of the resist film 82 using the EB correction data. Thereby, an EB exposure region 84 is formed on the resist film 82. Even when EVU exposure using the reticle 10 has an exposure defect, a correct exposure pattern in which the exposure defect is corrected is formed by EB exposure.

  In FIG. 13D, baking (PEB) and development are performed to form a resist pattern 26. Thereafter, an etching target film (not shown) on the substrate 81 is etched using the resist pattern 26 as a mask.

  In this way, even if there is a fine defect in either the mask blank 12 or the reticle pattern 13, EUV exposure is performed using the reticle 10 as it is. Prior to exposure, correction data is generated from an optical image based on defect detection data and an optical image based on reticle drawing data, and exposure correction is performed using the correction data at the stage of exposure. Thereby, an appropriate circuit pattern can be formed on the wafer.

  The defect correction method according to the embodiment can alleviate the tolerance of the number of defects at the time of reticle production, and can reduce the number of days required to produce a good reticle. In addition, costs associated therewith can be reduced, and a final semiconductor chip can be manufactured at low cost.

  The method of the embodiment is particularly effective when there is a defect in the mask blank (multilayer reflective film). However, the method is not limited to exposure by EUV irradiation, but also for defect correction in pattern formation using a conventional transmission type photomask. Can be applied.

  The exposure based on the correction data is not limited to the EB exposure, and can be performed by irradiating an arbitrary irradiation line suitable for the exposure.

  Defects caused by the reticle pattern are effective in correcting pattern defects that cause exposure defects when a positive resist film is used, and types that cause overexposure when using a negative resist film. This is effective for correcting pattern defects.

The following notes are presented for the following explanation.
(Appendix 1)
Obtain position information of defects present in the photomask and design data of the photomask,
Generating first optical simulation information that receives the position information of the defect and second optical simulation information that receives the design data of the photomask;
Generating defect correction data based on the first optical simulation information and the second optical simulation information;
Performing a first exposure using the photomask and a second exposure using the defect correction data;
A defect correction method characterized by the above.
(Appendix 2)
The defect correction method according to claim 1, wherein the first optical simulation information represents a result of simulating an exposure state when exposure is performed using the photomask.
(Appendix 3)
The defect correction method according to claim 1, wherein the second optical simulation information represents a result of simulating an exposure state when the photomask is free of the defect.
(Appendix 4)
The defect correction method according to any one of appendices 1 to 3, wherein the defect is a defect present in a mask blank of the photomask.
(Appendix 5)
The defect correction method according to any one of appendices 1 to 3, wherein the defect is a defect present in a circuit pattern of the photomask.
(Appendix 6)
The defect correction method according to any one of appendices 1 to 5, wherein the first exposure is exposure with far ultraviolet light.
(Appendix 7)
6. The defect correction method according to any one of appendices 1 to 5, wherein the second exposure is exposure with an electron beam.
(Appendix 8)
8. The defect correction method according to any one of appendices 1 to 7, wherein the defect correction data represents a difference between the first optical simulation information and the second optical simulation information.
(Appendix 9)
The first optical simulation information based on the position information and the second optical simulation based on the design data are input with defect inspection data indicating the position information of defects existing in the photomask and the design data of the photomask. A correction data generation unit that generates information and generates defect correction data based on the first optical simulation information and the second optical simulation information;
A first exposure unit that performs first exposure using the photomask;
A second exposure unit for performing second exposure using the defect correction data;
A semiconductor manufacturing apparatus.
(Appendix 10)
Obtain position information of defects present in the photomask and design data of the photomask,
Generating first optical simulation information for simulating an exposure state exposed using the photomask, and second optical simulation information for simulating an exposure state in the absence of the defect based on the design data of the photomask;
Generating defect correction data based on the first optical simulation information and the second optical simulation information;
Forming a resist film on a semiconductor substrate;
A first exposure using the photomask and a second exposure using the defect correction data are performed on the resist film.
A method for manufacturing a semiconductor device.
(Appendix 11)
A defect correction program that is installed in a semiconductor manufacturing apparatus and causes the calculation unit of the semiconductor manufacturing apparatus to perform the following procedure
Using the photomask defect position information as input, to generate first optical simulation information based on the defect position information,
Using the photomask design data as input, generating second optical simulation information based on the design data,
Generating defect correction data based on the first optical simulation information and the second optical simulation information;
The exposure unit of the semiconductor manufacturing apparatus is controlled to perform first exposure using the photomask and second exposure using the defect correction data.

10 Reticle (Photomask)
12 Mask blank (Multilayer reflective film)
13 Absorber pattern (reticle pattern or circuit pattern)
15 Mask Blank Defect 16 Reticle Pattern Defect 31 Blank Defect Data (Defect Inspection Data)
32, 52 Reticle drawing data 35, 65 EB correction data 50 Semiconductor manufacturing device 51 Mask inspection device 54, 61 Defect inspection data 55 Correction data generation unit 57 EUV exposure device 58 EB exposure device

Claims (6)

Acquires the location information of the defects present in the photomask and the design data of the photomask,
Defects on the photomask as the input and the first optical simulation information indicating the exposure state in the case of directly using the photomask having the defect as input position information of the defect, the design data of the photomask generating a second optical simulation information indicating the exposure state in the absence of,
Generating defect correction data based on the difference between the first optical simulation information and the second optical simulation information;
Performing a first exposure, a second exposure using the defect correction data using the photomask of the defect,
A defect correction method characterized by the above. The defect correction method according to claim 1, wherein the first exposure is performed by far ultraviolet light, and the second exposure is performed by an electron beam . The defect correction method according to claim 2 , wherein the photomask is a reflective mask using a multilayer reflective film for mask blanks . A defect inspection data, for indicating the checking result of the defects present in the photomask, and inputs the design data of the photomask, the first when the photomask with a defect based on the said defect inspection data was used as optical simulation information, and said based on the design data to generate a second optical simulation information indicating the exposure state when there is no defect in the photomask, the first optical simulation information and the second optical simulation information A correction data generation unit that generates defect correction data based on the difference between,
A first exposure unit that performs first exposure using the photomask having the defect ;
A second exposure unit for performing second exposure using the defect correction data;
A semiconductor manufacturing apparatus. Acquires the detection result of the defects present in the photomask and the design data of the photomask,
A first optical simulation information indicating the simulation result of the exposure conditions in the case of using as the photomask defective, the show simulation results of the exposure conditions in the absence of the defect on the basis of the design data of the photomask 2 And generate optical simulation information for
Generating defect correction data based on the difference between the first optical simulation information and the second optical simulation information;
Forming a resist film on a semiconductor substrate;
Wherein the resist film is performed first exposure, a second exposure using the defect correction data using the photomask of the defect,
A method for manufacturing a semiconductor device. A defect correction program that is installed in a semiconductor manufacturing apparatus and causes the calculation unit of the semiconductor manufacturing apparatus to perform the following procedure
Using the defect position information of the photomask as input, generating first optical simulation information indicating an exposure state when the defective photomask is used as it is,
Using the photomask design data as input, generating second optical simulation information indicating an exposure state when the photomask has no defect ,
Generating defect correction data based on a difference between the first optical simulation information and the second optical simulation information;
Wherein by controlling the exposed portion of the semiconductor manufacturing device, a first exposure using the photomask of the defect, to perform a second exposure using the defect correction data.