JP2012186373A - Inspection method of euv mask blank, manufacturing method of euv photomask, and patterning method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inspection method for inspecting a micro phase defect in an EUV mask blank simply with high sensitivity.SOLUTION: In an EUV exposure apparatus having a reflective optical system, an EUV mask blank having a chip pattern and a substrate, on which a lower layer film, an intermediate layer film and a negative resist film are formed, are installed. After transferring a chip pattern to the negative resist film by EUV light exposure, the chip pattern is transferred by etching the intermediate layer film by using the negative resist film as a mask, and then the chip pattern is transferred by etching the lower layer film by using the intermediate layer film as a mask. Defect of the EUV mask blank is detected by comparing the chip patterns transferred to regions of the lower layer film at more than one place.

Description

  The present invention relates to a lithography technique in a manufacturing process of a semiconductor integrated circuit device or the like, and in particular, an inspection method of a reflective EUV mask blank for extreme ultraviolet lithography (Extreme Ultraviolet Lithography), and a manufacturing method of an EUV photomask using the inspection method And a pattern forming method using an EUV photomask formed by using the manufacturing method.

  In the present specification, a reflective EUV mask blank for extreme ultraviolet lithography may be referred to as “EUV mask blank”, and a reflective photomask for extreme ultraviolet lithography may be referred to as “EUV photomask”. Here, EUV is an abbreviation for Extreme Ultraviolet.

  The premise for explaining “background art” and “problem to be solved by the invention” is as follows. Usually, since a photomask is used in a reduction projection type exposure apparatus, when discussing the pattern size on the mask, the reduction magnification of the exposure apparatus must be taken into consideration. However, in this specification, in order to avoid confusion, when describing the pattern dimensions on the mask in correspondence with the desired pattern to be formed (for example, a resist pattern), the dimensions are converted by a reduction ratio unless otherwise specified. Use the value obtained. Specifically, when a resist pattern having a width of 32 nm is formed by a mask pattern having a width (M × 32) nm in a 1 / M reduction projection system, the mask pattern width and the resist pattern width are both 32 nm. To do. The same applies to the description of the defect size.

  In this specification, unless otherwise specified, NA represents “the numerical aperture of the lens of the reduction projection optical system in the exposure apparatus”, and σ represents “the coherence factor of the illumination system in the exposure apparatus”.

  2. Description of the Related Art Conventionally, a semiconductor device such as a semiconductor device is an optical lithography that irradiates a mask, which is an original plate on which a circuit pattern is drawn, with exposure light through a reduction optical system and transfers the circuit pattern onto a semiconductor wafer (hereinafter simply referred to as a wafer). It is mass-produced by repeating the process.

  In addition, with the miniaturization of semiconductor elements constituting a semiconductor integrated circuit, there is a demand for miniaturization of the dimensions of patterns such as wiring. In order to form a fine pattern, lithography technology using light with a short wavelength is indispensable. In particular, in the formation of a pattern having a width of 32 nm or less, a lithography technique using extreme ultraviolet light (EUV light) having a wavelength of 13.6 nm is highly expected.

  By the way, in photolithography using a krypton fluoride (KrF) excimer laser (wavelength: 248 nm) or an argon fluoride (ArF) excimer laser (wavelength: 193 nm), refractive optics including a lens made of synthetic quartz (synthetic quartz lens). The system is used. However, the EUV light has a shorter wavelength than the output light from these excimer lasers. Therefore, the absorption of EUV light by the synthetic quartz lens becomes large, and the refractive index of the synthetic quartz lens becomes close to 1 at the wavelength of the EUV light. Therefore, since the above-described refractive optical system cannot be used in EUV lithography, a reflective optical system (an optical system composed of a reflective photomask and a reflective mirror) is used. In the reflection type photomask which is currently mainstream, a multilayer film (high reflection region of EUV light) is formed on a glass substrate having a low coefficient of thermal expansion, and an EUV light absorbing film is formed on the multilayer film. A mask pattern (low reflection region of EUV light) is formed. The multilayer film has a structure in which two types of thin films having different optical constants (refractive index or absorptivity) are alternately stacked. For example, a 40-layer Mo (molybdenum) / Si (silicon) multilayer film or the like is used. It is used. In this specification, an n layer pair Mo / Si multilayer film means a multilayer film in which Mo films (lower layers) and Si films (upper layers) are alternately stacked n times. As described above, in EUV lithography, a multilayer film reflective substrate using reflection (Bragg reflection) by a multilayer film is used as EUV mask blanks.

  One of the major technical problems in EUV lithography is the reduction of defects in the above-described reflective photomask.

  FIG. 5 is a diagram showing a cross-sectional structure of a conventional reflective photomask together with mask defects. As shown in FIG. 5, a 40 layer pair of Mo / Si multilayer film 101 that reflects EUV light is formed on a glass substrate 100 having a low coefficient of thermal expansion, and an EUV light absorbing film is formed on the multilayer film 101. A mask pattern 102 made of is formed. In general, defects generated in a reflective photomask are roughly classified into a pattern defect 103 generated on the multilayer film 101 and a phase defect 104 generated in the multilayer film 101 or at the interface between the multilayer film 101 and the glass substrate 100. Can do.

  As shown in FIG. 5, the pattern defect 103 is a defect that mainly causes a change in intensity of reflected light, such as a residue or a chip generated when the mask pattern 102 is formed on the surface of the multilayer film 101 (light intensity change type defect). ). On the other hand, the phase defect 104 is a defect (phase change type defect) that causes phase modulation and is generated by a foreign matter generated in the multilayer film 101 or at the interface between the multilayer film 101 and the glass substrate 100. In the reflection type photomask shown in FIG. 5, the wavelength of the exposure light is as short as 13.6 nm. Therefore, even when a very small foreign matter is generated in the multilayer film 101, the size of the foreign matter is several minutes of the wavelength of the exposure light. If it is about 1, phase modulation will occur. Therefore, a defect having a size that does not cause a problem in a conventional transmission mask for KrF or ArF becomes a phase defect, and causes a dimensional variation of the transferred resist pattern. In Non-Patent Document 1 (page 10), if a phase defect having a width of 8 nm and a height of 0.5 nm is present in the multilayer film on the mask when a resist pattern having a width of 32 nm or less is formed, the transfer pattern is about 5%. It is described that the dimensional variation occurs.

JP 2003-114200 A Japanese Patent Laid-Open No. 11-354404

Terazawa et al., 2010 Semiconductor Measurement Symposium “Problems of Inspection and Measurement in EUV Lithography”, March 17, 2010

  It is indispensable to eliminate the above-described phase defects, particularly fatal defects that cause dimensional fluctuations in the resist pattern and ultimately adversely affect device characteristics and reduce the yield at the stage of manufacturing EUV mask blanks.

  The inspection method for the EUV mask blank defect in the previous stage of forming the mask pattern made of the EUV light absorbing film is roughly divided into two types depending on the wavelength of light used for the inspection. The first method is a method of detecting foreign matter from irregularly reflected light when the EUV mask blanks are irradiated with visible light or ultraviolet laser light from an oblique direction, and the second method is EUV used for mask pattern transfer. This is a method for detecting defects using EUV light having the same wavelength of 13.6 nm as that of light.

  However, in the first method, since only the change in the external shape of the multilayer film surface of the EUV mask blank is detected, there is a problem in that phase defects in the multilayer film cannot be detected at all.

On the other hand, a representative method as the second method is a method disclosed in Patent Document 1 for detecting a dark field reflected image by EUV light irradiation with an X-ray CCD (Charge Coupled Device). However, although the method disclosed in Patent Document 1 has a relatively high defect detection sensitivity, it does not have a sufficient detection sensitivity with respect to the detection of the phase defect. The reason for this is that when detecting fine phase defects in the multilayer film, there are aberrations in the lens of the condensing optical system of EUV light used for inspection, or blurring (blurring) of scattered electrons in an EUV light detection device such as a CCD. Because it becomes an obstacle. Further, the visual field area of the inspection apparatus used in the method disclosed in Patent Document 1 is about 0.8 mm in diameter, and in order to inspect the entire surface of the multilayer film of the EUV photomask that is 100 cm ² or more, the visual field area Must be sequentially scanned, and there is also a problem that it takes a long time for defect inspection.

  As a method for solving the problems of the first and second methods as described above, a method disclosed in Patent Document 2 is known. 6A to 6C are diagrams for explaining the method disclosed in Patent Literature 2. FIG. 6A and 6B show a cross-sectional configuration of the EUV mask blanks, and FIG. 6C schematically shows a planar configuration of a wafer to be an exposed substrate.

  In the method disclosed in Patent Document 2, first, as shown in FIG. 6A, after forming the Mo / Si multilayer film 201 on the glass substrate 200, as shown in FIG. A resist pattern (line and space pattern) 202 that can be easily peeled is formed on the multilayer film 201. The resist pattern 202 functions as a mask pattern made of an EUV light absorbing film.

  Next, the EUV mask blanks on which the resist pattern 202 is formed are irradiated with EUV light via a predetermined optical system, and the light reflected by the EUV mask blanks is as shown in FIG. After irradiating the resist coated on the wafer 203, the resist is developed. Thus, a resist pattern (post-transfer resist pattern) 204 formed by transferring the resist pattern 202 is formed in each chip region.

  Next, the presence or absence of defects in the EUV mask blanks is determined by comparing the post-transfer resist patterns 204 with each other between adjacent chip regions.

  In the method disclosed in Patent Document 2, the dimension of the line and space in the resist pattern 202 that can be easily peeled (specifically, the pitch of the line pattern (that is, the pitch of the space pattern)) must be taken into consideration. It is defined that the size of the minimum defect depends on the minimum pattern size when the EUV mask blank to be inspected is finally used as an EUV photomask. For example, when the minimum defect size to be taken into consideration is 8 nm on the mask as disclosed in Non-Patent Document 1, the dimension of the line and space in the resist pattern 202 that can be easily peeled is The dimension is smaller than 8 nm.

  However, since the resolution limit in an EUV exposure apparatus having a current numerical aperture NA of 0.25 and a coherence factor σ of 0.5 is about 27 nm on the wafer, the resist pattern 202 described above is used. A line and space pattern (resist pattern 203) having a dimension smaller than 8 nm, for example, a dimension of 6 nm cannot be transferred onto the wafer 204. Therefore, the method disclosed in Patent Document 2 cannot detect a phase defect having a small size that must be considered.

  As described above, the conventional technology cannot detect fine phase defects in EUV mask blanks with high sensitivity and ease.

  In view of the above, the first object of the present invention is to provide an inspection method that easily and easily detects fine phase defects in EUV mask blanks, and uses defect-free blanks extracted by the inspection method. A second object is to provide a manufacturing method of an EUV photomask, and a third object is to provide a pattern forming method using an EUV photomask formed by the manufacturing method.

  In order to achieve the first object, an EUV mask blank inspection method according to the present invention includes a step of preparing an EUV mask blank having a chip pattern including an alignment mark, an underlayer film, an intermediate layer film, and a negative type. A step of preparing a first substrate on which a resist film is formed in order from the bottom; a step of installing the EUV mask blanks and the first substrate in an EUV exposure apparatus having a reflective optical system; and the first substrate The negative resist film formed on the negative resist film is irradiated with EUV light through the EUV mask blanks, and then the negative resist film is developed to form at least two different regions of the negative resist film. The step of transferring the chip pattern and the negative resist film to which the chip pattern is transferred as an etching mask. The step of transferring the chip pattern to at least two different regions of the intermediate layer film by dry etching the intermediate layer film, and the lower layer film as an etching mask using the intermediate layer film transferred with the chip pattern as an etching mask By transferring the chip pattern to at least two different regions of the lower layer film by dry etching and comparing the chip pattern transferred to the at least two different regions of the lower layer film with each other And a step of detecting a defect of the EUV mask blank.

  In the inspection method for EUV mask blanks according to the present invention, the reflection optical system of the EUV exposure apparatus is a low aberration optical system (for example, a wavefront aberration indicating a deviation between an ideal spherical wave and an actual wavefront is 0.7 nm ( It is preferable that the optical system be equal to or less than (calculated by RMS (Root Mean Square)). The first substrate may be a wafer.

Further, in the method for inspecting EUV mask blanks according to the present invention, the step of preparing the EUV mask blanks comprises alternately alternating layers having a relatively high refractive index and layers having a relatively low refractive index on the glass substrate. A step of forming a multilayer film laminated a plurality of times; a step of forming a resist film on the glass substrate on which the multilayer film is formed; and the resist film is selectively irradiated with exposure light, and then the resist film And developing the chip pattern by developing the film. Here, the thermal expansion rate or thermal shrinkage rate of the glass substrate is low (for example, the thermal expansion rate is 0 to 0.05 × 10 ⁻⁷ / ° C., and the thermal shrinkage rate is −0.05 × 10 ⁻⁷ / ° C. ˜0). The multilayer film may be a Mo / Si multilayer film, for example. The relatively high refractive index layer is made of Mo, Cr, Ni, Ru or W, and the relatively low refractive index layer is made of Si, Be, B or C. May be. That is, a film made of a relatively heavy element may be used as the layer having a relatively high refractive index, and a film made of a relatively light element may be used as the layer having a relatively low refractive index. . The exposure light may be an electron beam, g-line, i-line, KrF excimer laser light, or ArF excimer laser light. That is, in the step of forming the alignment mark for defect inspection on the EUV mask blank, drawing may be performed using an electron beam drawing apparatus, or g-line, i-line, KrF excimer laser, or ArF excimer. You may expose using the exposure apparatus which uses a laser etc. as a light source. The resist constituting the resist film used when forming the alignment mark may be a negative type in which the exposed region is crosslinked, or a positive type in which the exposed region is dissolved. It may be.

  In the inspection method for EUV mask blanks according to the present invention, the resist constituting the negative resist film formed on the first substrate can transfer phase defects in the multilayer film of the EUV mask blanks. A material capable of forming a thin film, a highly sensitive material, and a material having high contrast performance is preferable. Moreover, if the material is as described above, not only a negative type photoresist, but also a positive type photoresist is combined with a negative developer, and a negative development process in which a portion irradiated with EUV light remains is applied. May be.

  In the inspection method for EUV mask blanks according to the present invention, it is assumed that the lower layer film, the intermediate layer film, and the negative resist film are sequentially formed on the first substrate, that is, a multilayer resist process is applied. did. However, if the necessary inspection contrast is obtained depending on the presence or absence of the pattern having the phase defect transferred thereon, and thus the phase defect can be sufficiently detected, the above-described multilayer resist process can be used instead of the first substrate. In addition, for example, a process of forming a negative resist film only through a lower layer film made of an organic material, that is, a single layer resist process can be applied.

  Further, in the EUV mask blank inspection method according to the present invention, in the step of transferring the chip pattern to the at least two different regions of the negative resist film, the exposure amount and Exposure may be performed by changing at least one of the focus positions. That is, when transferring the chip pattern to each chip region of the negative resist film, the exposure conditions such as the exposure amount and the focus position are not set to the same for all chip regions, but the exposure conditions for each chip. May be changed. Here, the exposure amount may be changed within a range of −2% or more and + 2% or less based on the optimum exposure amount. For example, the exposure may be performed by changing the exposure amount by ± 1% or ± 2% based on the optimum exposure amount. The focus position may be changed within a range of −0.02 μm or more and +0.02 μm or less with the optimum focus position as a reference. For example, exposure may be performed by changing the focus position to ± 0.01 μm or ± 0.02 μm with the optimum focus position as a reference.

  In the method for inspecting EUV mask blanks according to the present invention, the chip pattern is formed on the intermediate layer film by dry etching the intermediate layer film using the negative resist film to which the chip pattern is transferred as an etching mask. In the step of transferring, and in the step of transferring the chip pattern to the lower layer film by dry etching the lower layer film using the intermediate layer film to which the chip pattern has been transferred as an etching mask, the chip pattern is transferred. In consideration of the fact that the width of the pattern formed by transferring phase defects in the negative resist film, that is, the photoresist pattern, is very small, when the intermediate layer film and the lower layer film are dry etched, Appropriate overetching conditions to increase the transfer width It is desirable to or, or to change the etch process comprising an etching gas.

  In the EUV mask blank inspection method according to the present invention, the thickness of the negative resist film may be not less than 5 nm and not more than 15 nm. In this way, the phase defect in the multilayer film of the EUV mask blank can be reliably transferred to the negative resist film.

  In the inspection method for EUV mask blanks according to the present invention, the intermediate layer film may be made of a polymer containing Si. In this way, the necessary inspection contrast can be obtained depending on the presence or absence of the pattern having the phase defect transferred thereon, so that the phase defect can be reliably detected.

  In order to achieve the second object, the EUV photomask manufacturing method according to the present invention includes a step of extracting defect-free EUV mask blanks by performing the aforementioned EUV mask blank inspection method according to the present invention. A step of forming a mask pattern made of an EUV light absorbing film on the defect-free EUV mask blank, a step of preparing a second substrate on which a positive resist film is formed, and an EUV exposure apparatus having a reflective optical system The step of placing the defect-free EUV mask blank on which the mask pattern is formed and the second substrate, and EUV light on the positive resist film formed on the second substrate, After irradiating through the defect-free EUV mask blank on which a pattern is formed, the positive resist film is developed, Transferring the mask pattern to at least two different regions of the positive resist film and comparing the mask pattern transferred to the at least two different regions of the positive resist film with each other; A step of detecting a defect in the pattern, and a step of correcting the mask pattern in which the defect is detected.

  In the EUV photomask manufacturing method according to the present invention, it is preferable that the reflection optical system of the EUV exposure apparatus is a low aberration optical system. The second substrate may be a wafer.

  In the EUV photomask manufacturing method according to the present invention, the EUV light absorbing film may be made of TaBN.

  In order to achieve the third object, the pattern forming method according to the present invention is directed to manufacturing EUV photomask according to the present invention by applying EUV light to the EUV positive resist film formed on a semiconductor substrate. Irradiating via an EUV photomask formed using the method, and developing the EUV positive resist film irradiated with the EUV light to form an EUV positive resist pattern. ing.

  According to the pattern forming method of the present invention, it is possible to form a desired resist pattern having no repeat defect due to the EUV photomask.

  In the pattern forming method according to the present invention, the EUV photomask formed by using the aforementioned EUV photomask manufacturing method according to the present invention may have a desired integrated circuit pattern. For the EUV light exposure, an EUV exposure apparatus having a low aberration reflective optical system may be used.

  ADVANTAGE OF THE INVENTION According to this invention, the inspection method which detects easily the fine phase defect in EUV mask blanks with sufficient sensitivity can be provided. Moreover, the manufacturing method of EUV photomask using the defect-free EUV mask blanks extracted by the said inspection method can be provided. Furthermore, a pattern formation method using an EUV photomask formed by the manufacturing method can be provided, and thus a semiconductor device can be manufactured without a decrease in yield.

FIG. 1A to FIG. 1C are diagrams showing respective steps of an inspection method for EUV mask blanks according to the embodiment. FIG. 2 is a diagram illustrating one step of an inspection method for EUV mask blanks according to the embodiment. FIGS. 3A to 3C are diagrams showing each step of the inspection method for EUV mask blanks according to the embodiment. FIG. 4 is a flowchart of the manufacturing method of the EUV photomask according to the embodiment. FIG. 5 is a diagram showing a cross-sectional structure of a conventional reflective photomask together with mask defects. 6 (a) to 6 (c) are diagrams showing respective steps of a conventional EUV mask blank inspection method.

(Prerequisite)
Hereinafter, the premise for describing the embodiment according to the present invention will be described.

  Usually, since a photomask is used in a reduction projection type exposure apparatus, when discussing the pattern size on the mask, the reduction magnification of the exposure apparatus must be taken into consideration. However, when describing the following embodiments, in order to avoid confusion, when describing the pattern dimensions on the mask in correspondence with a desired pattern to be formed (for example, a resist pattern), unless otherwise specified, A value obtained by converting a dimension by a reduction ratio is used. Specifically, when a resist pattern having a width of 32 nm is formed by a mask pattern having a width (M × 32) nm in a 1 / M reduction projection system, the mask pattern width and the resist pattern width are both 32 nm. To do. The same applies to the description of the defect size.

(Embodiment)
Hereinafter, an inspection method for EUV mask blanks according to an embodiment of the present invention will be described with reference to the drawings.

  FIGS. 1A to 1C, 2, and 3 </ b> A to 3 </ b> C are diagrams showing respective steps of the inspection method for EUV mask blanks according to the present embodiment. FIGS. 1A and 1B show the cross-sectional configuration of the EUV mask blanks, and FIGS. 1C, 3A, and 3B show the cross-sectional configuration of the wafer that becomes the substrate to be exposed. FIG. 3C schematically shows a planar configuration of the wafer, and FIG. 2 schematically shows a schematic configuration of the EUV exposure apparatus.

First, as shown in FIG. 1 (a), the thermal expansion coefficient or thermal contraction rate is low (for example, the thermal expansion coefficient is 0 to 0.05 × 10 ⁻⁷ / ° C., and the thermal contraction rate is −0.05 × The multilayer film 2 is laminated on the substrate 1 made of glass (10 ⁻⁷ / ° C. to 0) by, for example, magnetron sputtering. Here, the multilayer film 2 is, for example, 40 pairs of Mo / Si multilayer films, and the thicknesses of the Mo film and the Si film in the multilayer film are, for example, 2.8 nm and 4.0 nm. The multilayer film 2 has a layer having a relatively high refractive index (hereinafter referred to as a high refractive index layer), such as the aforementioned Mo film, and a layer having a relatively refractive index, such as, for example, the aforementioned Si film. A multilayer film in which a low layer (hereinafter referred to as a low refractive index layer) is alternately laminated a plurality of times is preferable. As the high refractive index layer, a film made of a relatively heavy element such as Cr (chromium), Ni (nickel), Ru (ruthenium) or W (tungsten) may be used in addition to the Mo film described above. As the low refractive index layer, a film made of a relatively light element such as Be (beryllium), B (boron), or C (carbon) may be used in addition to the above-described Si film. Hereinafter, the substrate 1 provided with the multilayer film 2 in the step shown in FIG. 1A is referred to as EUV mask blanks 3.

  Next, as shown in FIG. 1B, after applying an electron beam resist on the EUV mask blank 3, for example, an electron beam is selectively applied to the resist using, for example, an electron beam drawing method. Then, the resist is developed to form a chip pattern including a desired alignment mark 4. The alignment mark 4 is used to align and set the EUV mask blank 3 in the EUV exposure apparatus when the chip pattern of the EUV mask blank 3 is transferred to the material to be exposed using the EUV exposure apparatus. The alignment mark 4 is formed outside the effective transfer area (arrangement area of the integrated circuit pattern to be transferred) of the EUV exposure apparatus. As described above, the alignment mark 4 itself is used for alignment in the EUV exposure apparatus. When the defect inspection is performed on the pattern formed by transferring the chip pattern of the EUV mask blank 3 onto the wafer. The mark formed by transferring the alignment mark 4 onto the wafer is used to align and place the wafer on the defect inspection apparatus. In the step of forming the alignment mark 4, drawing may be performed using an electron beam drawing apparatus, or an exposure apparatus using a g-line, i-line, KrF excimer laser, ArF excimer laser, or the like as a light source. May be used for exposure. Moreover, the resist used when forming the alignment mark 4 may be a negative type in which the exposed region is crosslinked, or a positive type in which the exposed region is dissolved.

  Next, as shown in FIG. 1C, for example, a novolac resin material is applied as an underlayer film forming material on the exposed substrate 5 such as a wafer to form an underlayer film 6 having a thickness of about 25 nm, for example. Thereafter, for example, baking is performed at a temperature of 200 degrees for 90 seconds to thermally crosslink the polymer contained in the lower layer film 6. Next, on the lower layer film 6 cross-linked with the polymer, for example, an intermediate film forming material containing 20% by mass of Si with respect to the polymer is applied, and then baked at a temperature of 220 degrees for 60 seconds, for example. Thus, the intermediate layer film 7 having a thickness of, for example, about 5 nm is formed. Next, after applying a negative photoresist forming material on the intermediate layer film 7, for example, baking is performed at a temperature of 100 ° C. for 60 seconds to form a negative photoresist film 8 having a thickness of about 10 nm, for example. .

  The material of the lower layer film 6 is not limited to a novolac resin, and an organic material having carbon (C) as a main component and having an aromatic ring such as a phenyl group or a naphthyl group can be used.

  The thicknesses of the lower layer film 6, the intermediate layer film 7, and the negative photoresist film 8 can be processed by etching the intermediate layer film 7 using the patterned negative photoresist film 8 as an etching mask. The thickness is not limited to the above as long as the lower layer film 6 can be etched using the intermediate layer film 7 as an etching mask. Similarly, the Si content in the intermediate layer film 7 is not limited to 20% by mass.

  The resist constituting the negative photoresist film 8 is a material capable of forming a thin film having a thickness of about 10 nm, for example, so that phase defects in the multilayer film 2 of the EUV mask blank 3 can be transferred. It is preferable that the material is a material having a performance capable of patterning with high contrast. Moreover, if the material is as described above, not only a negative type photoresist, but also a positive type photoresist is combined with a negative developer, and a negative development process in which a portion irradiated with EUV light remains is applied. May be. However, in order to reliably transfer the phase defects in the multilayer film 2 of the EUV mask blanks 3, it is particularly effective to use a negative photoresist film having a thickness of about 5 to 15 nm.

  Further, in the step shown in FIG. 1C, it is assumed that a lower layer film 6, an intermediate layer film 7, and a negative photoresist film 8 are sequentially formed on the exposed substrate 5, that is, a multilayer resist process is applied. However, if the necessary inspection contrast is obtained depending on the presence / absence of the pattern having the phase defect transferred thereon, and thus the phase defect can be sufficiently detected, the above-described multilayer resist process is used instead of the above-described multilayer resist process. For example, a process of forming a negative photoresist film only through a lower layer film made of an organic material, that is, a single layer resist process can be applied.

  Next, as shown in FIG. 2, the reflection optical system 10 has low aberration (for example, a wavefront aberration indicating a deviation between an ideal spherical wave and an actual wavefront is 0.7 nm or less (calculated by RMS)), and NA The EUV mask blanks 3 and the substrate to be exposed 5 are installed in the EUV exposure apparatus 9 whose (numerical aperture) is 0.25 and σ (coherence factor) is 0.5, for example. Next, at least two different regions (hereinafter referred to as chip regions) of the negative photoresist film 8 formed on the substrate 5 to be exposed are stepped by EUV light through the EUV mask blank 3. Repeat exposure is performed. Next, for example, after baking at a temperature of 110 degrees for 60 seconds, development is performed for 20 seconds using, for example, an alkali developer. Thus, the chip pattern 11 is transferred to the negative photoresist film 8 as shown in FIG. In addition, when the phase defect has arisen in the multilayer film 2 of the EUV mask blanks 3, the chip pattern 11 includes a pattern resulting from the phase defect.

  In order to reliably transfer the phase defect in the multilayer film 2 of the EUV mask blank 3 to the negative photoresist film 8, an EUV exposure apparatus having a low aberration reflective optical system 10 so as not to lower the optical contrast. 9 is preferably used. Further, as the EUV exposure apparatus 9, it is preferable to use an EUV exposure apparatus that is actually applied to mass production of electronic devices, and to perform exposure under the NA and illumination conditions that are applied to the mass production.

  Further, in the above-described step-and-repeat exposure, each chip region of the negative photoresist film 8 may be exposed using the same exposure conditions, for example, the same exposure amount and focus position, or The exposure may be performed while changing at least one of the exposure conditions, for example, the exposure amount and the focus position, for each chip region. In the latter case, since the chip pattern 11 is deformed as the optical contrast changes, it is possible to easily detect a phase defect in a defect inspection process described later. Here, the exposure amount may be changed within a range of, for example, −2% or more and + 2% or less with reference to the optimum exposure amount. Specifically, the exposure may be performed by changing the exposure amount by ± 1% or ± 2% based on the optimum exposure amount. Further, the focus position may be changed within a range of −0.02 μm or more and +0.02 μm or less with the optimum focus position as a reference. Specifically, the exposure may be performed by changing the focus position to ± 0.01 μm or ± 0.02 μm based on the optimum focus position.

Next, as shown in FIG. 3B, the negative photoresist film 8 to which the chip pattern 11 including the phase defect transfer pattern in the multilayer film 2 of the EUV mask blank 3 is transferred is used as an etching mask, for example, carbon. The intermediate layer film 7 is dry-etched using a CF-based etching gas mainly composed of (C) and fluorine (F). Thereby, the chip pattern 11 is transferred to the intermediate layer film 7. Next, using the intermediate layer film 7 to which the chip pattern 11 has been transferred as an etching mask, the lower layer film 6 is dry-etched using, for example, an O ₂ etching gas containing oxygen (O ₂ ) as a main component. Thereby, the chip pattern 11 is transferred to the lower layer film 6. The negative photoresist film 8 may be removed by ashing or the like after the intermediate layer film 7 is etched, or may be removed during the etching of the lower layer film 6 using an O ₂ -based etching gas. .

  Here, the shape of the chip pattern 11 in the lower layer film 6 is the same as the shape of the chip pattern 11 in the negative photoresist film 8, but the thickness of the negative photoresist film 8 is, for example, 10 nm. The thickness of the lower layer film 6 is as thick as 25 nm, for example. Accordingly, in the defect inspection process described later, since the inspection contrast is improved by targeting the chip pattern 11 in the lower layer film 6 instead of the chip pattern 11 in the negative photoresist film 8, phase defect detection and phase defect The position can be easily identified.

  The intermediate layer film 7 is dry-etched using the negative photoresist film 8 to which the chip pattern 11 is transferred as an etching mask, and the lower layer film 6 is formed using the intermediate layer film 7 to which the chip pattern 11 is transferred as an etching mask. In the dry etching process, the width of the pattern formed by transferring the phase defect in the chip pattern 11 is as small as about 8 nm, for example. Therefore, when the intermediate layer film 7 and the lower layer film 6 are dry-etched, an over-etching condition is applied or an etching process containing an etching gas so that the transfer width of a pattern formed by transferring phase defects is expanded. It is desirable to change.

  Next, as shown in FIG. 3C, the defect of the EUV mask blank 3 is detected by comparing the chip patterns 11 transferred to at least two different chip regions of the lower layer film 6 with each other. Specifically, when a defect is detected at the same position in the chip patterns 11 transferred to different chip regions by exposure of EUV light via the same region of the EUV mask blank 3, the phase defect is detected. To do.

  By the way, as a pattern defect inspection method, for example, a design data comparison method (Die to Database method) and an adjacent pattern comparison method (Die to Die method) are known. The design data comparison method is a method in which a circuit pattern is scanned by an inspection apparatus, and a detection image obtained by the scan is compared with design data (reference image) corresponding to the scan location. The adjacent pattern comparison method is a method in which the same pattern in two adjacent chip regions is compared and it is determined that a defect exists when a mismatched portion is found. In the adjacent pattern comparison method, for example, optical image data obtained by forming an optical image with a 257 nm wavelength inspection light of a pattern enlarged by an optical system on a CCD (Charge Coupled Device) sensor is electrically converted. The image data is converted into typical image data, and the image data of two adjacent chip areas are compared. The adjacent pattern comparison method is based on the assumption that the probability that the same defect exists in a pattern formed at the same location in two adjacent chip regions is extremely small. In the present embodiment, as a pattern defect inspection method used in the step shown in FIG. 3C, for example, a phase defect having a width of, for example, 8 nm or more generated in the multilayer film 2 of the EUV mask blank 3 by using an adjacent pattern comparison method, for example. Detection is performed.

  FIG. 4 is a flowchart of a method for manufacturing an EUV photomask according to an embodiment of the present invention, specifically, a method for manufacturing an EUV photomask using the above-described inspection method for EUV mask blanks according to the present embodiment. Will be described with reference to FIG.

  First, in step S1, the process shown in FIG. That is, for example, the multilayer film 2 is laminated on the substrate 1 made of glass having a low coefficient of thermal expansion by, for example, magnetron sputtering. Here, the multilayer film 2 is, for example, 40 pairs of Mo / Si multilayer films, and the thicknesses of the Mo film and the Si film in the multilayer film are, for example, 2.8 nm and 4.0 nm. Hereinafter, the substrate 1 provided with the multilayer film 2 in the step shown in FIG. 1A is referred to as EUV mask blanks 3.

  Next, in step S2, the process shown in FIG. That is, after applying an electron beam resist on the EUV mask blank 3, for example, the resist is selectively irradiated with an electron beam using, for example, an electron beam drawing method, and then the resist is developed. Thus, a chip pattern including a desired alignment mark 4 is formed. The alignment mark 4 is used to align and set the EUV mask blank 3 in the EUV exposure apparatus when the chip pattern of the EUV mask blank 3 is transferred to the material to be exposed using the EUV exposure apparatus. The alignment mark 4 is formed outside the effective transfer area (arrangement area of the integrated circuit pattern to be transferred) of the EUV exposure apparatus. As described above, the alignment mark 4 itself is used for alignment in the EUV exposure apparatus. When the defect inspection is performed on the pattern formed by transferring the chip pattern of the EUV mask blank 3 onto the wafer. The mark formed by transferring the alignment mark 4 onto the wafer is used to align and place the wafer on the defect inspection apparatus.

  Next, in step S3, the process shown in FIG. That is, for example, a novolak resin material, for example, is applied as an underlayer film forming material on an exposed substrate 5 such as a wafer to form an underlayer film 6 having a thickness of, for example, about 25 nm, and then, for example, at a temperature of 200 degrees for 90 seconds. Baking is performed to thermally crosslink the polymer contained in the lower layer film 6. Next, on the lower layer film 6 cross-linked with the polymer, for example, an intermediate film forming material containing 20% by mass of Si with respect to the polymer is applied, and then baked at a temperature of 220 degrees for 60 seconds, for example. For example, an intermediate layer film 7 having a thickness of about 5 nm is formed. Next, after applying a negative photoresist forming material on the intermediate layer film 7, for example, baking is performed at a temperature of 100 degrees for 60 seconds to form a negative photoresist film 8 having a thickness of about 10 nm, for example.

  Next, in step S4, the process shown in FIG. 2 is performed. That is, the EUV mask blank 3 and the substrate 5 to be exposed are provided in the EUV exposure apparatus 9 having the low-aberration reflective optical system 10 having an NA (numerical aperture) of 0.25 and a σ (coherence factor) of 0.5, for example. Is installed. Next, at least two different regions (hereinafter referred to as chip regions) of the negative photoresist film 8 formed on the substrate 5 to be exposed are stepped by EUV light through the EUV mask blank 3. Repeat exposure is performed. Next, for example, after baking at a temperature of 110 degrees for 60 seconds, development is performed for 20 seconds using, for example, an alkali developer. Thus, the chip pattern 11 is transferred to the negative photoresist film 8 as shown in FIG. In addition, when the phase defect has arisen in the multilayer film 2 of the EUV mask blanks 3, the chip pattern 11 includes a pattern resulting from the phase defect.

Next, in step S5, the process shown in FIG. That is, for example, carbon (C) and fluorine (F) are mainly used as an etching mask with the negative photoresist film 8 to which the chip pattern 11 including the phase defect transfer pattern in the multilayer film 2 of the EUV mask blank 3 is transferred. The intermediate layer film 7 is dry etched using a CF-based etching gas as a component. Thereby, the chip pattern 11 is transferred to the intermediate layer film 7. Next, using the intermediate layer film 7 to which the chip pattern 11 has been transferred as an etching mask, the lower layer film 6 is dry-etched using, for example, an O ₂ etching gas containing oxygen (O ₂ ) as a main component. Thereby, the chip pattern 11 is transferred to the lower layer film 6. The negative photoresist film 8 may be removed by ashing or the like after the intermediate layer film 7 is etched, or may be removed during the etching of the lower layer film 6 using an O ₂ -based etching gas. .

  Here, the shape of the chip pattern 11 in the lower layer film 6 is the same as the shape of the chip pattern 11 in the negative photoresist film 8, but the thickness of the negative photoresist film 8 is, for example, 10 nm. The thickness of the lower layer film 6 is as thick as 25 nm, for example. Accordingly, in the defect inspection process described later, since the inspection contrast is improved by targeting the chip pattern 11 in the lower layer film 6 instead of the chip pattern 11 in the negative photoresist film 8, phase defect detection and phase defect The position can be easily identified.

  Next, in step S6, the process shown in FIG. That is, the defect of the EUV mask blank 3 is detected by comparing the chip patterns 11 transferred to at least two different chip regions of the lower layer film 6 with each other. Specifically, when a defect is detected at the same position in the chip patterns 11 transferred to different chip regions by exposure of EUV light via the same region of the EUV mask blank 3, the phase defect is detected. To do. In the present embodiment, for example, an adjacent pattern comparison method is used as the pattern defect inspection method used in step S6. The adjacent pattern comparison method is a method in which the same pattern in two adjacent chip regions is compared and it is determined that a defect exists when a mismatched portion is found.

  Next, in step S7, the result of the defect inspection in step S6 is determined, and if it is determined that there is a defect, it is difficult to correct the EUV mask blanks 3. Therefore, in step S8, the EUV mask blanks 3 Dispose of it. On the other hand, if it is determined in step S7 that there is no defect, the process proceeds to step S9 and subsequent steps.

  By repeating steps S1 to S7 described above for a plurality of EUV mask blanks, in other words, the above-described inspection method for the EUV mask blanks according to the present embodiment is repeatedly performed for a plurality of EUV mask blanks. Thus, EUV mask blanks without defects (hereinafter referred to as defect-free EUV mask blanks) can be extracted.

Next, in step S9, an EUV light absorption film made of, for example, TaBN and having a thickness of about 70 nm is formed on the defect-free EUV mask blank using, for example, a magnetron sputtering method. Next, for example, an electron beam resist is applied on the EUV light absorbing film, and then, for example, an electron beam drawing method is applied to an effective transfer area (arrangement area of an integrated circuit pattern to be transferred) of the EUV exposure apparatus in the resist Is then selectively irradiated with an electron beam, and then the resist is developed. Thus, for example, a line and space pattern having a minimum size of about 27 nm is formed as a resist pattern for forming a desired integrated circuit. Next, using the resist pattern as an etching mask, TaBN constituting the EUV light absorption film is dry-etched using, for example, a Cl ₂ etching gas mainly containing chlorine (Cl ₂ ). Thus, for example, a line and space pattern having a minimum size of about 27 nm is formed as a mask pattern for forming a desired integrated circuit. Hereinafter, the defect-free EUV mask blank provided with the mask pattern in step S9 is referred to as an EUV photomask.

  Next, in step S10, for example, an organic material is applied as a base film forming material on a substrate such as a wafer, and then baked at a temperature of 220 degrees for 60 seconds, for example, to a thickness of about 20 nm. An organic undercoat film is formed. Next, after applying a positive photoresist forming material on the organic base film, baking is performed, for example, at a temperature of 110 degrees for 60 seconds to form a positive photoresist film having a thickness of, for example, about 50 nm.

  Next, in step S11, an EUV photomask having a low-aberration reflective optical system, having an NA (numerical aperture) of 0.25 and a σ (coherence factor) of 0.5, for example, The substrate provided with the positive photoresist film is installed. Next, step-and-repeat exposure with EUV light is performed on at least two different regions (hereinafter referred to as chip regions) of the positive photoresist film formed on the substrate through the EUV photomask. I do. Next, for example, after baking at a temperature of 110 degrees for 60 seconds, development is performed for 20 seconds using, for example, an alkali developer. Accordingly, the mask pattern (desired integrated circuit pattern) is transferred to at least two different chip regions of the positive photoresist film.

  Next, in step S12, the mask pattern defect is detected by comparing the mask patterns transferred to at least two different chip regions of the positive photoresist film with each other. Specifically, as a pattern defect inspection method, for example, when a defect is detected at the same position in the mask patterns transferred to different chip regions using an adjacent pattern comparison method, the defect is detected. . When a defect is detected in the defect inspection in step S12, the defect is not a phase defect, but only a pattern defect such as a residue or a chip generated when the mask pattern is formed on the multilayer film surface of the EUV photomask. Therefore, in step S13, the mask pattern is corrected using, for example, FIB (Focused Ion Beam). On the other hand, when no defect is detected in the defect inspection in step S12, an EUV photomask having no defect (hereinafter, defect-free EUV photomask) is realized in step S14.

  As described above, a defect-free EUV mask blank and a defect-free EUV photomask can be produced by performing steps S1 to S14.

  Hereinafter, a pattern forming method according to an embodiment of the present invention, specifically, a pattern forming method using the EUV photomask obtained by the above-described EUV photomask manufacturing method according to the present embodiment will be described.

  First, a lower layer film made of, for example, an organic material and having a thickness of about 20 nm is formed on a semiconductor substrate such as a silicon wafer, and then baked at a temperature of, for example, 205 degrees for 60 seconds. Thereafter, a positive photoresist forming material for EUV is applied on the lower layer film, and then pre-baked at a temperature of 110 degrees for 60 seconds, for example, to form a positive photoresist film having a thickness of, for example, about 50 nm.

  In the present embodiment, the lower layer film is not provided for preventing reflection of exposure light from the underlying substrate as in the case of ArF lithography of the prior art, but when irradiated with EUV light. It is provided to reduce the influence of secondary electrons generated from the base substrate.

  Next, a defect-free EUV photomask obtained by performing the above-described steps S1 to S14, for example, a line and space pattern having a minimum size of about 27 nm is mounted as a mask pattern for forming a desired integrated circuit. The defect-free EUV photomask and the semiconductor substrate provided with the positive photoresist film are placed in an EUV exposure apparatus. Here, NA and σ of the EUV exposure apparatus are, for example, 0.25 and 0.5, respectively. Next, the positive photoresist film formed on the semiconductor substrate is exposed to, for example, EUV light having a wavelength of 13.6 nm through the defect-free EUV photomask. Next, after performing PEB (Post Exposure Bake) for 60 seconds at a temperature of 110 degrees, for example, development processing is performed using an alkaline solution such as a 2.38 mass% TMAH (tetramethyl ammonium hydroxide) solution.

  The resist pattern formed as described above, that is, the upper surface of the integrated circuit pattern was observed using an electron microscope, and the dimension of the minimum size pattern of the integrated circuit pattern was measured. It was confirmed that a line and space pattern was formed. Furthermore, when the integrated circuit pattern transferred to at least two different chip regions of the positive photoresist film was subjected to pattern defect inspection using, for example, an adjacent pattern comparison method, repeats due to EUV photomasks were performed. It was confirmed that there were no defects per wafer.

  As described above, the present invention relates to a lithography technique in a manufacturing process of a semiconductor integrated circuit device or the like, in particular, a mask blank inspection method for EUV lithography, an EUV photomask manufacturing method using the inspection method, and the manufacturing method. The present invention relates to a pattern forming method using an EUV photomask formed by using the method, and is particularly useful when applied to fine pattern formation.

DESCRIPTION OF SYMBOLS 1 Substrate 2 Multilayer film 3 EUV mask blanks 4 Alignment mark 5 Substrate to be exposed 6 Lower layer film 7 Intermediate layer film 8 Negative photoresist film 9 EUV exposure apparatus 10 Reflective optical system 11 Chip pattern 100 Glass substrate 101 Multilayer film 102 Mask pattern 103 Pattern defect 104 Phase defect 200 Glass substrate 201 Mo / Si multilayer film 202 Resist pattern 203 Wafer 204 Resist pattern after transfer

Claims (12)

Preparing EUV mask blanks having a chip pattern including alignment marks;
Preparing a first substrate in which a lower layer film, an intermediate layer film, and a negative resist film are sequentially formed from the bottom;
Installing the EUV mask blanks and the first substrate in an EUV exposure apparatus having a reflective optical system;
After irradiating the negative resist film formed on the first substrate with EUV light through the EUV mask blank, the negative resist film is developed, whereby at least 2 of the negative resist film is developed. A step of transferring the chip pattern to different regions;
Transferring the chip pattern to at least two different regions of the intermediate layer film by dry etching the intermediate layer film using the negative resist film to which the chip pattern has been transferred as an etching mask; and
Transferring the chip pattern to at least two different regions of the lower layer film by dry etching the lower layer film using the intermediate layer film to which the chip pattern has been transferred as an etching mask; and
A step of detecting defects of the EUV mask blank by comparing the chip patterns transferred to the at least two different regions of the lower layer film with each other. Method. In the inspection method of EUV mask blanks according to claim 1,
The step of preparing the EUV mask blanks includes:
Forming a multilayer film in which a layer having a relatively high refractive index and a layer having a relatively low refractive index are alternately laminated a plurality of times on a glass substrate;
Forming a resist film on the glass substrate on which the multilayer film is formed;
And a step of forming the chip pattern by developing the resist film after selectively irradiating the resist film with exposure light, and an inspection method for EUV mask blanks. In the inspection method of EUV mask blanks of Claim 2,
The relatively high refractive index layer is made of Mo, Cr, Ni, Ru or W,
The method for inspecting EUV mask blanks, wherein the layer having a relatively low refractive index is made of Si, Be, B, or C. In the inspection method of EUV mask blanks according to claim 2 or 3,
The exposure light is an electron beam, g-line, i-line, KrF excimer laser light, or ArF excimer laser light. In the inspection method of EUV mask blanks of any one of Claims 1-4,
In the step of transferring the chip pattern to the at least two different areas of the negative resist film, exposure is performed by changing at least one of an exposure amount and a focus position for each of the at least two different areas. A method for inspecting EUV mask blanks. In the inspection method of EUV mask blanks of Claim 5,
A method for inspecting EUV mask blanks, characterized in that the exposure amount is changed within a range of -2% or more and + 2% or less based on the optimum exposure amount. In the inspection method of EUV mask blanks of Claim 5,
A method for inspecting an EUV mask blank, wherein the focus position is changed within a range of −0.02 μm or more and +0.02 μm or less with reference to an optimum focus position. In the inspection method of EUV mask blanks of any one of Claims 1-7,
An inspection method for EUV mask blanks, wherein the thickness of the negative resist film is 5 nm or more and 15 nm or less. In the inspection method of EUV mask blanks of any one of Claims 1-8,
The method for inspecting EUV mask blanks, wherein the intermediate layer film is made of a polymer containing Si. A step of extracting defect-free EUV mask blanks by performing the EUV mask blanks inspection method according to any one of claims 1 to 9,
Forming a mask pattern made of an EUV light absorbing film on the defect-free EUV mask blanks;
Preparing a second substrate on which a positive resist film is formed;
Installing the defect-free EUV mask blanks on which the mask pattern is formed and the second substrate in an EUV exposure apparatus having a reflective optical system;
The positive resist film formed on the second substrate is irradiated with EUV light through the defect-free EUV mask blank on which the mask pattern is formed, and then the positive resist film is developed. A step of transferring the mask pattern to at least two different regions of the positive resist film,
Detecting defects in the mask pattern by comparing the mask patterns transferred to the at least two different regions of the positive resist film with each other;
And a step of correcting the mask pattern in which the defect has been detected. In the manufacturing method of the EUV photomask of Claim 10,
An EUV photomask manufacturing method, wherein the EUV light absorbing film is made of TaBN. A step of irradiating EUV light to an EUV photomask formed by using the EUV photomask manufacturing method according to claim 10 or 11, to EUV positive resist film formed on a semiconductor substrate,
And developing the EUV positive resist film irradiated with the EUV light to form an EUV positive resist pattern.

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