JP6146149B2 - Grid-connected inverter device, communication device, and current generation method - Google Patents

Description

  The present invention relates to a grid-connected inverter device, a communication device, and a current generation method, and in particular, a grid-connected inverter device that uses power received from a power generation device, and a communication device connected to the same power system as the grid-connected inverter device. And a current generation method.

  Japanese Patent No. 5055529 (Patent Document 1) discloses a method for improving detection of an outward message transmitted by a utility as described below. That is, in a communication network in which an electrical utility and a terminal device communicate with each other using a power distribution mechanism as a communication path via a repeater, a bidirectional automatic communication system used by the electrical utility, wherein an outward message is transmitted from the utility to the terminal In a system in which an inbound response message is sent back to the utility from the terminal device to the utility and each outward and inward message is transmitted and received via the utility's electrical power distribution mechanism. It is a method that makes it possible to distinguish outgoing messages from inbound messages sent from other locations. This method detects a plurality of bits forming a preamble of an outgoing message, extracts a bit value from the detected plurality of bits, and detects a signal at a position where a bit value in the preamble is expected. Calculating a ratio of strength to signal strength at a position where another bit value in the preamble is expected, and if the calculated ratio exceeds a predetermined value, And accepting it as a valid preamble. The step of detecting includes a step of detecting an intermediate value included in the bit string of the preamble.

  The outgoing message is specifically an outgoing TWACS (registered trademark) (Two-Way Automatic Communications System) message. The preamble of the outbound TWACS message has a 9-bit pattern 011100100 or 0E4 in hexadecimal. 1 and 0 are represented by turning on the pulse in the first or third half period of the AC waveform near the zero crossing point, ie near the zero crossing timing.

Japanese Patent No. 5055529 Special table 2012-518952 gazette Japanese Patent Laid-open No. Sho 54-11835 JP-A-53-61025 Japanese Patent No. 2734067

  For example, a grid-connected PCS (Power Conditioning System) generates a generated current from the generated power generated in the power generation device, and outputs the generated generated current to the power system. The quality of the generated current, that is, the alternating current output from the grid interconnection PCS to the power grid is determined as follows according to the grid interconnection regulations. That is, it is determined that an alternating current is output to the power system at a power factor of 0.95 or more, and that the output current distortion is 5% or less of the total current distortion and 3% or less of each harmonic.

  However, when an outward TWACS message or the like described in Patent Document 1 is transmitted / received using the electrical distribution mechanism as a communication path, the grid interconnection PCS receives, for example, a current pulse via the electrical distribution mechanism in the vicinity of the zero cross timing of the AC waveform. May end up.

  When the grid interconnection PCS receives the current pulse, for example, the control for generating the generated current from the generated power may be disturbed by the current pulse. At this time, the grid interconnection PCS outputs a low-quality generated current that does not satisfy the quality defined by the grid interconnection regulations to the power grid.

  The present invention has been made to solve the above-described problems. The object of the present invention is to stabilize the control for generating the generated current in the configuration in which the generated current generated from the generated power is output to the power system. To provide a grid-connected inverter device, a communication device, and a current generation method capable of suppressing a reduction in current quality.

  (1) In order to solve the above problem, a grid-connected inverter device according to an aspect of the present invention generates a generated current from generated power and outputs the generated current to the power system; A zero cross detection unit for detecting a zero cross timing at which the system voltage in the power system indicates zero volts, and a target current for setting a target value of the generated current based on the zero cross timing detected by the zero cross detection unit The power generation generated by the setting unit, the zero cross period setting unit for setting the zero cross period based on the zero cross timing detected by the zero cross detection unit, the system voltage, the target value, and the current generation unit A current adjusting unit for adjusting the generated current based on a difference from the current, and the current The adjustment unit corrects the difference to a value of the same sign having an absolute value smaller than the difference or zero in the zero cross period set by the zero cross period setting unit, and based on the corrected difference and the system voltage A current stabilization process for adjusting the generated current is performed.

  (10) In order to solve the above problems, a communication device according to an aspect of the present invention starts a power line communication unit for performing low-speed power line communication with another communication device in a power system, and the power line communication is started. Before, it has a transmission part which transmits the communication start information which shows that the said power line communication is started to the grid connection inverter apparatus which supplies an electric current to the said electric power grid | system.

  (12) In order to solve the above problem, a current generation method according to an aspect of the present invention includes a step of generating a generated current from generated power and outputting the generated current to a power system, and a system voltage in the power system. Detecting zero-cross timing indicating zero volts, setting a target value of the generated current based on the detected zero-cross timing, setting a zero-cross period based on the detected zero-cross timing, and Adjusting the generated current based on the system voltage and the difference between the target value and the generated generated current, and adjusting the generated current in the set zero-cross period, the difference Is corrected to a value with the same sign that is smaller in absolute value than the above difference or zero, and the corrected difference and Performing current stabilization process of adjusting the generated current based on the system voltage.

  ADVANTAGE OF THE INVENTION According to this invention, in the structure which outputs the generated electric current produced | generated from the generated electric power to an electric power grid | system, the control for producing | generating a generated electric current can be stabilized and the quality fall of a generated electric current can be suppressed.

FIG. 1 is a diagram showing a configuration of a grid interconnection system 201 according to the embodiment of the present invention. FIG. 2 is a diagram showing a configuration of the grid interconnection PCS 101 in the grid interconnection system 201 according to the embodiment of the present invention. FIG. 3 is a diagram showing a configuration of the measurement unit 2 in the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 4 is a diagram showing the configuration of the slave communication device 202 in the grid interconnection system 201 according to the embodiment of the present invention. FIG. 5 is a diagram showing a configuration of the power line communication unit 81 in the slave communication device 202 according to the embodiment of the present invention. FIG. 6 is a diagram illustrating an example of current pulses generated in the slave communication device 202 according to the embodiment of the present invention. FIG. 7 is a diagram illustrating an example of an alternating current generated by the grid interconnection PCS as a comparative example. FIG. 8 is a diagram showing a configuration of the control unit 1 in the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 9 is a diagram showing a configuration of the power line communication detection unit 8 in the control unit 1 of the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 10 is a diagram showing an example of current pulses detected by the current pulse detection unit 61 according to the embodiment of the present invention. FIG. 11 is a diagram showing a configuration of the disturbance compensation unit 6 in the control unit 1 of the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 12 is a diagram illustrating an example of zero-cross timing estimated by the zero-cross detection unit 71 according to the embodiment of the present invention. FIG. 13 is a diagram illustrating an example of a zero cross period set by the zero cross period setting unit 4 according to the embodiment of the present invention. FIG. 14 is a diagram showing a configuration of the current adjustment unit 5 in the control unit 1 of the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 15 is a diagram illustrating an example of a triangular wave comparison method used when the current adjustment unit 5 according to the embodiment of the present invention generates a control signal for controlling the inverter circuit 33. FIG. 16 is a diagram illustrating an example of the generated current generated by the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 17 is a flowchart defining an operation procedure when the grid interconnection PCS 101 according to the embodiment of the present invention performs a current stabilization process. FIG. 18 is a flowchart defining an operation procedure when performing the current stabilization process based on the current pulse detected by the grid interconnection PCS 101 according to the embodiment of the present invention. FIG. 19 is a flowchart that defines an operation procedure when the grid connection PCS 101 according to the embodiment of the present invention performs current stabilization processing based on communication start information received from the slave communication device 202. FIG. 20 is a flowchart that defines the operation procedure when the grid connection PCS 101 according to the embodiment of the present invention performs current stabilization processing based on the signal reception information received from the slave communication device 202.

  First, the contents of the embodiment of the present invention will be listed and described.

  (1) In order to solve the above problem, a grid-connected inverter device according to an aspect of the present invention generates a generated current from generated power and outputs the generated current to the power system; A zero cross detection unit for detecting a zero cross timing at which the system voltage in the power system indicates zero volts, and a target current for setting a target value of the generated current based on the zero cross timing detected by the zero cross detection unit The power generation generated by the setting unit, the zero cross period setting unit for setting the zero cross period based on the zero cross timing detected by the zero cross detection unit, the system voltage, the target value, and the current generation unit A current adjusting unit for adjusting the generated current based on a difference from the current, and the current The adjustment unit corrects the difference to a value of the same sign having an absolute value smaller than the difference or zero in the zero cross period set by the zero cross period setting unit, and based on the corrected difference and the system voltage A current stabilization process for adjusting the generated current is performed.

  As described above, the configuration for performing the current stabilization process in the zero-cross period can reduce the disturbance of the adjustment of the generated current even when the generated current is greatly separated from the target value due to the current pulse in the zero-cross period, for example. Therefore, the generated current can be adjusted stably.

  As a result, even when the generated current is greatly deviated from the target value in response to the current pulse in the zero-cross period, it is possible to suppress the low-quality generated current from being output to the power system.

  Moreover, since the function for performing the current stabilization process can be implemented by changing the algorithm for adjusting the generated current, a high-quality generated current can be generated at low cost.

  (2) Preferably, the zero cross period setting unit sets the zero cross period so that a signal transmission period of low-speed power line communication performed in the power system by another device is included.

  In this way, the zero cross period is set so that the signal transmission period in which the generated current greatly deviates from the target value by the current pulse is included, so that the quality of the generated current is improved in the period other than the zero cross period, while the low quality in the zero cross period. Output of the generated current to the power system can be suppressed, so that the quality of the generated current can be stably improved.

  (3) Preferably, the said current adjustment part performs the said current stabilization process in the period when the absolute value of the electric current in the said electric power grid becomes larger than a predetermined threshold among the said zero cross period.

  As described above, the current stabilization process can be efficiently performed by the configuration in which the current stabilization process is performed in a situation where a current pulse is generated in the zero-cross period and the generated current is likely to be disturbed. .

  In addition, since it is possible to avoid performing the current stabilization process in the zero cross period in which there is no current pulse, it is possible to improve the follow-up of the generated current to the target value in the period. Thereby, a good quality generated current can be generated efficiently.

  (4) Preferably, the grid-connected inverter device is further used for communication start information indicating that low-speed power line communication performed in the power system is started and low-speed power line communication performed in the power system. A reception unit for receiving at least one of the signal reception information indicating that the received signal is received from another device, and the current adjustment unit is configured to receive the communication start information or the signal reception information from the other unit. When received from the apparatus, the current stabilization process is performed in the zero-cross period.

  In this way, the current stabilization process is efficiently performed by the configuration in which the current stabilization process is performed in a situation where low-speed power line communication is performed in the power system and there is a high possibility that the generated current is disturbed by the current pulse. be able to.

  In addition, since it is possible to avoid performing the current stabilization process during a period in which there is no current pulse due to low-speed power line communication, it is possible to improve the follow-up of the generated current to the target value during the period. Thereby, a good quality generated current can be generated efficiently.

  (5) Preferably, the zero cross detection unit estimates the zero cross timing during a period in which low-speed power line communication is performed in the power system by another device.

  In this way, instead of detecting the zero cross timing from the system voltage having distortion due to low-speed power line communication in the vicinity of the zero cross timing, the configuration that estimates the zero cross timing, the timing deviated from the zero cross timing detected from the system voltage without distortion. Can be detected as zero-cross timing.

  (6) Preferably, the zero cross detection unit detects a timing other than the zero cross timing, and estimates the zero cross timing from the detected timing.

  In this way, the timing is detected without being affected by low-speed power line communication, with a configuration that detects timing other than zero-cross timing, which is difficult to detect correctly from the system voltage that has distortion due to low-speed power line communication. Therefore, it is possible to improve the zero cross timing estimation accuracy.

  (7) More preferably, the zero cross detection unit estimates the zero cross timing from one of a timing at which the system voltage reaches a maximum value and a timing at which the system voltage reaches a minimum value.

  As described above, the zero cross timing is estimated from one of the maximum timing and the minimum timing that can be accurately and easily detected, thereby improving the zero cross timing estimation accuracy with a simple process. be able to.

  (8) More preferably, the current adjustment unit estimates the system voltage based on the zero-cross timing estimated by the zero-cross detection unit, and calculates the generated current based on the estimated system voltage and the difference. adjust.

  Thus, instead of the system voltage having distortion due to low-speed power line communication, the generated current is adjusted based on the estimated system voltage and the difference between the target value and the generated current generated by the current generator. The generated current can be adjusted appropriately without being affected by low-speed power line communication.

  (9) More preferably, the target current setting unit sets the target value based on the zero cross timing estimated by the zero cross detection unit.

  With such a configuration, an appropriate target value can be set based on the estimated zero-cross timing instead of the zero-cross timing detected from the system voltage having distortion due to low-speed power line communication.

  (10) In order to solve the above problems, a communication device according to an aspect of the present invention starts a power line communication unit for performing low-speed power line communication with another communication device in a power system, and the power line communication is started. Before, it has a transmission part which transmits the communication start information which shows that the said power line communication is started to the grid connection inverter apparatus which supplies an electric current to the said electric power grid | system.

  Thus, the system-connected inverter device can recognize the generation of the current pulse in advance by the configuration that notifies the grid-connected inverter device in advance that low-speed power line communication that generates current pulses is performed. Therefore, it is possible to start processing for suppressing disturbance in adjustment of generated current due to current pulses at an appropriate timing.

  Thereby, since the generated current can be stably adjusted in the grid-connected inverter device, it is possible to suppress output of a low-quality generated current to the power system.

  (11) Preferably, when the power line communication unit receives a signal used for the power line communication from another communication device, the transmission unit transmits signal reception information indicating that the signal has been received to the grid interconnection inverter. Send to device.

  Thus, the system-connected inverter device has started the low-speed power line communication by the configuration that notifies the system-connected inverter device that the signal used for the low-speed power line communication is received from the other communication device. Can be recognized.

  (12) In order to solve the above problem, a current generation method according to an aspect of the present invention includes a step of generating a generated current from generated power and outputting the generated current to a power system, and a system voltage in the power system. Detecting zero-cross timing indicating zero volts, setting a target value of the generated current based on the detected zero-cross timing, setting a zero-cross period based on the detected zero-cross timing, and Adjusting the generated current based on the system voltage and the difference between the target value and the generated generated current, and adjusting the generated current in the set zero-cross period, the difference Is corrected to a value with the same sign that is smaller in absolute value than the above difference or zero, and the corrected difference and Performing current stabilization process of adjusting the generated current based on the system voltage.

  As described above, the configuration for performing the current stabilization process in the zero-cross period can reduce the disturbance of the adjustment of the generated current even when the generated current is greatly separated from the target value due to the current pulse in the zero-cross period, for example. Therefore, the generated current can be adjusted stably.

  As a result, even when the generated current is greatly deviated from the target value in response to the current pulse in the zero-cross period, it is possible to suppress the low-quality generated current from being output to the power system.

  Moreover, since the function for performing the current stabilization process can be implemented by changing the algorithm for adjusting the generated current, a high-quality generated current can be generated at low cost.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Configuration and basic operation]
FIG. 1 is a diagram showing a configuration of a grid interconnection system 201 according to the embodiment of the present invention.

  Referring to FIG. 1, a grid interconnection system 201 includes a power generation apparatus 11, a grid interconnection PCS (system interconnection inverter apparatus) 101, a slave communication apparatus 202, a master communication apparatus 212, and low-voltage transformers T1 and T2. And a system power supply 12. The low voltage transformer T1 includes a primary side coil L11 and a secondary side coil L12. The low voltage transformer T2 includes a primary side coil L21 and a secondary side coil L22.

  The grid interconnection PCS 101 is installed in, for example, a house and a business office, converts the power received from the power generation device 11, and outputs the converted power to the grid power supply 12 via the low-voltage transformer T1.

  At this time, the grid interconnection PCS 101 may, for example, distribute the converted power and supply the divided power to each device installed in the house or business office. In FIG. 1, one grid interconnection PCS 101 is representatively shown, but a larger number of grid interconnection PCSs 101 may be provided.

  In more detail, the electric power generating apparatus 11 contains the solar cell module 14 here. The solar cell module 14 is constituted by a plurality of sets of solar cell panels, for example. For example, when each set of solar cell panels receives sunlight, it converts the received sunlight energy into DC power, and outputs the converted DC power to the grid interconnection PCS 101 via the power lines PL1 and PL2.

  Note that the solar cell module 14 may include, for example, a circuit for preventing a backflow of current between sets of solar cell panels and a disconnecting device for preventing the occurrence of electric shock. The power generation device 11 may be another device capable of power generation such as a wind power generation device.

  For example, the grid interconnection PCS 101 converts the DC power received from the power generation device 11 into power that can be supplied to the power system, specifically, AC power having a voltage of 202 volts and a frequency of 60 hertz. Then, for example, grid interconnection PCS 101 outputs AC power having a voltage of 202 volts and a frequency of 60 hertz to the power system, specifically to low voltage transformer T1 via power lines PL3 and PL4.

  That is, the grid interconnection PCS 101 sells AC power generated from the power generated by the power generation device 11 to the power system via the power lines PL3 and PL4. The grid interconnection PCS 101 is connected to the child communication device 202 via, for example, power lines PL3 and PL4, nodes N3 and N4, and power lines PL9 and PL10.

  Note that the quality of AC power sold by the grid interconnection PCS 101 to the power grid is determined as follows according to the grid interconnection regulations. That is, according to the grid connection regulations, the AC current is output to the power system at a power factor of 0.95 or more, and the output current distortion is 5% or less of the total current distortion and 3% or less of each harmonic. It has been established.

  For example, when the grid interconnection PCS 101 is installed in the eastern Japan region, it may be converted into AC power having a voltage of 202 volts and a frequency of 50 hertz. Below, the case where the frequency of alternating current power, alternating voltage, and alternating current is 60 Hz is demonstrated.

  The voltage of 202 volts is a standard voltage defined by the Electricity Business Act construction regulations, and 202 ± 20 volts is defined as a value to be maintained.

  The low-voltage transformer T1 converts, for example, AC power having a voltage of 202 volts received at the primary coil L11 from the grid interconnection PCS 101, that is, AC voltage, into an AC voltage having a voltage of 6.6 kilovolts at the secondary coil L12.

  Low voltage transformer T1 outputs an AC voltage of 6.6 kilovolts to system voltage source 12 via power lines PL5 and PL6, and to low voltage transformer T2 via power lines PL5 and PL6, nodes N5 and N6 and power lines PL7 and PL8. The system power supply 12 is specifically a transformer in a substation.

  The low voltage transformer T2 converts, for example, an AC voltage of 6.6 kilovolts received at the primary coil L21 from the low voltage transformer T1 into an AC voltage of 202 volts at the secondary coil L22. Low voltage transformer T2 then outputs an AC voltage of 202 volts to parent communication device 212 via power lines PL11 and PL12.

  The grid interconnection inverter device 101 communicates with a substation to exchange information, for example, in order to adjust the supply and demand balance of generated power. At this time, the grid interconnection inverter device 101 communicates with the substation via the slave communication device 202 and the parent communication device 212 installed in the substation.

  More specifically, the grid interconnection inverter device 101 communicates with the child communication device 202 via, for example, the signal line SL1. Note that the grid interconnection inverter device 101 may perform, for example, wireless communication with the slave communication device 202.

  The slave communication device 202 communicates with the main communication device 212 via the power lines PL9 and PL10, the power lines PL3 and PL4, the low voltage transformer T1, the power lines PL5 and PL6, the power lines PL7 and PL8, the low voltage transformer T2, and the power lines PL11 and PL12. I do.

  In FIG. 1, one child communication device 202 is representatively shown, but a larger number of child communication devices 202 may be provided. In FIG. 1, one parent communication device 212 is representatively shown, but a larger number of parent communication devices 212 may be provided. Details of the power line communication will be described later.

[Configuration of grid-connected PCS]
FIG. 2 is a diagram showing a configuration of the grid interconnection PCS 101 in the grid interconnection system 201 according to the embodiment of the present invention.

  Referring to FIG. 2, system interconnection PCS 101 includes control unit 1, measurement unit 2, communication unit (reception unit) 3, converter circuit 31, capacitor 32, inverter circuit (current generation unit) 33, and And a smoothing circuit 34. Converter circuit 31 includes a capacitor C1, an inductor L1, a semiconductor switch element TS5, and diodes D5 and D6. Inverter circuit 33 includes semiconductor switch elements TS1, TS2, TS3, TS4 and diodes D1, D2, D3, D4. Smoothing circuit 34 includes a capacitor C3 and inductors L2 and L3.

  The converter circuit 31 in the grid interconnection PCS 101 is connected between the power generation device 11 and the capacitor 32. Converter circuit 31 boosts the DC voltage received from power generation device 11 via power lines PL1 and PL2 by switching of semiconductor switch element TS5.

  More specifically, capacitor C1 in converter circuit 31 has a first end connected to power generation device 11 via power line PL1, and a second end connected to power generation device 11 via power line PL2.

  The first end and the second end of the capacitor C1 receive the voltage V1 and the voltage V2 from the power generation device 11, respectively. Capacitor C1 attenuates a ripple that is a high-frequency component, that is, a pulsating component included between voltage V1 and voltage V2, and outputs a DC voltage that attenuates the ripple to inductor L1, semiconductor switch element TS5, and diode D5. Here, it is assumed that the voltage V1 is higher than the voltage V2.

  Capacitor C1 stores DC power received from power generation device 11 as electrical energy, and suppresses fluctuations in DC power from power generation device 11 using the stored electrical energy.

  Inductor L1 has a first end and a second end connected to a first end of capacitor C1. The semiconductor switch element TS5 is connected to the cathode of the diode D5 and connected to the second end of the inductor L1 via the node N1, and the emitter connected to the anode of the diode D5 and the second end of the capacitor C1. And having a gate. Diode D6 has an anode connected to the second end of inductor L1 via node N1, and a cathode.

  The semiconductor switch element TS5 is, for example, an IGBT (Insulated Gate Bipolar Transistor). The semiconductor switch element TS5 is turned on when receiving a control signal S5 having a logic high level from the control unit 1, for example. The semiconductor switch element TS5 is turned off when receiving a control signal S5 having a logic low level from the control unit 1, for example.

  The diode D5 allows a current to flow from the emitter side to the collector side of the semiconductor switch element TS5 when a reverse voltage is applied to the semiconductor switch element TS5. Thereby, it is possible to prevent the semiconductor switch element TS5 from being destroyed by the reverse voltage.

  For example, the control unit 1 boosts the voltage received from the power generation device 11 by switching between the on state and the off state of the semiconductor switch element TS5. More specifically, the control unit 1 outputs, for example, a logic high level control signal S5 to the gate of the semiconductor switch element TS5. The semiconductor switch element TS5 is turned on when receiving a control signal S5 having a logic high level from the control unit 1. Thereby, a current flows from the first end of the inductor L1 to the second end.

  Then, the control unit 1 outputs, for example, a logic low level control signal S5 to the gate of the semiconductor switch element TS5. The semiconductor switch element TS5 is turned off when receiving the control signal S5 of the logic low level from the control unit 1. As a result, the current flowing from the first end to the second end of the inductor L1 decreases, and thus an electromotive force ΔVL1 corresponding to the time change of the current is generated between the first end and the second end of the inductor L1. At this time, since a voltage higher than the voltage at the first end of the inductor L1 is generated at the second end of the inductor L1, the electromotive force ΔVL1 becomes a positive voltage.

  That is, a voltage (V1−V2 + ΔVL1) obtained by adding the electromotive force ΔVL1 in the inductor L1 to the voltage (V1−V2) received from the power generation device 11 is generated between the second end of the inductor L1 and the emitter of the semiconductor switch element TS5. Thereby, converter circuit 31 boosts the DC voltage received from power generation device 11.

  The diode D6 prevents the electric charge accumulated in the capacitor 32 from being discharged via the inductor L1 and the semiconductor switch element TS5.

  The capacitor 32 is connected between the converter circuit 31 and the inverter circuit 33. The capacitor 32 is connected in parallel with the inverter circuit 33.

  Specifically, capacitor 32 has a first end connected to the cathode of diode D6 and a second end connected to the emitter of semiconductor switch element TS5. The first end and the second end of capacitor 32 receive voltage Vh and voltage V2 at the cathode of diode D6 from converter circuit 31, respectively.

  Capacitor 32 attenuates a ripple that is a high-frequency component included between voltage Vh and voltage V2, that is, a pulsating component, and outputs a DC voltage with the ripple attenuated to inverter circuit 33.

  Capacitor 32 stores the DC power received from converter circuit 31 as electrical energy, and suppresses fluctuations in DC power from converter circuit 31 using the stored electrical energy.

  The inverter circuit 33 is connected between the capacitor 32 and the smoothing circuit 34. The inverter circuit 33 receives direct-current power from the converter circuit 31 via the capacitor 32, and generates single-phase alternating current from the received direct-current power using switching of a plurality of switch elements.

  Specifically, the inverter circuit 33 is provided with semiconductor switch elements TS1, TS2, TS3, TS4. The semiconductor switch elements TS1, TS2, TS3, and TS4 convert a current flowing to the low-voltage transformer T1 side into a single-phase AC current by switching according to a DC voltage supplied from the converter circuit 31 via the capacitor 32. Generate.

  The semiconductor switch elements TS1, TS2, TS3, and TS4 in the inverter circuit 33 are, for example, IGBTs (Insulated Gate Bipolar Transistors).

  Semiconductor switch element TS1 has a collector connected to the cathode of diode D1 and the first end of capacitor 32, an emitter connected to the anode of diode D1 and connected to semiconductor switch element TS2 via node N12, and a gate. And have. The semiconductor switch element TS2 is connected to the cathode of the diode D2 and connected to the semiconductor switch element TS1 via the node N12, the emitter connected to the anode of the diode D2 and the second end of the capacitor 32, and the gate And have.

  Semiconductor switch element TS3 has a collector connected to the cathode of diode D3 and the first end of capacitor 32, an emitter connected to the anode of diode D3 and connected to semiconductor switch element TS4 via node N34, and a gate. And have. The semiconductor switch element TS4 is connected to the cathode of the diode D4 and connected to the semiconductor switch element TS3 via the node N34, the emitter connected to the anode of the diode D4 and the second end of the capacitor 32, and the gate And have.

  The semiconductor switch elements TS1, TS2, TS3, TS4 are turned on when, for example, control signals S1, S2, S3, S4 of logic high level are received from the control unit 1, respectively. Further, the semiconductor switch elements TS1, TS2, TS3, TS4 are turned off when receiving control signals S1, S2, S3, S4 of a logic low level from the control unit 1, respectively.

  The diodes D1, D2, D3, and D4 generate current from the emitter side to the collector side of the semiconductor switch elements TS1, TS2, TS3, and TS4 when a reverse voltage is applied to the semiconductor switch elements TS1, TS2, TS3, and TS4, respectively. Shed. Thereby, it can prevent that semiconductor switch element TS1, TS2, TS3, TS4 is destroyed by a reverse voltage.

  FIG. 3 is a diagram showing a configuration of the measurement unit 2 in the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 3, measurement unit 2 includes a system voltage measurement unit 21, a generated power measurement unit 22, and a generated current measurement unit 23.

  The system voltage measurement unit 21 includes a voltage detection unit (not shown), detects the voltage (V3-V4) output from the smoothing circuit 34, that is, the system voltage Vps, and outputs the system voltage value Mvps indicating the detection result to the control unit 1. To do.

  The generated power measurement unit 22 includes a voltage detection unit (not shown), and detects the voltage (V1-V2) received by the converter circuit 31 from the power generation device 11. In addition, generated power measurement unit 22 includes a current detection unit (not shown), and detects current I1 flowing through power line PL1. The generated power measurement unit 22 calculates the generated power from the detected voltage value and current value, and outputs the generated power value Mpg indicating the calculation result to the control unit 1. The generated power measurement unit 22 may detect a current flowing through the power line PL2.

  The generated current measuring unit 23 includes a current detection unit (not shown), detects the generated current Ig that is output from the smoothing circuit 34 and flows through the power line PL3, and generates the generated current value Mig indicating the detection result to the control unit 1. Output. The generated current measuring unit 23 may detect the current output from the smoothing circuit 34 and flowing through the power line PL4 as the generated current value Mig.

  Referring to FIG. 2 again, communication unit 3 communicates with slave communication device 202 via signal line SL1. More specifically, the communication unit 3 outputs information received from the child communication device 202 to the control unit 1. In addition, the communication unit 3 transmits information received from the control unit 1 to the child communication device 202.

  Specifically, for example, when the communication unit 3 receives communication start information, communication end information, signal reception information, or reception completion information from the child communication device 202, the communication unit 3 outputs the received information to the control unit 1. Details of communication start information, communication end information, signal reception information, reception completion information, and slave communication device 202 will be described later.

  The control unit 1 generates control signals S1, S2, S3, S4 based on the detection result of the measurement unit 2 and information received via the communication unit 3, and the generated control signals S1, S2, S3, S4 are inverters The inverter circuit 33 is controlled by outputting to the gates of the semiconductor switch elements TS1, TS2, TS3, and TS4 of the circuit 33, respectively.

  Further, the control unit 1 generates a control signal S5 based on the detection result of the measurement unit 2 and information received via the communication unit 3, and the generated control signal S5 is supplied to the gate of the semiconductor switch element TS5 of the converter circuit 31. By outputting, the converter circuit 31 is controlled.

  Specifically, the control unit 1 performs PWM (Pulse Width Modulation) control on the inverter circuit 33.

  For example, the control unit 1 sets a carrier frequency Fc and a duty ratio that are greater than 60 Hz, which is the frequency of the AC voltage in the power system. Then, for example, for each carrier cycle Tc that is the reciprocal of the carrier frequency Fc, the control unit 1 outputs a control signal having a logical high level during the on period obtained by multiplying the carrier period Tc by the duty ratio. During the off period, a logic low level control signal is output.

  The control unit 1 adjusts the duty ratio to control the time for outputting a logic high level control signal, that is, the pulse width of the control signal.

  The control unit 1 sends the control signals S1, S2, S3, S4 to the semiconductor switch element TS1, so that an alternating current having a frequency of 60 Hz is output to the smoothing circuit 34 via the nodes N12, N34 in the inverter circuit 33. Output to the gates of TS2, TS3 and TS4, respectively.

  When receiving the control signals S1, S2, S3, S4 from the control unit 1, the semiconductor switch elements TS1, TS2, TS3, TS4 are turned on for each carrier cycle Tc according to the duty ratio. Therefore, the switching frequency in the semiconductor switch elements TS1, TS2, TS3, TS4 matches the carrier frequency Fc.

  The smoothing circuit 34 is connected between the inverter circuit 33 and the low-voltage transformer T1. The smoothing circuit 34 smoothes the alternating current received from the inverter circuit 33, and outputs the smoothed alternating current to the low voltage transformer T1.

  Inductor L2 in smoothing circuit 34 has a first end connected to node N12, and a second end connected to power line PL3 and capacitor C3. Inductor L3 has a first end connected to node N34, and a second end connected to power line PL4 and capacitor C3. Capacitor C3 has a first end connected to the second end of power line PL3 and inductor L2, and a second end connected to the second end of power line PL4 and inductor L3.

  Inductors L1 and L2 and capacitor C3 form a low-pass filter, and attenuate noise that is a component having a frequency equal to or higher than a predetermined frequency included in an alternating current having a frequency of 60 Hz received from inverter circuit 33 via nodes N12 and N34. The alternating current with the noise attenuated, that is, the generated current Ig is output to the low voltage transformer T1 via the power lines PL3 and PL4.

  Here, the circuit constants of the inductors L1 and L2 and the capacitor C3 are, for example, that the generated current Ig is defined in the grid connection regulations “the output current distortion is 5% or less of the total current distortion and 3% or less of each harmonic. Is set to satisfy.

[Communication device]
FIG. 4 is a diagram showing the configuration of the slave communication device 202 in the grid interconnection system 201 according to the embodiment of the present invention.

  Referring to FIG. 4, child communication device 202 includes a power line communication unit 81, a communication control unit 82, and an inter-device communication unit (transmission unit) 83.

  The slave communication device 202 is a TWACS slave, for example. The slave communication device 202 performs power line communication with other communication devices in a power system, for example.

  Specifically, the child communication device 202 communicates with the parent communication device 212 that is a parent device of TWACS via the power line and the low-voltage transformers T1 and T2.

  The slave communication device 202 transmits, for example, a current pulse generated by modulating the current to the master communication device 212 as a signal. The child communication device 202 detects a current pulse generated in the parent communication device 212, for example, and receives the detected current pulse as a signal.

  4 communicates with the grid connection PCS 101 via the signal line SL1. Communication control unit 82 creates a message addressed to parent communication device 212 based on information received from grid interconnection PCS 101 via inter-device communication unit 83, and outputs the created message to power line communication unit 81.

  Further, for example, before starting power line communication with the parent communication device 212, the communication control unit 82 transmits communication start information indicating that power line communication is started to the grid interconnection PCS 101 via the inter-device communication unit 83. .

  Further, for example, after the power line communication with the parent communication device 212 is ended, the communication control unit 82 transmits communication end information indicating that the power line communication is ended to the grid interconnection PCS 101 via the inter-device communication unit 83.

  FIG. 5 is a diagram showing a configuration of the power line communication unit 81 in the slave communication device 202 according to the embodiment of the present invention.

  Referring to FIG. 5, power line communication unit 81 includes a signal processing unit 84, a short-circuit switch 85, and an inductor L86.

  The power line communication unit 81 performs power line communication with the parent communication device 212 in the power system. More specifically, signal processing unit 84 has a first end connected to power line PL9 and a second end connected to power line PL10. Shorting switch 85 has a first end connected to the first end of signal processing unit 84 via power line PL9, and a second end. Inductor L86 has a first end connected to the second end of short-circuit switch 85, and a second end connected to the second end of signal processing unit 84 via power line PL10.

  FIG. 6 is a diagram illustrating an example of current pulses generated in the slave communication device 202 according to the embodiment of the present invention.

  Referring to FIG. 6, the horizontal axis indicates time, and the vertical axis indicates voltage value and current value. The system voltage value Mvps indicates the time change of the system voltage Vps measured by the system voltage measurement unit 21 in the measurement unit 2. Current value Mi9 indicates, for example, a time change of a measured value of current I9 flowing through power line PL9.

  When receiving a message from the communication control unit 82, the signal processing unit 84 illustrated in FIG. 5 generates a transmission bit pattern based on the received message. The signal processing unit 84 turns on the short circuit switch 85 based on the generated transmission bit pattern.

  More specifically, when the short circuit switch 85 is turned on, the signal processing unit 84 is in the vicinity of the zero cross timing at which the system voltage Vps received via the power lines PL9 and PL10 becomes zero volts, and is short-circuited at a timing before the zero cross timing. Switch 85 is turned on.

  The zero cross timing may be any timing of the system voltage Vps from negative to positive and the system voltage Vps from positive to negative.

  Specifically, the short-circuit switch 85 is a semiconductor switch such as a thyristor connected in parallel in two reverse directions. The signal processing unit 84 shifts the short-circuit switch 85 to the on state, thereby setting the short-circuit state between the first end and the second end of the short-circuit switch 85 and between the first end of the short-circuit switch 85 and the second end of the inductor L86. Current is passed through. At this time, the inductor L86 limits the current flowing between the first end of the short-circuit switch 85 and the second end of the inductor L86. A resistor may be connected instead of the inductor L86.

  When the short-circuit switch 85 transitions to the on state, a current flows through the short-circuit switch 85. Then, after the zero-cross timing has elapsed, when the current flowing through the short-circuit switch 85 decreases and the current becomes zero, the short-circuit switch 85 spontaneously transitions to the off state. Thereby, as shown in FIG. 6, a current pulse is generated in the vicinity of the zero cross timing.

  The current pulse generated in the power line communication unit 81 is transmitted as a signal to the parent communication device 212 via the power line and the low-voltage transformers T1 and T2.

  The signal processing unit 84 generates a plurality of current pulses by turning on the short-circuit switch 85 in the vicinity of a plurality of zero cross timings according to the transmission bit pattern, and transmits the generated plurality of current pulses to the parent communication device 212 as information.

  Note that the communication speed of the upstream power line communication from the child communication device 202 to the parent communication device 212 does not exceed 50 bits per second, for example. Specifically, the communication speed is approximately 12.5 bits per second.

  Further, the signal processing unit 84 receives the current pulse generated in the parent communication device 212 and generates a reception bit pattern based on the received current pulse. Thereby, the signal processing unit 84 receives information from the parent communication device 212.

  The communication speed of the downstream power line communication from the parent communication device 212 to the child communication device 202 does not exceed 50 bits per second, for example. Specifically, the communication speed is approximately 25 bits per second. Also, for example, information is multiplexed in uplink communication, but information is not multiplexed in downlink communication, so the downlink bit rate is higher than the uplink bit rate.

  More specifically, when the current pulse passes through the power line and the low-voltage transformers T1 and T2, the high-frequency component included in the current pulse is attenuated, so that the current received by the signal processing unit 84 via the power line and the low-voltage transformers T1 and T2 The pulse contains many low frequency components. The signal processing unit 84 detects a low frequency component included in the current pulse using, for example, a low-pass filter.

  The signal processing unit 84 recognizes that the current pulse has been received from the detected low frequency component, generates a reception bit pattern from the received current pulse, and transmits information indicating that the current pulse has been received to the communication control unit 82. Output.

  Note that a period during which the signal processing unit 84 transmits or receives current pulses is referred to as a signal transmission period. The period during which the signal processing unit 84 transmits the current pulse corresponds to, for example, a period from when the signal processing unit 84 changes the short-circuit switch 85 to the on state until the short-circuit switch 85 changes to the off state.

  The period in which the signal processing unit 84 receives the current pulse corresponds to, for example, a period from the detection start time to the detection end time of the low frequency component included in the current pulse.

  In addition, when the signal processing unit 84 detects a bit pattern indicating completion of power line communication in the generated reception bit pattern, the signal processing unit 84 recognizes that power line communication is completed and transmits information indicating that power line communication is completed to the communication control unit. 82.

  The signal processing unit 84 creates a message from the received bit pattern and outputs the created message to the communication control unit 82.

  Upon receiving information indicating that the current pulse has been received from the signal processing unit 84, the communication control unit 82 transmits the received information as signal reception information to the grid interconnection PCS 101 via the inter-device communication unit 83. Further, upon receiving information indicating that the power line communication is completed from the signal processing unit 84, the communication control unit 82 transmits the received information to the grid interconnection PCS 101 via the inter-device communication unit 83 as reception completion information.

  When receiving a message from the signal processing unit 84, the communication control unit 82 transmits the message to the device indicated by the address of the received message via the inter-device communication unit 83.

  The power line communication has a slower communication speed between the parent communication device 212 and the child communication device 202 than a PLC (Power Line Communication) for performing broadband communication with a communication speed of several kilobits per second to several megabits per second. . Hereinafter, the power line communication between the parent communication device 212 and the child communication device 202 via the power line is also referred to as “low speed power line communication”.

  In a PLC for performing broadband communication, since the frequency of a carrier wave for transmitting a signal is high, the signal distance in the power line is greatly attenuated, so the communication distance is shortened.

  On the other hand, in low-speed power line communication, since the frequency of the transmitted signal is low, the signal attenuation on the power line is small. Further, in low-speed power line communication, a signal is transmitted by a modulation method different from the modulation method used in the PLC for performing broadband communication. As a result, in low-speed power line communication, the transmission speed can be reduced, and resistance to errors that occur in signal transmission, that is, robustness can be improved.

  Further, in low-speed power line communication, long distance communication of about several hundred kilometers can be performed even when there is no repeater for relaying signals between the parent communication device 212 and the child communication device 202. In addition, since the signal attenuation in the power line is small, the reliability of the communication can be improved.

  For example, when a transformer such as inductive low-voltage transformers T1 and T2 is connected to the power line, the impedance of the transformer increases in the frequency domain of the carrier wave used in the PLC for broadband communication, so that the carrier wave passes through the transformer. Can not do it. Therefore, a PLC for performing broadband communication cannot communicate via a transformer.

  On the other hand, since the impedance of the transformer is low in the frequency domain of a signal transmitted in low-speed power line communication, the signal can pass through the transformer.

  As described above, in low-speed power line communication, communication can be performed between the parent communication device 212 and the child communication device 202 with almost no restrictions due to the distance of the power line and the presence of the transformer.

[Problems caused by low-speed power line communication]
The grid interconnection PCS as a comparative example supplies an AC current synchronized with the grid voltage from the DC power received from the power generation device 11 to the power grid. Specifically, the grid interconnection PCS generates an alternating current synchronized with the system voltage from the direct current power received from the power generator 11 by performing, for example, feedforward control and feedback control.

  More specifically, the grid interconnection PCS measures the grid voltage, performs feedforward control based on the measured cycle and phase of the grid voltage, and generates an alternating current synchronized with the grid voltage.

  For example, when low-speed power line communication is performed in a communication device connected to the grid interconnection PCS via the power line, the grid interconnection PCS may measure a grid voltage in which the vicinity of the zero cross timing is distorted. The shorter the length of the power line connecting the grid interconnection PCS and the communication device, the greater the distortion of the grid voltage near the zero cross timing measured by the grid interconnection PCS.

  In such a case, the grid interconnection PCS performs feedforward control based on, for example, the cycle and phase of the grid voltage having distortion near the zero cross timing, and thus generates an alternating current that is not synchronized with the grid voltage.

  FIG. 7 is a diagram illustrating an example of an alternating current generated by the grid interconnection PCS as a comparative example.

  Referring to FIG. 7, the horizontal axis indicates time, and the vertical axis indicates voltage value and current value. The system voltage value Mvr indicates the time change of the measured system voltage. The current value Mir indicates the time change of the measured value of the generated current.

  The grid interconnection PCS performs feedback control in addition to feedforward control, thereby bringing the generated alternating current close to the target value.

  Specifically, the grid interconnection PCS sets a target value of the alternating current to be generated based on, for example, the grid voltage value Mvr shown in FIG. Then, the grid interconnection PCS compares the generated measurement value of the alternating current and the target value, and performs feedback control using the comparison result.

  More specifically, when the measured value of the generated alternating current deviates from the target value, the grid interconnection PCS brings the generated alternating current closer to the target value by performing feedback control according to this deviation. Thereby, the grid interconnection PCS generates an alternating current synchronized with the grid voltage value Mvr shown in FIG.

  However, for example, when low-speed power line communication is performed by a communication device connected to the grid interconnection PCS via the power line, the grid interconnection PCS has a large current value in the signal transmission periods A, B, and C shown in FIG. Mir may be measured.

  When the grid connection PCS measures a current value Mir that is significantly different from the target value in the signal transmission periods A, B, and C, the grid connection PCS performs feedback control so that the generated alternating current approaches the target value, and the signal transmission periods A, B, A disordered alternating current is generated in each period Af, Bf, Cf following C.

  As described above, when low-speed power line communication is performed by the communication device connected to the grid interconnection PCS via the power line, the stability of the feedforward control and the feedback control is reduced, and the grid interconnection PCS has a low quality. There is a problem that the generated current is output to the power system.

  On the other hand, in the grid interconnection PCS according to the embodiment of the present invention, the above problem is solved by the following configuration and operation.

  FIG. 8 is a diagram showing a configuration of the control unit 1 in the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 8, control unit 1 includes a zero cross period setting unit 4, a current adjustment unit 5, a disturbance compensation unit 6, a target current setting unit 7, and a power line communication detection unit 8.

  FIG. 9 is a diagram showing a configuration of the power line communication detection unit 8 in the control unit 1 of the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 9, power line communication detection unit 8 includes a current pulse detection unit 61, a power line communication determination unit 62, and a timer unit 63. The power line communication detection unit 8 detects low-speed power line communication performed in the power system.

  FIG. 10 is a diagram showing an example of current pulses detected by the current pulse detection unit 61 according to the embodiment of the present invention.

  Referring to FIG. 10, current pulse detection unit 61 detects a current pulse based on generated current value Mig measured by generated current measuring unit 23 in measuring unit 2 shown in FIG.

  Specifically, the current pulse detection unit 61 transmits current pulse detection information indicating that a current pulse has been detected during a period when the absolute value of the current in the power system is greater than a predetermined threshold value to the power line communication determination unit 62 and the zero crossing. Output to the period setting unit 4.

  For example, when low-speed power line communication is performed by a communication device connected to the grid interconnection PCS 101 via a power line, the absolute value of the generated current value Mig shows a large value in the signal transmission period near the zero cross timing tz. .

  As shown in FIG. 10, the current pulse detection unit 61 transmits the current pulse detection information to the power line communication determination unit 62 and the zero-cross period setting unit in a period Tp in which the generated current value Mig is a positive value and is larger than the threshold value Ith. Output to 4.

  Further, the current pulse detection unit 61 sends the current pulse detection information to the power line communication determination unit 62 and the zero cross period setting unit 4 in a period in which the generated current value Mig is a negative value and is smaller than the threshold value (−Ith). Output.

  Note that the maximum current value of the current pulse generated by the low-speed power line communication is smaller than the overcurrent protection threshold value Imax indicating that an overcurrent flows in the power line PL3, for example.

  In addition, the current value of the current pulse detected by the current pulse detector 61 changes according to the length of the power line connecting the self-system interconnection PCS 101 and the communication device that generates the current pulse. Specifically, the current value of the current pulse from the child communication device 202 detected by the current pulse detection unit 61 is larger than the current value of the current pulse from the parent communication device 212 detected by the current pulse detection unit 61.

  Therefore, the current pulse detection unit 61 may appropriately set the threshold value Ith according to, for example, a current pulse to be detected.

  The power line communication determination unit 62 determines whether low-speed power line communication is being performed in the power system, and outputs power line communication information indicating the determination result to the disturbance compensation unit 6 and the zero cross period setting unit 4.

  Specifically, for example, the power line communication determination unit 62 determines that low speed power line communication is being performed in the power system during the period when the current pulse detection information is received from the current pulse detection unit 61, and the low speed power line communication is performed. Is output to the disturbance compensator 6 and the zero-crossing period setting unit 4. When the period expires, the power line communication determination unit 62 sets a predetermined time in the timer unit 63 and starts the operation of the timer unit 63.

  The timer unit 63 outputs a timer expiration notification to the power line communication determination unit 62 when a predetermined time has elapsed. When the power line communication determining unit 62 does not receive new current pulse detection information from the current pulse detecting unit 61 after receiving the timer expiration notification from the timer unit 63 after starting the operation of the timer unit 63, the power line communication determining unit 62 It is determined that the low speed power line communication is not performed, and the power line communication information indicating that the low speed power line communication is not performed is output to the disturbance compensation unit 6 and the zero cross period setting unit 4.

  On the other hand, when the power line communication determination unit 62 receives the current pulse detection information from the current pulse detection unit 61 after starting the operation of the timer unit 63 and before receiving the timer expiration notification from the timer unit 63, the power line communication determination unit 62 When the period for receiving information expires, the timer unit 63 is reset, and the operation of the timer unit 63 is started.

  Further, for example, the power line communication determination unit 62 determines whether or not low-speed power line communication is performed in the power system based on the communication start information, communication end information, signal reception information, and reception completion information received from the communication unit 3. The power line communication information indicating the determination result is output to the disturbance compensator 6 and the zero cross period setting unit 4.

  Specifically, when receiving the communication start information from the communication unit 3, the power line communication determination unit 62 determines that low speed power line communication is being performed in the power system, and indicates that low speed power line communication is being performed. The power line communication information shown is output to the disturbance compensator 6 and the zero cross period setting unit 4.

  In addition, when receiving the communication end information from the communication unit 3, the power line communication determination unit 62 determines that the low speed power line communication in the power system has ended, and displays the power line communication information indicating that the low speed power line communication is not performed. Output to the disturbance compensator 6 and the zero cross period setting unit 4.

  Further, when receiving the signal reception information from the communication unit 3, the power line communication determination unit 62 determines that low speed power line communication is performed in the power system, and indicates that low speed power line communication is performed. Information is output to the disturbance compensator 6 and the zero cross period setting unit 4. At this time, the power line communication determination unit 62 sets a predetermined time in the timer unit 63 and starts the operation of the timer unit 63.

  When the power line communication determining unit 62 does not receive new signal reception information from the communication unit 3 after starting the operation of the timer unit 63 until receiving the timer expiration notification from the timer unit 63, the power line communication determining unit 62 It is determined that communication is not being performed, and power line communication information indicating that low-speed power line communication is not being performed is output to the disturbance compensator 6 and the zero cross period setting unit 4.

  On the other hand, when the power line communication determination unit 62 receives new signal reception information from the communication unit 3 after starting the operation of the timer unit 63 and before receiving the timer expiration notification from the timer unit 63, the power line communication determination unit 62 At the received timing, the timer unit 63 is reset and the operation of the timer unit 63 is started.

  In addition, when receiving the reception completion information from the communication unit 3, the power line communication determination unit 62 determines that the low speed power line communication in the power system has been completed, and displays the power line communication information indicating that the low speed power line communication is not being performed. Output to the disturbance compensator 6 and the zero cross period setting unit 4.

  FIG. 11 is a diagram showing a configuration of the disturbance compensation unit 6 in the control unit 1 of the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 11, disturbance compensation unit 6 includes a zero-cross detection unit 71 and a disturbance compensation amount calculation unit (current adjustment unit) 72. The zero cross detection unit 71 detects a zero cross timing at which the system voltage in the power system indicates zero volts.

  Specifically, the zero cross detection unit 71 receives the system voltage value Mvps from the system voltage measurement unit 21 in the measurement unit 2 shown in FIG. 3 and detects the timing at which the received system voltage value Mvps indicates zero volts as the zero cross timing.

  For example, the zero cross detection unit 71 detects the timing at which the system voltage value Mvps is switched from negative to positive and the timing at which the system voltage value Mvps is switched from positive to negative as the zero cross timing.

  Moreover, the zero cross detection part 71 estimates a zero cross timing, for example in the period when the low-speed power line communication is performed by the communication apparatus connected with self grid connection PCS101 via the power line.

  Specifically, for example, the zero-cross detection unit 71 is controlled by the slave communication device 202, the master communication device 212, or another communication device based on the power line communication information received from the power line communication determination unit 62 in the power line communication detection unit 8. Recognize the period of power line communication.

  For example, during a period when low-speed power line communication is performed, the system voltage value Mvps may be distorted near the zero-cross timing. Therefore, the zero-cross detection unit 71 sets the timing at which the system voltage value Mvps indicates zero volts as the zero-cross timing. If detected, the zero cross timing may be erroneously detected.

  Therefore, for example, the zero cross detection unit 71 detects a timing other than the zero cross timing, and estimates the zero cross timing from the detected timing.

  FIG. 12 is a diagram illustrating an example of zero-cross timing estimated by the zero-cross detection unit 71 according to the embodiment of the present invention.

  Referring to FIG. 12, zero cross detection unit 71 estimates the zero cross timing as a timing other than the zero cross timing, for example, from any one of the timing when system voltage value Mvps reaches the maximum value and the timing when the system voltage value Mvps reaches the minimum value.

  Specifically, the zero cross detection unit 71 detects, for example, a timing ta at which the system voltage value Mvps shows a maximum value and a timing tb at which the system voltage value Mvps shows a minimum value. At this time, for example, the zero cross detection unit 71 differentiates the system voltage value Mvps and detects timings ta and tb from the timing when the differentiated system voltage value Mvps becomes zero.

  Then, for example, the zero-cross detection unit 71 estimates a timing tz when time ((tb−ta) / 2) has elapsed from the timing tb as the zero-cross timing. Accordingly, the zero cross detection unit 71 can estimate the zero cross timing tz from the timings ta and tb other than the zero cross timing, so that the slave communication device 202, the master communication device 212, and other communication devices perform low-speed power line communication. Even in this case, the zero cross timing tz can be estimated more accurately.

  Note that the zero-crossing detection unit 71 may estimate the zero-crossing timing tz from the timing at which the maximum value or the minimum value in the past from the timings ta and tb, for example. In this case, the accuracy may be lower than when the zero cross timing tz is detected from the timings ta and tb close to the zero cross timing tz.

  Moreover, the zero cross detection part 71 may estimate the zero cross timing in the period when the low speed power line communication is performed, for example using the zero cross timing detected before the low speed power line communication is started.

  Specifically, for example, the zero cross detection unit 71 averages a plurality of zero cross timing intervals detected before low speed power line communication is started, and low speed power line communication is performed using the average value. The zero cross timing in a certain period is estimated.

  The zero cross detection unit 71 outputs, for example, zero cross timing detection information including the detected zero cross timing tz or the estimated zero cross timing tz to the disturbance compensation amount calculation unit 72, the zero cross period setting unit 4, and the target current setting unit 7.

  The disturbance compensation amount calculation unit 72 calculates a disturbance compensation amount used in the feedforward control in the current adjustment unit 5. More specifically, the disturbance compensation amount calculation unit 72 receives the zero cross timing detection information received from the zero cross detection unit 71, the system voltage value Mvps received from the system voltage measurement unit 21 shown in FIG. 3, and the generated power value received from the generated power measurement unit 22. A disturbance compensation amount is calculated based on Mpg.

  Specifically, the disturbance compensation amount calculation unit 72 calculates a disturbance compensation amount synchronized with, for example, the system voltage value Mvps. More specifically, the disturbance compensation amount calculation unit 72 calculates, for example, AC power that can be generated in its own system interconnection PCS 101 from the generated power value Mpg, and sets the amplitude of the disturbance compensation amount according to the calculated AC power. . The disturbance compensation amount calculation unit 72 calculates the disturbance compensation amount synchronized with the system voltage value Mvps by, for example, changing the amplitude of the disturbance compensation amount with time according to the time change of the system voltage value Mvps.

  The disturbance compensation amount calculation unit 72 is, for example, a zero-cross timing estimated by the zero-cross detection unit 71 during a period in which low-speed power line communication is performed by a communication apparatus connected to the system interconnection PCS 101 via the power line. Based on the above, the system voltage is estimated.

  Specifically, the disturbance compensation amount calculation unit 72 estimates the system voltage by approximating the system voltage with a sine wave, for example. Then, the disturbance compensation amount calculation unit 72 calculates a disturbance compensation amount synchronized with the system voltage using, for example, an approximated sine wave.

  Specifically, the disturbance compensation amount calculation unit 72 calculates the cycle and phase of the system voltage from a plurality of estimated zero cross timings obtained from, for example, zero cross timing detection information. The disturbance compensation amount calculation unit 72 sets, for example, the calculated cycle and phase to the cycle and phase of a sine wave that approximates the system voltage.

  Also, the disturbance compensation amount calculation unit 72 sets the amplitude of a sine wave that approximates the system voltage based on, for example, the maximum value and the minimum value of the system voltage value Mvps.

  The disturbance compensation amount calculation unit 72 estimates a system voltage using, for example, a sine wave having the period, the phase, and the amplitude, and calculates a disturbance compensation amount synchronized with the estimated system voltage. Thereby, even when distortion is included in the vicinity of the zero cross timing of the system voltage value Mvps due to low-speed power line communication, the disturbance compensation amount calculation unit 72 estimates a more accurate system voltage, and the estimated system voltage The disturbance compensation amount can be calculated more accurately based on the above.

  The disturbance compensation amount calculation unit 72 outputs the calculated disturbance compensation amount to the current adjustment unit 5.

  FIG. 13 is a diagram illustrating an example of a zero cross period set by the zero cross period setting unit 4 according to the embodiment of the present invention.

  Referring to FIG. 13, the vertical axis represents voltage and the horizontal axis represents time. The zero cross period setting unit 4 shown in FIG. 8 sets the zero cross period Dzc based on the zero cross timing detection information received from the zero cross detection unit 71 in the disturbance compensation unit 6 shown in FIG.

  Specifically, the zero cross period setting unit 4 sets the zero cross period Dzc based on the zero cross timing when the system voltage is switched from negative to positive among a plurality of zero cross timings obtained from the zero cross timing detection information, for example.

  More specifically, the zero cross period setting unit 4 is, for example, after time T1 from the timing (0+ (n−1) × T) at which the system voltage Vps having the period T is switched from the (n−1) th cycle to the nth week. The timing ts [2n] is set to the start timing of the zero cross period Dzc [2n]. Here, n represents a positive integer.

  For example, the zero cross period setting unit 4 sets the timing te [2n + 1] after the time T2 from the timing (0 + n × T) when the system voltage Vps switches from the nth cycle to the (n + 1) th week, and the end timing of the zero cross period Dzc [2n]. Set to.

  Further, the zero-cross period setting unit 4 has, for example, the system voltage Vps for the zero-cross period Dzc [2n−2], which is one cycle before the zero-cross period Dzc [2n], from the (n−2) th round (n−1) (not shown). The timing ts [2n-2] after the time T1 from the timing of switching to the week (0+ (n−2) × T) is set as the start timing of the zero cross period Dzc [2n−2].

  For example, the zero cross period setting unit 4 sets the timing te [2n−1] after the time T2 from the timing (0+ (n−1) × T) when the system voltage Vps switches from the (n−1) th cycle to the nth week. The end timing of the zero cross period Dzc [2n-2] is set.

  Further, the zero cross period setting unit 4 starts and ends the zero cross period Dzc [2n-2] and the end timing for the zero cross period Dzc [2n-1] half a cycle before the zero cross period Dzc [2n]. The start timing ts [2n-1] and the end timing te [2n] of the zero cross period Dzc [2n-1] are set by shifting te [2n-1] backward by a half cycle (T / 2). The period T used here is calculated, for example, by averaging the intervals of the zero cross timings.

  That is, the zero cross period setting unit 4 is a time (T−T1) before the zero cross timing at both the zero cross timing when the system voltage is switched from negative to positive and the zero cross timing when the system voltage is switched from positive to negative. The timing from the timing until the timing after time T2 is set as the zero crossing period Dzc.

  Note that the zero-cross period setting unit 4 performs, for example, a zero-cross when the system voltage is switched from positive to negative with respect to the zero-cross period Dzc [2n-1] that is half a cycle away from the zero-cross periods Dzc [2n-2] and Dzc [2n]. You may set based on timing. In this case, the zero cross period Dzc can be set without calculating the period T.

  The zero cross period setting unit 4 sets times T1 and T2 based on the signal transmission period. Specifically, since the time difference between the start timing and end timing of the signal transmission period and the zero cross timing when low-speed power line communication is performed is substantially constant, the zero cross period setting unit 4 sets the start timing and the end timing. Times T1 and T2 are set so that the timing is included in the zero-cross period Dzc.

  That is, the zero cross period setting unit 4 sets the times T1 and T2 so that the signal transmission period is included in the zero cross period Dzc.

  For example, the zero-cross period setting unit 4 outputs a logic-high level zero-cross period signal indicating the zero-cross period during the set zero-cross period Dzc to the current adjustment unit 5, and outputs a logic low level during periods other than the zero-cross period Dzc. The zero cross period signal is output to the current adjustment unit 5.

  Further, the zero cross period setting unit 4 adjusts the current of the logic high level zero cross period signal in the period of receiving the current pulse detection information from the current pulse detection unit 61 in the power line communication detection unit 8 in the set zero cross period Dzc, for example. It may be output to the unit 5, and a logic low level zero-crossing period signal may be output to the current adjustment unit 5 during other periods.

  In addition, the zero cross period setting unit 4 performs low-speed power line communication with the child communication device 202, the parent communication device 212, or another communication device based on the power line communication information received from the power line communication determination unit 62 in the power line communication detection unit 8, for example. Recognize the period during which

  Specifically, the zero-cross period setting unit 4 receives, for example, power line communication information indicating that low-speed power line communication is being performed from the power line communication determination unit 62 and then indicates that low-speed power line communication is not being performed. Is recognized as a period during which low-speed power line communication is performed.

  Then, the zero cross period setting unit 4 outputs, for example, a logic high level zero cross period signal indicating a zero cross period in the set zero cross period Dzc in the period during which low-speed power line communication is performed. Output to. The zero-cross period setting unit 4 adjusts the current of the logic-low level zero-cross period signal during a period other than the zero-cross period Dzc in the period during which the low-speed power line communication is performed and during the period when the low-speed power line communication is not performed. Output to unit 5.

  In addition, although the zero cross period setting part 4 was set as the structure which sets the zero cross period Dzc based on time, it is not limited to this. The zero cross period setting unit 4 may set the zero cross period Dzc based on the phase, for example.

  Specifically, the zero cross period setting unit 4 sets, for example, the phases φ1 = 2π × T1 / T and φ2 = 2π × T2 / T instead of the times T1 and T2, respectively, and sets the phases φ1, φ2 and the zero cross The start phase angle and end phase angle of the zero cross period may be set based on the phase corresponding to the timing.

  The target current setting unit 7 is based on the zero cross timing detection information received from the zero cross detection unit 71 in the disturbance compensation unit 6 and the generated power value Mpg received from the generated power measurement unit 22 in the measurement unit 2. The target value I * of the generated current Ig to be output to the power system by the PCS 101 is set.

  More specifically, the target current setting unit 7 approximates the generated current Ig to be output by its grid interconnection PCS 101 with a sine wave, for example. Specifically, the target current setting unit 7 calculates the period and phase to be set to the sine wave based on, for example, the zero cross timing tz included in the zero cross timing detection information, and uses the calculated period and phase as the sine wave period. And phase respectively. Further, the target current setting unit 7 calculates, for example, a current that can be generated by the system interconnection PCS 101 from the generated power value Mpg, and sets the amplitude of the sine wave from the calculated current.

  The target current setting unit 7 sets a target value I * of the generated current Ig at each timing using, for example, a sine wave in which the cycle, the phase, and the amplitude are set, and the set target value I * is set as a current adjustment unit. Output to 5.

  FIG. 14 is a diagram showing a configuration of the current adjustment unit 5 in the control unit 1 of the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 14, current adjustment unit 5 includes subtractor 41, deviation correction unit 42, feedback gain calculation unit 43, adder 44, total control unit 45, triangular wave comparison unit 46, and triangular wave generation. Part 47.

  The current adjustment unit 5 performs feedforward control based on the system voltage Vps, for example. Specifically, the current adjustment unit 5 performs feedforward control based on the disturbance compensation amount received from the disturbance compensation amount calculation unit 72 in the disturbance compensation unit 6 shown in FIG.

  The current adjusting unit 5 performs feedforward control, and also generates the target value I * received from the target current setting unit 7 shown in FIG. 8 and the generated current received from the generated current measuring unit 23 in the measuring unit 2 shown in FIG. Feedback control is performed based on the difference from the value Mig.

  The current adjusting unit 5 adjusts the power generation current Ig generated by its own grid-connected PCS 101 by performing feedforward control and feedback control.

  Further, the current adjustment unit 5 reduces the influence of feedback control in the zero cross period Dzc set by the zero cross period setting unit 4 shown in FIG. 8, thereby stabilizing the current of the generated current generated in the inverter circuit 33. I do.

  More specifically, the subtractor 41 calculates a difference between the target value I * and the generated current value Mig, that is, a deviation e of the generated current value Mig with respect to the target value I *, and sends the calculated deviation e to the deviation correction unit 42. Output.

  The deviation correction unit 42 corrects the deviation e received from the subtracter 41 in the zero cross period Dzc. More specifically, the deviation correction unit 42 corrects the deviation e received from the subtractor 41 based on the zero cross period signal received from the zero cross period setting unit 4. Specifically, the deviation correction unit 42 corrects, for example, the value of the deviation e to a value of the same sign having a smaller absolute value than the absolute value of the deviation e or zero while the zero cross period signal indicates a logic high level.

  In other words, the deviation correction unit 42 corrects, for example, the value of the deviation e to a value of (K × e) while the zero cross period signal indicates a logic high level. Here, the range of K is 0 ≦ K <1.

  That is, the deviation correction unit 42 outputs the deviation e corrected as described above to the feedback gain calculation unit 43 while the zero cross period signal indicates a logic high level.

  Further, the deviation correction unit 42 outputs the deviation e received from, for example, the subtractor 41 to the feedback gain calculation unit 43 as it is while the zero cross period signal indicates a logic low level.

  The feedback gain calculation unit 43 calculates a gain for feedback control based on the deviation e received from the deviation correction unit 42. More specifically, the feedback gain calculation unit 43 calculates a feedback control gain that can be compared with the disturbance compensation amount calculated based on the voltage by the disturbance compensation unit 6 from the deviation e calculated based on the current.

  Specifically, the feedback gain calculation unit 43 calculates a value obtained by multiplying the deviation e by a magnification as a proportional term of the feedback control gain. Further, the feedback gain calculation unit 43 calculates a value obtained by multiplying the value obtained by integrating the deviation e for a predetermined time by the magnification as an integral term of the gain of feedback control.

  The feedback gain calculation unit 43 outputs the sum of the proportional term and the integral term to the adder 44 as a gain for feedback control. Thereby, PI control is performed in the current adjustment unit 5.

  The feedback gain calculation unit 43 may include a differential term obtained by time differentiation of the deviation e in the feedback control gain. Thereby, PID control is performed in the current adjusting unit 5.

  The adder 44 adds the gain received from the feedback gain calculation unit 43 and the disturbance compensation amount received from the disturbance compensation amount calculation unit 72 in the disturbance compensation unit 6, and outputs the total control amount as the addition result to the total control unit 45. To do.

  FIG. 15 is a diagram illustrating an example of a triangular wave comparison method used when the current adjustment unit 5 according to the embodiment of the present invention generates a control signal for controlling the inverter circuit 33.

  Referring to FIG. 15, triangular wave generation unit 47 generates, for example, triangular wave TW having a carrier frequency Fc greater than 60 Hertz, which is the frequency of the power grid of its grid interconnection PCS 101. The triangular wave TW is generated for each semiconductor switch element TS1, TS2, TS3, TS4, for example.

  The triangular wave comparison unit 46 controls the semiconductor switch elements TS1, TS2, TS3, TS4 in the inverter circuit 33 using the triangular wave TW generated for each of the semiconductor switch elements TS1, TS2, TS3, TS4 in the triangular wave generation unit 47. Control signals S1, S2, S3, and S4 are generated.

  Specifically, for example, as shown in FIG. 15, the triangular wave comparison unit 46 controls the logic high level when the condition that the level of the triangular wave TW corresponding to the semiconductor switch element TS1 is larger than the triangular wave threshold Th1 is satisfied. A signal S1 is generated, and if the condition is not satisfied, a logic low level control signal S1 is generated.

  The triangular wave comparison unit 46 generates control signals S2, S3, S4 based on the triangular wave TW and the triangular wave threshold values Th2, Th3, Th4 corresponding to the semiconductor switch elements TS2, TS3, TS4, respectively. The triangular wave comparison unit 46 outputs the generated control signals S1, S2, S3, S4 to the semiconductor switch elements TS1, TS2, TS3, TS4 in the inverter circuit 33, respectively.

  The total control unit 45 performs PWM control on the inverter circuit 33 based on the total control amount received from the adder 44. Specifically, the general control unit 45 adjusts the levels of the triangular wave threshold values Th1, Th2, Th3, Th4 based on the total control amount received from the adder 44, so that the triangular wave comparison unit 46 is at a logic high level. The control signal output time, that is, the pulse widths of the control signals S1, S2, S3, and S4 are controlled.

  Thereby, in the inverter circuit 33, a current corresponding to the pulse width of the control signals S1, S2, S3, S4 is generated. That is, the comprehensive control unit 45 adjusts the generated current generated in the inverter circuit 33 by adjusting the levels of the triangular wave threshold values Th1, Th2, Th3, Th4 based on the comprehensive control amount. It should be noted that the ratio of the time during which the triangular wave comparison unit 46 outputs the logic high level control signal and the carrier period Tc is the duty ratio.

  Further, the comprehensive control unit 45 controls the converter circuit 31 based on the total control amount received from the adder 44. More specifically, the comprehensive control unit 45 generates the control signal S5 for boosting the voltage received from the power generation device 11 so that a current corresponding to the total control amount can be generated in the inverter circuit 33, and the generated control The signal S5 is output to the semiconductor switch element TS5.

  FIG. 16 is a diagram illustrating an example of the generated current generated by the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 16, the horizontal axis represents time, and the vertical axis represents voltage value and current value. The system voltage value Mvps indicates the time change of the system voltage Vps measured by the system voltage measuring unit 21 shown in FIG. Further, the generated current value Mig indicates a change over time of the measured value of the generated current Ig measured by the generated current measuring unit 23 shown in FIG.

  The grid interconnection PCS 101 generates a high-quality generated current Ig by performing feedforward control and feedback control based on the system voltage value Mvps and the generated current value Mig.

  Specifically, the deviation correction unit 42 in the grid interconnection PCS 101 corrects the value of the deviation e to a value corresponding to (K × e) in the zero-cross period Dzc, thereby reducing the influence of feedback control, A current stabilization process for the generated current Ig generated in the circuit 33 is performed.

  Thereby, for example, even when a large generated current Ig flows by low-speed power line communication in the zero cross period Dzc as shown in FIG. 16, it is possible to prevent the generated current Ig from being disturbed in the period following the zero cross period Dzc. it can.

  Further, even when the system voltage value Mvps in the zero cross period Dzc includes distortion due to low-speed power line communication, the current adjustment unit 5 receives a disturbance compensation amount synchronized with the system voltage Vps from the disturbance compensation unit 6. Therefore, feedforward control can be performed based on an appropriate disturbance compensation amount.

  Thereby, for example, as shown in FIG. 16, the generated current Ig synchronized with the system voltage Vps can be generated.

[Operation of grid-connected PCS]
Next, an operation when the current adjustment unit in the grid interconnection PCS 101 according to the embodiment of the present invention performs the current stabilization process will be described.

  FIG. 17 is a flowchart defining an operation procedure when the grid interconnection PCS 101 according to the embodiment of the present invention performs a current stabilization process. Each of the grid interconnection PCS 101 and the slave communication device 202 in the grid interconnection system 201 reads a program including each step of the sequence from a memory (not shown) and executes it. These programs can be installed from the outside. These installed programs are distributed in a state where they are stored in a recording medium, for example.

  Referring to FIG. 17, first, inverter circuit 33 generates a generated current Ig from the generated power received from power generation device 11 via converter circuit 31 and capacitor 32, and outputs the generated current Ig to the power system ( Step S102).

  Next, the zero cross detection unit 71 detects a zero cross timing tz at which the system voltage Vps in the power system indicates zero volts (step S104).

  Next, the target current setting unit 7 based on the zero cross timing tz and the generated power value Mpg detected by the zero cross detecting unit 71, the target value I of the generated current Ig that the grid interconnection PCS 101 should output to the power system. * Is set (step S106).

  Next, the zero cross period setting unit 4 sets the zero cross period Dzc based on the zero cross timing tz detected by the zero cross detection unit 71 (step S108).

  Next, the zero cross period setting unit 4 outputs a logic high level zero cross period signal to the current adjustment unit 5 in the set zero cross period Dzc (YES in step S110).

  Next, when the current adjustment unit 5 receives a logic high level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 performs a current stabilization process for adjusting the generated current Ig based on the system voltage value Mvps and the corrected deviation e. This is performed (step S112).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S102).

  On the other hand, the zero cross period setting unit 4 outputs a logic low level zero cross period signal to the current adjustment unit 5 in a period other than the set zero cross period Dzc (NO in step S110).

  Next, upon receiving a logic low level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e (step S114).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S102).

  In the operation illustrated in FIG. 17, when the current adjustment unit 5 receives a logic high level zero cross period signal from the zero cross period setting unit 4 in step S <b> 112, the current adjustment unit 5 performs a current stabilization process.

  Thereby, since the current stabilization process is performed in the zero cross period Dzc in which there is a high possibility that a large generated current Ig flows through low-speed power line communication, it is possible to suppress the generated current Ig from being disturbed.

  Note that the order of step S106 and step S108 may be switched. That is, the grid interconnection PCS 101 may perform step S106 after performing step S108, for example.

  FIG. 18 is a flowchart defining an operation procedure when performing the current stabilization process based on the current pulse detected by the grid interconnection PCS 101 according to the embodiment of the present invention.

  Referring to FIG. 18, the operations in steps S202 to S208 are the same as the operations in steps S102 to S108 in the flowchart shown in FIG. 17, and therefore detailed description will not be repeated here.

  Next, the zero-cross period setting unit 4 outputs a logic-high level zero-cross period signal during the period of receiving the current pulse detection information from the current pulse detection unit 61 in the set zero-cross period Dzc (YES in step S210). 5 (YES in step S212).

  Next, when the current adjustment unit 5 receives a logic high level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 performs a current stabilization process for adjusting the generated current Ig based on the system voltage value Mvps and the corrected deviation e. This is performed (step S214).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S202).

  On the other hand, the zero cross period setting unit 4 outputs a logic low level zero cross period signal during a period other than the set zero cross period Dzc and a period during which the current pulse detection information is not received from the current pulse detection unit 61 in the set zero cross period Dzc. It outputs to the current adjustment part 5 (NO in step S210 or NO in step S212).

  Next, when the current adjusting unit 5 receives the logic low level zero cross period signal from the zero cross period setting unit 4, the current adjusting unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e (step S216).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S202).

  In the operation illustrated in FIG. 18, the current adjustment unit 5 performs current stabilization processing in a period during which the current pulse detection information is output by the current pulse detection unit 61 in step S214.

  As a result, it is possible to avoid reducing the influence of the feedback control in a period in which the current pulse detection information is not output from the current pulse detection unit 61. Therefore, the target value I of the generated current Ig in the period can be avoided. * Follow-up can be improved.

  FIG. 19 is a flowchart that defines an operation procedure when the grid connection PCS 101 according to the embodiment of the present invention performs current stabilization processing based on communication start information received from the slave communication device 202.

  Referring to FIG. 19, the operations in steps S302 to S308 are the same as the operations in steps S102 to S108 in the flowchart shown in FIG. 17, and thus detailed description will not be repeated here.

  Next, when receiving the communication start information from the communication unit 3, the zero cross period setting unit 4 recognizes that the low-speed power line communication in the upward direction is performed by the slave communication device 202 (YES in step S310), and sets the zero cross In the period Dzc, a logic high level zero-cross period signal is output to the current adjustment unit 5 (YES in step S312).

  Next, when the current adjustment unit 5 receives a logic high level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 performs a current stabilization process for adjusting the generated current Ig based on the system voltage value Mvps and the corrected deviation e. This is performed (step S314).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S302).

  On the other hand, in a period other than the set zero-cross period Dzc, a logic-low level zero-cross period signal is output to the current adjustment unit 5 (NO in step S312).

  Next, when receiving the logic low level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e (step S316).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S302).

  Further, the zero cross period setting unit 4 recognizes that the slave communication device 202 is not performing the low speed power line communication in the upward direction until receiving the communication start information from the communication unit 3, and outputs a zero cross period signal of a logic low level. It outputs to the current adjustment part 5 (NO in step S310).

  Next, when receiving the logic low level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e (step S316).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S302).

  In the operation shown in FIG. 19, the current adjustment unit 5 starts the low-speed power line communication in the uplink direction by the slave communication device 202 and receives the logic high level zero cross period signal from the zero cross period setting unit 4 in step S314. When current stabilization processing is performed.

  As a result, it is possible to prevent the influence of feedback control from being reduced insignificantly during a period in which the slave communication apparatus 202 does not perform uplink low-speed power line communication. Therefore, the target value of the generated current Ig in that period can be avoided. Followability to I * can be improved.

  FIG. 20 is a flowchart that defines the operation procedure when the grid connection PCS 101 according to the embodiment of the present invention performs current stabilization processing based on the signal reception information received from the slave communication device 202.

  Referring to FIG. 20, the operations in steps S402 to S408 are the same as the operations in steps S102 to S108 in the flowchart shown in FIG. 17, and thus detailed description will not be repeated here.

  Next, when receiving the signal reception information from the communication unit 3, the zero-cross period setting unit 4 recognizes that the slave communication device 202 has received a current pulse due to low-speed power line communication in the downlink direction (YES in step S410). In the set zero-cross period Dzc, a logic-high level zero-cross period signal is output to the current adjustment unit 5 (YES in step S412).

  Next, when the current adjustment unit 5 receives a logic high level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 performs a current stabilization process for adjusting the generated current Ig based on the system voltage value Mvps and the corrected deviation e. This is performed (step S414).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S412).

  On the other hand, the zero cross period setting unit 4 outputs a logic low level zero cross period signal to the current adjustment unit 5 in a period other than the set zero cross period Dzc (NO in step S412).

  Next, upon receiving a logic low level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e (step S416).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S402).

  Further, the zero cross period setting unit 4 recognizes that the slave communication device 202 has not received a current pulse due to the low-speed power line communication in the downlink direction until the signal reception information is received from the communication unit 3, and the logic low level The zero cross period signal is output to the current adjustment unit 5 (NO in step S410).

  Next, upon receiving a logic low level zero cross period signal from the zero cross period setting unit 4, the current adjustment unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e (step S416).

  Next, the inverter circuit 33 generates a generated current Ig having an adjusted value from the generated power received from the power generator 11 via the converter circuit 31 and the capacitor 32, and continuously outputs the generated current Ig to the power system ( Step S402).

  In the operation illustrated in FIG. 20, in step S414, the current adjustment unit 5 receives a current pulse due to low-speed power line communication in the downstream direction in the slave communication device 202 and outputs a zero cross period signal at a logic high level to the zero cross period setting unit 4. When receiving from the current stabilization process.

  As a result, it is possible to prevent the influence of the feedback control from being reduced meaninglessly in a period in which there is no current pulse due to low-speed power line communication in the downstream direction in the power system. * Follow-up can be improved.

  The grid interconnection PCS 101 according to the embodiment of the present invention is configured to include the communication unit 3 that communicates with the child communication device 202 for performing low-speed power line communication. However, the present invention is not limited to this. Absent. The grid interconnection PCS 101 may be configured to include a relay unit having the function of the communication unit 3 and the function of the child communication device 202 instead of the communication unit 3.

  Thereby, since the function of the child communication device 202 can be included in the MCU (Micro Controller Unit) in the system interconnection PCS 101, it is possible to control it integrally.

  Further, the grid interconnection PCS 101 including the relay unit may measure a current in the power system, specifically, a current flowing through the power line PL3 between the node N3 and the low-voltage transformer T1 as the generated current value Mig.

  Since the impedance of the power system is small, the magnitude of the current pulse flowing through the power line PL3 between the node N3 and the low voltage transformer T1 is larger than the current pulse through the power line PL3 between the node N3 and the smoothing circuit 34 during low-speed power line communication. .

  Therefore, the grid interconnection PCS 101 including the relay unit can detect a large current pulse by measuring the current flowing through the power line PL3 between the node N3 and the low-voltage transformer T1 as the generated current value Mig. It can be detected with high accuracy.

  By the way, when the outward TWACS message described in Patent Document 1 is transmitted / received using the power line in the power system as a communication path, the grid-connected PCS receives, for example, a current pulse via the power line near the zero cross timing of the system voltage. May end up.

  When the grid interconnection PCS receives a current pulse, for example, feedforward control and feedback control for generating a generated current from generated power may be disturbed by the current pulse. At this time, the grid interconnection PCS may output a low-quality generated current that does not satisfy the quality defined by the grid interconnection regulations to the power grid.

  On the other hand, in the grid-connected inverter device according to the embodiment of the present invention, the inverter circuit 33 generates the generated current Ig from the generated power and outputs the generated current Ig to the power system. The zero cross detector 71 detects a zero cross timing tz at which the system voltage value Mvps in the power system indicates zero volts. The target current setting unit 7 sets the target value I * of the generated current Ig based on the zero cross timing tz detected by the zero cross detection unit 71. The zero cross period setting unit 4 sets the zero cross period Dzc based on the zero cross timing tz. The current adjustment unit 5 adjusts the generated current Ig based on the system voltage value Mvps and the deviation e of the generated current value Mig that is a measured value of the current generated by the inverter circuit 33 with respect to the target value I *. Then, the current adjustment unit 5 corrects the deviation e to a value having the same sign or an absolute value smaller than the deviation e, or zero, in the zero cross period Dzc set by the zero cross period setting unit 4, and the corrected deviation e and system voltage Current stabilization processing for adjusting the generated current Ig based on the value Mvps is performed.

  As described above, by performing the current stabilization process in the zero cross period Dzc, for example, even when the absolute value of the deviation e is increased by receiving a current pulse in the zero cross period Dzc, the disturbance in the adjustment of the generated current Ig is reduced. Therefore, the generated current Ig can be adjusted stably.

  As a result, even when the absolute value of the deviation e increases upon receiving a current pulse in the zero-cross period Dzc, it is possible to suppress the low-quality generated current Ig from being output to the power system.

  In addition, since a function for performing the current stabilization process can be implemented by changing the algorithm for adjusting the generated current Ig, a high-quality generated current Ig can be generated at a low cost.

  In the grid-connected inverter device according to the embodiment of the present invention, the zero-cross period setting unit 4 is a signal for low-speed power line communication performed in the power system by the slave communication device 202, the master communication device 212, and other communication devices. The zero cross period Dzc is set so that the transmission period is included.

  As described above, the zero cross period Dzc is set so as to include the signal transmission period in which the absolute value of the deviation e is increased by the current pulse, and the zero cross period is improved while improving the quality of the generated current Ig in the period other than the zero cross period Dzc. Since it is possible to suppress output of the low-quality generated current Ig to the power system in Dzc, the quality of the generated current Ig can be stably improved.

  In the grid-connected inverter device according to the embodiment of the present invention, the current adjustment unit 5 includes the current flowing through the power line PL3 between the node N3 and the low-voltage transformer T1 in the zero-cross period Dzc, or the smoothing circuit 34 and the node. The current flowing through the power line PL3 between N3 is measured as a generated current value Mig, and current stabilization processing is performed in a period in which the absolute value of the generated current value Mig is greater than a predetermined threshold value.

  In this way, the current stabilization process is efficiently performed by the configuration in which the current stabilization process is performed in the situation where the current pulse is generated and the disturbance of the adjustment of the generated current Ig is likely to occur in the zero-cross period Dzc. Can do.

  Further, since it is possible to avoid performing the current stabilization process in the zero-cross period Dzc during a period where there is no current pulse, it is possible to improve the follow-up of the generated current Ig to the target value I * during the period. Thereby, it is possible to efficiently generate a high-quality generated current Ig.

  In the grid-connected inverter device according to the embodiment of the present invention, the communication unit 3 includes communication start information indicating that low-speed power line communication performed in the power system is started, and low-speed power line performed in the power system. At least one of signal reception information indicating that a signal used for communication has been received is received from the slave communication device 202. When the communication unit 3 receives communication start information or signal reception information from the child communication device 202, the current adjustment unit 5 performs current stabilization processing in the zero cross period Dzc.

  As described above, the current stabilization process is efficiently performed by the configuration in which the current stabilization process is performed in a situation where low-speed power line communication is performed in the power system and there is a high possibility that the adjustment of the generated current Ig due to the current pulse is likely to occur. It can be carried out.

  In addition, since it is possible to avoid performing the current stabilization process during a period when there is no current pulse due to low-speed power line communication, it is possible to improve the follow-up of the generated current Ig to the target value I * during the period. Thereby, it is possible to efficiently generate a high-quality generated current Ig.

  In the grid-connected inverter device according to the embodiment of the present invention, the zero-cross detection unit 71 includes a low-speed power line in the power system by at least one of the slave communication device 202, the master communication device 212, and another communication device. The zero cross timing tz is estimated during the period of communication.

  Thus, instead of detecting the zero-cross timing tz from the system voltage value Mvps having distortion due to low-speed power line communication in the vicinity of the zero-cross timing tz, the zero-cross timing tz is detected from the system voltage value Mvps without distortion by the configuration that estimates the zero-cross timing tz. It is possible to avoid detecting a timing deviating from the zero cross timing tz as the zero cross timing tz.

  In the grid-connected inverter device according to the embodiment of the present invention, the zero cross detection unit 71 detects timings other than the zero cross timing tz, and estimates the zero cross timing tz from the detected timing.

  As described above, the configuration in which the timing other than the zero cross timing tz, which is difficult to correctly detect from the system voltage value Mvps having distortion due to the low speed power line communication, is detected, is not affected by the low speed power line communication. Since the timing can be detected, the estimation accuracy of the zero cross timing tz can be improved.

  In the grid-connected inverter device according to the embodiment of the present invention, the zero-cross detection unit 71 estimates the zero-cross timing tz from one of the timing at which the system voltage value Mvps reaches the maximum value and the timing at which the system voltage value Mvps reaches the minimum value. .

  As described above, the configuration for estimating the zero-cross timing tz from one of the maximum timing and the minimum timing that can be accurately and easily detected increases the estimation accuracy of the zero-cross timing tz with simple processing. Can be improved.

  In the grid-connected inverter device according to the embodiment of the present invention, the disturbance compensation amount calculation unit 72 estimates the system voltage Vps based on the zero cross timing tz estimated by the zero cross detection unit 71. The current adjustment unit 5 adjusts the generated current Ig based on the system voltage Vps estimated by the disturbance compensation amount calculation unit 72 and the deviation e.

  Thus, the configuration in which the generated current Ig is adjusted based on the estimated system voltage Vps and the deviation e instead of the system voltage value Mvps having distortion due to the low-speed power line communication is affected by the low-speed power line communication. Therefore, the generated current Ig can be adjusted appropriately.

  In the grid-connected inverter device according to the embodiment of the present invention, the target current setting unit 7 sets the target value I * based on the zero cross timing tz estimated by the zero cross detection unit 71.

  With such a configuration, an appropriate target value I * can be set based on the estimated zero-cross timing tz instead of the zero-cross timing tz detected from the system voltage value Mvps having distortion due to low-speed power line communication. .

  In the communication device according to the embodiment of the present invention, power line communication unit 81 performs low-speed power line communication with parent communication device 212 and other communication devices in the power system. Before the low-speed power line communication is started, the inter-device communication unit 83 transmits communication start information indicating that the low-speed power line communication is started to the grid interconnection PCS 101 that supplies current to the power system.

  In this way, the system interconnection PCS 101 can recognize the generation of the current pulse in advance by the configuration that notifies the grid connection PCS 101 in advance that low-speed power line communication that generates current pulses is performed. It is possible to start a process for suppressing disturbance in adjustment of the generated current Ig due to the current pulse at an appropriate timing.

  Thereby, since the power generation current Ig can be stably adjusted in the grid connection PCS 101, it is possible to suppress the output of the low-quality power generation current Ig to the power system.

  In the communication device according to the embodiment of the present invention, the inter-device communication unit 83, when the power line communication unit 81 receives a signal used for low-speed power line communication from the parent communication device 212 or another communication device, Signal reception information indicating that the signal has been received is transmitted to the grid interconnection PCS 101.

  As described above, the system interconnection PCS 101 recognizes that the low speed power line communication has started by the configuration in which the system connection PCS 101 is notified that the signal used for the low speed power line communication is received from another communication device. can do.

  In addition, although grid connection PCS101 which concerns on embodiment of this invention was set as the structure provided with the converter part 31 and the capacitor 32, it is not limited to this. The grid interconnection PCS 101 does not include the converter unit 31 and the capacitor 32, but generates a generated current from the power received from the converter device having the converter unit and the capacitor, and outputs the generated current to the power system. Good.

  The above embodiment should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 Control Unit 2 Measuring Unit 3 Communication Unit (Receiving Unit)
4 Zero Cross Period Setting Unit 5 Current Adjustment Unit 6 Disturbance Compensation Unit 7 Target Current Setting Unit 8 Power Line Communication Detection Unit 11 Power Generation Device 12 System Power Supply 14 Solar Cell Module 21 System Voltage Measurement Unit 22 Generated Power Measurement Unit 23 Generated Current Measurement Unit 31 Converter Circuit 32 Capacitor 33 Inverter circuit (current generator)
34 Smoothing circuit 41 Subtractor 42 Deviation correction unit 43 Feedback gain calculation unit 44 Adder 45 General control unit 46 Triangular wave comparison unit 47 Triangular wave generation unit 61 Current pulse detection unit 62 Power line communication determination unit 63 Timer unit 71 Zero cross detection unit 72 Disturbance Compensation amount calculation unit (current adjustment unit)
81 power line communication unit 82 communication control unit 83 inter-device communication unit (transmission unit)
84 Signal processor 85 Short-circuit switch 101 Grid-connected PCS (Grid-connected inverter device)
201 System interconnection system 202 Child communication device 212 Parent communication device C1, C3 Capacitor D1, D2, D3, D4, D5, D6 Diode T1, T2 Low voltage transformer TS1, TS2, TS3, TS4, TS5 Semiconductor switch elements L1, L2, L3, L86 Inductor

Claims (9)

A current generation unit for generating a generated current from the generated power and outputting the generated current to a power system;
A zero-cross detector for detecting a zero-cross timing in which the system voltage in the power system indicates zero volts;
A target current setting unit for setting a target value of the generated current based on the zero cross timing detected by the zero cross detection unit;
A zero-cross period setting unit for setting a zero-cross period based on the zero-cross timing detected by the zero-cross detection unit;
A current adjusting unit for adjusting the generated current based on the system voltage and a difference between the target value and the generated current generated by the current generating unit;
In the zero cross period set by the zero cross period setting unit, the current adjustment unit corrects the difference to a value of the same sign having an absolute value smaller than the difference or zero, and based on the corrected difference and the system voltage There line current stabilization process of adjusting the generated current Te,
The said zero cross period setting part is a grid interconnection inverter apparatus which sets the said zero cross period so that the signal transmission period of the low speed power line communication performed in the said electric power grid | system by other apparatuses may be included . 2. The grid interconnection inverter device according to claim 1, wherein the current adjustment unit performs the current stabilization process in a period in which an absolute value of a current in the power system is greater than a predetermined threshold in the zero cross period. . The grid interconnection inverter device further includes:
At least one of communication start information indicating that low-speed power line communication performed in the power system is started and signal reception information indicating that a signal used for low-speed power line communication performed in the power system is received A receiving unit for receiving from the device of
Wherein the current adjustment section, when the receiver receives the communication start information or the signal receiving information from another apparatus, and the current stabilization treatment in said zero crossing period, according to claim 1 or claim 2 Grid-connected inverter device. The grid connection according to any one of claims 1 to 3 , wherein the zero-cross detection unit estimates the zero-cross timing during a period in which low-speed power line communication is performed in the power system by another device. Inverter device. The grid-connected inverter device according to claim 4 , wherein the zero-cross detection unit detects a timing other than the zero-cross timing, and estimates the zero-cross timing from the detected timing. The grid-connected inverter device according to claim 5 , wherein the zero-cross detection unit estimates the zero-cross timing from one of a timing at which the system voltage reaches a maximum value and a timing at which the system voltage reaches a minimum value. The current adjustment unit is configured to estimate the system voltage, to adjust the generated current based estimated the system voltage, and the difference based on the zero-cross timing that has been estimated by the zero-cross detector, the claims 4 The grid connection inverter apparatus of any one of Claim 6 . The grid connection inverter apparatus according to any one of claims 4 to 7 , wherein the target current setting unit sets the target value based on the zero cross timing estimated by the zero cross detection unit. Generating a generated current from the generated power and outputting the generated current to a power system;
Detecting a zero cross timing in which the system voltage in the power system indicates zero volts;
Setting a target value of the generated current based on the detected zero-cross timing;
Setting a zero-cross period based on the detected zero-cross timing;
Adjusting the generated current based on the system voltage and a difference between the target value and the generated generated current,
In the step of adjusting the generated current, in the set zero cross period, the difference is corrected to a value of the same sign having an absolute value smaller than the difference or zero, and the power generation is performed based on the corrected difference and the system voltage. There line current stabilization process of adjusting the current,
In the step of setting the zero-cross period, the zero-cross period is set so that a signal transmission period of low-speed power line communication performed in the power system by another device is included .

Images