JP6141342B2 - Back junction solar cell - Google Patents

Back junction solar cell Download PDF

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JP6141342B2
JP6141342B2 JP2015021476A JP2015021476A JP6141342B2 JP 6141342 B2 JP6141342 B2 JP 6141342B2 JP 2015021476 A JP2015021476 A JP 2015021476A JP 2015021476 A JP2015021476 A JP 2015021476A JP 6141342 B2 JP6141342 B2 JP 6141342B2
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JP2016143868A (en
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力 森
力 森
渡部　武紀
武紀 渡部
大塚　寛之
寛之 大塚
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Shin Etsu Chemical Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Description

本発明は、裏面接合型太陽電池に関する。   The present invention relates to a back junction solar cell.

裏面接合型太陽電池は、受光面に電極がない構造であるため（例えば、特許文献１を参照）、入射光の損失が低減でき、変換効率の向上が期待されている。   Since the back junction solar cell has a structure without an electrode on the light receiving surface (see, for example, Patent Document 1), the loss of incident light can be reduced, and improvement in conversion efficiency is expected.

このような裏面接合型太陽電池の光電変換特性は、バルク領域内での電子とホールの再結合の影響を受けやすいために、裏面接合型太陽電池では、一般的に、基板の厚さを薄くして変換効率を向上させている。   Since the photoelectric conversion characteristics of such back junction solar cells are easily affected by recombination of electrons and holes in the bulk region, the thickness of the substrate is generally reduced in back junction solar cells. The conversion efficiency is improved.

特開２００８−０６６３１６号公報JP 2008-066316 A

しかしながら、変換効率を向上させるために基板の厚さを薄くすると、基板が割れやすくなるために、製造時の歩留まりが低下するという問題があった。   However, if the thickness of the substrate is reduced in order to improve the conversion efficiency, the substrate is likely to be cracked, so that there is a problem in that the yield during manufacturing decreases.

本発明は、上記問題点に鑑みてなされたものであって、製造時の歩留まりを向上させるとともに、受光面から入射した光のエネルギーの変換効率を向上させることができる裏面接合型太陽電池を提供することを目的とする。   The present invention has been made in view of the above problems, and provides a back junction solar cell that can improve the yield during manufacturing and improve the conversion efficiency of the energy of light incident from the light receiving surface. The purpose is to do.

上記目的を達成するために、本発明は、ｐ型単結晶シリコン基板の非受光面の少なくとも一部にｎ型領域を有する裏面接合型太陽電池であって、前記ｐ型単結晶シリコン基板がガリウムドープされたものであり、前記ｐ型単結晶シリコン基板の厚さが２５０μｍ以上１０００μｍ以下であることを特徴とする裏面接合型太陽電池を提供する。   To achieve the above object, the present invention provides a back junction solar cell having an n-type region in at least a part of a non-light-receiving surface of a p-type single crystal silicon substrate, wherein the p-type single crystal silicon substrate is gallium. Provided is a back junction solar cell which is doped and has a thickness of the p-type single crystal silicon substrate of 250 μm or more and 1000 μm or less.

ｐ型単結晶シリコン基板をガリウムドープされたものとすることで、基板のバルクライフタイムを高くすることができ、それによりバルク領域内での再結合の影響を受けにくくすることができる。そのため、基板を割れにくくするために基板を厚くしても変換効率の低下を抑制することができる。また、ｐ型単結晶シリコン基板の厚さを上記の範囲とすることで、基板の割れ等が発生し難くなり、製造時の歩留まりの低下を抑制しつつ、変換効率を向上させることができる。   By making the p-type single crystal silicon substrate gallium-doped, the bulk lifetime of the substrate can be increased, thereby making it less susceptible to recombination in the bulk region. Therefore, even if the substrate is thickened to make it difficult to break the substrate, it is possible to suppress a decrease in conversion efficiency. In addition, by setting the thickness of the p-type single crystal silicon substrate in the above range, cracks of the substrate are less likely to occur, and conversion efficiency can be improved while suppressing a decrease in yield during manufacturing.

このとき、前記ｐ型単結晶シリコン基板の受光面上にＣＶＤ酸化珪素膜からなるパッシベーション膜が設けられ、前記ｐ型単結晶シリコン基板の前記非受光面上にパッシベーション膜が設けられていないことがコスト面で好ましい。   At this time, a passivation film made of a CVD silicon oxide film is provided on the light-receiving surface of the p-type single crystal silicon substrate, and no passivation film is provided on the non-light-receiving surface of the p-type single crystal silicon substrate. It is preferable in terms of cost.

このように、ｐ型単結晶シリコン基板の前記非受光面上にパッシベーション膜が設けられていないことで、製造コストを削減することができる。また、受光面上のパッシベーション膜に熱酸化膜を用いていないので、受光面近傍のガリウム濃度が薄くなることを防止することができ、変換効率の低下を防止することができる。   Thus, the manufacturing cost can be reduced because the passivation film is not provided on the non-light-receiving surface of the p-type single crystal silicon substrate. Further, since a thermal oxide film is not used for the passivation film on the light receiving surface, it is possible to prevent the gallium concentration in the vicinity of the light receiving surface from being reduced, and to prevent a decrease in conversion efficiency.

このとき、前記ｐ型単結晶シリコン基板の酸素濃度が１×１０１６ａｔｏｍｓ／ｃｍ３以下であり、前記ｐ型単結晶シリコン基板のガリウム濃度が１×１０１６ａｔｏｍｓ／ｃｍ３以下であることが好ましい。 At this time, the oxygen concentration of the p-type single crystal silicon substrate is 1 × 10 16 atoms / cm 3 or less, and the gallium concentration of the p-type single crystal silicon substrate is 1 × 10 16 atoms / cm 3 or less. preferable.

ｐ型単結晶シリコン基板の酸素濃度が上記の範囲であれば、基板のバルクライフタイムをより高くすることができ、ｐ型単結晶シリコン基板を厚くしても変換効率の低下をより効果的に抑制することができる。また、ｐ型単結晶シリコン基板のガリウム濃度が上記の範囲であれば、基板のバルクライフタイムをより高くすることができ、ｐ型単結晶シリコン基板を厚くしても変換効率の低下をより効果的に抑制することができる。   If the oxygen concentration of the p-type single crystal silicon substrate is in the above range, the bulk lifetime of the substrate can be increased, and the conversion efficiency can be more effectively reduced even if the p-type single crystal silicon substrate is thickened. Can be suppressed. Further, if the gallium concentration of the p-type single crystal silicon substrate is in the above range, the bulk lifetime of the substrate can be further increased, and even if the p-type single crystal silicon substrate is thickened, the conversion efficiency is more effectively reduced. Can be suppressed.

このとき、前記ｐ型単結晶シリコン基板の前記非受光面上に、複数の第１フィンガー電極と、複数の第２フィンガー電極とが設けられ、前記ｐ型単結晶シリコン基板の前記非受光面上に、前記複数の第１フィンガー電極のそれぞれを電気的に接続する第１バスバー電極と、前記複数の第２フィンガー電極のそれぞれを電気的に接続する第２バスバー電極とがさらに設けられ、前記第１バスバー電極と前記第２バスバー電極の対が、３対以上設けられていることが好ましい。   At this time, a plurality of first finger electrodes and a plurality of second finger electrodes are provided on the non-light-receiving surface of the p-type single crystal silicon substrate, and on the non-light-receiving surface of the p-type single crystal silicon substrate Further, a first bus bar electrode that electrically connects each of the plurality of first finger electrodes and a second bus bar electrode that electrically connects each of the plurality of second finger electrodes are further provided, It is preferable that three or more pairs of one bus bar electrode and the second bus bar electrode are provided.

このような電極構成であれば、フィンガー電極の抵抗による電力損失を減少させることができ、変換効率をより効率的に向上させることができる。また、ｐ型単結晶シリコン基板の厚さが上記の範囲にあるので、バスバー電極の対の数が増えても、製造時の歩留まりの低下を抑制することができる。   With such an electrode configuration, power loss due to the resistance of the finger electrode can be reduced, and the conversion efficiency can be improved more efficiently. In addition, since the thickness of the p-type single crystal silicon substrate is in the above range, even if the number of bus bar electrode pairs increases, it is possible to suppress a decrease in yield during manufacturing.

以上のように、本発明の裏面接合型太陽電池であれば、製造時の歩留まりを向上させるとともに、変換効率を向上させることができる。   As described above, the back junction solar cell of the present invention can improve the yield during production and improve the conversion efficiency.

本発明の裏面接合型太陽電池の実施態様の一例を示す断面図である。It is sectional drawing which shows an example of the embodiment of the back junction type solar cell of this invention. 本発明の裏面接合型太陽電池のフィンガー電極の配置例を示す図である。It is a figure which shows the example of arrangement | positioning of the finger electrode of the back junction type solar cell of this invention. 本発明の裏面接合型太陽電池のバスバー電極の配置例を示す図である。It is a figure which shows the example of arrangement | positioning of the bus-bar electrode of the back junction type solar cell of this invention. 基板の厚さと、変換効率及び歩留まりの関係を示す図である。It is a figure which shows the relationship between the thickness of a board | substrate, conversion efficiency, and a yield. バスバー電極対の数と、変換効率及び歩留まりとの関係を示す図である。It is a figure which shows the relationship between the number of bus-bar electrode pairs, conversion efficiency, and a yield. 実施例３及び実施例７における外部量子効率の波長特性を示す図である。It is a figure which shows the wavelength characteristic of the external quantum efficiency in Example 3 and Example 7 . 基板中のガリウム濃度と変換効率との関係を示す図である。It is a figure which shows the relationship between the gallium density | concentration in a board | substrate, and conversion efficiency. 基板の両面に熱酸化膜を形成した場合について説明するための図である。It is a figure for demonstrating the case where a thermal oxide film is formed in both surfaces of a board | substrate.

以下、本発明について、実施態様の一例として、図を参照しながら詳細に説明するが、本発明はこれに限定されるものではない。   Hereinafter, the present invention will be described in detail as an example of an embodiment with reference to the drawings, but the present invention is not limited thereto.

前述のように、従来の裏面接合型太陽電池においては、変換効率を向上させるために基板の厚さを薄くすると、割れやすくなるために、製造時の歩留まりが低下するという問題があった。   As described above, in the conventional back junction solar cell, when the thickness of the substrate is reduced in order to improve the conversion efficiency, there is a problem that the yield at the time of manufacture decreases because the substrate is easily broken.

そこで、発明者らは、製造時の歩留まりの低下を抑制しつつ、受光面から入射した光のエネルギーの変換効率を向上させることができる裏面接合型太陽電池について鋭意検討を重ねた。その結果、ｐ型単結晶シリコン基板をガリウムドープされたものとすることにより、基板のバルクライフタイムを高くすることができること、それによりバルク領域内での再結合の影響を受けにくくすることができること、そのため、基板を厚くしても変換効率の低下を抑制することができること、また、ｐ型単結晶シリコン基板の厚さを上記の範囲とすることで、製造時の歩留まりを向上させるとともに、変換効率を向上させることができることを見出し、本発明をなすに至った。   Thus, the inventors have made extensive studies on a back junction solar cell capable of improving the energy conversion efficiency of light incident from the light receiving surface while suppressing a decrease in yield during manufacture. As a result, it is possible to increase the bulk lifetime of the substrate by making the p-type single crystal silicon substrate doped with gallium, thereby making it less susceptible to recombination in the bulk region. Therefore, reduction in conversion efficiency can be suppressed even if the substrate is thickened, and the thickness of the p-type single crystal silicon substrate is within the above range, thereby improving the manufacturing yield and conversion. It has been found that the efficiency can be improved, and the present invention has been made.

以下、図１−３を参照しながら、本発明の裏面接合型太陽電池の一実施形態を説明する。   Hereinafter, an embodiment of the back junction solar cell of the present invention will be described with reference to FIGS.

図１の裏面接合型太陽電池１０は、ガリウムがドーピングされたｐ型単結晶シリコン基板１１と、ｐ型単結晶シリコン基板１１の非受光面１１ｂに設けられたｎ型領域（エミッタ）１３とを有している。ｐ型単結晶シリコン基板１１の厚さは、２５０μｍ以上１０００μｍ以下であり、より好ましくは５００μｍ以上８００μｍ以下である。   1 has a p-type single crystal silicon substrate 11 doped with gallium and an n-type region (emitter) 13 provided on a non-light-receiving surface 11b of the p-type single crystal silicon substrate 11. Have. The thickness of the p-type single crystal silicon substrate 11 is 250 μm or more and 1000 μm or less, more preferably 500 μm or more and 800 μm or less.

裏面接合型太陽電池１０はまた、ｐ型単結晶シリコン基板１１の受光面１１ａに設けられた第１ｐ型領域（ＦＳＦ）１２と、ｐ型単結晶シリコン基板１１の非受光面１１ｂに設けられた第２ｐ型領域（ＢＳＦ）１４と、ｐ型単結晶シリコン基板１１の受光面１１ａ上に設けられたパッシベーション膜１５と、パッシベーション膜１５上に設けられた反射防止膜１６とを有することができる。ここで、パッシベーション膜１５は、例えば、酸化珪素膜とすることができ、反射防止膜１６は、例えば、窒化珪素膜とすることができる。第１ｐ型領域１２及び第２ｐ型領域１４は、ｐ型単結晶シリコン基板１１よりもドーパント濃度が高く、すなわち、低抵抗である。そのため、図１中に示したように、ｐ型単結晶シリコン基板１１はｐ−と表され、第１ｐ型領域１２はｐ＋と表され、第２ｐ型領域１４はｐ＋＋と表されることがある。同様に、ｎ型領域１３はｎ＋と表されることがある。 The back junction solar cell 10 is also provided on the first p-type region (FSF) 12 provided on the light-receiving surface 11 a of the p-type single crystal silicon substrate 11 and on the non-light-receiving surface 11 b of the p-type single crystal silicon substrate 11. A second p-type region (BSF) 14, a passivation film 15 provided on the light-receiving surface 11 a of the p-type single crystal silicon substrate 11, and an antireflection film 16 provided on the passivation film 15 can be included. Here, the passivation film 15 can be a silicon oxide film, for example, and the antireflection film 16 can be a silicon nitride film, for example. The first p-type region 12 and the second p-type region 14 have a higher dopant concentration than the p-type single crystal silicon substrate 11, that is, have a low resistance. Therefore, as shown in FIG. 1, the p-type single crystal silicon substrate 11 may be represented as p − , the first p-type region 12 may be represented as p +, and the second p-type region 14 may be represented as p ++. . Similarly, the n-type region 13 may be represented as n +.

ｐ型単結晶シリコン基板１１をガリウムドープされたものとすることで、基板のバルクライフタイムを高くすることができる。それにより基板のバルク領域内での再結合の影響を受けにくくすることができるので、基板を厚くしても変換効率の低下を抑制することができる。また、ｐ型単結晶シリコン基板１１の厚さを上記の範囲とすることで、製造時の歩留まりを向上させるとともに、変換効率を向上させることができる。すなわち、２５０μｍ以上とすることで、基板強度が向上し、製造時に割れの発生が抑制される。一方、１０００μｍ以下とすることで必要以上に厚くすることによるコスト高を回避することができるとともに、バルク再結合が増加して変換効率が下がることを抑制できる。本発明において、ｐ型単結晶シリコン基板１１をガリウムドープ基板とするが、第１ｐ型領域１２及び第２ｐ型領域１４はボロンを拡散させたものでもよい。この場合、第１ｐ型領域１２及び第２ｐ型領域１４はガリウムとボロンの両ドーパントを含むことになる。   By making the p-type single crystal silicon substrate 11 doped with gallium, the bulk lifetime of the substrate can be increased. As a result, it is possible to make it less susceptible to recombination within the bulk region of the substrate, so that a reduction in conversion efficiency can be suppressed even if the substrate is thickened. Moreover, by making the thickness of the p-type single crystal silicon substrate 11 in the above range, the yield at the time of manufacture can be improved and the conversion efficiency can be improved. That is, by setting it as 250 micrometers or more, board | substrate intensity | strength improves and generation | occurrence | production of a crack is suppressed at the time of manufacture. On the other hand, when the thickness is 1000 μm or less, it is possible to avoid an increase in cost due to an unnecessarily large thickness, and it is possible to suppress a decrease in conversion efficiency due to an increase in bulk recombination. In the present invention, the p-type single crystal silicon substrate 11 is a gallium-doped substrate, but the first p-type region 12 and the second p-type region 14 may be formed by diffusing boron. In this case, the first p-type region 12 and the second p-type region 14 contain both gallium and boron dopants.

この場合、ｐ型単結晶シリコン基板１１の受光面１１ａ上にＣＶＤ酸化珪素膜からなるパッシベーション膜１５が設けられ、ｐ型単結晶シリコン基板１１の非受光面１１ｂ上にパッシベーション膜が設けられていないことが好ましい。   In this case, a passivation film 15 made of a CVD silicon oxide film is provided on the light receiving surface 11 a of the p-type single crystal silicon substrate 11, and no passivation film is provided on the non-light receiving surface 11 b of the p-type single crystal silicon substrate 11. It is preferable.

このように、ｐ型単結晶シリコン基板１１の非受光面１１ｂ上にパッシベーション膜が設けられていないことで、太陽電池の製造工程を簡略化できる。特に、電極とｎ型領域（エミッタ）１３又は第２ｐ型領域（ＢＳＦ）１４との電気的接続のための開孔を行う必要がなくなるので、非受光面１１ｂ上の電極形成工程を簡略化できる場合がある。また、受光面１１ａ上のパッシベーション膜にＣＶＤ酸化膜を用いれば熱酸化膜を用いていないので、受光面１１ａ近傍のガリウム濃度が薄くなることを防止することができ、変換効率の低下を防止することができる。なお、パッシベーション膜に熱酸化膜を用いた場合には、図８に示すように、熱酸化工程において、ガリウムの偏析係数が小さいために熱酸化膜１０４、１０４’側にガリウムが移動してしまい、ｐ型単結晶シリコン基板１０１表面近傍のガリウム濃度が低下すること（ガリウムのデプレッション）が知られている。ここで、図８において、裏面接合型太陽電池１００は、ｐ型単結晶シリコン基板１０１と、ｐ型単結晶シリコン基板１０１の受光面１０１ａ上に設けられた熱酸化膜（パッシベーション膜）１０４と、ｐ型単結晶シリコン基板１０１の非受光面１０１ｂ上に設けられた熱酸化膜（パッシベーション膜）１０４’と、ｐ型単結晶シリコン基板１０１の非受光面１０１ｂに設けられたｎ型領域（エミッタ）１０２及びｐ型領域（ＢＳＦ）１０３とを有している。   Thus, since the passivation film is not provided on the non-light-receiving surface 11b of the p-type single crystal silicon substrate 11, the manufacturing process of the solar cell can be simplified. In particular, since it is not necessary to make an opening for electrical connection between the electrode and the n-type region (emitter) 13 or the second p-type region (BSF) 14, the electrode forming process on the non-light-receiving surface 11b can be simplified. There is a case. Further, if a CVD oxide film is used as the passivation film on the light receiving surface 11a, a thermal oxide film is not used. Therefore, it is possible to prevent the gallium concentration in the vicinity of the light receiving surface 11a from being reduced and to prevent a decrease in conversion efficiency. be able to. When a thermal oxide film is used for the passivation film, as shown in FIG. 8, gallium moves to the thermal oxide films 104 and 104 ′ side in the thermal oxidation process because the segregation coefficient of gallium is small. It is known that the gallium concentration near the surface of the p-type single crystal silicon substrate 101 decreases (gallium depletion). Here, in FIG. 8, the back junction solar cell 100 includes a p-type single crystal silicon substrate 101, a thermal oxide film (passivation film) 104 provided on the light receiving surface 101a of the p-type single crystal silicon substrate 101, A thermal oxide film (passivation film) 104 ′ provided on the non-light-receiving surface 101 b of the p-type single crystal silicon substrate 101 and an n-type region (emitter) provided on the non-light-receiving surface 101 b of the p-type single crystal silicon substrate 101. 102 and a p-type region (BSF) 103.

本発明において、ｐ型単結晶シリコン基板１１の酸素濃度は１×１０１６ａｔｏｍｓ／ｃｍ３以下であり、ｐ型単結晶シリコン基板１１のガリウム濃度は１×１０１６ａｔｏｍｓ／ｃｍ３以下であることが好ましい。 In the present invention, the oxygen concentration of the p-type single crystal silicon substrate 11 is 1 × 10 16 atoms / cm 3 or less, and the gallium concentration of the p-type single crystal silicon substrate 11 is 1 × 10 16 atoms / cm 3 or less. Is preferred.

ｐ型単結晶シリコン基板１１の酸素濃度が上記の範囲であれば、基板のバルクライフタイムをより高くすることができ、ｐ型単結晶シリコン基板１１を厚くしても変換効率の低下をより効果的に抑制することができる。また、ｐ型単結晶シリコン基板１１のガリウム濃度が上記の範囲であれば、基板のバルクライフタイムをより高くすることができ、ｐ型単結晶シリコン基板を厚くしても変換効率の低下をより効果的に抑制することができる。図７に基板中のガリウム濃度と変換効率の関係について、基板の厚さを２５０μｍ、５００μｍ、１０００μｍに変化させたときのグラフを示した。ここで、測定に用いたサンプルは、ガリウム濃度、基板の厚さ以外は、後述する実施例１と同じ条件で作製されたものである。   If the oxygen concentration of the p-type single crystal silicon substrate 11 is in the above range, the bulk lifetime of the substrate can be further increased, and even if the p-type single crystal silicon substrate 11 is thickened, the conversion efficiency is further reduced. Can be suppressed. Further, if the gallium concentration of the p-type single crystal silicon substrate 11 is in the above range, the bulk lifetime of the substrate can be further increased, and the conversion efficiency is further reduced even if the p-type single crystal silicon substrate is thickened. It can be effectively suppressed. FIG. 7 shows a graph of the relationship between the gallium concentration in the substrate and the conversion efficiency when the thickness of the substrate is changed to 250 μm, 500 μm, and 1000 μm. Here, the sample used for the measurement was prepared under the same conditions as in Example 1 described later, except for the gallium concentration and the thickness of the substrate.

裏面接合型太陽電池１０はまた、ｐ型単結晶シリコン基板１１の非受光面１１ｂ上に設けられたｎ型領域１３と電気的に接続された第１フィンガー電極１７、及び、第２ｐ型領域１４と電気的に接続された第２フィンガー電極１８を有することができる。図２は、第１フィンガー電極１７及び第２フィンガー電極１８の配置例を示したものである。図２は、裏面接合型太陽電池１０を非受光面１１ｂ側から見た平面図であり、後述するバスバー電極を省略したものである。図２において、第１フィンガー電極１７及び第２フィンガー電極１８はそれぞれ、一方向に延在するように設けられ、第１フィンガー電極１７と第２フィンガー電極１８とが交互に配列されるように配置されている。第１フィンガー電極１７及び第２フィンガー電極１８上にはそれぞれ、後述するバスバー電極とバスバー電極と反対の極性のフィンガー電極とが電気的に接続されないように、部分的に絶縁膜１９が設けられている。絶縁膜１９は、例えば、ポリイミド膜とすることができる。   The back junction solar cell 10 also includes a first finger electrode 17 and a second p-type region 14 that are electrically connected to an n-type region 13 provided on the non-light-receiving surface 11 b of the p-type single crystal silicon substrate 11. A second finger electrode 18 electrically connected to the second finger electrode 18. FIG. 2 shows an arrangement example of the first finger electrode 17 and the second finger electrode 18. FIG. 2 is a plan view of the back junction solar cell 10 as viewed from the non-light-receiving surface 11b side, and a bus bar electrode described later is omitted. In FIG. 2, the first finger electrodes 17 and the second finger electrodes 18 are provided so as to extend in one direction, and are arranged so that the first finger electrodes 17 and the second finger electrodes 18 are alternately arranged. Has been. An insulating film 19 is partially provided on the first finger electrode 17 and the second finger electrode 18 so that a bus bar electrode, which will be described later, and a finger electrode having a polarity opposite to that of the bus bar electrode are not electrically connected. Yes. The insulating film 19 can be a polyimide film, for example.

図３に示すように、裏面接合型太陽電池１０はまた、ｐ型単結晶シリコン基板１１の非受光面１１ｂ上に設けられた複数の第１フィンガー電極１７のそれぞれを電気的に接続する第１バスバー電極２０、及び、複数の第２フィンガー電極１８のそれぞれを電気的に接続する第２バスバー電極２１を有することができる。図３は、第１バスバー電極２０及び第２バスバー電極２１の配置例を示したものである。図３は、裏面接合型太陽電池１０を非受光面１１ｂ側から見た平面図である。図３において、第１バスバー電極２０及び第２バスバー電極２１はそれぞれ、第１フィンガー電極１７及び第２フィンガー電極１８が延在する方向と垂直な方向に延在するように設けられ、第１バスバー電極２０と第２バスバー電極２１とが交互に配列されるように配置されている。第１フィンガー電極１７及び第２フィンガー電極１８上には、第１フィンガー電極１７と第２バスバー電極２１、及び、第２フィンガー電極１８と第１バスバー電極２０が電気的に絶縁されるように部分的に絶縁膜１９が設けられている。第１バスバー電極２０と第２バスバー電極２１の対が３対以上設けられていることが好ましい。   As shown in FIG. 3, the back junction solar cell 10 also includes a first electrode that electrically connects each of the plurality of first finger electrodes 17 provided on the non-light-receiving surface 11 b of the p-type single crystal silicon substrate 11. The bus bar electrode 20 and the second bus bar electrode 21 that electrically connects each of the plurality of second finger electrodes 18 can be provided. FIG. 3 shows an arrangement example of the first bus bar electrode 20 and the second bus bar electrode 21. FIG. 3 is a plan view of the back junction solar cell 10 viewed from the non-light-receiving surface 11b side. In FIG. 3, the first bus bar electrode 20 and the second bus bar electrode 21 are provided so as to extend in a direction perpendicular to the direction in which the first finger electrode 17 and the second finger electrode 18 extend, respectively. The electrodes 20 and the second bus bar electrodes 21 are arranged so as to be alternately arranged. A portion on the first finger electrode 17 and the second finger electrode 18 so that the first finger electrode 17 and the second bus bar electrode 21 and the second finger electrode 18 and the first bus bar electrode 20 are electrically insulated. Insulating film 19 is provided. It is preferable that three or more pairs of the first bus bar electrode 20 and the second bus bar electrode 21 are provided.

第１バスバー電極２０と前記第２バスバー電極２１の対が３対以上であれば、フィンガー電極の抵抗による電力損失を減少することができ、変換効率を向上させることができる。また、バスバー電極の対の数を増やすと、基板と電極の接触面が増加し、基板と電極の熱収縮の違いによる応力が増加するために、製造時の歩留まりが低下するが、ｐ型単結晶シリコン基板１１の厚さが上記の範囲にあれば、バスバー電極の対の数が増えても、製造時の歩留まりの低下を抑制することができる。   If there are three or more pairs of the first bus bar electrode 20 and the second bus bar electrode 21, power loss due to the resistance of the finger electrodes can be reduced, and conversion efficiency can be improved. Further, when the number of bus bar electrode pairs is increased, the contact surface between the substrate and the electrode is increased, and the stress due to the difference in thermal contraction between the substrate and the electrode is increased. If the thickness of the crystalline silicon substrate 11 is in the above range, even if the number of bus bar electrode pairs increases, it is possible to suppress a decrease in yield during manufacturing.

以下、実施例、比較例を示して本発明をより具体的に説明するが、本発明はこれらに限定されるものではない。   EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to these.

（実施例１）
以下に示す製造方法を用いて、図１に示す裏面接合型太陽電池１０を作製した。 Example 1
The back junction solar cell 10 shown in FIG. 1 was produced using the manufacturing method shown below.

まず、半導体基板として、縦横の長さ１５６ｍｍ×１５６ｍｍ、厚さ２５０μｍ、酸素濃度５×１０１５ａｔｏｍｓ／ｃｍ３、比抵抗３Ω・ｃｍ（ガリウム濃度５×１０１５ａｔｏｍｓ／ｃｍ３）のガリウムドープ｛１００｝ｐ型アズカット単結晶シリコン基板１００枚を準備し、加熱した水酸化カリウム水溶液によりこの基板のダメージ層を除去した。次に、水酸化カリウム・２−プロパノール水溶液中に浸漬し、テクスチャと呼ばれる微細な凹凸の形成を行った。その後、８０℃に保った１％の塩酸と１％の過酸化水素の水溶液中に５分浸漬し、純水で５分リンス後、クリーンオーブンにて乾燥させた。 First, as a semiconductor substrate, gallium-doped {156 mm × 156 mm in length and width, thickness 250 μm, oxygen concentration 5 × 10 15 atoms / cm 3 , specific resistance 3Ω · cm (gallium concentration 5 × 10 15 atoms / cm 3 ) { 100 100 p-type as-cut single crystal silicon substrates were prepared, and the damaged layer of the substrate was removed with a heated aqueous potassium hydroxide solution. Next, it was immersed in an aqueous solution of potassium hydroxide and 2-propanol to form fine irregularities called texture. Then, it was immersed in an aqueous solution of 1% hydrochloric acid and 1% hydrogen peroxide maintained at 80 ° C. for 5 minutes, rinsed with pure water for 5 minutes, and then dried in a clean oven.

次に、乾燥させた基板の非受光面１１ｂに、ｎ型領域（エミッタ）１３と、基板よりもドーパント濃度が高濃度の第２ｐ型領域（ＢＳＦ）１４を形成した。ｎ型領域１３及び第２ｐ型領域１４は交互に帯状に形成し、ｎ型領域１３の幅は３ｍｍ、第２ｐ型領域１４の幅は０．６ｍｍとした。   Next, an n-type region (emitter) 13 and a second p-type region (BSF) 14 having a higher dopant concentration than the substrate were formed on the non-light-receiving surface 11b of the dried substrate. The n-type region 13 and the second p-type region 14 are alternately formed in a strip shape, the width of the n-type region 13 is 3 mm, and the width of the second p-type region 14 is 0.6 mm.

ｎ型領域（エミッタ）１３の形成は以下のようにして行った。
まず、プラズマＣＶＤにより、基板の両面に拡散マスクとして酸化珪素膜を１５０ｎｍ形成し、基板の非受光面１１ｂにリン酸を含有するエッチングペーストを用いて長さ１５０ｍｍ、幅３ｍｍの線を３．６μｍおきに平行に４１本印刷し、加熱処理を行ないエッチングした。その後、加熱処理を施した基板を、洗剤を含んだ超音波水洗で５分間、純水のみの超音波洗浄で５分間、流水洗浄で５分間の順に洗浄し、エッチングペーストの増粘剤などの残渣を除去し、拡散マスクの窓開けを行なった。次に、基板の非受光面１１ｂにリン酸、シリカゲルおよび有機溶媒等を含む拡散ペーストを印刷によって塗布し、基板２枚を受光面１１ａ同士で重ねあわせ状態で、窒素中に酸素を１体積％混合させたガス雰囲気の中に配置し、９００℃で３０分熱処理を行った。続いて、基板の表面に形成されたリンガラスおよび酸化珪素膜をふっ酸で除去した。 The n-type region (emitter) 13 was formed as follows.
First, a silicon oxide film having a thickness of 150 nm is formed as a diffusion mask on both surfaces of the substrate by plasma CVD, and a non-light-receiving surface 11b of the substrate is formed with a 3.6 mm thick line having a length of 150 mm and a width of 3 mm using an etching paste containing phosphoric acid. Every other 41 pieces were printed in parallel, heat-treated and etched. Thereafter, the substrate subjected to the heat treatment is cleaned in order of 5 minutes by ultrasonic cleaning with detergent, 5 minutes by ultrasonic cleaning with pure water, and 5 minutes by running water cleaning. The residue was removed and the diffusion mask window was opened. Next, a diffusion paste containing phosphoric acid, silica gel, an organic solvent, etc. is applied to the non-light-receiving surface 11b of the substrate by printing, and oxygen is contained in 1% by volume of nitrogen in a state where the two substrates are overlapped with each other. It arrange | positioned in the mixed gas atmosphere and heat-processed at 900 degreeC for 30 minutes. Subsequently, the phosphorus glass and silicon oxide film formed on the surface of the substrate were removed with hydrofluoric acid.

第２ｐ型領域（ＢＳＦ）１４の形成は以下のようにして行った。
まず、プラズマＣＶＤにより、ｎ型領域（エミッタ）１３の形成を行った基板の両面に拡散マスクとして酸化珪素膜を１５０ｎｍ形成し、基板の非受光面１１ｂにリン酸を含有するエッチングペーストを用いて長さ１５０ｍｍ、幅０．６ｍｍの線を３．６μｍおきに平行に４２本印刷し、加熱処理を行ないエッチングした。その後、加熱処理を施した基板を、洗剤を含んだ超音波水洗で５分間、純水のみの超音波洗浄で５分間、流水洗浄で５分間の順に洗浄し、エッチングペーストの増粘剤などの残渣を除去し、拡散マスクの窓開けを行なった。次に、基板の非受光面１１ｂにホウ酸、シリカゲルおよび有機溶媒等を含む拡散ペーストを印刷によって塗布し、基板２枚を受光面１１ａ同士で重ねあわせ状態で、窒素中に酸素を１体積％混合させたガス雰囲気の中に配置し、９５０℃で３０分熱処理を行った。続いて、基板の表面に形成されたボロンガラスおよび酸化珪素膜をふっ酸で除去した。 The formation of the second p-type region (BSF) 14 was performed as follows.
First, a silicon oxide film having a thickness of 150 nm is formed as a diffusion mask on both surfaces of the substrate on which the n-type region (emitter) 13 is formed by plasma CVD, and an etching paste containing phosphoric acid is used on the non-light-receiving surface 11b of the substrate. Forty-two lines having a length of 150 mm and a width of 0.6 mm were printed in parallel every 3.6 μm, heat-treated, and etched. Thereafter, the substrate subjected to the heat treatment is cleaned in order of 5 minutes by ultrasonic cleaning with detergent, 5 minutes by ultrasonic cleaning with pure water, and 5 minutes by running water cleaning. The residue was removed and the diffusion mask window was opened. Next, a diffusion paste containing boric acid, silica gel, an organic solvent, and the like is applied to the non-light-receiving surface 11b of the substrate by printing, and oxygen is contained in 1% by volume of nitrogen in a state where the two substrates are overlapped with each other. It arrange | positioned in the mixed gas atmosphere and heat-processed at 950 degreeC for 30 minutes. Subsequently, the boron glass and silicon oxide film formed on the surface of the substrate were removed with hydrofluoric acid.

次に、基板の受光面１１ａに、基板よりも高濃度の第１ｐ型領域（ＦＳＦ）１２を形成した。第１ｐ型領域（ＦＳＦ）１２は基板の受光面１１ａの全面に形成した。   Next, a first p-type region (FSF) 12 having a higher concentration than the substrate was formed on the light receiving surface 11a of the substrate. The first p-type region (FSF) 12 was formed on the entire light receiving surface 11a of the substrate.

第１ｐ型領域（ＦＳＦ）１２の形成は以下のようにして行った。
まず、プラズマＣＶＤにより、ｎ型領域（エミッタ）１３と、第２ｐ型領域（ＢＳＦ）１４とを形成した基板の非受光面１１ｂに全面拡散マスクとして酸化珪素膜を１５０ｎｍ形成した。次に、ホウ酸、シリカゲルおよび有機溶媒等を含む拡散ペーストを基板の受光面１１ａに印刷によって塗布し、基板２枚を非受光面同士で重ねあわせた状態で窒素中に酸素を１体積％混合させたガス雰囲気の中に配置し、９００℃で５分熱処理を行った。続いて、基板の表面に形成されたボロンガラスおよび酸化珪素膜をふっ酸で除去した。その後、８０℃に保った１％の塩酸と１％の過酸化水素の水溶液中に５分浸漬し、純水で５分リンス後、クリーンオーブンにて乾燥させた。 The first p-type region (FSF) 12 was formed as follows.
First, a silicon oxide film having a thickness of 150 nm was formed on the non-light-receiving surface 11b of the substrate on which the n-type region (emitter) 13 and the second p-type region (BSF) 14 were formed by plasma CVD. Next, a diffusion paste containing boric acid, silica gel, an organic solvent, and the like is applied to the light receiving surface 11a of the substrate by printing. The sample was placed in a gas atmosphere and heat-treated at 900 ° C. for 5 minutes. Subsequently, the boron glass and silicon oxide film formed on the surface of the substrate were removed with hydrofluoric acid. Then, it was immersed in an aqueous solution of 1% hydrochloric acid and 1% hydrogen peroxide maintained at 80 ° C. for 5 minutes, rinsed with pure water for 5 minutes, and then dried in a clean oven.

次に、プラズマＣＶＤにより、乾燥させた基板の受光面１１ａ上にパッシベーション膜１５として酸化珪素膜を２０ｎｍ形成した。引き続き、酸化珪素膜上に、反射防止膜１６として膜厚８０ｎｍ、屈折率２．０の窒化珪素膜を成膜した。窒化珪素膜の成膜にもプラズマＣＶＤを用い、反応ガスとしてはモノシランとアンモニアとの混合ガスを用いた。   Next, a 20 nm thick silicon oxide film was formed as a passivation film 15 on the light-receiving surface 11a of the dried substrate by plasma CVD. Subsequently, a silicon nitride film having a thickness of 80 nm and a refractive index of 2.0 was formed as an antireflection film 16 on the silicon oxide film. Plasma CVD was also used to form the silicon nitride film, and a mixed gas of monosilane and ammonia was used as the reaction gas.

次に、基板の非受光面１１ｂにライン状の平行なパターンで銀ペーストをスクリーン印刷し、乾燥した。この銀ペーストは、粒径が数ｎｍ〜数十ｎｍの銀微粒子を有機溶媒中に分散させたものである。引き続き、８００℃の空気雰囲気下で１０秒程度熱処理し、銀を焼結させ、ｎ型領域（エミッタ）１３に電気的に接続される第１フィンガー電極１７、及び、第２ｐ型領域（ＢＳＦ）１４に電気的に接続される第２フィンガー電極１８を形成した。   Next, a silver paste was screen-printed in a line-like parallel pattern on the non-light-receiving surface 11b of the substrate and dried. This silver paste is obtained by dispersing silver fine particles having a particle size of several nm to several tens of nm in an organic solvent. Subsequently, heat treatment is performed in an air atmosphere at 800 ° C. for about 10 seconds, silver is sintered, and the first finger electrode 17 electrically connected to the n-type region (emitter) 13 and the second p-type region (BSF) The 2nd finger electrode 18 electrically connected to 14 was formed.

第１バスバー電極２０及び第２バスバー電極２１の対（バスバー電極対）を形成するために、図２に示すようにバスバー電極と反対極性のフィンガー電極とが交差する箇所に、絶縁膜１９としてポリイミドをスクリーン印刷により形成し、３００℃の空気雰囲気下で５分程度熱処理し、乾燥させた。その後、図３に示すように絶縁膜１９が形成された第１フィンガー電極１７及び第２フィンガー電極１８上に３対のバスバー電極を銀ペーストを用いてライン状にスクリーン印刷し、３００℃の空気雰囲気下で１０分程度熱処理し、乾燥させ、１００枚の太陽電池セルを完成させた。   In order to form a pair of first bus bar electrode 20 and second bus bar electrode 21 (a bus bar electrode pair), polyimide is used as an insulating film 19 at a location where the bus bar electrode and the finger electrode having the opposite polarity intersect as shown in FIG. Was formed by screen printing, heat-treated in an air atmosphere at 300 ° C. for about 5 minutes, and dried. Thereafter, as shown in FIG. 3, three pairs of bus bar electrodes are screen-printed in a line using silver paste on the first finger electrode 17 and the second finger electrode 18 on which the insulating film 19 is formed, and air at 300 ° C. Heat treatment was performed for about 10 minutes in an atmosphere, followed by drying to complete 100 solar cells.

（実施例２）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは５００μｍとした。 (Example 2)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 500 μm.

（実施例３）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは８００μｍとした。 (Example 3)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 800 μm.

（実施例４）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは１０００μｍとした。 Example 4
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 1000 μm.

（実施例５）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、バスバー電極は４対とした。 (Example 5)
In the same manner as in Example 1, 100 solar cells were produced. However, four pairs of bus bar electrodes were used.

（比較例１）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは２００μｍとした。 (Comparative Example 1)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 200 μm.

（比較例２）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは１２００μｍとした。 (Comparative Example 2)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 1200 μm.

（比較例３）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは２００μｍとし、半導体基板としてボロンドープ基板を用いた。 (Comparative Example 3)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 200 μm, and a boron-doped substrate was used as the semiconductor substrate.

（比較例４）
比較例３と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは２５０μｍとした。 (Comparative Example 4)
In the same manner as in Comparative Example 3, 100 solar cells were produced. However, the thickness of the substrate was 250 μm.

（比較例５）
比較例３と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは５００μｍとした。 (Comparative Example 5)
In the same manner as in Comparative Example 3, 100 solar cells were produced. However, the thickness of the substrate was 500 μm.

（比較例６）
比較例３と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは８００μｍとした。 (Comparative Example 6)
In the same manner as in Comparative Example 3, 100 solar cells were produced. However, the thickness of the substrate was 800 μm.

（比較例７）
比較例３と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは１０００μｍとした。 (Comparative Example 7)
In the same manner as in Comparative Example 3, 100 solar cells were produced. However, the thickness of the substrate was 1000 μm.

（実施例６）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、バスバー電極は２対とした。 (Example 6)
In the same manner as in Example 1, 100 solar cells were produced. However, two pairs of bus bar electrodes were used.

（比較例８）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは２００μｍとし、バスバー電極は２対とした。 (Comparative Example 8)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 200 μm, and the bus bar electrodes were two pairs.

（比較例９）
実施例１と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の厚さは２００μｍとし、バスバー電極は４対とした。 (Comparative Example 9)
In the same manner as in Example 1, 100 solar cells were produced. However, the thickness of the substrate was 200 μm, and the bus bar electrodes were 4 pairs.

（実施例７）
実施例３と同様にして、１００枚の太陽電池セルを作製した。ただし、基板の両面にパッシベーション膜として熱酸化により酸化珪素膜を２０ｎｍ形成した。 (Example 7)
In the same manner as in Example 3, 100 solar cells were produced. However, a silicon oxide film having a thickness of 20 nm was formed on both surfaces of the substrate by thermal oxidation as a passivation film.

（太陽電池特性の評価）
以上のようにして作製した実施例１−７、比較例１−９の太陽電池セルについて、山下電装社製ソーラーシミュレータを用いてＡＭ１．５スペクトル、照射強度１００ｍＷ／ｃｍ２、２５℃の条件下で、太陽電池特性（短絡電流、開放電圧、形状因子変換効率）を測定した。ここで、短絡電流は、太陽電池に接続される抵抗器の抵抗が０Ωの時の電流値であり、開放電圧は、太陽電池に接続される抵抗器の抵抗が非常に大きい時の電圧値であり、形状因子（フィルファクター）は、最大発電電力／（短絡電流×開放電圧）×１００であり、変換効率は、（太陽電池からの出力／太陽電池に入った太陽エネルギー）×１００である。 (Evaluation of solar cell characteristics)
About the solar cell of Example 1-7 produced as mentioned above and Comparative Example 1-9, conditions using AM1.5 spectrum, irradiation intensity of 100 mW / cm 2 and 25 ° C. using a solar simulator manufactured by Yamashita Denso Co., Ltd. The solar cell characteristics (short circuit current, open circuit voltage, form factor conversion efficiency) were measured. Here, the short circuit current is the current value when the resistance of the resistor connected to the solar cell is 0Ω, and the open circuit voltage is the voltage value when the resistance of the resistor connected to the solar cell is very large. Yes, the form factor (fill factor) is maximum generated power / (short circuit current × open circuit voltage) × 100, and the conversion efficiency is (output from the solar cell / solar energy entering the solar cell) × 100.

（歩留まりの評価）
また、実施例１−７、比較例１−９の太陽電池セルについて、割れずにセル化された基板枚数をセル作製工程に投入したアズスライス基板枚数（１００枚）で除した数を歩留まり（％）とした。 (Evaluation of yield)
Moreover, about the photovoltaic cell of Example 1-7 and Comparative Example 1-9, the yield (the number obtained by dividing the number of substrates formed into cells without cracking by the number of as-sliced substrates (100) input into the cell manufacturing process) %).

上記のようにして得られた太陽電池特性の平均値と歩留まりを表１に示す。また、図４に変換効率及び歩留まりと基板の厚さとの関係を示し、図５に変換効率及び歩留まりとバスバー電極対の数との関係を示す。なお、図５において、基板はガリウムドープ基板である。   Table 1 shows the average value and yield of the solar cell characteristics obtained as described above. FIG. 4 shows the relationship between the conversion efficiency and yield and the substrate thickness, and FIG. 5 shows the relationship between the conversion efficiency and yield and the number of bus bar electrode pairs. In FIG. 5, the substrate is a gallium doped substrate.

Figure 0006141342
Figure 0006141342

図４は、実施例１−４、比較例１−７における基板の厚さと変換効率の関係、及び、基板の厚さと歩留まりの関係をプロットしたものである。比較例１のようにガリウムドープ基板の厚さが２００μｍであると、歩留まりが大きく低下してしまうが（図４を参照）、ガリウムドープ基板の厚さを２５０μｍ以上とすることで大幅に改善することができた（実施例１−４、比較例２、図４を参照）。このとき、比較例３−７のようにボロンドープ基板を用いると、基板の厚さの増加による変換効率の低下が顕著であるが（図４を参照）、実施例１−４のようにガリウムドープ基板を用いると高い変換効率を維持できる（図４を参照）。しかしながら、比較例２のように基板の厚さが１２００μｍとなると、変換効率の低下を抑制することができない（図４を参照）。   FIG. 4 is a plot of the relationship between substrate thickness and conversion efficiency and the relationship between substrate thickness and yield in Examples 1-4 and Comparative Examples 1-7. When the thickness of the gallium-doped substrate is 200 μm as in Comparative Example 1, the yield is greatly reduced (see FIG. 4), but the thickness is significantly improved by setting the thickness of the gallium-doped substrate to 250 μm or more. (See Example 1-4, Comparative Example 2, and FIG. 4). At this time, when a boron-doped substrate is used as in Comparative Example 3-7, a decrease in conversion efficiency due to an increase in the thickness of the substrate is significant (see FIG. 4), but gallium-doped as in Example 1-4. When the substrate is used, high conversion efficiency can be maintained (see FIG. 4). However, when the thickness of the substrate is 1200 μm as in Comparative Example 2, a decrease in conversion efficiency cannot be suppressed (see FIG. 4).

図５は、実施例１、５−６、比較例１、８−９におけるバスバー電極対の数と変換効率の関係、及び、バスバー電極対の数と歩留まりの関係をプロットしたものである。図５からわかるように、バスバー電極の対の数が３対以上であれば、ガリウムドープ基板の厚さが２５０μｍである場合に、製造時の歩留まり低下を抑制しつつ、変換効率を向上させることができる。   FIG. 5 is a plot of the relationship between the number of bus bar electrode pairs and conversion efficiency and the relationship between the number of bus bar electrode pairs and yield in Examples 1 and 5-6 and Comparative Examples 1 and 8-9. As can be seen from FIG. 5, if the number of bus bar electrode pairs is 3 or more, the conversion efficiency can be improved while suppressing the yield reduction during manufacturing when the thickness of the gallium doped substrate is 250 μm. Can do.

実施例７のように基板の両面に熱酸化によりパッシベーションを形成した場合（図８を参照）と比べ、実施例３では基板の受光面のみにプラズマＣＶＤによりパッシベーションを形成しているため、ガリウムのデプレッションを抑制することができ、図６に示すように長波長光（波長が９００ｎｍ〜１１００ｎｍ程度の光）の電流ロスを少なくすることができ、変換効率を改善することができる。図６は、実施例３、７において、太陽電池の受光面に入射する光の波長と、外部量子効率との関係を測定することにより得られたものである。ここで、図６において、外部量子効率は、「毎秒発生した電子数／毎秒吸収された光子数」で定義されるものである。   Compared to the case where passivation is formed on both surfaces of the substrate as in Example 7 (see FIG. 8), in Example 3, the passivation is formed only on the light-receiving surface of the substrate by plasma CVD. Depletion can be suppressed, current loss of long wavelength light (light having a wavelength of about 900 nm to 1100 nm) can be reduced as shown in FIG. 6, and conversion efficiency can be improved. FIG. 6 is obtained by measuring the relationship between the wavelength of light incident on the light receiving surface of the solar cell and the external quantum efficiency in Examples 3 and 7. Here, in FIG. 6, the external quantum efficiency is defined as “number of electrons generated per second / number of photons absorbed per second”.

なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は、例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。   The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

１０…裏面接合型太陽電池、 １１…ｐ型単結晶シリコン基板、 １１ａ…受光面、
１１ｂ…非受光面、 １２…第１ｐ型領域（ＦＳＦ）、
１３…ｎ型領域（エミッタ）、 １４…第２ｐ型領域（ＢＳＦ）、
１５…パッシベーション膜、 １６…反射防止膜、 １７…第１フィンガー電極、
１８…第２フィンガー電極、 １９…絶縁膜、 ２０…第１バスバー電極、
２１…第２バスバー電極、
１００…裏面接合型太陽電池、 １０１…ｐ型単結晶シリコン基板、
１０１ａ…受光面、 １０１ｂ…非受光面、 １０２…ｎ型領域（エミッタ）、
１０３…ｐ型領域（ＢＳＦ）、
１０４、１０４’…熱酸化膜（パッシベーション膜）。 10 ... back junction solar cell, 11 ... p-type single crystal silicon substrate, 11a ... light receiving surface,
11b ... non-light-receiving surface, 12 ... first p-type region (FSF),
13 ... n-type region (emitter), 14 ... second p-type region (BSF),
15 ... Passivation film, 16 ... Antireflection film, 17 ... First finger electrode,
18 ... second finger electrode, 19 ... insulating film, 20 ... first bus bar electrode,
21 ... second bus bar electrode,
100 ... back junction solar cell, 101 ... p-type single crystal silicon substrate,
101a ... light-receiving surface, 101b ... non-light-receiving surface, 102 ... n-type region (emitter),
103 ... p-type region (BSF),
104, 104 ′... Thermal oxide film (passivation film).

Claims (1)

ｐ型単結晶シリコン基板の非受光面の少なくとも一部にｎ型領域を有する裏面接合型太陽電池であって、
前記ｐ型単結晶シリコン基板がガリウムドープされたものであり、
前記ｐ型単結晶シリコン基板の厚さが５００μｍ以上１０００μｍ以下であり、
前記ｐ型単結晶シリコン基板の平坦な非受光面上に前記ｎ型領域に電気的に接続された電極が設けられており、
前記ｐ型単結晶シリコン基板の受光面上にＣＶＤ酸化珪素膜からなるパッシベーション膜が設けられ、
前記ｐ型単結晶シリコン基板の前記非受光面上にパッシベーション膜が設けられておらず、
前記ｐ型単結晶シリコン基板の酸素濃度が１×１０ １６ ａｔｏｍｓ／ｃｍ ３ 以下であり、
前記ｐ型単結晶シリコン基板のガリウム濃度が１×１０ １６ ａｔｏｍｓ／ｃｍ ３ 以下であり、
前記ｐ型単結晶シリコン基板の前記非受光面上に、複数の第１フィンガー電極と、複数の第２フィンガー電極とが設けられ、
前記ｐ型単結晶シリコン基板の前記非受光面上に、前記複数の第１フィンガー電極のそれぞれを電気的に接続する第１バスバー電極と、前記複数の第２フィンガー電極のそれぞれを電気的に接続する第２バスバー電極とがさらに設けられ、
前記第１バスバー電極と前記第２バスバー電極の対が、３対以上設けられていることを特徴とする裏面接合型太陽電池。 A back junction solar cell having an n-type region in at least a part of a non-light-receiving surface of a p-type single crystal silicon substrate,
The p-type single crystal silicon substrate is doped with gallium;
The p-type single crystal silicon substrate has a thickness of 500 μm or more and 1000 μm or less,
An electrode electrically connected to the n-type region is provided on a flat non-light-receiving surface of the p-type single crystal silicon substrate ;
A passivation film made of a CVD silicon oxide film is provided on the light-receiving surface of the p-type single crystal silicon substrate;
No passivation film is provided on the non-light-receiving surface of the p-type single crystal silicon substrate,
The oxygen concentration of the p-type single crystal silicon substrate is 1 × 10 16 atoms / cm 3 or less,
The p-type single crystal silicon substrate has a gallium concentration of 1 × 10 16 atoms / cm 3 or less,
A plurality of first finger electrodes and a plurality of second finger electrodes are provided on the non-light-receiving surface of the p-type single crystal silicon substrate,
A first bus bar electrode that electrically connects each of the plurality of first finger electrodes and each of the plurality of second finger electrodes are electrically connected to the non-light-receiving surface of the p-type single crystal silicon substrate. A second bus bar electrode is provided,
3 or more pairs of said 1st bus-bar electrode and said 2nd bus-bar electrode are provided, The back junction type solar cell characterized by the above-mentioned .
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