JP6140989B2 - Multilayer substrate, circuit board, information processing device, sensor device, and communication device - Google Patents

Description

  The present invention relates to a multilayer board, a circuit board, an information processing apparatus, a sensor apparatus, and a communication apparatus that transmit a high-frequency signal.

A printed circuit board has a large number of surface mount components and penetration mount components mounted on a multilayer substrate.
The multilayer substrate is formed of a dielectric layer in which a resin is infiltrated into glass fibers and a conductor layer having a pattern that leaves only a necessary shape for a thin copper foil.
In recent multilayer boards, in order to stabilize power feeding and signal transmission, the power supply and ground (hereinafter abbreviated as GND) are generally solid (formed on one side) instead of wiring.

After all the pins of the through-mounting component are inserted into the through holes, the through holes and the pins are soldered.
At this time, in the power supply pin and the GND pin, the through hole is connected to the solid conductor, and the heat capacity of the conductor of the multilayer board is large when soldering, and the temperature of the through hole does not rise sufficiently. There is a problem that improper attachment occurs.

  For this reason, in general multi-layer boards, through-hole land antipads designed in a circular shape (ring shape after drilling) are used as signals, and radial thermal rings are used as through-holes in power supplies and GND. By sandwiching and connecting with the solid, the heat does not easily escape to the solid and the temperature of the through hole is easily increased.

  However, even in this measure, a multilayer substrate having a large circuit scale and a large number of signal wirings and power planes in the substrate is provided with a plurality of GND solid layers, or even with a non-GND layer, a GND solid shape is partially provided. Therefore, even if the lands are formed in a radial shape, the number of solid layers to be connected increases, the heat capacity increases, and there is a problem that the possibility of poor soldering increases.

  For this reason, in applications where high connection reliability is required, an upper limit may be set on the number of GND solid layers connected to the through hole into which the GND pin is inserted, regardless of the number of GND solid layers of the multilayer board.

When such a connector component having a plurality of signal pins and GND pins is mounted on a multilayer board, it is randomly set to which layer GND each of the plurality of GND pins is connected.
The following patent documents are given as prior art documents related to the background art.

JP 2000-349192 A JP 2003-204209 A JP 2005-108893 A JP 2009-21511 A JP 2004-241680 A

Since the conventional multilayer substrate is configured as described above, if an upper limit is set for the number of layers of the GND plane to which the through hole for inserting the GND pin is connected, a GND plane in which the GND pin is not connected is generated at that position. .
When the GND pin is adjacent to the signal pin, there is a case where the GND solid which is the reference of the signal wiring to which the signal pin is connected is not connected to the GND pin adjacent to the signal pin.

In this case, the path of the feedback current flowing through the GND facing the signal current is discontinuous.
Alternatively, there is a problem that it becomes difficult to transmit a high-frequency signal because the path of the feedback current becomes a detour through another GND through hole and another GND solid layer.

In the case of a differential signal, there are a positive phase signal pin, a negative phase signal pin, and a GND pin in the vicinity thereof, but the feedback current path for the positive phase signal and the feedback current path for the negative phase signal are not targeted. Part of the signal is mode-converted and common noise is generated.
Or, conversely, even if a part of the common noise is converted into differential and the differential signal is inherently highly resistant to the common noise, there is a problem that the differential signal is deteriorated due to the common noise.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a multilayer board, a circuit board, an information processing apparatus, a sensor apparatus, and a communication apparatus that avoid deterioration of transmission characteristics of high-frequency signals. And

When the number of ground planes to which one ground through hole can be connected is limited to be less than the number of all ground planes, the multilayer substrate of the present invention has one or more adjacent ones. The signal through-hole for ground is connected to the nearest ground plane on the upper and lower surfaces of the signal wiring, and two or more signal through-holes are provided, and the signal wiring is connected to each of the two or more signal through-holes. Are connected to two or more layers, and the number of ground planes to which one ground through hole can be connected is limited to less than twice the number of layers to which signal wiring is routed. At least one of the ground planes facing each other on the upper and lower surfaces of the wiring is common and adjacent to different signal through holes. This more through holes for grounding is connected to the common ground solid are connected to respective ground solid which faces the last of the upper and lower surfaces across a common ground solid.

According to the present invention, when the number of ground planes to which one ground through hole can be connected is limited to be smaller than the number of all ground planes, one or more grounds adjacent to the signal through hole are provided. The through-holes for use are connected to the ground planes that face each other on the upper and lower surfaces of the signal wiring.
Therefore, there is no effect of returning the feedback current between the signal wiring and the through pin, and there is an effect that it is possible to avoid the deterioration of the transmission characteristic of the high frequency signal.

It is a conductor three-dimensional view which shows an example of the multilayer substrate for demonstrating the objective of this invention. It is a conductor pattern figure of each layer of FIG. It is a conductor three-dimensional view which shows the other example of the multilayer substrate for demonstrating the objective of this invention. It is a conductor pattern figure of each layer of FIG. It is a conductor three-dimensional view which shows the multilayer substrate by Embodiment 1 of this invention. It is a conductor pattern figure of each layer of FIG. It is a conductor three-dimensional view which shows the multilayer substrate by Embodiment 2 of this invention. It is a conductor pattern figure of each layer of FIG.

Embodiment 1 FIG.
FIG. 1 is a three-dimensional conductor diagram illustrating an example of a multilayer substrate for explaining the object of the present invention, and FIG. 2 is a conductor pattern diagram of each layer of FIG.
1 and 2, the multilayer substrate 1 is composed of 12 conductor layers, and includes two signal pins and surrounding GND pins among through holes for inserting a multi-pin connector (not shown) arranged in a staggered pattern. A range including through holes into which a total of seven pins (not shown) are inserted is shown.

1 and 2, reference numerals 101 to 112 denote a first layer to a twelfth layer, respectively.
Reference numeral 10 denotes a signal through hole. Of the two adjacent signal through holes for differential signals, 11 is a through-hole for inserting a positive phase signal pin, and 12 is a through hole for inserting a negative phase signal pin.
Reference numeral 20 denotes a GND through hole, and among the five GND through holes, reference numerals 21 to 25 denote individual GND pin insertion through holes arranged in order from the left.

Reference numeral 30 (shaded area) denotes a GND solid in which a GND pattern is formed on one surface.
Reference numeral 40 denotes a ring-shaped land provided in the signal through-hole in each layer, and reference numeral 50 denotes a ring-shaped land of the GND through-hole.
Reference numeral 60 denotes a GND through-hole land integrated with the GND plane 30, 70 denotes an antipad for preventing the ring-shaped land 40 provided in the GND plane 30 from being connected to the GND plane 30, 80 denotes a signal wiring, and 81 is a positive-phase signal wiring, and 82 is a negative-phase signal wiring.

In the multilayer substrate 1 shown in this example, the positive phase signal and the negative phase signal form a differential signal pair, and the connector pin assignment is such that these two signal pins are adjacent to each other and surround the two. This corresponds to the case where the pin is GND.
The multilayer substrate 1 has a layer configuration in which the second layer 102, the fourth layer 104, the sixth layer 106, the seventh layer 107, the ninth layer 109, and the eleventh layer 111 are GND solids, and the other layers are power sources. Wiring (not shown) and signal wiring are formed.

The connector is mounted on the first layer 101 side.
In the multilayer substrate 1 having such a configuration, the six layers with GND solids have the same conductor pattern within the illustrated range.
This other layer has no solid GND, and the conductor pattern is only the land provided in each through hole.
However, positive (reverse) phase signal wirings 81 and 82 are connected to the third layer 103 in the through holes 11 and 12 for inserting normal (reverse) phase signal pins, respectively.

  The GND through-hole land 60 in the GND solid 30 is generally provided with a thermal ring as described above, and the lands are radial instead of ring-shaped. For this reason, the land shape remains in a ring shape.

In this case, the signal current flows from the connector pin (not shown) through the positive (reverse) phase signal pin insertion through holes 11 and 12 to the positive (reverse) phase signal wirings 81 and 82.
On the other hand, the feedback current in the direction opposite to the signal current is the positive current in the GND planes of the second layer 102 and the fourth layer 104 that are directly opposite to the upper and lower surfaces of the positive (reverse) phase signal wirings 81 and 82, respectively. Most of the current flows in the path closest to the (reverse) phase signal wirings 81, 82, and flows from the GND pin insertion through hole to the connector GND via the GND through hole land 60.

At this time, the signal current path and the GND current path are the shortest paths.
In such a case, the transmission characteristic of the high frequency signal from the connector pin to the normal (reverse) phase signal wirings 81 and 82 is improved.

As described above, after all the connector pins are inserted into the through-holes 11 and 12 for inserting the positive (reverse) phase signal pins and the through-holes 21 to 25 for inserting the GND pins, the through-holes and the pins are soldered.
At this time, in the GND pin, the GND pin insertion through holes 21 to 25 are connected to a large number of GND planes, and the heat capacity of the large number of GND planes of the multi-layer substrate 1 is large when soldering. There is a problem in that the temperature of the holes 21 to 25 does not rise sufficiently and a soldering failure of the GND pin occurs.
For this reason, in applications where high connection reliability is required, the number of GND solid layers that can be connected to one GND pin insertion through hole may be limited to be less than the number of all GND solid layers.

3 and 4 are diagrams showing a case where the number of GND solid layers connectable to the GND pin insertion through holes 21 to 25 is limited to three.
The first layer 101, the third layer 103, the fifth layer 105, the eighth layer 108, the tenth layer 110, and the twelfth layer 112 are the same as those in FIGS.

Among the GND planes of the second layer 102 and the fourth layer 104 facing the upper and lower surfaces of the positive-phase signal wiring 81 in the immediate vicinity, only the GND plane of the second layer 102 is the GND pin insertion through-holes 21, 22. Connected to.
The GND pin insertion through hole 23 is not connected to any layer.
For this reason, the feedback current of the fourth layer 104 out of the feedback current flowing through the GND facing the positive phase signal wiring 81 passes through the GND pin insertion through holes 21 to 23 close to the positive phase signal pin insertion through hole 11. There is no flowing path.

  In the actual multilayer substrate 1, there are other small-diameter through-holes that share all GND solids outside the illustrated range, and through the closest small-diameter through-holes, the GND pin insertion through-holes 21 to 23 are connected. The feedback current of the fourth layer 104 flows through the GND pin insertion through holes 21 to 23 through the other GND solid layer.

For the negative-phase signal wiring 82, only the GND plane of the fourth layer 104 among the GND planes of the second layer 102 and the fourth layer 104 facing each other on the upper and lower surfaces is the GND pin insertion. The through holes 24 and 25 are connected.
The GND pin insertion through hole 23 is not connected to any layer.
Therefore, the feedback current of the second layer 102 out of the feedback current that flows through the GND in opposition to the negative-phase signal wiring 82 goes around as well as the feedback current of the fourth layer for the positive-phase signal.
Due to these factors, the transmission characteristics of high-frequency signals in the two signal paths are greatly degraded.

Furthermore, since the surrounding GND path for the positive phase signal path and the surrounding GND path for the negative phase signal path are not symmetrical in shape, a part of the electric energy of the differential signal is converted into common electric energy. As a result, common noise is given to the substrate and the system.
Conversely, when common noise comes to the part shown in the figure, a part of it is converted into differential electrical energy to become differential noise, and even differential signals that are not naturally affected by common noise are different due to common noise. The dynamic waveform is disturbed.
As described above, in the multilayer substrate 1 in which the number of GND solids to which the GND pin insertion through holes 21 to 25 can be connected is limited, there is an adverse effect such as deterioration of high-frequency signal transmission characteristics, generation of common noise, and superposition of differential noise. Occurs.

5 is a conductor three-dimensional view showing the multilayer substrate according to Embodiment 1 of the present invention, and FIG. 6 is a conductor pattern diagram of each layer of FIG.
5 and 6, the first layer 101, the third layer 103, the fifth layer 105, the eighth layer 108, the tenth layer 110, and the twelfth layer 112 are the same as those in FIGS.
The GND pin insertion through holes 21 to 25 are connected to the GND layers of the second layer 102 and the fourth layer 104 among the six GND layers.
Another remaining connection layer is arbitrarily selected from the sixth layer 106, the seventh layer 107, the ninth layer 109, and the eleventh layer 111 for each of the GND pin insertion through holes 21 to 25. I do not care.

With this structure, the path of the feedback current flowing through the GND planes of the second layer 102 and the fourth layer 104 opposite to the signal current flowing through the two positive (reverse) phase signal wirings 81 and 82 is positive. Most of the current flows in the path closest to the (reverse) phase signal wirings 81 and 82, and flows from the GND pin insertion through holes 21 to 25 to the connector GND via the GND through hole land 60.
At this time, the signal current path and the GND current path are the shortest paths.

Thereby, there is no detour of the feedback current between the normal (reverse) phase signal wirings 81 and 82 and the connector pin, and deterioration of the transmission characteristic of the high frequency signal can be avoided.
In addition, since the symmetry of the GND path around the normal phase and the reverse phase is maintained, the occurrence of common noise due to mode conversion can be prevented.
In particular, as shown in the GND planes of the second layer 102 and the fourth layer 104 in FIG. 6, the shape of the signal through hole, the shape of the GND through hole, the shape of the ground plane, and the connection state are two positive ( On the contrary, the generation of common noise can be particularly prevented because the phase signal wirings 81 and 82 are electromagnetically symmetrical.
Furthermore, the occurrence of differential noise due to common noise can be prevented, and the original noise resistance performance of differential signals can be maintained.

In the first embodiment, the signal type is a differential signal, but it may be a single-phase signal.
That is, at least one GND pin insertion through hole is adjacent to one signal pin insertion through hole, and these GND pin insertion through holes are formed on the upper and lower surfaces of the signal wiring. If each is connected to the GND plane that is closest to each other, it is possible to prevent transmission characteristic deterioration of the high-frequency signal.
However, in this case, since it is not a differential signal, it does not have resistance against common noise.

As described above, according to the first embodiment, when the number of GND solid layers to which the GND pin insertion through hole 23 can be connected is limited to be smaller than the number of all GND solid layers, the signal pin insertion through A through pin 23 for inserting a GND pin adjacent to the holes 11 and 12 is connected to the GND planes of the second layer 102 and the fourth layer 104 that are directly opposite to the upper and lower surfaces of the normal (reverse) phase signal wirings 81 and 82, respectively. It was made to be.
Therefore, there is no return circuit of the feedback current between the positive (reverse) phase signal wirings 81 and 82 and the through pin, and deterioration of the transmission characteristic of the high frequency signal can be avoided.
In addition, the occurrence of common noise due to mode conversion can be prevented.

Embodiment 2. FIG.
In the first embodiment, an example in which there is one pair of differential signals and the number of GND solid layers to which the surrounding GND pin insertion through-holes can be connected is limited to three.
On the other hand, when there are a plurality of signal pins (pairs) and the arrangement of the signal pins is different from the arrangement of the wiring connection destinations, the order of the wiring can be changed smoothly by changing the wiring layer drawn from the pins.

However, in such a case, if two pairs of signals are wired to the third layer 103 and the eighth layer 108 for each pair and the method of the first embodiment is used, a common GND pin insertion through hole is connected. There are four solid GND layers, the second layer 102, the fourth layer 104, the seventh layer 107, and the ninth layer 109, and the connection number limit 3 is exceeded.
In other words, if there are common GND pins for different signals (pairs) and the number of GND solids to which the GND pins can be connected is less than twice the number of signals (pairs) adjacent to the GND pins, The form of form 1 alone is not necessarily all-purpose.

The second embodiment is for such a case.
7 is a three-dimensional conductor diagram showing a multilayer substrate according to Embodiment 2 of the present invention, and FIG. 8 is a conductor pattern diagram of each layer of FIG.
7 and 8, reference numerals 13 and 14 are through-holes for inserting signal pins of the differential signal pair for the positive phase signal and the reverse phase signal, and 83 and 84 are wirings for the positive phase signal and the negative phase signal of the differential signal pair. Wiring.
Reference numerals 26 to 29 denote through holes for inserting a GND pin.
Other symbols are the same as those in the first embodiment.

In this case, two sets of differential signal wirings are wired in a continuous wiring layer sandwiching one layer of GND solid.
In the second embodiment, the first set of positive (reverse) phase signal wires 81 and 82 for differential signals are provided on the third layer 103 for the positive (reverse) phase signals for the second set of differential signals. The wirings 83 and 84 are wired to the fifth layer 105, respectively.
For this reason, the lower GND plane of the upper and lower GND planes sandwiching the first set of normal (reverse) phase signal lines 81 and 82 and the second set of normal (reverse) phase signal lines 83 and 84 are connected. The upper GND solid of the sandwiched upper and lower GND solids is the same as the GND solid of the fourth layer 104.

The GND pin insertion through holes 21 to 24 are GND pin insertion through holes that surround the positive (reverse) phase signal pin insertion through holes 11 and 12 for differential signals, and are at least the second layer 102 and the fourth layer. It is connected to two GND solids 104.
The GND pin insertion through-holes 26 to 29 are GND pin insertion through-holes surrounding the positive (reverse) phase signal pin insertion through-holes 13 and 14 for differential signals, and at least the fourth layer 104 and the sixth layer. The two GND solid lines 106 are connected.
The GND pin insertion through hole 25 is a GND pin insertion through hole that surrounds the positive (reverse) phase signal pin insertion through holes 11 and 12 for differential signals. On the other hand, it is also a GND pin insertion through hole surrounding the phase signal pin insertion through holes 13 and 14, and is common.
Therefore, the GND pin insertion through hole 25 is connected to three GND planes of the second layer 102, the fourth layer 104, and the sixth layer 106.

  With this structure, a GND pin insertion through hole common to the GND pin insertion through holes surrounding the two pairs of positive (reverse) phase signal pin insertion through holes 11, 12 and 13, 14 for differential signals. 25, the positive (reverse) phase signal wirings 81, 82 and 83, 84 for two sets of differential signals have different feedback current paths, and two sets of differential signals. The number of GND solid layers to which a common GND pin insertion through-hole can be connected to a signal pair is 2 for differential signals (pairs) or for positive (reverse) phase signals for differential signals Even if the wirings 81, 82 and 83, 84 are less than four, which is twice the number of layers 2, two pairs of positive (reverse) phase signal wirings 81, 82 and 83, 84 for differential signals All feedback currents flowing through the lower GND solid are differential signals. Flowing a positive (reverse) common GND pin insertion directly into the through hole 25 surrounding the phase signal pin insertion through holes 11, 12 and 13, 14.

As a result, there is no detour of the feedback current in any of the two sets of differential signals, and deterioration of the transmission characteristics of the high frequency signal can be avoided.
In addition, since the symmetry of the GND path around the positive phase and the negative phase is maintained in either of the two sets of differential signals, the occurrence of common noise due to mode conversion can be prevented.
Furthermore, the occurrence of differential noise due to common noise can be prevented in either of the two sets of differential signals, and the original noise resistance performance of the differential signals can be maintained.

In the second embodiment, an example of two sets of differential signals is shown, but three or more sets may be used.
In this case, on the pin assignment, the differential signal wired to the third layer 103 and the differential signal wired to the fifth layer 105 may be separated or alternated.
In the second embodiment, the two pairs of positive (reverse) phase signal wirings 81, 82 and 83, 84 for differential signals are wired to the third layer 103 and the fifth layer 105. A combination of the layer 108 and the tenth layer 110 may be used.

In FIG. 8, only two GND planes to which the GND pin insertion through holes 21 to 24 and 26 to 29 are connected are shown, but the remaining ones are the seventh layer 107 and the ninth layer not shown. Either the layer 109 or the eleventh layer 111 may be connected.
Alternatively, the GND insertion through holes 21 to 24 are connected to the sixth layer 106 which is not connected to the GND plane in FIG. 8, and the GND insertion through holes 26 to 29 are connected to the GND plane in FIG. May be connected to the second layer 102 which is not connected to each other.

Furthermore, in Embodiment 2, the signal type is a differential signal, but it may be a single-phase signal.
That is, at least one or more GND pin insertion through holes are adjacent to two or more signal pin insertion through holes, and these GND pin insertion through holes have a common GND plane. If connected to the GND planes that face each other on the upper and lower surfaces across the common GND plane, the transmission characteristics of the high-frequency signal can be prevented from deteriorating.
However, in this case, since it is not a differential signal, it does not have resistance against common noise.

As described above, according to the second embodiment, two or more sets of through holes 11, 12 and 13, 14 for inserting positive (reverse) phase signal pins for differential signals are provided, and for two or more sets of differential signals. Two or more layers of positive (reverse) phase signal wirings 81, 82 and 83, 84 for differential signals connected to through-holes 11, 12 and 13, 14 for inserting normal (reverse) phase signal pins The number of GND solid layers that can be connected to one GND pin insertion through hole is a layer in which the positive (reverse) phase signal wirings 81, 82 and 83, 84 for differential signals are wired. When the number is limited to less than twice the number of GND planes that are directly opposite to the upper and lower surfaces of the positive and reverse phase signal wirings 81, 82 and 83, 84 for different sets of differential signals, respectively. At least one GND plane is common and One or more GND pin insertion through holes 25 adjacent to the positive (reverse) phase signal pin insertion through holes 11, 12 and 13, 14 for different sets of differential signals are connected to a common GND plane. At the same time, they are connected to the GND planes that face each other on the upper and lower surfaces across the common GND plane.
Therefore, there is no detour of the feedback current between the positive (reverse) phase signal wires 81, 82 and 83, 84 and the through pin, and deterioration of the transmission characteristic of the high frequency signal can be avoided.
In addition, the occurrence of common noise due to mode conversion can be prevented.

Note that a circuit board in which components are mounted on the multilayer board described in the above embodiment may be configured.
When configuring a circuit board with components mounted on a conventional multilayer board, the generated common noise propagates to the circuit board, reducing the signal amplitude and timing margin of the circuit on the circuit board on which the connector is mounted, or inducing malfunctions. There is a problem that leads to
When a circuit board in which components are mounted on the multilayer board described in the above embodiment is configured, it is possible to prevent a signal amplitude and timing margin of a circuit on the circuit board from being reduced and to induce a malfunction.

In addition, the information processing apparatus may be configured using a circuit board in which components are mounted on the multilayer board described in the above embodiment.
When an information processing apparatus is configured using a circuit board in which components are mounted on a conventional multilayer board, the generated common noise propagates to the circuit board and is connected to other circuit boards in the information processing apparatus via connectors and cables. There is a problem that leads to a decrease in the signal amplitude and timing margin of the circuit or the induction of malfunction.
When an information processing apparatus is configured using a circuit board in which components are mounted on the multilayer board described in the above embodiment, the signal amplitude or timing margin of a circuit on another circuit board in the information processing apparatus is reduced, or malfunction occurs. Induction can be prevented.

Furthermore, a sensor device may be configured using a circuit board in which components are mounted on the multilayer board described in the above embodiment and a sensor.
When a sensor device is configured using a conventional circuit board with components mounted on a multilayer board and a sensor, the generated common noise propagates to the circuit board and becomes noise with respect to the voltage level of the sensor signal, degrading the accuracy of the sensor. There are challenges.
When a sensor device is configured using a circuit board in which components are mounted on the multilayer board described in the above embodiment and a sensor, deterioration in accuracy of the sensor can be prevented.

Furthermore, a communication device may be configured using a circuit board in which components are mounted on the multilayer board described in the above embodiment and an antenna.
When a communication device is configured using a conventional circuit board with components mounted on a multilayer board and an antenna, radiation noise caused by the generated common noise will affect the antenna device, causing a reduction in communication speed and communication failure. There is a problem to cause.
When a communication device is configured using a circuit board in which components are mounted on the multilayer substrate described in the above embodiment and an antenna, a reduction in communication speed and communication failure can be prevented.

  In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .

  DESCRIPTION OF SYMBOLS 1 Multilayer substrate, 10 Signal through hole, 11, 13 Positive phase signal pin insertion through hole, 12, 24 Reverse phase signal pin insertion through hole, 20 GND through hole, 21-29 GND pin insertion through hole, 30 GND solid, 40, 50 ring land, 60 GND through hole land, 70 antipad, 80 signal wiring, 81, 83 positive phase signal wiring, 82, 84 negative phase signal wiring, 101 first layer, 102 2nd layer, 103 3rd layer, 104 4th layer, 105 5th layer, 106 6th layer, 107 7th layer, 108 8th layer, 109 9th layer, 110 10th layer, 111 11th layer, 112 12th layer.

Claims (8)

Including a plurality of layers composed of a ground plane on which a ground pattern is formed on one surface, and a layer on which signal wiring is formed;
Is formed so that the ground through-hole for the penetration pin for grounding at the top layer is inserted through the plurality of layers including a pre-Symbol ground solid and the signal line,
A signal through hole into which a signal through pin is inserted in the uppermost layer is a multilayer substrate that penetrates the ground plane layer and is connected to the signal wiring,
When the through-hole ground per one number of layers of the ground solid connectable is less limited than the number of layers of all of said ground solid,
One or more of the through-holes for ground adjacent to the signal through-hole is connected to said ground solid which respectively face the nearest upper and lower surfaces of the signal lines,
Two or more signal through holes are provided,
The signal wirings connected to two or more signal through holes are wired in two or more layers, respectively.
In the case where the number of ground solid layers to which the ground through hole per one can be connected is limited to less than twice the number of layers in which the signal wiring is wired,
At least one of the ground planes facing each other on the upper and lower surfaces of the different signal wirings in common is common.
One or more ground through-holes adjacent to different signal through-holes are connected to a common ground plane, and the ground faces the top and bottom surfaces closest to each other across the common ground plane. A multilayer board characterized by being connected to a solid . Including a plurality of layers composed of a ground plane having a ground pattern formed on one surface, and a layer formed with two adjacent signal wirings for differential signals;
Is formed so that the ground through-hole for the penetration pin for grounding at the top layer is inserted through the plurality of layers including a pre-Symbol the signal line for the ground solid and differential signals,
Signal through-hole of the differential signals adjacent two of the through pins for signals at the uppermost layer is inserted, through the layer of the ground solid, multilayer connected to the signal line for differential signal A substrate,
When the through-hole ground per one number of layers of the ground solid connectable is less limited than the number of layers of all of said ground solid,
One or more of the through-holes for ground adjacent to the signal through-hole for the differential signals are connected to the upper and lower surfaces of the signal lines for the differential signal to said ground solid which faces the last,
All the ground through-holes adjacent to the signal through-holes are connected to the ground planes that are respectively directly opposite the upper and lower surfaces of the signal wiring,
In the range of the ground planes facing the respective upper and lower surfaces of the signal wiring for differential signals, the shape of the signal through hole, the shape of the ground through hole, the shape of the ground plane, and the connection state are: A multilayer substrate characterized by being substantially electromagnetically symmetrical with respect to the two signal wirings for differential signals . All of the through-holes for grounding, the multilayer substrate according to claim 1, characterized in that it is connected to the ground solid which respectively face the nearest upper and lower surfaces of the signal lines adjacent to the signal through-hole. The signal through-hole of the differential signal are provided two or more sets,
The signal lines for differential signals are connected to two or more sets of the signal through-hole of the differential signals are wired into two or more layers,
When the through-hole ground per one number of layers of the ground solid connectable said signal lines for the differential signal is limited less than twice the number of layers is wired,
At least one of said ground solid of said ground solid which respectively face the nearest upper and lower surfaces of the signal lines for their Re respective different sets of the differential signals are common,
Their Re respective different sets of one or more of the through-holes for ground adjacent to the signal through-hole of the differential signal, is connected to the ground solid of the common, the ground solid of the common sandwiched therebetween multilayer substrate according to claim 2, characterized in that it is connected to the ground solid which respectively face the nearest upper and lower surfaces. A circuit board, wherein a component is mounted on the multilayer board according to any one of claims 1 to 4 . An information processing apparatus using the circuit board according to claim 5 . 6. A sensor device comprising the circuit board according to claim 5 and a sensor. A communication device comprising the circuit board according to claim 5 and an antenna.

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