JP6130162B2 - Manufacturing method of electronic parts - Google Patents

Description

The present invention relates to a surface acoustic wave (SAW) element, a piezoelectric thin film resonator (F).
The present invention relates to an electronic component including an electronic element such as BAR (Film Bulk Acoustic Resonator).

  In a conventional electronic component, an electronic element is mounted on a wiring board through a space that accommodates a functional body, and in order to completely seal this space, the side of this space is surrounded from the surface of the electronic element. A sealing resin layer was provided over the surface of the wiring board. In recent years, there has been a demand for miniaturization of electronic components, and a structure in which an insulating layer is provided on each of an electronic element and a wiring board to form a space for accommodating a functional body and is sealed is known.

JP 2003-37471 A

  However, since an insulating layer is provided on each of the electronic element and the wiring board, it is difficult to reduce the thickness of the electronic component, and since the wiring board has a single-layer structure, the routing of the wiring is limited and the design of the wiring pattern is limited. There was a problem that the degree of freedom was low and it was difficult to miniaturize electronic components.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide an electronic component that can be suitably sealed with respect to the space of the electronic component and can be reduced in size and thickness using a multilayer wiring board. Is to provide.

An electronic component manufacturing method according to an aspect of the present invention is an electronic component manufacturing method including an electronic element and a multilayer wiring board, and includes a first through conductor and a first through conductor provided on the first through conductor. A first wiring board having one conductor layer and a second through conductor which is laminated in the thickness direction of the first wiring board and is located on the first conductor layer. a first wiring mother board in which a plurality of the multilayer wiring board and a second wiring substrate having a second conductive layer electrically connected to said first conductive layer through the conductor is provided A step of preparing, a first wiring board having a first through conductor and a first conductor layer provided on the first through conductor, and the first wiring board
The second through-conductor, which is stacked in the thickness direction and located on the first conductor layer, is electrically connected to the first conductor layer via the second through-conductor. A step of preparing a second wiring mother board provided with a plurality of the multilayer wiring boards comprising a second wiring board having a conductor layer; an element substrate; a functional body provided on the element substrate; There are provided a plurality of the electronic elements including a wiring extending from the functional body to the outer peripheral side of the element substrate, and an element pad electrically connected to the wiring and provided at a position corresponding to the second conductor layer. preparing a first element base board which is an element substrate, a function element provided on the element substrate, and a wiring extending from the functional unit on the outer peripheral side of the element substrate, electrically to wiring And provided at a position corresponding to the second conductor layer. A step of preparing a second element mother board provided with a plurality of the electronic elements comprising the element pads, and the first wiring board and the second wiring mother board of the first wiring mother board. Bonding the first wiring board to the second wiring board of the first wiring mother board and the second wiring mother board with the second wiring board on the second wiring board. a step of providing an insulating layer so as to surround the functional element to expose at least a portion of the conductive layer, a step of providing a conductive bonding material on the second conductor layer exposed from the insulating layer, the first a step of electrically bonding the conductive bonding material and the device pad with element are opposed to said conductive bonding material of the said element pads of the mother board first wiring mother board bonded of the Before the element pad of the second element mother board A step of electrically bonding the said element pad and the conductive bonding material bonded together by face and said conductive bonding material of the second wiring mother substrate was stuck, the first element motherboard When, with the first wiring mother board, and the second wiring mother substrate, and cutting the said second element mother board at the same time, the first
Comprise the step of separating the plurality of the electronic components by removing the support substrate between the said and the one of the wiring motherboard first wiring substrate and the second wiring mother substrate first wiring board It is characterized by .

  According to the electronic component of the present invention, it is possible to make the sealing property for the space of the electronic component suitable and to reduce the size and thickness by using the multilayer wiring board.

(A) And (b) is a perspective view which shows the external appearance of the electronic component which concerns on embodiment of this invention. It is a disassembled perspective view of the electronic component shown in FIG. It is sectional drawing in AA of the electronic component shown to Fig.1 (a). (A) is a top view of the electronic element of the electronic component shown in FIG. 1, (b) is an enlarged view of B area | region shown to (a). FIG. 2 is a plan view of a wiring board of the electronic component shown in FIG. 1 and a cross-sectional view corresponding thereto. (A)-(b) is explanatory drawing for demonstrating the formation area of the insulating layer provided in a wiring board. (A) is sectional drawing of the 1st wiring board of the electronic component shown in FIG. 1, (b) is a top view for demonstrating the circuit pattern provided on the 1st wiring board. It is sectional drawing of the electronic component which shows the other example of embodiment of this invention. It is sectional drawing of the electronic component which shows the other example of embodiment of this invention. (A)-(c) is sectional drawing for demonstrating the manufacturing method of an electronic element. (A)-(e) is sectional drawing for demonstrating the manufacturing method of a wiring board. It is sectional drawing for demonstrating the manufacturing method of the electronic component shown in FIG. It is explanatory drawing for demonstrating the element mother board of an electronic element. It is explanatory drawing for demonstrating the wiring mother board of a wiring board. It is explanatory drawing for demonstrating the manufacturing method of the electronic component manufactured from an element mother board and a wiring mother board. (A)-(e) is sectional drawing for demonstrating the manufacturing method of a wiring board. It is explanatory drawing for demonstrating the wiring mother board of a wiring board. It is sectional drawing for demonstrating the manufacturing method of the electronic component shown in FIG. It is explanatory drawing for demonstrating the manufacturing method of the electronic component manufactured from an element mother board and a wiring mother board.

  Hereinafter, an electronic component according to an embodiment of the present invention will be described with reference to the drawings. Note that the drawings used in the following description are schematic, and the dimensional ratios and the like on the drawings do not necessarily match the actual ones.

  In the description of the embodiments and the like, components that are the same as or similar to those already described may be assigned the same reference numerals and descriptions thereof may be omitted.

<Embodiment>
Hereinafter, an electronic component according to an embodiment of the present invention will be described with reference to FIGS. 1 to 7.

The electronic component 1 according to the embodiment is configured as shown in FIGS. 1 to 3, and includes a first through conductor 3c and a first conductor layer 3b provided on the first through conductor 3c. 1 wiring board 3
And the first conductor layer 3b that is laminated in the thickness direction of the first wiring board 3 and that is located on the first conductor layer 3b and that is located via the second through conductor 4c. A second wiring substrate 4 having a second conductor layer 4b electrically connected to the element substrate 2a, a functional body 2b provided on the element substrate 2a, and an outer peripheral side of the element substrate 2a from the functional body 2b. And an electronic element 2 including an element pad 2d electrically connected to the wiring 2c and provided at a position corresponding to the second conductor layer 4b. Is an insulating layer 5 provided so as to expose at least a part of the second conductor layer 4b and surround the functional body 2b, and a conductive material provided on the second conductor layer 4b exposed from the insulating layer 5. A conductive bonding material 6 and an element pad. d and are those which are electrically joined.

  FIG. 1 is a schematic perspective view showing an external appearance of an electronic component 1 according to an embodiment of the present invention. FIG. 1A is a perspective view of the external appearance of the electronic component 1 as viewed from the upper surface 1a side. FIG. 1B is a perspective view of the external appearance of the electronic component 1 as viewed from the lower surface 1b side. FIG. 2 is an exploded perspective view of the electronic component 1 and shows the electronic element 2, the first wiring board 3, and the second wiring board 4, respectively. FIG. 3 is a cross-sectional view taken along line AA of the electronic component 1 shown in FIG.

  The electronic component 1 may have either direction upward or downward. For convenience of explanation, the electronic component 1 defines an orthogonal coordinate system XYZ, and uses the word “upper surface” or “lower surface” with the positive side in the Z direction upward. To do.

  As shown in FIG. 1, the electronic component 1 is formed in a substantially rectangular parallelepiped shape, for example, and a plurality of external terminals 12 are provided in an appropriate shape and an appropriate number on the lower surface 1 b. The external terminal 12 is exposed from the lower surface 1b. The number, position, role, and the like of the plurality of external terminals 12 may be appropriately set according to the internal configuration of the electronic component 1. For example, the plurality of external terminals 12 are provided in a square shape, but may be provided in a circular shape. In the present embodiment, the case where the four external terminals 12 are provided at the four corners of the lower surface 1b of the electronic component 1 is illustrated. The lower surface 1b of the electronic component 1 and the lower surface 3ab of the first wiring board 3 are the same surface.

  Moreover, the electronic component 1 has, for example, a length of one side of 1.1 (mm) to 1.5 (mm), and the size can be set appropriately.

  The electronic component 1 is disposed with the lower surface 1b facing a mounting board (not shown), and connection pads (not shown) provided on the mounting board and a plurality of external terminals 12 are connected via solder bumps or the like. Then, it is mounted on the mounting substrate by being electrically joined.

  The electronic component 1 receives a signal, for example, via any of the plurality of external terminals 12, performs a predetermined process on the input signal, and outputs the signal from any of the plurality of external terminals 12.

  As shown in FIG. 1, the electronic component 1 includes a first wiring board 3 and a second wiring board 4, and an electronic element 2 mounted on the second wiring board 4. In addition, as shown in FIGS. 2 and 3, in the electronic component 1, the electronic element 2 is bonded onto the first wiring board 4 via a space S that houses the functional body 2 b.

  Here, the electronic element 2 will be described below.

As shown in FIG. 3, the electronic element 2 includes an element substrate 2a and a functional body 2b provided on a lower surface 2aa of the element substrate 2a (a surface facing the second insulator 4a of the second wiring substrate 4). The wiring 2c extends from the functional body 2b to the outer peripheral side of the element substrate 2a, and the element pad 2d is electrically connected to the wiring 2c.

  In addition, the electronic element 2 may have an appropriate member such as an electrode and / or a protective layer that covers the upper surface 2ab of the element substrate 2a.

  The electronic element 2 is, for example, a surface acoustic wave element or a piezoelectric thin film resonator. In the present embodiment, the case of a surface acoustic wave element (SWA element) is illustrated.

  The element substrate 2a of the electronic element 2 is a piezoelectric substrate, and is formed in, for example, a generally thin rectangular parallelepiped shape as shown in FIGS. The element substrate 2a is composed of a single crystal substrate having piezoelectricity such as a lithium tantalate single crystal or a lithium niobate single crystal. The shape of the element substrate 2a may be set as appropriate, but is, for example, a rectangular shape. The size of the element substrate 2a may be set as appropriate. For example, the thickness is 0.2 (mm) to 0.5 (mm), and the length of one side is 0.5 (mm). ~ 2 (mm).

  FIG. 4A is a plan view of the element substrate 2a viewed from the lower surface 2aa side, and FIG. 4B is a schematic enlarged view in which a region B in FIG. 4A is enlarged. In FIG. 4A, the functional body 2b is hatched.

  As shown in FIGS. 2 and 3, the functional body 2b is provided on the lower surface 2aa of the element substrate 2a. As shown in FIG. 4, the functional body 2b is, for example, one or a plurality of (a plurality in this embodiment) SAW resonators, and the SAW resonators have an appropriate configuration and number according to various purposes. And may be provided in an arrangement. In the present embodiment, the functional body 2b is a SAW resonator, and a case where a ladder-type SAW filter is configured by a plurality of SAW resonators is illustrated. Moreover, in this embodiment, the electronic element 2 has illustrated the case where the seven functional bodies 2b are provided in the lower surface 2aa of the element substrate 2a.

The functional body 2b is a SAW resonator, and the SAW resonator has an IDT (InterDigital transducer) 10 and two reflectors 11 sandwiching the IDT 10 from both sides, as shown in FIG. 4B. .

Further, as shown in FIG. 4B, the IDT 10 has a pair of comb electrodes arranged so as to mesh with each other (a plurality of electrode fingers 10b cross each other). Each comb electrode of the IDT 10 includes a bus bar 10a and a plurality of electrode fingers 10b extending from the bus bar 10a in a direction perpendicular to the longitudinal direction of the bus bar 10a. The pitch of the plurality of electrode fingers 10b is substantially constant. In practice, the IDT 10 may be provided with a plurality of pairs of comb electrodes having more electrode fingers 10b.

  As shown in FIG. 4B, the reflector 11 is provided so as to sandwich the IDT 10 from both sides, and a pair of bus bars 11a and a plurality of electrode fingers 11b extending between the pair of bus bars 11a. have. The pitch of the plurality of electrode fingers 11b is substantially constant and is substantially the same as the pitch of the plurality of electrode fingers 10a2 of the IDT 10. The distance between the IDT 10 and the reflector 11 is substantially the same as the pitch between the electrode fingers 10b and 11b.

The electric signal input to one bus bar 10a of the pair of comb electrodes is converted into SAW (surface acoustic wave) and propagates in a direction orthogonal to the plurality of electrode fingers 10b. This SAW (surface acoustic wave) is converted again into an electrical signal and output from the other bus bar 10a of the pair of comb-teeth electrodes. In this process, the frequency component outside the pass band of the electrical signal is attenuated. The pass band corresponds to a SAW (surface acoustic wave) frequency band in which the pitch of the plurality of electrode fingers 10b is approximately a half wavelength.

  As shown in FIG. 4A, the element substrate 2a is provided with wiring 2c extending from the functional body 2 to the outer peripheral side of the element substrate 2a. The element pad 2d is provided on the wiring 2c and is electrically connected to the wiring 2c. That is, the wiring 2c electrically connects the functional body 2b and the element pad 2d. The wiring 2c basically connects the bus bar 10a and the element pad 2d electrically. The wiring 2c extends from the functional body 2 to the outer peripheral side of the element substrate 2a. The element substrate 2 a is provided with an intermediate wiring for connecting the functional bodies 2 (SAW resonators) to each other or the IDT 10 and the reflector 11.

  The wiring 2c may extend linearly or curvedly on the outer peripheral side, or may be bent. Further, the wiring 2c may extend with a constant width, may gradually change in width, or may change in width stepwise. Therefore, the wiring 2c is appropriately set according to the arrangement of the functional bodies 2b provided on the element substrate 2a or the arrangement of the element pads.

  The element pad 2d is for supplying electric power to the IDT 10, and is provided on the wiring 2c so as to be electrically connected to the wiring 2c. In the present embodiment, four element pads 2d are provided at the four corners of the peripheral portion of the lower surface 2aa of the element substrate 2a. The size of the element pad 2d is appropriately set according to the configuration of the functional body 2b.

  The functional body 2b and the wiring 2c can be formed of the same material, for example. Further, the functional body 2b and the wiring 2c can be formed simultaneously. As for functional body 2b and wiring 2c, all are Al or Al alloy (for example, Al-Cu system or Al-Ti system), Cu or Cu alloy (for example, Cu-Mg system, Cu-Ti system, or Cu-Rd system) 9. It can be formed of a metal material such as Ag or an Ag alloy (for example, Ag—Mg, Ag—Ti, or Ag—Rd), etc. The functional body 2b and the wiring 2c are partially different materials. May be formed.

  The element pad 2d is formed of, for example, Al or Al alloy (for example, Al-Cu system or Al-Ti system), Cu or Cu alloy (for example, Cu-Mg system, Cu-Ti system, or Cu-Rd system 9, It can be formed of a metal material such as Ag or an Ag alloy (eg, Ag—Mg, Ag—Ti, or Ag—Rd).

  The element pad 2d is preferably formed with a plating layer on the surface for the purpose of improving the bonding property with the corresponding conductive bonding material 6 or the like. The plating layer is formed on the surface of the element pad 2d by performing, for example, chromium plating, nickel plating, and gold plating from above. The conductive bonding material 6 will be described later.

  Further, as shown in FIG. 8, the electronic component 1 may be provided with a protective film 2e so as to cover the functional body 2b of the element substrate 2a. The protective film 2e contributes to preventing the functional body 2b from being oxidized. Moreover, the protective film 2e can suppress the short circuit which generate | occur | produces when an electroconductive foreign material adheres between the electrode fingers of IDT10 and the reflector 11. FIG.

The protective film 2e is made of an insulating material such as silicon oxide, aluminum oxide, titanium oxide, silicon nitride, or silicon. The thickness of the protective film 2e is, for example, 8 (nm) to 15 (nm). The protective film 2e may be provided over substantially the entire lower surface 2aa of the element substrate 2a so as to cover the functional body 2b and the wiring 2c and to expose only the region where the element pad 2d is formed. That is, the protective film 2e may be provided over almost the entire lower surface 2aa of the element substrate 2a except for the region where the element pad 2d is provided. In this case, after the protective film 2e is provided so as to cover the functional body 2b and the wiring 2c, the element pad 2d is provided on the wiring 2c on which the protective film 2e of the element substrate 2a is not provided.

  Here, the first wiring board 3 and the second wiring board 4 will be described below.

  As shown in FIG. 3, the first wiring board 3 includes a first insulator 3a, a first conductor layer 3b formed on the upper surface 3aa of the first insulator 3a, and a first insulator 3a. A first through conductor 3c penetrating in the vertical direction, and a third conductor layer 3d formed on the lower surface 3ab of the first insulator 3a and electrically connected to the first through conductor 3c. doing. Furthermore, an external terminal 12 is provided on the third conductor layer 3d formed on the lower surface 3ab of the first insulator 3a.

  Further, as shown in FIG. 3, the second wiring board 4 includes a second insulator 4a, a second conductor layer 4b formed on the upper surface 4aa of the second insulator 4a, and a second insulation. It has the 2nd penetration conductor 4c which penetrates body 4a in the up-and-down direction. The first conductor layer 3b and the second conductor layer 4b are electrically joined via the second through conductor 4c.

  Therefore, the electronic component 1 is composed of two wiring boards including the first wiring board 3 and the second wiring board 4, that is, a so-called multilayer wiring board. The electronic component 1 may be further configured by a multilayer wiring board in which three or more wiring boards are stacked. In the present embodiment, the case where the electronic component 1 is composed of two wiring boards including the first wiring board 3 and the second wiring board 4 is illustrated. A multilayer wiring board composed of the first wiring board 3 and the second wiring board 4 is referred to as a multilayer wiring board ML. The multilayer wiring board ML may be composed of three or more wiring boards.

  In the first wiring board 3, a circuit pattern 8 is provided on the upper surface 3aa of the first insulator 3a. The circuit pattern 8 is provided continuously from the first conductor layer 3b and is integrated with the first conductor layer 3b. That is, the circuit pattern is provided so as to be incorporated between the first insulator 3a and the second insulator 4a. The circuit pattern will be described later.

  For example, the first wiring board 3 and the second wiring board 4 are formed by forming a conductor layer in which a copper foil is patterned on an insulator obtained by impregnating and curing an organic resin on a base material made of glass fiber. And a multilayer wiring board ML in which conductor layers are alternately laminated.

  Further, the first wiring board 3 and the second wiring board 4 are, for example, laminated with an insulator (insulating layer) and a conductor layer on a support substrate (core substrate) 13 and further insulated by a build-up method. This is a multilayer wiring board ML having a so-called coreless board configuration in which a core board is removed after a body (insulating layer) and a conductor layer are laminated. Note that the number of stacked layers by the build-up method may be appropriately set according to the internal configuration of the electronic component 1 and the like. By adopting the coreless substrate, the first wiring substrate 2 and the second wiring substrate 4 can be made thinner, and a thinner multilayer wiring substrate ML can be obtained.

  As shown in FIG. 2, the first insulator 3a and the second insulator 4a are formed, for example, in a generally thin rectangular parallelepiped shape. Moreover, the 1st insulator 3a and the 2nd insulator 4a are formed including the inorganic material of resin, a ceramic, and / or an amorphous state, for example. The first insulator 3a and the second insulator 4a may be made of a single material, or may be made of a composite material such as a substrate in which a base material is impregnated with a resin. Good. The first insulator 3a and the second insulator 4a may be provided with a fiber layer having excellent rigidity inside the resin.

Specifically, the first insulator 3a and the second insulator 4a are made of an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, or a glass ceramic sintered body. A ceramic material such as a knot is used. An organic resin material such as polyimide resin, cyanate resin, epoxy resin, or polyphenylene ether resin is used. Furthermore, a composite material obtained by mixing an inorganic material such as ceramic or glass with an organic resin material such as an epoxy resin can also be used.

  The first conductor layer 3b, the second conductor layer 4b, and the third conductor layer 3d are made of copper, tungsten, molybdenum, or the like. Similarly, the first through conductor 3c and the second through conductor 4c are formed of copper, tungsten, molybdenum, or the like. The second conductor layer 4b formed on the upper surface 4aa of the second insulator 4a may have a plating layer on the surface in order to improve the bondability with the conductive bonding material 6. The plating layer is formed on the surface of the second conductor layer 4b by performing, for example, chromium plating, nickel plating, and gold plating from above.

  As shown in FIG. 5, the insulating layer 5 includes the functional body 2 b in order to form a space S between the functional body 2 b and the upper surface 4 aa of the second insulator 4 a (surface facing the functional body 2 b). It is provided on the second insulator 4a so as to surround it. Accordingly, a region where the insulating layer 5 is not provided becomes a recess, and when the element substrate 2a and the second insulator 4a are joined, the recess is a space between the functional body 2b and the second insulator 4a. S. In FIG. 5, in order to show the positional relationship between the insulating layer 5 and the functional body 2b, the position of the functional body 2b is indicated by a broken line on the upper surface 4aa of the second insulator 4a. Thus, the insulating layer 5 is provided so as to surround the functional body 2b.

  The insulating layer 5 is provided so that at least a part of the second conductor layer 4b is exposed. That is, the insulating layer 5 is provided so that at least a part of the second conductor layer 4b in the region where the conductive bonding material 6 is provided is exposed. Therefore, the insulating layer 5 forms an opening on the second conductor layer 4b so that at least a part of the second conductor layer 4b is exposed.

  Therefore, the insulating layer 5 can secure the space S between the functional body 2b and the second insulator 4a, and can protect and hermetically seal the functional body 2b surrounded by the insulating layer 5. Moreover, in order to ensure the vibration space S on the functional body 2b and to hermetically seal the functional body 2b, the insulating layer 5 has a thickness of, for example, 5 (μm) to 10 (μm).

  Thus, in order to obtain the electronic component 1 having excellent durability, the insulating layer 5 is provided on the second insulator 4a so as to surround the functional body 2b.

  The conductive bonding material 6 is provided so as to fill the opening on the second conductor layer 4b. That is, the conductive bonding material 6 is provided on the exposed second conductor layer 4b, and is electrically interposed between the element pad 2d and the second conductor layer 4b. is there. As shown in FIG. 3, the element pad 2d and the conductive bonding material 6 are provided at positions corresponding to each other. The element pad 2 d is bonded onto the conductive bonding material 6, whereby the element pad 2 d of the element substrate 2 a and the second conductor layer 4 b of the second wiring substrate 4 are connected via the conductive bonding material 6. Electrically joined. The conductive bonding material 6 is made of a conductive material such as Ag paste, for example.

The adhesive layer 7 is provided on the insulating layer 5 in order to join the element substrate 2a and the multilayer wiring board ML. Further, since the adhesive layer 7 affects the electrical bonding between the element pad 2d and the conductive bonding material 6 when it is provided so as to overlap the conductive bonding material 6, it does not overlap the conductive bonding material 6. Is provided on the insulating layer 5. Therefore, in the electronic component 1, since the electronic element 2 and the second wiring board 4 are bonded via the conductive bonding material 6 and the adhesive layer 7, the sealing performance is improved.

  That is, the adhesive layer 7 is positioned on the insulating layer 5 by, for example, a printing method so as to be aligned so that the conductive bonding material 6 is exposed and not overlapped with the conductive bonding material 6. The adhesive layer 7 is made of an insulating material such as an epoxy resin, for example.

  Further, when an anisotropic conductive resin is used, the conductive bonding material 6 and the adhesive layer 7 can be provided by one, the manufacturing process can be reduced, and the productivity is improved. That is, instead of the conductive bonding material 6 and the adhesive material 7, by using a so-called anisotropic conductive resin containing conductive particles in an organic resin, the anisotropic conductive resin becomes a conductive bonding material. 6 and the adhesive layer 7 have the functions, that is, the longitudinal electrical joining and the mechanical joining, so that the electrical joining with the element pad 2d and the mechanical connection with the element substrate 2a are performed. Allows joining.

  In addition, as shown in FIG. 9, the electronic component 1 provides the insulating layer 5 with an adhesive function with the element substrate 2a, thereby allowing the element substrate 2a of the electronic element 2 and the multilayer wiring board ML (second wiring board 4). And can be joined. Thereby, the electronic component 1 can reduce the manufacturing process for providing the adhesive material layer 7 on the insulating layer 5, and productivity is improved.

  In addition, the electronic component 1 can easily align the element substrate 2a and the second wiring substrate 4 by providing the insulating layer 5 with an adhesive function.

  Here, the formation region of the insulating layer 5 provided on the upper surface 4aa of the second insulator 4a will be described below with reference to FIG. In FIG. 6, the adhesive layer 7 on the insulating layer 5 is omitted. In FIG. 6, the formation region of the insulating layer 5 provided on the second insulator 4a is shown, and the position of the functional body 2b of the element substrate 2a is indicated by a broken line on the upper surface 4aa of the second insulator 4a. ing.

  In FIG. 6A, the insulating layer 5 is provided on the second insulator 4a so as to surround the seven functional bodies 2b in one space S. The insulating layer 5 is provided on the second insulator 4a so that one space S is formed. In FIG. 6B, the insulating layer 5 is provided on the second insulator 4a so as to surround the seven functional bodies 2b in one space S along the outer peripheral portion of the second insulator 4a. ing. In this case, the insulating layer 5 may be provided so as to overlap a part of the second conductor layer 4b in a plan view, or the second conductor layer so as not to overlap the second conductor layer 4b. You may provide so that it may be located outside 4b. As in FIG. 6A, the insulating layer 5 is provided on the second insulator 4a so that one space S is formed. Furthermore, in FIG.6 (c), the insulating layer 5 is provided on the 2nd insulator 4a so that the function body 2b may be enclosed individually in the space S corresponding to each of the seven function bodies 2b. That is, the insulating layer 5 is provided on the second insulator 4a so that seven spaces S corresponding to the seven functional bodies 2b are formed.

  Further, the adhesion to the element substrate 2a or the hermetic sealing of the functional body 2b is improved in the order of FIG. 6B <FIG. 6A <FIG. 6C depending on the region where the insulating layer 5 is provided. , Become more reliable.

  As described above, the insulating layer 5 is interposed between the element substrate 2a and the second insulator 4a, whereby the space S is formed between the lower surface 2aa of the element substrate 2a and the upper surface 4aa of the second insulator substrate 4a. Is formed. Thereby, in the electronic component 1, a vibration space is formed by the space S formed by the insulating layer 5, the propagation of SAW (surface acoustic wave) is facilitated, and the loss of SAW (surface acoustic wave) is suppressed. be able to.

Further, since the insulating layer 5 is provided on the second insulator 4a so as to surround the functional body 2b, the space S is surely formed between the functional body 2b and the second wiring board 4. Can do. Furthermore, since the electronic component 1 is provided so that the insulating layer 5 surrounds the functional body 2b and is bonded via the adhesive layer 7, the functional body 2b can be hermetically sealed, and the space S can be sealed. A decrease in the electrical characteristics of the functional body 2b due to the ingress of moisture or the like is suppressed. In other words, the airtight sealing property of the electronic component 1 is improved.

  Therefore, in comparison with the structure in which the sealing resin layer is provided from the surface of the electronic element to the surface of the wiring board, the electronic component 1 is provided with the insulating layer 5 so as to surround the functional body 2b, and the element substrate 2a and the second structure. Since the space S is formed with the insulator 4a, the sealing performance of the functional body 2b is improved and the size and thickness are reduced.

  Here, an example of the circuit pattern 8 will be described with reference to FIG.

  The circuit pattern 8 is provided on the upper surface 3aa of the first insulator 3a of the first wiring board 3, as shown in FIG. That is, the circuit pattern 8 is provided between the first insulator 3a and the second insulator 4a. Further, FIG. 7 shows the position where the second through conductor 4c is provided on the circuit pattern 8 by a broken line.

  As shown in FIG. 7, the circuit pattern 8 is formed on the first insulator 3a at the same time as the first conductor layer 3b, and is electrically connected to the first conductor layer 3b. That is, the circuit pattern 8 is continuously provided from the first conductor layer 3b on the same plane on the first insulator 3a. The circuit pattern 8 is electrically connected to the element pad 2a of the electronic element 2 through the second through conductor 4c, the second conductor layer 4b, and the conductive bonding material 6.

  When the electronic component 1 is configured as a peripheral circuit used in combination with the electronic element 2, the peripheral circuit is configured by combining, for example, an inductor element for an inductor, a capacitive element for a capacitor, a resistive element for a resistor, and the like. ing. The peripheral circuit is, for example, a matching element or an LC filter.

  The circuit pattern 8 is, for example, a capacitance pattern 8a, and is an inductor pattern 8b having a spiral line shape. The inductor pattern 8b forms an inductor, and the capacitance pattern 8a forms a capacitance. For example, a GND pattern can be formed on the lower surface 3ab of the first wiring board 3, and a capacitance can be formed between the GND pattern 8A and the capacitance pattern 8a.

  As described above, the electronic component 1 can form, for example, an LC filter including an inductor and a capacitor on the first insulator 3a. Therefore, the LC filter including the inductor and the capacitor can be used as the functional body 2b. They can be provided in combination. Further, the circuit pattern 8 is not limited to the capacitance pattern 8a or the inductor pattern 8b. For example, a resistance pattern or the like may be provided on the upper surface 3aa of the first insulator 3a.

  Therefore, in the electronic component 1, since the circuit pattern 8 is provided on the same plane on the first insulator 3a to form a capacitor or an inductor, a capacitor or an inductor as an external component is not necessary. Therefore, the electronic component 1 can be reduced in size and thickness because the increase in size is suppressed. Further, since the circuit pattern 8 is provided so as to be embedded between the first insulator 3a and the second insulator 4a, the electronic component 1 has a circuit size in the plane direction (XY plane). Since it is maintained in the same manner as before the pattern 8 is provided, an increase in size is suppressed.

Moreover, since the electronic component 1 can provide the circuit pattern 8 between the 1st insulator 3a and the 2nd insulator 4a by using the multilayer wiring board ML, freedom of design of the circuit pattern 8 is possible. The degree becomes higher.

  In addition, the electronic component 1 has a capacitance or inductor formed inside the electronic component 1 as compared with the case where an external component is used, so the wiring length is shortened, and generation of unnecessary capacitance components and inductor components is suppressed. Can do. As described above, the electronic component 1 is small and thin, and has high performance.

  Here, a method for manufacturing the electronic element 2 will be described below.

  FIG. 10A to FIG. 10C are diagrams illustrating a method for manufacturing the electronic element 2 and are cross-sectional views corresponding to the electronic element 2 shown in FIG. In FIG. 10, the lower surface 2aa of the element substrate 2a is on the upper side.

  In addition, the manufacturing process of the electronic element 2 is performed on the element mother board 2A that becomes the electronic element 2 by being divided, but in FIG. 10A to FIG. Only the corresponding parts are shown. Therefore, through the steps of FIG. 10A to FIG. 10C, a plurality of electronic elements 2 are provided on the element base substrate 2A as shown in FIG.

  First, as shown in FIG. 10, the functional body 2b, the wiring 2c, and the element pad 2d are formed on the lower surface 2aa of the piezoelectric substrate of the element substrate 2a.

In the formation of the functional body 2b and the wiring 2c, specifically, first, a sputtering method, a vapor deposition method, or a thin film forming method such as CVD (Chemical Vapor Deposition) is used.
), A metal layer is formed on the lower surface 2aa of the element substrate 2a. Next, this metal layer is patterned by a known photolithography method or the like. By patterning, as shown in FIG. 10B, the functional body 2b and the wiring 2c are formed on the element substrate 2a. The functional body 2b is the IDT 10 and the reflector 11 (SAW resonator), and these are formed on the element substrate 2a.

  When the functional body 2b and the wiring 2c are formed on the element substrate 2a, as shown in FIG. 10C, the functional body 2b and the wiring 2c are covered by a thin film formation method such as sputtering, vapor deposition, or CVD. A metal layer is formed on the element substrate 2a. Then, this metal layer is patterned by a known photolithography method or the like. The element pad 2c is formed on the wiring 2c by patterning. In this way, the electronic device 2 is manufactured through the steps of FIGS. 10A to 10C.

  A method for manufacturing the multilayer wiring board ML including the first wiring board 3 and the second wiring board 4 will be described below.

  FIG. 11A to FIG. 11E are diagrams for explaining a method of manufacturing a multilayer wiring board ML including the first wiring board 3 and the second wiring board 4, and the first wiring of FIG. 5 is a cross-sectional view corresponding to a multilayer wiring board ML including a substrate 3 and a second wiring board 4. FIG. The manufacturing process of the multilayer wiring board ML is performed for the wiring mother board 3A or 3A1 which becomes the multilayer wiring board ML by being divided. In FIGS. 11A to 11E, one electronic component is used. Only the portion corresponding to 1 is shown.

Accordingly, through the steps of FIGS. 11A to 11E, the first wiring board 3 and the second wiring board 4 are stacked on the wiring mother board 3A as shown in FIG. A plurality of multilayer wiring boards ML are provided. Further, as shown in FIG. 17, a plurality of multilayer wiring boards ML in which the first wiring board 3 and the second wiring board 4 are stacked are provided on the wiring mother board 3 </ b> A <b> 1 via the support board (core board) 13. Provided on both sides.

  First, as shown in FIG. 11A, a multilayer wiring board ML including a first wiring board 3 and a second wiring board 4 is prepared.

  Specifically, the first insulator 3a, the first conductor layer 5a formed on the upper surface 3aa of the first insulator 3a, and the first penetration that penetrates the first insulator 3a in the vertical direction. A first wiring board 3 having a conductor 3c and a third conductor layer 4c formed on the lower surface 3ab of the first insulator 3a and electrically connected to the first through conductor 3c; The second insulator 4a, the second conductor layer 4b formed on the upper surface 4aa of the second insulator 4a, and the second insulator 4a penetrating in the vertical direction on the wiring board 3 A multilayer wiring board ML comprising a second wiring board 4 having a through conductor 4b is prepared.

  The multilayer wiring board ML is manufactured by stacking the first wiring board 3 and the second wiring board 4 by, for example, a build-up method. Moreover, the manufacturing method of the 1st wiring board 3 and the 2nd wiring board 4 may be the same as the manufacturing method of a general wiring board.

  Next, as shown in FIG. 11B, for example, an insulating material is formed over the upper surface 4aa of the second insulator 4a of the multilayer wiring board ML so as to cover the first conductor layer 4b. The insulating layer 5 is made of this insulating material. The insulating material (insulating layer 5) is formed by, for example, a coating method, a printing method, a vapor deposition method, or a thin film forming method such as CVD.

  As shown in FIG. 11C, when an insulating material is formed on the second insulator 4a, the insulating material is patterned by a well-known photolithography or the like, and the patterned insulating material is It is formed on the second insulator 4a. As shown in FIG. 11C, the patterning is performed so that the second conductor layer 4b in the region where the conductive bonding material 6 is provided is exposed, and an opening is formed on the second conductor layer 4b. The In this way, the insulating layer 5 is provided on the upper surface 4aa of the second insulator 4a.

  Here, an example of the formation of the insulating layer 5 is shown below.

  The insulating layer 5 is, for example, a solder resist, and the solder resist is formed on the second insulator 4a by a printing method. And a soldering resist is temporarily dried, for example by heat-processing for 20-30 (min) at 80 (degreeC). Next, the solder resist is irradiated with ultraviolet rays through a negative film, and only the region where the insulating layer 5 is to be provided is cured. Furthermore, the uncured region of the solder resist is removed with an alkaline aqueous solution or the like, and is subjected to a heat treatment at 150 (° C.) for 60 (minutes), for example, and finally cured. Then, a patterned solder resist is provided on the second insulator 4a. In this way, the insulating layer 5 is provided on the second insulator 4a of the multilayer wiring board ML. The insulating layer 5 is made of a material such as an epoxy resin or a polyimide resin in addition to the solder resist.

  The conductive bonding material 6 is, for example, an Ag paste, and is provided on the second conductor layer 4b exposed from the insulating layer 5, as shown in FIG. That is, the conductive bonding material 6 is provided so as to fill the opening of the insulating layer 5 on the second conductor layer 4b. The conductive bonding material 6 is formed on the second conductor layer 4b by, for example, a printing method or a dispensing method.

  As shown in FIG. 11E, the adhesive layer 7 is formed on the insulating layer 5 except for the region where the conductive bonding material 6 is provided. The adhesive layer 7 is formed on the insulating layer 5 by, for example, a printing method or a photolithography method.

  Next, as shown in FIG. 12, the electronic element 2 is bonded via an adhesive layer 7 on the insulating layer 5. In addition, the electronic element 2 is bonded to the second wiring substrate 4 through the space S that houses the functional body 2b. In this case, in the electronic component 1, the element pad 2d of the element substrate 2a and the conductive bonding material 6 of the second insulator 4a are bonded to face each other to obtain an electric bond. That is, in the electronic component 1, the element pad 2 d of the element substrate 2 a and the second conductor layer 4 b of the second wiring substrate 4 are electrically bonded via the conductive bonding material 6. In FIG. 12, only a portion corresponding to one electronic component 1 is illustrated.

  The multilayer wiring board ML and the electronic element 2 are bonded by, for example, heat curing at 150 (° C.) for 60 (min) while applying pressure. Note that the electrical bonding by the conductive bonding material 6 and the bonding by the adhesive layer 7 are simultaneously performed by, for example, a heat treatment of 150 (° C.) and 60 (min) while applying pressure.

  In this way, the electronic element 2 is bonded to the multilayer wiring board ML including the first wiring board 3 and the second wiring board 4. Thereby, the electronic component 1 shown in FIG. 3 is manufactured.

  Here, manufacturing of the electronic component 1 including the multilayer wiring substrate ML including the first wiring substrate 3 and the second wiring substrate 4 and the electronic element 2 will be described below.

  First, the case where the electronic component 1 is manufactured by dividing the electronic element 2 from the element mother board 2A or by dividing the multilayer wiring board ML from the wiring mother board 3A will be described.

  The element mother board 2A provided with the plurality of electronic elements 2 is cut to separate the electronic elements 2 into pieces. Similarly, the wiring mother board 3A provided with a plurality of multilayer wiring boards ML is cut to separate the multilayer wiring boards ML. And the electronic component 2 shown in FIG. 1 is manufactured by joining the separated electronic element 2 and the multilayer wiring board ML.

  In addition, the electronic element 2 is separated from the element mother board 2A, and the separated electronic element 2 is joined to the multilayer wiring board ML of the wiring mother board 3A, and then the wiring mother board 3A to which the electronic element 2 is joined. The electronic component 1 can also be manufactured by cutting into pieces.

  Next, a case will be described in which the electronic component 1 is manufactured by bonding the element mother board 2A and the wiring mother board 3A and then simultaneously cutting the bonded element mother board 2A and the wiring mother board 3A.

  The element mother board 2A is provided with a plurality of electronic elements 2 as shown in FIG. Therefore, the element mother board 2A is an aggregate in which a plurality of electronic elements 2 are provided, and is provided so that the plurality of electronic elements 2 are arranged vertically and horizontally. FIG. 13 is an enlarged cross-sectional view of one of the plurality of electronic elements 2 provided on the element mother board 2A. In FIG. 13, the element mother board 2 </ b> A has a circular shape in plan view, but is not limited thereto, and may be a square shape, and the shape is appropriately set. The element mother board 2A has a diameter of, for example, 70 (mm) to 130 (mm) when the shape in plan view is circular.

  As described above, the element mother substrate 2A is provided with a plurality of electronic elements 2 on the element substrate 2a by performing the manufacturing steps of FIGS. 10A to 10C for the element substrate 2a. It is done. As a result, the element mother board 2 </ b> A becomes an aggregate of a plurality of electronic elements 2. Here, the element substrate 2a has such a size that a plurality of electronic elements 2 can be provided.

Further, the wiring mother board 3A is provided with a plurality of multilayer wiring boards ML as shown in FIG. Therefore, the wiring mother board 3A is an aggregate of a plurality of multilayer wiring boards ML, and is provided so that the plurality of multilayer wiring boards ML are arranged vertically and horizontally. FIG. 14 shows an enlarged cross-sectional view of one of a plurality of multilayer wiring boards ML provided on the wiring motherboard 3A. In FIG. 14, the wiring mother board 2 has a quadrangular shape in plan view, but is not limited thereto, and may be circular, and the shape is appropriately set. The wiring mother board 3A has a side length of, for example, 100 (mm) to 150 (mm) when the shape in plan view is a quadrangular shape.

  As described above, by performing each manufacturing process of FIGS. 11A to 11E for the multilayer wiring board ML, the insulating layer 5, the conductive bonding material 6 and the adhesive are bonded on the multilayer wiring board ML. A material layer 7 is provided. As a result, the wiring motherboard 3A becomes an assembly of a plurality of multilayer wiring boards ML.

  The bonding between the element mother board 2A and the wiring mother board 3A will be described. FIG. 15 is a plan view showing a state in which the element mother board 2A and the wiring mother board 3A are joined.

  As shown in FIG. 15, the bonding substrate 1A is obtained by bonding and bonding the element mother board 2A and the wiring mother board 3A. Moreover, in FIG. 15, sectional drawing which expanded three of the some electronic components 1 provided in 1A of bonding substrates is shown.

  The bonding substrate 1A is bonded by positioning the element mother board 2A with respect to the wiring mother board 3A. Further, the bonding substrate 1A may be bonded by positioning the wiring mother board 3A with respect to the element mother board 2A.

  As shown in FIG. 15, the plurality of electronic elements 2 on the element mother board 2A are bonded via the adhesive layer 7 on the insulating layer 5 of the multilayer wiring board ML of the wiring mother board 3A. That is, the electronic element 2 is bonded to the corresponding multilayer wiring board ML via the adhesive layer 7. Further, in this case, the element pads 2d of the plurality of electronic elements 2 on the element mother board 2A and the conductive bonding materials 6 of the plurality of multilayer wiring boards ML3 on the wiring mother board 3A are opposed to each other to be electrically bonded. Is obtained.

  Therefore, as shown in FIG. 15, the bonded substrate 1 </ b> A is an assembly in which a plurality of electronic components 1 are arranged vertically and horizontally, and the plurality of electronic components 1 are provided. Further, as shown in FIG. 15, the bonding substrate 1 </ b> A is provided with a cutting line 9 according to the shape of the electronic component 1 in order to separate the electronic component 1 from the bonding substrate 1 </ b> A. That is, FIG. 15 illustrates a case where the cutting line 9 is provided on the wiring mother board 3A that is slightly larger than the element mother board 2A.

  In addition, the bonding substrate 1A may be provided with an element mother substrate 2A that is slightly larger than the wiring mother substrate 3A, and the cutting line 9 may be provided on the element mother substrate 2A. The cutting line 9 is appropriately provided on the element mother board 2A and / or the wiring mother board 3A in consideration of the size of the element mother board 2A or the wiring mother board 3A. The cutting method is not limited to this. A marker indicating the starting point and the ending point of the virtual cutting line may be provided on the element mother board 2A, the wiring mother board 3A, or both, and cut according to the marker. The cutting method of the bonding substrate 1A is appropriately set in consideration of the size of the bonding substrate 1A and the like.

  And as shown in FIG. 15, the bonding board | substrate 1A is cut | disconnected along the cutting line 9 shown with the broken line, and the some electronic component 1 is separated into pieces, respectively. That is, the bonding substrate 1A is cut, and the individual electronic components 1 are separated from the bonding substrate 1A. For example, as shown in FIG. 15, three electronic components 1 arranged in a row can be obtained by cutting along the cutting line 9 and separating from the bonded substrate 1 </ b> A. . In addition, cutting | disconnection of 1 A of bonded substrates is performed using a dicing apparatus etc., for example.

That is, when the electronic component 2 is separated from the element mother board 2A and the multilayer wiring board ML is separated from the wiring mother board 3A and the electronic element 2 and the multilayer wiring board ML are joined to manufacture the electronic component 1. In contrast, when the electronic component 1 is manufactured from the bonded substrate 1A, a large amount of the electronic component 1 can be manufactured at a time, and thus the productivity of the electronic component 1 is improved. That is, since it is possible to cut the bonded substrate 1A and manufacture a large number of individual electronic components 1 at a time, the productivity of the electronic components 1 is improved as the production efficiency of the cutting process is improved.

  The sizes of the element mother board 2A and the wiring mother board 3A are set in consideration of the number of electronic components 1 obtained from the bonded substrate 1A, that is, the number of electronic components 1 from the bonded substrate 1A.

  Further, in the bonded substrate board 1A, the bonded element mother board 2A and wiring mother board 3A are cut at the same time. Become. That is, the side surface of the electronic element 2 and the side surface of the multilayer wiring board ML are aligned, and the side surfaces (XZ plane and YZ plane) of the electronic component 1 are located in the same plane. As described above, the electronic component 1 can have the side surfaces flush with each other, that is, the side surfaces of the electronic element 2 and the multilayer wiring board ML can be aligned, so that the electronic component 1 is mounted on the mounting board of the electronic device. In this case, the mounting accuracy is improved, and higher density mounting is possible.

  In addition, when the element mother board 2A and the wiring mother board 3A are cut simultaneously, the bonding board 1A may be cut from the element mother board 2A side or from the wiring mother board 3A side. Moreover, you may cut | disconnect simultaneously from the element motherboard 2A side and the wiring motherboard 3A side. The cutting method is appropriately set in consideration of the size of the bonded substrate 1A and the like.

  As shown in FIG. 16, a multilayer wiring board ML including a first wiring board 3 and a second wiring board 4 is provided on both sides of a support board (core board) 13 to form a double-sided multilayer wiring board ML1. Such a double-sided multilayer wiring board ML1 can be manufactured by applying the manufacturing methods shown in FIGS. 11 (a) to 11 (e). As shown in FIG. 17, the wiring mother board 3 </ b> A <b> 1 includes a plurality of double-sided multilayer wiring boards ML <b> 1, and the double-sided multilayer wiring board ML <b> 1 is provided with the multilayer wiring boards ML on both sides of the support board (core board) 13. That is, as shown in FIG. 17, the wiring mother board 3A1 is an assembly provided with a plurality of double-sided multilayer wiring boards ML1, and the plurality of double-sided multilayer wiring boards ML1 are provided so as to be arranged vertically and horizontally. Moreover, the manufacturing method of the double-sided multilayer wiring board ML1 may be the same as the known manufacturing method of the multilayer wiring board.

  As shown in FIG. 18, the electronic element 2 is bonded via an adhesive layer 7 on the insulating layer 5. The electronic element 2 is joined via the space S that houses the functional body 2b. In this case, in the electronic component 1, the element pad 2d of the element substrate 2a and the conductive bonding material 6 of the second insulator 4a are bonded to face each other to obtain an electric bond. In FIG. 18, only a portion corresponding to one electronic component 1 is illustrated.

  The double-sided multilayer wiring board ML1 and the element substrate 2a are bonded by, for example, heat curing at 150 (° C.) for 60 (min) while applying pressure. Note that the electrical bonding by the conductive bonding material 6 and the bonding by the adhesive layer 7 are simultaneously performed by, for example, a heat treatment of 150 (° C.) and 60 (min) while applying pressure. The heat curing process is performed on both sides of the upper and lower surfaces of the double-sided multilayer wiring board ML1, and the electronic element 2 is bonded to the upper and lower surfaces of the double-sided multilayer wiring board ML1 as shown in FIG.

  Therefore, the electronic element 2 is bonded to both the upper and lower surfaces of the double-sided multilayer wiring board ML1. As a result, the electronic component 1 shown in FIG. 3 is manufactured. The two electronic components 1 can be obtained by removing the support substrate (core substrate) 13 provided on the double-sided multilayer wiring board ML1.

  The bonding between the element mother board 2A and the wiring mother board 3A1 will be described. FIG. 19 is a plan view showing a state in which the element mother board 2A and the wiring mother board 3A1 are joined. FIG. 15 is different from FIG. 15 in that the electronic mother board 2A is bonded to both sides of the wiring mother board 3A1.

  As shown in FIG. 19, the bonding substrate 1B is obtained by bonding and bonding the element mother board 2A of the electronic element 2 to both sides of the wiring mother board 3A1. Moreover, in FIG. 19, sectional drawing which expanded six of the some electronic components 1 provided in the bonding board | substrate 1B is shown. As described above, the plurality of electronic components 1 are respectively provided on the upper surface and the lower surface of the double-sided multilayer wiring board ML1.

  The bonding substrate 1B is bonded by aligning the element mother board 2A located on the upper surface and the lower surface with respect to the wiring mother board 3A1. Further, the bonding substrate 1B may be bonded to the element mother substrate 2A in which the wiring mother substrate 3A1 is located on the upper surface and the lower surface.

  As shown in FIG. 19, the plurality of electronic elements 2 on the element mother board 2A are joined via the adhesive layer 7 on the insulating layer 5 of the double-sided multilayer wiring board ML1 of the wiring mother board 3A1. That is, the electronic element 2 is bonded to the corresponding double-sided multilayer wiring board ML1 via the adhesive layer 7. In this case, the element pads 2d of the plurality of electronic elements 2 of the element mother board 2A and the conductive bonding material 6 of the plurality of double-sided multilayer wiring boards ML1 of the wiring mother board 3A1 are bonded to face each other. Bonding is obtained.

  Therefore, as shown in FIG. 19, the bonded substrate board 1 </ b> B is an assembly in which a plurality of electronic components 1 are arranged vertically and horizontally, and the plurality of electronic components 1 are provided.

  And as shown in FIG. 19, the bonding board | substrate 1B is cut | disconnected along the cutting line 9 shown with the broken line, and the some electronic component 1 is separated into pieces, respectively. That is, the bonding substrate 1B is cut, and the individual electronic components 1 are separated from the bonding substrate 1A. For example, as shown in FIG. 19, two electronic components 1 are arranged in the vertical direction and three in the horizontal direction, cut along the cutting line 9 and removed by removing the support substrate (core substrate) 13. Separated from the composite substrate 1B. As a result, six electronic components 1 are obtained.

  Thus, when manufacturing the electronic component 1 from the bonding board | substrate 1B, since a lot of electronic components 1 can be manufactured at once, the productivity of the electronic component 1 further improves. That is, since the bonding substrate 1B can be cut and individual electronic components 1 can be manufactured in large quantities at a time, the productivity of the electronic components 1 is further improved as the production efficiency of the cutting process of the electronic components 1 is improved. .

  Further, in the bonded substrate board 1B, the bonded element mother board 2A and wiring mother board 3A1 are simultaneously cut in the same manner as the bonded substrate board 1A. The side surface of the substrate ML1 is flush with the surface. As described above, since the electronic component 1 can have the side surfaces flush with each other, the mounting accuracy is improved when mounting the electronic component 1 on the mounting board of the electronic device, and higher-density mounting is achieved. Is possible.

  Further, when the bonding substrate 1B cuts the element mother board 2A, the wiring mother board 3A1 and the element mother board 2A at the same time, even if the bonding substrate 1B is cut from the element mother board 2A located on the upper side, the element mother located on the lower side You may cut | disconnect from the board | substrate 2A side. Further, it may be simultaneously cut from the element mother board 2A side located on the upper side and the element mother board 2A side located on the lower side. The cutting method is appropriately set in consideration of the size of the bonded substrate 1B and the like.

  The present invention is not particularly limited to the above-described embodiments, and various changes and improvements can be made within the scope of the present invention.

  The electronic component is not limited to a SAW element. That is, the electronic element is not limited to a SAW element. The electronic element may not use an elastic wave. Moreover, you may utilize elastic waves other than SAW, such as a piezoelectric thin film resonator.

  Further, the wiring board is not limited to the one that mediates the electronic element and the mounting board. For example, the wiring board may function as a mother board (main board, main board) of an electronic device such as a portable device. The wiring board may be one on which a plurality of electronic elements are mounted.

  Further, the functional body may be formed of a conductor or may be formed of a semiconductor.

DESCRIPTION OF SYMBOLS 1 Electronic component 2 Electronic element 2a Element board | substrate 2b Functional body 2c Wiring 2d Element pad 3 1st wiring board 3a 1st insulator 3b 1st conductor layer 3c 1st penetration conductor 3d 3rd conductor layer 4 2nd Wiring board 4a Second insulator 4b Second conductor layer 4c Second through conductor 5 Insulating layer 6 Conductive bonding material 7 Adhesive layer 8 Circuit pattern 9 Cutting line 10 IDT
11 Reflector 12 External terminal 13 Support substrate (core substrate)
S space ML multilayer wiring board ML1 double-sided multilayer wiring board 1A, 1B bonding board 2A element mother board 3A, 3A1 wiring mother board

Claims (1)

An electronic component manufacturing method comprising an electronic element and a multilayer wiring board,
A first wiring board having a first through conductor and a first conductor layer provided on the first through conductor; and the first conductor laminated in the thickness direction of the first wiring board. And a second wiring board having a second through conductor located on the layer and having a second conductor layer electrically connected to the first conductor layer through the second through conductor. preparing a first wiring mother board in which a plurality of the multilayer wiring substrate is provided,
A first wiring board having a first through conductor and a first conductor layer provided on the first through conductor
A first conductor layer having a plate and a second through conductor that is laminated in the thickness direction of the first wiring board and positioned on the first conductor layer, and the second through conductor is interposed therebetween; Preparing a second wiring mother board provided with a plurality of the multilayer wiring boards comprising a second wiring board having a second conductor layer electrically connected to
An element substrate; a functional body provided on the element substrate; a wiring extending from the functional body to an outer peripheral side of the element substrate; and a position electrically connected to the wiring and corresponding to the second conductor layer a step in which a plurality of said electronic device providing a first element base board provided comprising a device pad provided on,
An element substrate; a functional body provided on the element substrate; a wiring extending from the functional body to an outer peripheral side of the element substrate; and a position electrically connected to the wiring and corresponding to the second conductor layer Preparing a second element mother board provided with a plurality of the electronic elements comprising element pads provided on
Bonding the first wiring board of the first wiring mother board and the first wiring board of the second wiring mother board facing each other via a support board;
Providing an insulating layer on the second wiring board of the first wiring mother board and the second wiring mother board to expose at least a part of the second conductor layer and surround the functional body; When,
Providing a conductive bonding material on the second conductor layer exposed from the insulating layer;
The step of bonding the element pad of the first element mother board and the conductive bonding material of the first wiring mother board facing each other and electrically bonding the element pad and the conductive bonding material When,
The step of bonding the element pad of the second element mother board and the conductive bonding material of the second wiring mother board facing each other and electrically bonding the element pad and the conductive bonding material When,
Cutting the bonded first element mother board , the first wiring mother board , the second wiring mother board, and the second element mother board simultaneously ;
Removing the support substrate between the first wiring board of the first wiring mother board and the first wiring board of the second wiring mother board and separating the plurality of electronic components. A method for manufacturing an electronic component, comprising:

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