JP6127820B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device.

  In an inverter circuit, a semiconductor device provided with an IGBT (Insulated Gate Bipolar Transistor) and a diode is put into practical use.

  Conventionally, in a semiconductor device, an IGBT and a diode have been provided as separate elements. However, when the IGBT and the diode are provided in the semiconductor device as separate elements, it is difficult to reduce the assembly (assembly) in the semiconductor device, and the number of components necessary for assembling the semiconductor device increases. Such a situation occurs that man-hours are required in the subsequent process (assembly, molding) of the semiconductor device. Therefore, an increase in cost due to this has been a problem.

  An RC (Reverse Conducting) -IGBT type semiconductor device in which an IGBT and a diode are mounted on the same chip solves the above problems. FIG. 3 is a schematic cross-sectional view showing an example of an RC-IGBT type semiconductor device in which an IGBT and a diode are mounted on the same chip. In FIG. 3, the semiconductor device 900 includes an IGBT unit 910 and a Diode unit 930. In the following, the side of the IGBT unit 910 where the emitter and gate are provided (or the side of the diode unit 930 where the anode is provided) is referred to as the surface side, and the side of the IGBT unit 910 where the collector is provided (or The side where the cathode is provided in the diode portion 930) is the back side.

  The IGBT portion 910 is a region that functions as a transistor. The IGBT portion 910 includes a surface electrode 911 (emitter electrode), a diffusion layer 912, a semiconductor substrate 913, a buffer layer 914, a collector layer 915, and a back electrode 916 (collector electrode). Are stacked in order from the front surface to the back surface. Further, the IGBT portion 910 is provided with a trench gate 918. Here, the trench gate 918 is provided with a gate insulating oxide film 919 inside and further filled with a gate polysilicon 917. A gate polysilicon 917 is also provided on the surface side of the trench gate 918 (where the trench gate 918 contacts the surface electrode 911).

  In the diffusion layer 912, an upper body layer 920, an intermediate layer 921, a carrier accumulation layer 922, and a lower body layer 923 are sequentially stacked from the front surface side to the back surface side. Here, the upper body layer 920, the carrier accumulation layer 922, and the lower body layer 923 have a structure in which n-type or p-type conductive layers are alternately stacked.

  The diode portion 930 is a region having a rectifying action, and the diode portion 930 includes a surface electrode 911, a diffusion layer 931, a semiconductor substrate 913, a buffer layer 914, a cathode layer 932, and a back electrode 916 (cathode electrode) from the front surface to the back surface. Are stacked in order. Further, a high-concentration region diffusion layer 933 is provided at a location above the diffusion layer 931 and connected to the surface electrode 911. A sidewall trench 934 is provided at the boundary between the IGBT portion 910 and the Diode portion 930. Here, the side wall trench 934 is provided with a gate insulating oxide film 935 inside, and further filled with polysilicon 936.

  At this time, the diffusion layer 931 in the diode portion 930 and the diffusion layer 912 in the IGBT portion 910 are disposed on the same plane.

  Patent Document 1 discloses a semiconductor device including a diode cell region and an IGBT cell region in one chip. In Patent Document 1, the P conductivity type region connected to the anode electrode in the diode cell region and the base layer in the IGBT cell region are arranged on the same plane.

JP 2009-021557 A

  In the RC-IGBT type semiconductor device, power loss due to the resistance of the element occurs in the diode portion, so that there is a problem that heat is greatly generated in the diode portion. In order to suppress the temperature rise due to the heat generation, it is necessary to reduce the heat generation amount per unit area by increasing the area of the diode portion on the substrate. That is, the area of the diode portion could not be reduced.

  As a method for suppressing power loss in the diode portion, it is conceivable to reduce the thickness (thinner) of the semiconductor device. However, if an attempt is made to reduce the thickness of the RC-IGBT type semiconductor device, there is a risk that a breakdown voltage is lowered in the IGBT portion.

  FIG. 4 is a schematic cross-sectional view showing an example of the IGBT portion of the semiconductor device. Here, FIG. 4A is a schematic cross-sectional view showing an example of the IGBT portion when the semiconductor device is 165 μm, and FIG. 4B is an example of the IGBT portion when the semiconductor device is 125 μm. It is the typical sectional view shown. Here, in the IGBT part shown in FIG. 4 (a) and the IGBT part shown in FIG. 4 (b), the depletion region (depletion layer) at the time of breakdown is substantially the same length, but the IGBT part shown in FIG. 4 (a). In FIG. 4B, there is a sufficient thickness between the depletion layer and the buffer layer, whereas in the IGBT portion shown in FIG. 4B, a buffer layer is provided immediately below the depletion layer.

  FIG. 5A is a graph of actual measurement values showing the breakdown voltage characteristics of the IGBT section shown in FIG. 5A, the horizontal axis indicates the voltage Vce (V) applied to the IGBT portion, and the vertical axis indicates the current Ices (μA) flowing through the IGBT portion (the same applies to FIG. 5B). As shown in FIG. 5A, when the thickness of the IGBT portion is 165 μm, the current Ices flowing through the IGBT portion rapidly increases at a voltage Vce of 1260 to 1280 V or higher. This 1260 to 1280 V is the withstand voltage of the original semiconductor device, and the semiconductor device is in a normal operating state. In this case, the back surface state of the semiconductor device does not affect the current flow in the depletion layer.

  FIG. 5B is a graph of actual measurement values showing the breakdown voltage characteristics of the IGBT section shown in FIG. As shown in FIG. 5B, when the thickness of the IGBT portion is 125 μm, the flowing current Ices increases rapidly at a voltage Vce of 600 V smaller than 1260 to 1280 V. This is because the state of the back surface of the IGBT part affects the current flow in the depletion layer. That is, when the thickness of the IGBT portion is reduced, the withstand voltage decreases due to scratches or foreign matter adhering to the back surface of the semiconductor device.

  Although there is an example in which the semiconductor device is made thin by changing the element structure of the IGBT part, it is more difficult than making the diode part thin.

  For the above reasons, there has been a limit to the reduction in the thickness of semiconductor devices due to problems such as a decrease in breakdown voltage of the IGBT portion. Therefore, the thickness of the diode portion is the same as that of the IGBT portion and is not thinned, and there is a problem that a loss in the diode portion due to element resistance increases (a problem that energy saving cannot be performed).

  The present invention has been made to solve such a problem, and an object of the present invention is to provide a semiconductor device capable of suppressing heat generation in the diode portion without reducing the withstand voltage.

  The semiconductor device of the present invention is a semiconductor device in which an IGBT region and a diode region are formed on the same semiconductor substrate. The diode region is connected to the surface electrode provided on the first main surface of the semiconductor substrate, the cathode electrode provided on the second main surface of the semiconductor substrate, and the surface electrode, and compared to the surface electrode. An anode electrode formed on the second main surface side, polysilicon provided at a position surrounding the side surface of the anode electrode, and connected to the anode electrode, and laminated between the anode electrode and the cathode electrode A diffusion layer. With such a configuration, the semiconductor device can reduce the length between the anode and the cathode of the diode portion with respect to the length between the emitter and the collector of the IGBT portion. It is possible to suppress heat generation at the part.

  According to the present invention, it is possible to provide a semiconductor device capable of suppressing heat generation in the diode portion without reducing the withstand voltage.

1 is a schematic cross-sectional view showing an example of a semiconductor device according to a first embodiment. 1 is a schematic first cross-sectional view of a semiconductor device illustrating an example of a method for manufacturing a semiconductor device according to a first embodiment; FIG. 6 is a schematic second cross-sectional view of the semiconductor device showing an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 6 is a schematic third cross-sectional view of the semiconductor device showing an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 6 is a schematic fourth cross-sectional view of the semiconductor device showing an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a schematic fifth cross-sectional view of the semiconductor device showing an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a schematic sixth cross-sectional view of the semiconductor device, illustrating an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a schematic seventh cross-sectional view of the semiconductor device, illustrating an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a schematic eighth cross-sectional view of the semiconductor device, illustrating an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a schematic ninth cross-sectional view of the semiconductor device showing an example of the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a schematic tenth cross-sectional view of the semiconductor device showing an example of the method for manufacturing the semiconductor device according to the first embodiment; It is typical sectional drawing which showed an example of the semiconductor device concerning related technology. It is typical sectional drawing which showed an example of the IGBT part of the semiconductor device concerning related technology. It is the 1st graph of the actual value which showed the pressure | voltage resistant characteristic of the IGBT part concerning related technology. It is the 2nd graph of the measured value which showed the pressure | voltage resistant characteristic of the IGBT part concerning related technology.

Embodiment 1
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing an example of the semiconductor device according to the first embodiment.

  In FIG. 1, the semiconductor device 100 includes an IGBT unit 110 (IGBT region) and a diode unit (diode region) 130. The IGBT units 110 and the diode units 130 are formed on the same semiconductor substrate and are alternately arranged in the semiconductor device 100. Hereinafter, the emitter side (gate side) of the IGBT unit 110 in the semiconductor device 100 and the anode side of the diode unit 130 are defined as the front side or the upper side of the semiconductor device 100, and the collector side of the IGBT unit 110 in the semiconductor device 100. The cathode side of the diode unit 130 is defined as the back side or the bottom side of the semiconductor device 100. The front or upper surface of the semiconductor device 100 is also referred to as a first main surface, and the back or lower surface of the semiconductor device 100 is also referred to as a second main surface.

  The IGBT portion 110 is a region that acts as a transistor. The IGBT portion 110 includes a surface electrode 111 (emitter electrode), a diffusion layer 112 (first diffusion layer), a semiconductor substrate 113, a buffer layer 114, a collector layer 115, The back electrode 116 (collector electrode) is laminated in order from the front surface to the back surface. Further, in the IGBT portion 110, a gate polysilicon 117, a trench gate 118, and a gate insulating oxide film 119 are provided.

  The surface electrode 111 is an electrode provided on the surface of the IGBT unit 110 and serves as an emitter in the IGBT unit 110. The back electrode 116 is an electrode provided on the back surface of the semiconductor device 100. The collector layer 115 and the back electrode 116 serve as a collector in the IGBT part 110.

  The diffusion layer 112 is connected to the front surface electrode 111 and is a diffusion layer laminated between the front surface electrode 111 and the back surface electrode 116. In the diffusion layer 112, the upper body layer 120, the intermediate layer 121, the carrier accumulation layer 122, and the lower body layer 123 are laminated in order from the front surface side to the back surface side. Here, the upper body layer 120, the carrier accumulation layer 122, and the lower body layer 123 have a structure in which n-type or p-type conductive layers are alternately stacked.

  The semiconductor substrate 113 is a depletion region of the IGBT part 110.

  The trench gate 118 is provided with a gate insulating oxide film 119 therein, and further filled with gate polysilicon 117 therein. That is, the gate polysilicon 117 and the trench gate 118 are connected via the gate insulating oxide film 119. The gate polysilicon 117 is also provided on the surface side of the trench gate 118 (the upper surface of the diffusion layer 112 where the trench gate 118 contacts the surface electrode 111). The gate polysilicon 117 disposed at this location is also covered with the gate insulating oxide film 119. By doing so, the gate polysilicon 117 and the diffusion layer 112 are not directly connected. The gate polysilicon 117 serves as a gate in the IGBT unit 110.

  The trench gate 118 reaches from the upper surface of the diffusion layer 112 to the middle (part) of the semiconductor substrate 113. In other words, the depth of the trench gate 118 is larger than the thickness of the diffusion layer 112 and thinner than the thickness of the diffusion layer 112 and the semiconductor substrate 113. In FIG. 1, two trench gates 118 are provided in one IGBT unit 110, but the number of trench gates provided in one IGBT unit 110 may be other numbers such as three, four,. Good.

  Next, the diode unit 130 will be described. The diode portion 130 is a region that exhibits a rectifying action. The diode portion 130 includes a surface electrode 111, polysilicon 131, an insulating oxide film 132, a diffusion layer 133, a semiconductor substrate 113, a buffer layer 114, a cathode layer 134, and a back electrode 116. (Cathode electrodes) are stacked in order from the front surface to the back surface. Furthermore, the diode portion 130 is provided with a buried electrode 135 (anode electrode) and a high concentration region opening diffusion layer 136. In addition, about the same part as the component of the IGBT part 110, description is abbreviate | omitted suitably.

  The polysilicon 131 is provided (formed) immediately below the surface electrode 111, and the embedded electrode 135 is embedded inside. In other words, the side surface of the buried electrode 135 is surrounded by the polysilicon 131. The upper surface of the polysilicon 131 is substantially flush with the upper surface of the diffusion layer 112. The insulating oxide film 132 is provided between the polysilicon 131 and the diffusion layer 133.

  The embedded electrode 135 is provided on the upper portion of the diode portion 130 and reaches from the lower surface of the surface electrode 111 to the upper surface of the diffusion layer 133. In other words, the thickness of the buried electrode 135 is substantially the same as the thickness of the polysilicon 131. The embedded electrode 135 serves as an anode in the diode unit 130. The embedded electrode 135 is an electrode composed of a material (aluminum, copper, etc.) having high electrical conductivity and thermal conductivity.

  The diffusion layer 133 is a diffusion layer connected to the embedded electrode 135 and stacked between the embedded electrode 135 and the back electrode 116. The diffusion layer 133 is a p-type conductivity type layer. The high-concentration region opening diffusion layer 136 is provided immediately below the buried electrode 135 and inside the diffusion layer 133, and is a p-type conductive layer having an internal impurity concentration higher than that of the diffusion layer 133.

  The length from the surface of the semiconductor device 100 to the diffusion layer 133 is longer than the length from the surface of the semiconductor device 100 to the diffusion layer 112. That is, the diffusion layer 133 (diode element surface) is formed in a lower region (at a deeper position) than the diffusion layer 112 (transistor element surface).

  The cathode layer 134 and the back surface electrode 116 are electrodes provided on the back surface of the semiconductor device 100 and serve as a cathode in the diode portion 130. The cathode layer 134 is an n-type conductivity layer.

  A sidewall trench 137 is provided at the boundary between the IGBT unit 110 and the diode unit 130. Here, the side wall trench 137 has an insulating oxide wall 138 formed therein, and further filled with polysilicon 139 therein.

  The side wall trench 137 reaches from the lower surface of the surface electrode 111 to the middle (part) of the semiconductor substrate 113. That is, the depth of the sidewall trench 137 is thicker than the thickness from the lower surface of the surface electrode 111 to the lower surface of the diffusion layer 133, and thinner than the thickness from the lower surface of the surface electrode 111 to the lower surface of the semiconductor substrate 113. More specifically, the diode portion 130 has a side wall portion (a boundary portion between the IGBT portion 110 and the diode portion 130) and is deeper than the diffusion layer 133 of the diode portion 130 by the side wall trench 137 and the insulating oxide wall 138. And insulated.

  2A to 2J are schematic cross-sectional views of the semiconductor device 100 illustrating an example of a method for manufacturing the semiconductor device 100. FIG. Hereinafter, a method for manufacturing the semiconductor device 100 will be described with reference to FIGS. 2A to 2J.

<FIG. 2A>
First, in the semiconductor substrate 113 of the semiconductor device 100, a sidewall trench 137 is formed by drilling a boundary between the IGBT portion 110 and the diode portion 130 (that is, a sidewall portion of the diode portion 130). As described above, the sidewall trench 137 is formed to a position deeper than the diffusion layer 133 provided in a later manufacturing process.

<FIG. 2B>
Next, a field oxide film 140 is formed on the semiconductor substrate 113, and an insulating oxide wall 138 is formed inside the sidewall trench 137.

<FIG. 2C>
Next, the field oxide film 140 formed on the upper portion of the diode portion 130 is removed by dry etching (opening the diode portion 130).

<FIG. 2D>
Next, in the diode part 130, the semiconductor substrate 113 is dug deeply. However, the depth at which the semiconductor substrate 113 is dug is made shallower than the depth of the sidewall trench 137.

<Fig. 2E>
Next, the diffusion layer 112 and the diffusion layer 133 are formed on the upper surface of the semiconductor substrate 113 in the IGBT portion 110 and the upper surface of the semiconductor substrate 113 in the Diode portion 130, respectively.

<Fig. 2F>
Next, in the IGBT part 110, a trench gate 118 is formed so as to reach a part of the semiconductor substrate 113 from the upper surface of the diffusion layer 112. At this time, a gate insulating oxide film 119 is formed inside the trench gate 118. In addition to forming the gate insulating oxide film 119 on the upper surface of the diffusion layer 112, the insulating oxide film 132 is also formed on the upper surface of the diffusion layer 133.

<Fig. 2G>
Next, a layer of gate polysilicon 117 is formed on the upper surface of the gate insulating oxide film 119 in the IGBT portion 110. A layer of polysilicon 131 is also formed on the upper surface of the insulating oxide film 132 in the diode portion 130. Here, the gate polysilicon 117 and the polysilicon 139 are buried in the trench gate 118 and the sidewall trench 137, respectively. In the diode portion 130, the polysilicon 131 is formed in the vicinity of the sidewall trench 137 so as to be substantially flush with the layer of the gate polysilicon 117. In this way, polysilicon is formed in the semiconductor device 100.

<Fig. 2H>
Next, by performing dry etching on the gate polysilicon 117, the gate polysilicon 117 formed on portions other than the upper surface of the trench gate 118 is removed in the IGBT portion 110. Note that a gate polysilicon 117 is embedded in the trench gate 118.

  Further, in the diode portion 130, the polysilicon 131 is removed except in the vicinity of the sidewall trench 137. At this time, the high concentration region opening diffusion layer 136 is formed above the diffusion layer 133 in the portion where the polysilicon 131 is removed.

<Fig. 2I>
Next, in the diode portion 130, the embedded electrode 135 is embedded on the upper surface of the high concentration region opening diffusion layer 136. Here, the upper surface of the polysilicon 131 and the upper surface of the embedded electrode 135 are substantially flush. The embedded electrode 135 is embedded after the semiconductor device 100 is cooled from the state shown in FIG. 2H.

  Further, in the IGBT portion 110, the gate polysilicon 117 provided on the trench gate 118 is covered with a gate insulating oxide film 119.

<Fig. 2J>
Finally, the surface electrode 111 is formed on the upper surfaces of the IGBT part 110 and the diode part 130. Further, the buffer layer 114, the collector layer 115, and the back electrode 116 are formed on the back side of the IGBT unit 110, and the buffer layer 114, the cathode layer 134, and the back electrode 116 are formed on the back side of the diode unit 130. Through the above processing, the semiconductor device 100 is formed.

  In the semiconductor device 100, the thickness of the layer constituting the diode element in the diode portion 130 is made thinner than the thickness of the layer constituting the transistor element in the IGBT portion 110. Specifically, in the semiconductor device 100, the diffusion layer 133 in the diode unit 130 is provided at a deeper position from the surface of the semiconductor device 100 than the diffusion layer 112 in the IGBT unit 110. That is, the length between the anode and the cathode of the diode is made shorter than the length between the emitter and the collector in the transistor region. Since the diode region can be formed thin, the element resistance in the diode region can be reduced, and loss from the diode region can be suppressed (low loss). In addition, since the loss in the diode region can be reduced, heat generation in the diode region can be suppressed.

  And since the thickness of the transistor region in the IGBT part 110 can be maintained, the breakdown voltage of the IGBT part 110 can be prevented from being lowered.

  Further, in the diode part 130, a buried electrode 135 is provided on the upper surface of the diffusion layer 133. The embedded electrode 135 is provided between the surface electrode 111 and the diffusion layer 133 and has a certain thickness. By providing the embedded electrode 135, it is possible to improve the heat dissipation characteristics (cooling function) of the diode unit 130 and increase the thermal mass of the diode unit 130. Therefore, it is not necessary to reduce the heat generation amount per unit area of the diode section 130, and the area of the diode section 130 can be further reduced. Furthermore, since the heat dissipation characteristics of the diode section 130 are improved, the resistance of the diode element can be increased.

  In the present invention, the side surface of the buried electrode 135 is surrounded by the polysilicon formed in the step of forming the polysilicon in the manufacturing process of the semiconductor device 100. Here, in the state where the semiconductor device 100 is cooled (that is, the state where the polysilicon 131 is contracted), the embedded electrode 135 is embedded. In this way, by effectively utilizing the gate polysilicon formed in the manufacturing process, stress relaxation against thermal contraction of the gate polysilicon can be realized without adding the number of manufacturing processes of the semiconductor device. Therefore, the semiconductor device 100 can be generated with high accuracy.

  Note that the present invention is not limited to the above-described embodiment, and can be changed as appropriate without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 100 Semiconductor device 110 IGBT part 111 Front surface electrode 112 Diffusion layer 113 Semiconductor substrate 114 Buffer layer 115 Collector layer 116 Back surface electrode 117 Gate polysilicon 118 Trench gate 119 Gate insulating oxide film 120 Upper body layer 121 Intermediate layer 122 Carrier accumulation layer 123 Lower body Layer 130 Diode portion 131 Polysilicon 132 Insulating oxide film 133 Diffusion layer 134 Cathode layer 135 Buried electrode 136 High-concentration region opening diffusion layer 137 Side wall trench 138 Insulating oxide wall 139 Polysilicon 140 Field oxide film

Claims (3)

A semiconductor device in which an IGBT region and a diode region are formed on the same semiconductor substrate,
The diode region is
A surface electrode provided on the first main surface of the semiconductor substrate;
A cathode electrode provided on the second main surface of the semiconductor substrate;
An anode electrode connected to the surface electrode and formed on the second main surface side compared to the surface electrode;
Polysilicon provided in contact with the side surface of the anode electrode and surrounding the side surface of the anode electrode ;
Which is connected to the anode electrode, have a, a diffusion layer laminated between the cathode electrode and the anode electrode,
The polysilicon is provided directly below the surface electrode,
The diode region is insulated from the IGBT region by using a side wall trench formed from a lower surface of the surface electrode to a position deeper than the diffusion layer in a side surface portion of the diode region.
Semiconductor device.   The semiconductor device according to claim 1, wherein the anode electrode is made of copper.   The semiconductor device includes a high-concentration region opening diffusion layer that is provided inside the diffusion layer immediately below the anode electrode and is a p-type conductivity type layer having an impurity concentration higher than that of the diffusion layer. Or the semiconductor device according to 2;