JP6118765B2 - Heat treatment method for silicon single crystal wafer - Google Patents

Heat treatment method for silicon single crystal wafer Download PDF

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JP6118765B2
JP6118765B2 JP2014137350A JP2014137350A JP6118765B2 JP 6118765 B2 JP6118765 B2 JP 6118765B2 JP 2014137350 A JP2014137350 A JP 2014137350A JP 2014137350 A JP2014137350 A JP 2014137350A JP 6118765 B2 JP6118765 B2 JP 6118765B2
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heat treatment
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silicon single
crystal wafer
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JP2016015426A (en
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曲　偉峰
偉峰 曲
田原　史夫
史夫 田原
昌弘 櫻田
昌弘 櫻田
高橋　修治
修治 高橋
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Mimasu Semiconductor Industry Co Ltd
Shin Etsu Handotai Co Ltd
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Mimasu Semiconductor Industry Co Ltd
Shin Etsu Handotai Co Ltd
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02—Heat treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Description

本発明は、シリコン単結晶ウェーハの熱処理方法に関する。   The present invention relates to a heat treatment method for a silicon single crystal wafer.

シリコン単結晶ウェーハの品質評価における一つの指標に、ＴＤＤＢ（Ｔｉｍｅ Ｄｅｐｅｎｄｅｎｔ Ｄｉｅｌｅｃｔｒｉｃ Ｂｒｅａｋｄｏｗｎ：経時絶縁破壊）特性がある。このＴＤＤＢ特性が優れたウェーハを提供する方法として、特許文献１には、ベーカンシー（Ｖａｃａｎｃｙ：以下、Ｖａとも表記する。）と呼ばれる点欠陥である空孔や、インタースティシャルシリコン（Ｉｎｔｅｒｓｔｉｔｉａｌ Ｓｉｌｉｃｏｎ：以下、Ｉ−Ｓｉとも表記する。）と呼ばれる格子間型の点欠陥の過不足が少ないニュートラル（Ｎｅｕｔｒａｌ：以下Ｎともいう）領域を径方向の全面に有するウェーハを、急速熱処理装置を用いて熱処理することが記載されている。   One index in the quality evaluation of a silicon single crystal wafer is a TDDB (Time Dependent Dielectric Breakdown) characteristic. As a method of providing a wafer having excellent TDDB characteristics, Patent Document 1 discloses a point defect called a vacancy (hereinafter also referred to as “Va”) or an interstitial silicon (hereinafter “Interstitial Silicon”). , Also referred to as I-Si.) A wafer having a neutral (hereinafter also referred to as “N”) region with a small amount of excess and deficiency of interstitial point defects called “N” is heat-treated using a rapid heat treatment apparatus. It is described.

特許文献１によれば、まず、ウェーハを酸化性雰囲気下で急速熱処理（以下、酸化性雰囲気下での急速熱処理を、ＲＴＯと呼称する場合がある）し、その後、酸化膜を除去してから、非酸化性雰囲気下で急速熱処理（以下、非酸化性雰囲気下での急速熱処理を、ここでは単にＲＴＡと呼称する場合がある）する方法が開示されている。しかし、特許文献１等の方法で、空孔や点欠陥の過不足が少ないＮ領域結晶から成るウェーハを熱処理する場合であっても、ウェーハの面内に酸素析出核の不均一部分が存在し、ＲＴＡの酸素析出促進効果で酸素析出が不均一となる現象が顕著化してしまう。その結果、大きな酸素析出物が形成されることによりＴＤＤＢ特性に影響を及ぼすという問題がある。   According to Patent Document 1, first, a wafer is subjected to rapid thermal processing in an oxidizing atmosphere (hereinafter, rapid thermal processing in an oxidizing atmosphere may be referred to as RTO), and then the oxide film is removed. A method of rapid thermal processing in a non-oxidizing atmosphere (hereinafter, rapid thermal processing in a non-oxidizing atmosphere may be simply referred to as RTA herein) is disclosed. However, even when a wafer made of an N region crystal with few excess or deficiency of vacancies and point defects is heat-treated by the method of Patent Document 1 or the like, there is an uneven portion of oxygen precipitation nuclei in the plane of the wafer. The phenomenon of non-uniform oxygen precipitation becomes prominent due to the RTA oxygen precipitation promoting effect. As a result, there is a problem that TDDB characteristics are affected by the formation of large oxygen precipitates.

特開２００８−２０７９９１号公報JP 2008-207991 A

この現象が起こる主な原因を以下に説明する。
上記の空孔や点欠陥の過不足が少ないＮ領域から成るウェーハであっても、そのＮ領域には、Ｖａが優勢なＮｖ領域とＩ−Ｓｉが優勢なＮｉ領域が存在する。ここで、Ｎｖ領域はＮｉ領域と比較して酸素析出核が多いので、径方向の全面がＮｖ領域からなるシリコン単結晶ウェーハを、非酸化性雰囲気下で急速熱処理すると、径方向の全面がＮｉ領域からなるシリコン単結晶ウェーハを同様に熱処理した場合に比べ酸素析出促進効果が大きくなる。同様に、径方向の全面にＯＳＦ（Ｏｘｉｄａｔｉｏｎ ｉｎｄｕｃｅｄ Ｓｔａｃｋｉｎｇ Ｆａｕｌｔｓ：酸化誘起積層欠陥）領域とＮｖ領域が混在しているシリコン単結晶ウェーハを、非酸化性雰囲気下で急速熱処理すると、径方向の全面がＮｉ領域からなるシリコン単結晶ウェーハに比べ酸素析出促進効果が大きくなる。 The main cause of this phenomenon will be described below.
Even if the wafer is composed of an N region with few vacancies and point defects, the N region includes an Nv region where Va is dominant and an Ni region where I-Si is dominant. Here, since the Nv region has more oxygen precipitation nuclei than the Ni region, when a silicon single crystal wafer whose entire surface in the radial direction is composed of the Nv region is rapidly heat-treated in a non-oxidizing atmosphere, the entire surface in the radial direction is Ni. The effect of promoting oxygen precipitation is greater than when a silicon single crystal wafer composed of regions is similarly heat-treated. Similarly, when a silicon single crystal wafer in which an OSF (Oxidation Induced Stacking Faults) region and an Nv region are mixed on the entire radial surface is rapidly heat-treated in a non-oxidizing atmosphere, the entire radial surface is obtained. The effect of promoting oxygen precipitation is greater than that of a silicon single crystal wafer made of Ni region.

さらに、特許文献１のように、ＲＴＯ後に、酸化膜を除去してからＲＴＡを行うと、ＲＴＡにおいて空孔が注入されやすく、過剰に空孔が注入されてしまい、酸素析出促進効果をより加速する作用をもたらす。よって、ウェーハ面内に、酸素析出しやすいＮｖ領域及びＯＳＦ領域と、酸素析出し難いＮｉ領域が混在すると、ウェーハ面内において、酸素析出物密度のばらつきや、大きな酸素析出物が生じてしまい、その結果、優れたＴＤＤＢ特性が得られないと考えられる。   Further, as in Patent Document 1, if RTA is performed after removing the oxide film after RTO, vacancies are likely to be injected in RTA, and excessive vacancies are injected, further accelerating the effect of promoting oxygen precipitation. To bring about the effect of Therefore, if the Nv region and the OSF region where oxygen is likely to precipitate and the Ni region where oxygen is difficult to precipitate are mixed in the wafer surface, variations in the oxygen precipitate density and large oxygen precipitates occur in the wafer surface. As a result, it is considered that excellent TDDB characteristics cannot be obtained.

また、シリコン単結晶ウェーハの径方向の全面がＮｖ領域のみやＮｉ領域のみとなるように、シリコン単結晶インゴットを引き上げることは非常に困難であり、製造歩留の大きな低下を招き、この方法でのシリコン単結晶ウェーハの量産は現実的でない。   In addition, it is very difficult to pull up the silicon single crystal ingot so that the entire surface in the radial direction of the silicon single crystal wafer is only the Nv region or the Ni region. The mass production of silicon single crystal wafers is not realistic.

本発明は前述のような問題に鑑みてなされたもので、ウェーハ内部にゲッタリングサイトとなる酸素析出物を均一に形成することができるシリコン単結晶ウェーハを得ることができるシリコン単結晶ウェーハの熱処理方法を提供することを目的とする。   The present invention has been made in view of the above-described problems, and heat treatment of a silicon single crystal wafer capable of obtaining a silicon single crystal wafer capable of uniformly forming oxygen precipitates serving as gettering sites inside the wafer. It aims to provide a method.

上記目的を達成するために、本発明は、シリコン単結晶ウェーハの熱処理方法であって、チョクラルスキー法により作製した、径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハを、１０００−１２７５℃で１０−３０秒間、酸化性雰囲気下で急速熱処理する酸化性熱処理を実施し、更に、該酸化性熱処理に連続して、当該酸化性熱処理で形成された酸化膜が付いたままのシリコン単結晶ウェーハを、前記酸化性熱処理における熱処理温度以上の温度で１０−３０秒間、非酸化性雰囲気下で急速熱処理する非酸化性熱処理を実施することを特徴とするシリコン単結晶ウェーハの熱処理方法を提供する。   In order to achieve the above object, the present invention is a heat treatment method for a silicon single crystal wafer, which is produced by the Czochralski method, wherein the entire radial surface is an N region, or the entire radial direction is an OSF region and an N region. The silicon single crystal wafer mixed with silicon is subjected to an oxidative heat treatment for rapid heat treatment in an oxidizing atmosphere at 1000-1275 ° C. for 10-30 seconds. Further, following the oxidative heat treatment, A non-oxidizing heat treatment is performed in which the silicon single crystal wafer with the formed oxide film attached is rapidly heat-treated in a non-oxidizing atmosphere for 10 to 30 seconds at a temperature equal to or higher than the heat treatment temperature in the oxidizing heat treatment. A silicon single crystal wafer heat treatment method is provided.

このように、酸化性雰囲気下でのＲＴＯでは、熱処理温度を１０００℃以上にすることにより、ＯＳＦ領域におけるＯＳＦ核を消滅又は不活性化させたり、格子間シリコンを注入してＮｖ領域をＮｉ領域に変化させたりすることができる。また、ＲＴＯにおける熱処理温度を１２７５℃以下にすることにより、Ｎｉ領域がＩ領域になるのを抑制することができる。また、その後の非酸化性雰囲気下でのＲＴＡでは、熱処理温度をＲＴＯの温度以上にすることにより空孔が注入されるが、このとき酸化膜を介してウェーハ内部に空孔を注入することにより、過剰に空孔が注入されるのを抑制できる。これらの、Ｎｉ領域化や、過剰な空孔注入の抑制によって、酸素析出が不均一となる現象が顕著化するのを防止できる。従って、ウェーハ面内の酸素析出物を均一な分布で形成することができるシリコン単結晶ウェーハを得ることができる。そのため、大きな酸素析出物などが形成されるのを抑制することができ、ＴＤＤＢ特性等に悪影響が及ぶのを防ぐことができる。また、表層にＤＺ層を形成できる。更に、本発明はＲＴＯで形成された酸化膜を除去する工程がないので、シリコン単結晶ウェーハの製造工程を簡略化することができ、高い生産効率を維持することができる。また、連続した急速熱処理のため、熱処理に費やす時間が短時間で済む。   As described above, in the RTO under an oxidizing atmosphere, the OSF nucleus in the OSF region is extinguished or deactivated by setting the heat treatment temperature to 1000 ° C. or more, or interstitial silicon is implanted to convert the Nv region into the Ni region. Can be changed. Moreover, it can suppress that Ni area | region becomes I area | region by making the heat processing temperature in RTO into 1275 degrees C or less. Further, in the subsequent RTA in a non-oxidizing atmosphere, vacancies are injected by setting the heat treatment temperature to be equal to or higher than the temperature of RTO. At this time, vacancies are injected into the wafer through the oxide film. , Excessive injection of holes can be suppressed. It is possible to prevent the phenomenon of non-uniform oxygen precipitation from becoming noticeable by the formation of the Ni region and the suppression of excessive vacancy injection. Therefore, a silicon single crystal wafer capable of forming oxygen precipitates in the wafer surface with a uniform distribution can be obtained. Therefore, formation of large oxygen precipitates and the like can be suppressed, and adverse effects on TDDB characteristics and the like can be prevented. Further, a DZ layer can be formed on the surface layer. Furthermore, since the present invention does not have a process of removing the oxide film formed by RTO, the manufacturing process of the silicon single crystal wafer can be simplified, and high production efficiency can be maintained. In addition, because of the rapid heat treatment, the time required for the heat treatment is short.

このとき、前記非酸化性熱処理における熱処理温度を、前記酸化性熱処理の熱処理温度より２５℃以上高い温度とすることが好ましい。   At this time, it is preferable that the heat treatment temperature in the non-oxidative heat treatment is a temperature higher by 25 ° C. or more than the heat treatment temperature of the oxidative heat treatment.

本発明では、酸化膜を介してシリコン単結晶ウェーハの内部に空孔を注入するため、このようにＲＴＡの熱処理温度をＲＴＯの熱処理温度より２５℃以上高温とすれば、より効率良く、かつ、面内均一に空孔を注入することができる。   In the present invention, since the vacancies are injected into the silicon single crystal wafer through the oxide film, if the heat treatment temperature of the RTA is 25 ° C. or more higher than the heat treatment temperature of the RTO in this way, and more efficiently, Holes can be injected uniformly in the plane.

またこのとき、前記酸化性熱処理における熱処理温度を１０２５℃以上とすることができる。   At this time, the heat treatment temperature in the oxidizing heat treatment can be set to 1025 ° C. or higher.

このようにすれば、ＯＳＦ核をより確実に消滅または不活性化させ、かつ、Ｎｖ領域のＮｉ領域化をより一層促進させることができる。   In this way, OSF nuclei can be more reliably extinguished or inactivated, and the Nv region can be further promoted to be a Ni region.

このとき、前記酸化性熱処理における酸化性雰囲気を、酸素を含む雰囲気とすることができる。   At this time, the oxidizing atmosphere in the oxidizing heat treatment can be an atmosphere containing oxygen.

このように、酸化性雰囲気として、酸素を含む雰囲気を使用すれば、効率よくシリコン単結晶ウェーハの表面に酸化膜を形成することができる。   Thus, if an atmosphere containing oxygen is used as the oxidizing atmosphere, an oxide film can be efficiently formed on the surface of the silicon single crystal wafer.

またこのとき、前記非酸化性熱処理における非酸化性雰囲気を、窒化性雰囲気、Ａｒ雰囲気、またはこれらの混合雰囲気とすることができる。   At this time, the non-oxidizing atmosphere in the non-oxidizing heat treatment can be a nitriding atmosphere, an Ar atmosphere, or a mixed atmosphere thereof.

非酸化性雰囲気としては、これらのような雰囲気がよく用いられる。   As such a non-oxidizing atmosphere, such an atmosphere is often used.

本発明のシリコン単結晶ウェーハの熱処理方法であれば、ウェーハ表面からデバイス活性領域となる一定の深さまで、結晶欠陥の発生がないＤＺ層を形成することができる。また、酸素析出熱処理等によって、ウェーハ内部にはゲッタリングサイトとなる酸素析出物を均一に形成することができるシリコン単結晶ウェーハを得ることができる。   If it is the heat processing method of the silicon single crystal wafer of this invention, the DZ layer which does not generate | occur | produce a crystal defect can be formed from the wafer surface to the fixed depth used as a device active region. In addition, a silicon single crystal wafer capable of uniformly forming oxygen precipitates serving as gettering sites inside the wafer can be obtained by oxygen precipitation heat treatment or the like.

本発明のシリコン単結晶ウェーハの熱処理方法の一例を示したフロー図である。It is the flowchart which showed an example of the heat processing method of the silicon single crystal wafer of this invention. 本発明において用いることができる単結晶引き上げ装置の一例を示す概略図である。It is the schematic which shows an example of the single crystal pulling apparatus which can be used in this invention. 本発明において用いることができる急速熱処理装置の一例を示す概略図である。It is the schematic which shows an example of the rapid thermal processing apparatus which can be used in this invention. 実施例１−４のＴＤＤＢの評価結果をまとめた図である。It is the figure which put together the evaluation result of TDDB of Example 1-4. 実施例１−４のシリコン単結晶ウェーハの表面からの深さに対する、ＢＭＤの密度を示す図である。It is a figure which shows the density of BMD with respect to the depth from the surface of the silicon single crystal wafer of Example 1-4. 比較例１−４の熱処理条件、ＢＭＤの評価結果、及びＴＤＤＢの評価結果をまとめた図である。It is the figure which put together the heat processing conditions of Comparative Example 1-4, the evaluation result of BMD, and the evaluation result of TDDB.

以下、本発明について実施の形態を説明するが、本発明はこれに限定されるものではない。
上記のように、従来、二段階の急速熱処理を施す熱処理方法が行われてきたが、酸素析出熱処理等を行うと、特に、ウェーハ面内に酸素析出しやすいＮｖ領域やＯＳＦ領域と、酸素析出し難いＮｉ領域が混在している場合に、酸素析出物の密度のばらつきが生じ易くなり、その結果、優れたＴＤＤＢ特性が得られないという問題があった。 Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.
As described above, a heat treatment method for performing a two-stage rapid heat treatment has been conventionally performed. However, when an oxygen precipitation heat treatment or the like is performed, particularly, an Nv region or an OSF region in which oxygen is likely to precipitate in the wafer surface, and oxygen precipitation. When Ni regions that are difficult to be mixed are present, the density of oxygen precipitates tends to vary, and as a result, there is a problem that excellent TDDB characteristics cannot be obtained.

そこで、本発明者等はこのような問題を解決すべく鋭意検討を重ねた。その結果、ＲＴＯに連続して、ＲＴＯで形成された酸化膜が付いたままのシリコン単結晶ウェーハをＲＴＯ以上の温度でＲＴＡすることで、酸素析出熱処理等を施した時に、ウェーハ面内で酸素析出物の密度のばらつきを低減できることに想到し、本発明を完成させた。   Therefore, the present inventors have made extensive studies to solve such problems. As a result, a silicon single crystal wafer with an oxide film formed by RTO is continuously RTA at a temperature equal to or higher than RTO, so that oxygen precipitation heat treatment or the like is performed in the wafer surface. The inventors have conceived that variations in the density of precipitates can be reduced, and have completed the present invention.

図１に示すように、本発明のシリコン単結晶ウェーハの熱処理方法は、まず、チョクラルスキー法により作製した、径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハを準備する（図１のＳ１０１）。次に、準備したシリコン単結晶ウェーハを１０００−１２７５℃で１０−３０秒間、酸化性雰囲気下で急速熱処理する酸化性熱処理を実施する（図２のＳ１０２）。更に、酸化性熱処理に連続して、当該酸化性熱処理で形成された酸化膜が付いたままの状態のシリコン単結晶ウェーハを、前記酸化性熱処理における熱処理温度以上の温度で１０−３０秒間、非酸化性雰囲気下で急速熱処理する非酸化性熱処理を実施する（図１のＳ１０３）。   As shown in FIG. 1, the silicon single crystal wafer heat treatment method according to the present invention is first produced by the Czochralski method. The entire radial direction is an N region, or the entire radial direction is a mixture of an OSF region and an N region. The silicon single crystal wafer thus prepared is prepared (S101 in FIG. 1). Next, an oxidizing heat treatment is performed in which the prepared silicon single crystal wafer is rapidly heat-treated in an oxidizing atmosphere at 1000-1275 ° C. for 10-30 seconds (S102 in FIG. 2). Further, after the oxidative heat treatment, the silicon single crystal wafer with the oxide film formed by the oxidative heat treatment is attached to the silicon single crystal wafer at a temperature equal to or higher than the heat treatment temperature in the oxidative heat treatment for 10-30 seconds. A non-oxidizing heat treatment that performs rapid heat treatment in an oxidizing atmosphere is performed (S103 in FIG. 1).

ここで、上記工程に用いることのできる装置について説明する。
径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハの準備でチョクラルスキー法によりシリコン単結晶を引き上げるにあたっては、例えば図２のような単結晶引き上げ装置を使用することができる。
図２に示すように、この単結晶引き上げ装置１には、引き上げ室２内に、シリコン単結晶インゴット１０の原料となるシリコン融液１１を収容するルツボ３が設けられている。そして、このルツボ３にはルツボ保持軸５及びその回転機構（図示せず）が備えられており、単結晶の育成中にルツボ３を回転できるようになっている。さらに、このルツボ３の周囲には、加熱のためのヒータ４が配設されており、さらにヒータ４の外側周囲には断熱材９が配置されている。そして、ルツボ３内のシリコン融液１１の上方には、シリコンの種結晶６を保持するシードチャック７、シードチャック７を引上げるワイヤ８、ワイヤ８を回転又は巻き取る巻取機構（図示せず）が備えられている。このような装置１により、シリコン単結晶インゴット１０は、原料のシリコン融液１１から、引き上げ速度等を調整してワイヤ８によって引上げられる。このように、本発明の熱処理方法では従来と同様の単結晶引き上げ装置を用いて製造したシリコン単結晶インゴット１０から切り出したシリコン単結晶ウェーハを用いることができる。 Here, an apparatus that can be used in the above process will be described.
When pulling up a silicon single crystal by the Czochralski method in preparation of a silicon single crystal wafer in which the entire surface in the radial direction is the N region or the entire surface in the radial direction is a mixture of the OSF region and the N region, for example, a single crystal as shown in FIG. A lifting device can be used.
As shown in FIG. 2, the single crystal pulling apparatus 1 is provided with a crucible 3 for storing a silicon melt 11 that is a raw material of the silicon single crystal ingot 10 in the pulling chamber 2. The crucible 3 is provided with a crucible holding shaft 5 and its rotation mechanism (not shown) so that the crucible 3 can be rotated during the growth of a single crystal. Furthermore, a heater 4 for heating is disposed around the crucible 3, and a heat insulating material 9 is disposed around the outside of the heater 4. Above the silicon melt 11 in the crucible 3, a seed chuck 7 that holds the silicon seed crystal 6, a wire 8 that pulls up the seed chuck 7, and a winding mechanism that rotates or winds the wire 8 (not shown). ) Is provided. By such an apparatus 1, the silicon single crystal ingot 10 is pulled up from the raw silicon melt 11 by the wire 8 while adjusting the pulling speed and the like. Thus, in the heat treatment method of the present invention, a silicon single crystal wafer cut out from a silicon single crystal ingot 10 manufactured using a single crystal pulling apparatus similar to the conventional one can be used.

次に、上記のような単結晶引き上げ装置１によって引き上げられたシリコン単結晶インゴット１０から切り出したシリコン単結晶ウェーハＷに各急速熱処理を施すための装置について述べる。
図３に示す急速熱処理装置１２は、石英からなるチャンバー１３を有し、このチャンバー１３内でシリコン単結晶ウェーハＷを急速熱処理できるようになっている。加熱は、チャンバー１３を上下左右から囲繞するように配置される加熱ランプ１４（例えばハロゲンランプ）によって行う。この加熱ランプ１４はそれぞれ独立に供給される電力を制御できるようになっている。 Next, an apparatus for performing each rapid heat treatment on the silicon single crystal wafer W cut out from the silicon single crystal ingot 10 pulled by the single crystal pulling apparatus 1 as described above will be described.
The rapid thermal processing apparatus 12 shown in FIG. 3 has a chamber 13 made of quartz, and can rapidly heat the silicon single crystal wafer W in the chamber 13. Heating is performed by a heating lamp 14 (for example, a halogen lamp) disposed so as to surround the chamber 13 from above, below, left, and right. The heating lamps 14 can control power supplied independently.

ガスの排気側は、オートシャッター１５が装備され、外気を封鎖している。オートシャッター１５は、ゲートバルブによって開閉可能に構成される不図示のウェーハ挿入口が設けられている。また、オートシャッター１５にはガス排気口２０が設けられており、炉内雰囲気を調整できるようになっている。
そして、シリコン単結晶ウェーハＷは石英トレイ１６に形成された３点支持部１７の上に配置される。トレイ１６のガス導入口側には、石英製のバッファ１８が設けられており、酸化性ガスや窒化性ガス、Ａｒガス等の導入ガスがシリコン単結晶ウェーハＷに直接当たるのを防ぐことができる。
また、チャンバー１３には不図示の温度測定用特殊窓が設けられており、チャンバー１３の外部に設置されたパイロメータ１９により、その特殊窓を通してシリコン単結晶ウェーハＷの温度を測定することができる。
急速熱処理装置１２もまた、従来と同様のものを用いることができる。 On the gas exhaust side, an auto shutter 15 is provided to block the outside air. The auto shutter 15 is provided with a wafer insertion opening (not shown) configured to be opened and closed by a gate valve. The auto shutter 15 is provided with a gas exhaust port 20 so that the furnace atmosphere can be adjusted.
Then, the silicon single crystal wafer W is disposed on a three-point support portion 17 formed on the quartz tray 16. A quartz buffer 18 is provided on the gas introduction port side of the tray 16, and it is possible to prevent an introduction gas such as an oxidizing gas, a nitriding gas, or an Ar gas from directly hitting the silicon single crystal wafer W. .
The chamber 13 is provided with a temperature measurement special window (not shown). The pyrometer 19 installed outside the chamber 13 can measure the temperature of the silicon single crystal wafer W through the special window.
As the rapid thermal processing apparatus 12, the same one as in the past can be used.

以下、図２、３の各装置を用いて行う本発明の熱処理方法における各工程について説明する。
（シリコン単結晶ウェーハの準備）
この工程では、後に二段階の急速熱処理（酸化性雰囲気下の急速熱処理（初段のＲＴＯ（Ｒａｐｉｄ Ｔｈｅｒｍａｌ Ｏｘｉｄａｔｉｏｎ）処理）、非酸化性雰囲気下の急速熱処理（二段目のＲＴＡ（Ｒａｐｉｄ Ｔｈｅｒｍａｌ Ａｎｎｅａｌｉｎｇ）処理））を施す、径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハＷを準備する。 Hereafter, each process in the heat processing method of this invention performed using each apparatus of FIG.
(Preparation of silicon single crystal wafer)
In this process, two-stage rapid thermal processing (rapid thermal processing in an oxidizing atmosphere (first-stage RTO (Rapid Thermal Oxidation) processing) and rapid thermal processing in a non-oxidizing atmosphere (second-stage RTA (Rapid Thermal Annealing) processing) The silicon single crystal wafer W in which the entire radial surface is an N region or the entire radial surface is a mixture of an OSF region and an N region is prepared.

すなわち、まず、図２の単結晶引き上げ装置１を用い、チョクラルスキー法によってシリコン単結晶インゴット１０を引き上げる。このとき、この引き上げたシリコン単結晶インゴット１０から径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハＷを切り出せるように、例えば引き上げ速度などを適当に調整して、シリコン単結晶インゴット１０の内部の欠陥領域が目的に沿った分布となるように引き上げを行う。
このようにしてシリコン単結晶インゴット１０を引き上げた後、例えばワイヤソー等のインゴットの切断装置を用いてウェーハ状に切り出し、径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハＷを得る。 That is, first, the silicon single crystal ingot 10 is pulled by the Czochralski method using the single crystal pulling apparatus 1 of FIG. At this time, for example, the pulling speed is adjusted so that the silicon single crystal wafer W in which the entire surface in the radial direction is the N region or the entire surface in the radial direction is a mixture of the OSF region and the N region can be cut out from the pulled silicon single crystal ingot 10. By adjusting appropriately, the silicon single crystal ingot 10 is pulled up so that the defect area inside the silicon single crystal ingot 10 has a distribution according to the purpose.
After pulling up the silicon single crystal ingot 10 in this way, it is cut into a wafer shape using an ingot cutting device such as a wire saw, and the entire radial direction is an N region, or the entire radial direction is an OSF region and an N region. A mixed silicon single crystal wafer W is obtained.

（酸化性雰囲気下の急速熱処理）
次に、準備したシリコン単結晶ウェーハＷに対し、図３の急速熱処理装置１２を用いて、酸化性雰囲気下で急速熱処理（ＲＴＯ）を施す。なお、この酸化性雰囲気下の急速熱処理によって、シリコン単結晶ウェーハＷの表面には熱酸化膜が形成される。 (Rapid heat treatment in oxidizing atmosphere)
Next, rapid thermal processing (RTO) is performed on the prepared silicon single crystal wafer W in an oxidizing atmosphere using the rapid thermal processing apparatus 12 of FIG. Note that a thermal oxide film is formed on the surface of the silicon single crystal wafer W by the rapid heat treatment in the oxidizing atmosphere.

このときの熱処理条件としては、１０００〜１２７５℃の温度範囲で１０〜３０秒間保持し、熱処理する。この酸化性雰囲気下の急速熱処理では、熱処理温度を１０００℃以上にすることにより、ＯＳＦ核を消滅または不活性化させたり、格子間シリコンを注入してシリコン単結晶ウェーハＷのＮｖ領域をＮｉ領域に変化させたりすることができる。また、熱処理温度を１２７５℃以下にすることにより、シリコン単結晶ウェーハＷにＮｉ領域が存在している場合に、Ｎｉ領域がＩ領域になることを抑制することができる。   As a heat treatment condition at this time, the heat treatment is performed by holding for 10 to 30 seconds in a temperature range of 1000 to 1275 ° C. In this rapid heat treatment in an oxidizing atmosphere, the heat treatment temperature is set to 1000 ° C. or more, thereby eliminating or deactivating OSF nuclei or injecting interstitial silicon into the Nv region of the silicon single crystal wafer W as the Ni region. Can be changed. Further, by setting the heat treatment temperature to 1275 ° C. or lower, it is possible to prevent the Ni region from becoming the I region when the Ni region is present in the silicon single crystal wafer W.

またこのとき、酸化性熱処理における熱処理温度を１０２５℃以上とすることができる。このようにすれば、ＯＳＦ核をより確実に消滅または不活性化させ、Ｎｖ領域のＮｉ領域化をより一層促進させることができる。   At this time, the heat treatment temperature in the oxidative heat treatment can be set to 1025 ° C. or higher. In this way, OSF nuclei can be more reliably extinguished or inactivated, and the Nv region can be further promoted to be a Ni region.

また、チャンバー１３内の酸化性雰囲気としては、例えば酸素を含む雰囲気を使用することができる。好ましくは、１００％酸素雰囲気とする。
酸化性雰囲気として、酸素を含む雰囲気を使用すれば、効率よくシリコン単結晶ウェーハＷの表面に酸化膜を形成することができる。 Further, as the oxidizing atmosphere in the chamber 13, for example, an atmosphere containing oxygen can be used. Preferably, the atmosphere is 100% oxygen.
If an atmosphere containing oxygen is used as the oxidizing atmosphere, an oxide film can be efficiently formed on the surface of the silicon single crystal wafer W.

（非酸化性雰囲気下での急速熱処理）
ここでは、前工程のＲＴＯにて形成した酸化膜を除去することなく、連続して、図３の急速熱処理装置１２を用い、非酸化性雰囲気下での急速熱処理（ＲＴＡ）をシリコン単結晶ウェーハＷに施す。このとき、ＲＴＯの熱処理温度以上の温度で１０−３０秒間熱処理することにより、シリコン単結晶ウェーハの表面に形成された酸化膜を介して、シリコン単結晶ウェーハＷの内部に空孔を注入する。また、このときのチャンバー１３内の雰囲気は、窒化性雰囲気、Ａｒ雰囲気、またはこれらの混合雰囲気とすることができる。窒化性雰囲気としては、例えばＮＨ３、Ｎ２等の雰囲気が挙げられる。 (Rapid heat treatment in non-oxidizing atmosphere)
Here, without removing the oxide film formed in the RTO of the previous process, the rapid thermal processing apparatus 12 of FIG. 3 is used to perform rapid thermal processing (RTA) in a non-oxidizing atmosphere. Apply to W. At this time, holes are injected into the silicon single crystal wafer W through an oxide film formed on the surface of the silicon single crystal wafer by performing heat treatment at a temperature equal to or higher than the heat treatment temperature of RTO for 10-30 seconds. Further, the atmosphere in the chamber 13 at this time can be a nitriding atmosphere, an Ar atmosphere, or a mixed atmosphere thereof. Examples of the nitriding atmosphere include NH 3 and N 2 atmospheres.

このＲＴＡでは、上述のように、熱処理温度をＲＴＯの温度より高温にすることにより空孔が注入されるが、ＲＴＯで形成された酸化膜を介して空孔を注入することにより、後に酸素析出熱処理等を施した際に、ウェーハ面内の酸素析出物の形成をより均一にすることができる。
更に、本発明はＲＴＯによる酸化膜を除去しないので、熱処理工程をより簡略化することができ、効率の面でも好ましい熱処理方法となる。 In this RTA, as described above, vacancies are injected by setting the heat treatment temperature higher than the temperature of RTO. However, by injecting vacancies through an oxide film formed by RTO, oxygen precipitation occurs later. When heat treatment or the like is performed, the formation of oxygen precipitates in the wafer surface can be made more uniform.
Furthermore, since the present invention does not remove the oxide film formed by RTO, the heat treatment process can be further simplified, and the heat treatment method is preferable in terms of efficiency.

また、本発明は、ＲＴＡの熱処理温度をＲＴＯの熱処理温度より２５℃以上高温とすることができる。具体的には、１０２５−１３００℃の温度範囲とすることが好ましい。このような熱処理温度であれば、酸化膜を介して空孔を注入する場合であっても、より効率よく空孔を注入することができるので、より一層好ましい。   In the present invention, the heat treatment temperature of RTA can be higher by 25 ° C. or more than the heat treatment temperature of RTO. Specifically, a temperature range of 1025 to 1300 ° C. is preferable. Such a heat treatment temperature is even more preferable because vacancies can be injected more efficiently even when vacancies are injected through an oxide film.

以上のように、本発明の熱処理方法は、まず、一段目のＲＴＯにより、ＯＳＦ領域におけるＯＳＦ核の消滅又は不活性化を促進、及び格子間シリコンを注入してＮｖ領域のＮｉ領域化を促進させる。また、酸化膜を除去せず、酸化膜をつけたまま、ＲＴＯに連続して二段目のＲＴＡを行うことで、酸化膜を介して空孔を注入する。これらによって、Ｎｉ領域及びＮｖ領域が混在するウェーハであっても、酸素析出熱処理等で、面内均一に酸素析出物を形成することができ、さらにはＮ領域とＯＳＦ領域が混在するシリコン単結晶ウェーハであっても優れたＴＤＤＢ特性を得ることが可能である   As described above, the heat treatment method of the present invention first promotes the disappearance or inactivation of OSF nuclei in the OSF region by the first-stage RTO, and promotes the Ni region conversion of the Nv region by implanting interstitial silicon. Let Further, without removing the oxide film, the second stage RTA is performed continuously with the RTO with the oxide film attached, thereby injecting holes through the oxide film. As a result, even in a wafer in which Ni region and Nv region are mixed, oxygen precipitates can be uniformly formed in the surface by oxygen precipitation heat treatment or the like, and a silicon single crystal in which N region and OSF region are mixed. Excellent TDDB characteristics can be obtained even for wafers

また、連続した急速熱処理のため、熱処理に費やす時間が短時間で済む。このため、表層にＤＺ層を有し、ＴＤＤＢ特性が優れ、かつ、酸素析出熱処理等によってバルク領域内に十分なＢＭＤを形成することが可能なシリコン単結晶ウェーハを、効率的にコストをかけずに製造することが可能である。このとき、ＲＴＯ後、シリコン単結晶ウェーハを一旦冷却してからＲＴＡを行ってもよいし、ＲＴＯ後、シリコン単結晶ウェーハを冷却せずに熱処理雰囲気を切り替えてＲＴＡを行ってもよい。   In addition, because of the rapid heat treatment, the time required for the heat treatment is short. For this reason, a silicon single crystal wafer having a DZ layer on the surface, excellent TDDB characteristics, and capable of forming a sufficient BMD in the bulk region by oxygen precipitation heat treatment or the like is not costly. Can be manufactured. At this time, after RTO, the silicon single crystal wafer may be once cooled and then RTA may be performed, or after RTO, the heat treatment atmosphere may be switched without cooling the silicon single crystal wafer.

尚、シリコン単結晶ウェーハの面内の酸素析出物を面内均一に形成するにはシリコン単結晶ウェーハの酸素濃度が低い方が容易となるが、酸素濃度が高い場合であっても、本発明ではＲＴＯ及びＲＴＡの熱処理条件を制御することにより、酸素析出物を面内均一に形成することが可能であるので、シリコン単結晶ウェーハの酸素濃度は特に限定されない。   In addition, in order to form in-plane oxygen precipitates uniformly in the plane of the silicon single crystal wafer, it is easier for the silicon single crystal wafer to have a lower oxygen concentration. Then, by controlling the heat treatment conditions of RTO and RTA, oxygen precipitates can be formed uniformly in the surface, so the oxygen concentration of the silicon single crystal wafer is not particularly limited.

以下、本発明の実施例及び比較例を示して本発明をより具体的に説明するが、本発明はこれらに限定されるものではない。   EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples of the present invention, but the present invention is not limited to these.

（実施例１）
まず、直径が２００ｍｍ、酸素濃度が１２ｐｐｍａ（ＪＥＩＤＡ：日本電子工業振興協会による換算係数を使用）、欠陥領域として最外周部にＯＳＦ領域を含むＣＯＰフリーのシリコン単結晶ウェーハを実施例１用に準備した。すなわち、最外周部にＯＳＦ領域を有するＮ領域ウェーハである。 Example 1
First, a COP-free silicon single crystal wafer having a diameter of 200 mm, an oxygen concentration of 12 ppma (JEIDA: using a conversion factor by the Japan Electronics Industry Promotion Association) and an OSF region at the outermost peripheral portion as a defect region is prepared for Example 1. did. That is, it is an N region wafer having an OSF region on the outermost periphery.

そして、本発明の熱処理方法にあたる実施例１として、まず、図３に示すような急速熱処理装置１２を用い、上記準備したウェーハに、１００％酸素雰囲気中で、１２２５℃、１０秒の急速熱処理（一段目のＲＴＯ処理）を施した。このとき、シリコン単結晶ウェーハには、膜厚が１１〜１２．２ｎｍの酸化膜が形成された。
その後、この酸化膜をつけたまま、ＡｒとＮＨ３の混合雰囲気下で１２２５℃、１０秒の急速熱処理（二段目のＲＴＡ処理）を施した。このように、二段目の熱処理であるＲＴＡの熱処理温度は、一段目の熱処理であるＲＴＯの熱処理温度と同じとした。 As Example 1 corresponding to the heat treatment method of the present invention, first, a rapid heat treatment apparatus 12 as shown in FIG. 3 is used, and the prepared wafer is subjected to rapid heat treatment at 1225 ° C. for 10 seconds in a 100% oxygen atmosphere ( First-stage RTO treatment) was performed. At this time, an oxide film having a thickness of 11 to 12.2 nm was formed on the silicon single crystal wafer.
Thereafter, with this oxide film attached, rapid thermal treatment (second-stage RTA treatment) at 1225 ° C. for 10 seconds was performed in a mixed atmosphere of Ar and NH 3 . As described above, the heat treatment temperature of RTA, which is the second heat treatment, is the same as the heat treatment temperature of RTO, which is the first heat treatment.

ＲＴＡ処理後、酸素析出熱処理等（条件：６００℃で６時間、８００℃で４時間、１０００℃で１６時間）を施し、シリコン単結晶ウェーハのＴＤＤＢ評価及びＢＭＤの評価を行った。
尚、ＢＭＤ評価は、シリコン単結晶ウェーハを劈開面に沿って分割し、その断面をエッチングした後に、観察することでＢＭＤの単位体積当たりの密度を測定した。 After the RTA treatment, oxygen precipitation heat treatment or the like (conditions: 600 ° C. for 6 hours, 800 ° C. for 4 hours, 1000 ° C. for 16 hours) was performed, and TDDB evaluation and BMD evaluation of the silicon single crystal wafer were performed.
In the BMD evaluation, the density of BMD per unit volume was measured by dividing the silicon single crystal wafer along the cleavage plane, etching the cross section, and observing it.

図４に、実施例１及び後述する実施例２−４のＴＤＤＢの評価結果を、図５に実施例１及び後述する実施例２−４のＢＭＤの評価結果を示す。
図５に示すように、上記のような本発明の熱処理方法に従って、熱処理を施すことで、特に、ウェーハ表面から深さ１００μｍの位置で、体積密度が７．０×１０８／ｃｍ３となり、ＢＭＤを十分に形成することができ、後述する比較例１、２よりも効率よく十分なＢＭＤを形成することができた。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、図４に示すように、その良品率は後述する比較例よりも良好な９７．８％となった。本発明によって、シリコン単結晶ウェーハ内部にＢＭＤを均一に形成でき、大きな酸素析出物が形成されるのを防ぎ、優れたＴＤＤＢ特性が得られたものと考えられる。 FIG. 4 shows the TDDB evaluation results of Example 1 and Example 2-4 described later, and FIG. 5 shows the BMD evaluation results of Example 1 and Example 2-4 described later.
As shown in FIG. 5, by performing the heat treatment according to the heat treatment method of the present invention as described above, the volume density becomes 7.0 × 10 8 / cm 3 particularly at a position of a depth of 100 μm from the wafer surface, BMD could be sufficiently formed, and sufficient BMD could be formed more efficiently than Comparative Examples 1 and 2 described later.
When the C mode (intrinsic failure) of TDDB was evaluated, as shown in FIG. 4, the yield rate was 97.8%, which was better than the comparative example described later. According to the present invention, it is considered that the BMD can be uniformly formed inside the silicon single crystal wafer, the formation of large oxygen precipitates is prevented, and excellent TDDB characteristics are obtained.

（実施例２）
ＲＴＯ及びＲＴＡの熱処理温度をいずれも１２５０℃に設定したこと以外は、実施例１と同様な条件で熱処理し、実施例１と同様な方法でＴＤＤＢ及びＢＭＤを評価した。 (Example 2)
Except that both RTO and RTA heat treatment temperatures were set to 1250 ° C., heat treatment was performed under the same conditions as in Example 1, and TDDB and BMD were evaluated in the same manner as in Example 1.

その結果、図５に示すように、ウェーハ表面から深さ１００μｍの位置で、体積密度が６．０×１０８／ｃｍ３となり、十分なＢＭＤを形成でき、後述する比較例１、２よりも効率よく十分なＢＭＤを形成することができた。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、図４に示すように、その良品率は後述する比較例よりも良好な９８．０％となり、このことから、シリコン単結晶ウェーハ内部にＢＭＤを均一に形成できたと考えられる。 As a result, as shown in FIG. 5, the volume density is 6.0 × 10 8 / cm 3 at a position of 100 μm in depth from the wafer surface, and a sufficient BMD can be formed. A sufficient BMD could be formed efficiently.
Further, when the C mode (intrinsic failure) of TDDB was evaluated, as shown in FIG. 4, the non-defective rate was 98.0%, which was better than the comparative example described later. From this, the silicon single crystal wafer It is considered that the BMD could be uniformly formed inside.

（実施例３）
ＲＴＯの熱処理温度を１２２５℃、ＲＴＡの熱処理温度を１２５０℃、即ち、ＲＴＡの熱処理温度をＲＴＯの熱処理温度より２５℃高くしたこと以外は、実施例１と同様な条件で熱処理し、実施例１と同様な方法でＴＤＤＢ及びＢＭＤを評価した。 (Example 3)
The heat treatment temperature of RTO is 1225 ° C., the heat treatment temperature of RTA is 1250 ° C., that is, the heat treatment temperature of RTA is 25 ° C. higher than the heat treatment temperature of RTO. TDDB and BMD were evaluated by the same method as described above.

その結果、図５に示すように、特に、ウェーハ表面から深さ７５μｍの位置で、体積密度が２．６×１０９／ｃｍ３となり、十分な密度のＢＭＤを形成することができた。このように、非酸化性熱処理（ＲＴＡ）における熱処理温度を、酸化性熱処理（ＲＴＯ）の熱処理温度より２５℃以上高い温度とすることで、前述の実施例１、２よりも更に、高密度でＢＭＤを形成できることが確認された。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、図４に示すように、その良品率は１００％となり、このことから、ＲＴＡにおける熱処理温度を、ＲＴＯの熱処理温度より２５℃以上高い温度とすることで、シリコン単結晶ウェーハ内部にＢＭＤをより均一に形成できたと考えられる。 As a result, as shown in FIG. 5, the volume density was 2.6 × 10 9 / cm 3 particularly at a position 75 μm deep from the wafer surface, and a BMD having a sufficient density could be formed. Thus, by setting the heat treatment temperature in the non-oxidative heat treatment (RTA) to 25 ° C. or more higher than the heat treatment temperature of the oxidative heat treatment (RTO), the density is higher than in the first and second embodiments. It was confirmed that BMD can be formed.
Further, when the C mode (intrinsic failure) of TDDB was evaluated, as shown in FIG. 4, the yield rate was 100%. Therefore, the heat treatment temperature in RTA was 25 ° C. or higher than the heat treatment temperature of RTO. It is considered that the BMD could be formed more uniformly in the silicon single crystal wafer by setting the temperature higher.

（実施例４）
ＲＴＯの熱処理温度を１２５０℃、ＲＴＡの熱処理温度を１２７５℃、即ち、ＲＴＡの熱処理温度をＲＴＯの熱処理温度より２５℃高くしたこと以外は、実施例１と同様な条件で熱処理し、実施例１と同様な方法でＴＤＤＢ及びＢＭＤを評価した。 Example 4
The heat treatment temperature of RTO is 1250 ° C., the heat treatment temperature of RTA is 1275 ° C., that is, the heat treatment temperature of RTA is 25 ° C. higher than the heat treatment temperature of RTO. TDDB and BMD were evaluated by the same method as described above.

その結果、図５に示すように、特に、ウェーハ表面から深さ７５μｍの位置で、体積密度が２．３×１０９／ｃｍ３となり、十分にＢＭＤを形成することができた。このように、非酸化性熱処理（ＲＴＡ）における熱処理温度を、酸化性熱処理（ＲＴＯ）の熱処理温度より２５℃以上高い温度とすることで、前述の実施例１、２よりも更に、高密度でＢＭＤを形成できることが確認された。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、図４に示すように、その良品率は１００％となり、このことから、ＲＴＡにおける熱処理温度を、ＲＴＯの熱処理温度より２５℃以上高い温度とすることで、シリコン単結晶ウェーハ内部にＢＭＤをより均一に形成できたと考えられる。 As a result, as shown in FIG. 5, the volume density was 2.3 × 10 9 / cm 3 particularly at a position 75 μm deep from the wafer surface, and BMD could be sufficiently formed. Thus, by setting the heat treatment temperature in the non-oxidative heat treatment (RTA) to 25 ° C. or more higher than the heat treatment temperature of the oxidative heat treatment (RTO), the density is higher than in the first and second embodiments. It was confirmed that BMD can be formed.
Further, when the C mode (intrinsic failure) of TDDB was evaluated, as shown in FIG. 4, the yield rate was 100%. Therefore, the heat treatment temperature in RTA was 25 ° C. or higher than the heat treatment temperature of RTO. It is considered that the BMD could be formed more uniformly in the silicon single crystal wafer by setting the temperature higher.

（比較例１）
ＲＴＯを熱処理温度９８０℃、熱処理時間２０秒とし、ＲＴＡ熱処理温度１１７５℃、熱処理時間１０秒としたこと以外は、実施例１と同様な条件で熱処理し、実施例１と同様な方法でＴＤＤＢ及びＢＭＤを評価した。 (Comparative Example 1)
Heat treatment was performed under the same conditions as in Example 1 except that the RTO was heat treatment temperature of 980 ° C., heat treatment time of 20 seconds, RTA heat treatment temperature of 1175 ° C. and heat treatment time of 10 seconds. BMD was evaluated.

その結果、図６に示すように、体積密度がピーク値で１．０５×１０８／ｃｍ３となり、前述の実施例１−４と比較すると、ＢＭＤの体積密度が低くなることが確認された。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、その良品率は６５．２％と前述の実施例１−４に大幅に劣っていた。これは、ＲＴＯにおける熱処理温度を１０００℃未満としたことで、シリコン単結晶ウェーハのＮｉ領域化が促進されず、面内でＢＭＤの密度にばらつきが生じたためと考えられる。 As a result, as shown in FIG. 6, the volume density was 1.05 × 10 8 / cm 3 at the peak value, and it was confirmed that the volume density of BMD was lower than that of Example 1-4 described above. .
In addition, when the C mode (intrinsic failure) of TDDB was evaluated, the yield rate was 65.2%, which was significantly inferior to the above-described Example 1-4. This is probably because the heat treatment temperature in RTO is less than 1000 ° C., so that the Ni region of the silicon single crystal wafer is not promoted, and the density of BMD varies in the plane.

（比較例２）
ＲＴＯの熱処理温度を１２２５℃、ＲＴＡの熱処理温度を１２００℃としたこと、即ち、ＲＴＡの熱処理温度をＲＴＯの熱処理温度未満としたこと以外は、実施例１と同様な条件で熱処理し、実施例１と同様な方法でＴＤＤＢ及びＢＭＤを評価した。 (Comparative Example 2)
The heat treatment temperature of RTO was 1225 ° C., the heat treatment temperature of RTA was 1200 ° C., that is, the heat treatment temperature of RTA was lower than the heat treatment temperature of RTO. TDDB and BMD were evaluated in the same manner as in 1.

その結果、図６に示すように、体積密度がピーク値で３．５×１０７／ｃｍ３となり、前述の実施例１−４と比較すると、ＢＭＤの体積密度が大幅に低くなることが確認された。このように、ＲＴＡの熱処理温度をＲＴＯの熱処理温度未満とすると、空孔が注入されず、ＢＭＤが十分に形成されない。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、その良品率は８８．６％と実施例１−４に大幅に劣っていた。これは、ＲＴＯで残存した大きいサイズの酸素析出物が、その後のＲＴＡにおいて、周りの酸素を吸収し、大きなＢＭＤに成長したことが原因と考えられる。 As a result, as shown in FIG. 6, the volume density is 3.5 × 10 7 / cm 3 at the peak value, and it is confirmed that the volume density of BMD is significantly lower than that of Example 1-4 described above. It was done. Thus, when the heat treatment temperature of RTA is lower than the heat treatment temperature of RTO, vacancies are not injected and BMD is not sufficiently formed.
When the C mode (intrinsic failure) of TDDB was evaluated, the yield rate was 88.6%, which was significantly inferior to Example 1-4. This is presumably because the large-sized oxygen precipitates remaining in the RTO absorbed the surrounding oxygen and grew into a large BMD in the subsequent RTA.

（比較例３）
ＲＴＯ後に酸化膜を除去してから、ＲＴＡを行ったこと以外は、実施例１と同様な条件で熱処理し、実施例１と同様な方法でＴＤＤＢ及びＢＭＤを評価した。 (Comparative Example 3)
After removing the oxide film after RTO, heat treatment was performed under the same conditions as in Example 1 except that RTA was performed, and TDDB and BMD were evaluated in the same manner as in Example 1.

その結果、図６に示すように、体積密度がピーク値で１．０×１０９／ｃｍ３となり、前述の実施例１、２と同等の、体積密度となることが確認された。これは、酸化膜を除去したため、ＲＴＡにおいて空孔の注入が効率よくでき、ＢＭＤを十分に形成できたためである。
また、ＴＤＤＢのＣモード（真性故障）の評価を行ったところ、良品率は８０．９％と実施例１−４に大幅に劣っていた。これは、前述の実施例１−４のように酸化膜を介して空孔を注入していないため、面内でＢＭＤの密度にばらつきが生じたことが原因と考えられる。 As a result, as shown in FIG. 6, the volume density was 1.0 × 10 9 / cm 3 at the peak value, and it was confirmed that the volume density was the same as in Examples 1 and 2 described above. This is because, since the oxide film was removed, vacancies could be injected efficiently in RTA, and BMD could be formed sufficiently.
Moreover, when the C mode (intrinsic failure) of TDDB was evaluated, the yield rate was 80.9%, which was significantly inferior to Example 1-4. This is considered to be caused by variations in the density of BMD in the plane because holes are not injected through the oxide film as in Example 1-4 described above.

なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。   The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

１…単結晶引き上げ装置、 ２…引き上げ室、 ３…ルツボ、 ４…ヒータ、
５…ルツボ保持軸、 ６…種結晶、 ７…シードチャック、
８…ワイヤ、 ９…断熱材、 １０…シリコン単結晶インゴット、
１１…シリコン融液、 １２…急速熱処理装置、 １３…チャンバー、
１４…加熱ランプ １５…オートシャッター、 １６…石英トレイ、
１７…３点支持部、 １８…バッファ、 １９…パイロメータ、
２０…ガス排気口、 Ｗ…シリコン単結晶ウェーハ。 DESCRIPTION OF SYMBOLS 1 ... Single crystal pulling apparatus, 2 ... Pulling chamber, 3 ... Crucible, 4 ... Heater,
5 ... crucible holding shaft, 6 ... seed crystal, 7 ... seed chuck,
8 ... wire, 9 ... heat insulating material, 10 ... silicon single crystal ingot,
11 ... Silicon melt, 12 ... Rapid heat treatment equipment, 13 ... Chamber,
14 ... heating lamp 15 ... auto shutter, 16 ... quartz tray,
17 ... 3-point support, 18 ... buffer, 19 ... pyrometer,
20: Gas exhaust port, W: Silicon single crystal wafer.

Claims (4)

シリコン単結晶ウェーハの熱処理方法であって、
チョクラルスキー法により作製した、径方向の全面がＮ領域、又は径方向の全面がＯＳＦ領域とＮ領域が混在したシリコン単結晶ウェーハを、１０００−１２７５℃で１０−３０秒間、酸化性雰囲気下で急速熱処理する酸化性熱処理を実施し、
更に、該酸化性熱処理に連続して、当該酸化性熱処理で形成された酸化膜が付いたままのシリコン単結晶ウェーハを、前記酸化性熱処理における熱処理温度より２５℃以上高い温度で１０−３０秒間、非酸化性雰囲気下で急速熱処理する非酸化性熱処理を実施することを特徴とするシリコン単結晶ウェーハの熱処理方法。 A method for heat treatment of a silicon single crystal wafer,
A silicon single crystal wafer produced by the Czochralski method, in which the entire radial direction is the N region or the entire radial direction is a mixture of the OSF region and the N region, is subjected to an oxidizing atmosphere at 1000-1275 ° C. for 10-30 seconds. Oxidative heat treatment for rapid heat treatment at
Further, following the oxidative heat treatment, the silicon single crystal wafer with the oxide film formed by the oxidative heat treatment is applied for 10-30 seconds at a temperature 25 ° C. higher than the heat treatment temperature in the oxidative heat treatment. A method for heat-treating a silicon single crystal wafer, comprising performing non-oxidative heat treatment for rapid heat treatment in a non-oxidizing atmosphere. 前記酸化性熱処理における熱処理温度を１０２５℃以上とすることを特徴とする請求項１に記載のシリコン単結晶ウェーハの熱処理方法。 The heat treatment method for a silicon single crystal wafer according to claim 1, wherein a heat treatment temperature in the oxidative heat treatment is 1025 ° C. or higher. 前記酸化性熱処理における酸化性雰囲気を、酸素を含む雰囲気とすることを特徴とする請求項１又は請求項２に記載のシリコン単結晶ウェーハの熱処理方法。 Heat treatment method for a silicon single crystal wafer according to an oxidizing atmosphere in the oxidizing heat treatment, in claim 1 or claim 2, characterized in that the atmosphere containing oxygen. 前記非酸化性熱処理における非酸化性雰囲気を、窒化性雰囲気、Ａｒ雰囲気、またはこれらの混合雰囲気とすることを特徴とする請求項１から請求項３のいずれか１項に記載のシリコン単結晶ウェーハの熱処理方法。 The non-oxidizing atmosphere in the non-oxidizing heat treatment, nitriding atmosphere, Ar atmosphere, or a silicon single crystal wafer according to any one of claims 1 to 3, characterized in that these mixed atmosphere, Heat treatment method.
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