JP6116670B2 - インタラプトステータスに基づく構成可能なブレークポイントを有するデバイス - Google Patents

インタラプトステータスに基づく構成可能なブレークポイントを有するデバイス Download PDF

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Publication number
JP6116670B2
JP6116670B2 JP2015511621A JP2015511621A JP6116670B2 JP 6116670 B2 JP6116670 B2 JP 6116670B2 JP 2015511621 A JP2015511621 A JP 2015511621A JP 2015511621 A JP2015511621 A JP 2015511621A JP 6116670 B2 JP6116670 B2 JP 6116670B2
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Japan
Prior art keywords
breakpoint
interrupt
unit
debug
interrupt service
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JP2015511621A
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English (en)
Japanese (ja)
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JP2015516099A5 (enExample
JP2015516099A (ja
Inventor
ケビン キルザー，
ケビン キルザー，
ジャスティン ミルクス，
ジャスティン ミルクス，
スンダール バラスブラマニアン，
スンダール バラスブラマニアン，
トーマス エドワード パーム，
トーマス エドワード パーム，
クシャラ ジャバガル，
クシャラ ジャバガル，
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Microchip Technology Inc
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Microchip Technology Inc
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Publication of JP2015516099A5 publication Critical patent/JP2015516099A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3648—Debugging of software using additional hardware

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP2015511621A 2012-05-07 2013-05-07 インタラプトステータスに基づく構成可能なブレークポイントを有するデバイス Active JP6116670B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201261643707P 2012-05-07 2012-05-07
US61/643,707 2012-05-07
PCT/US2013/039938 WO2013169767A1 (en) 2012-05-07 2013-05-07 Device having configurable breakpoint based on interrupt status

Publications (3)

Publication Number Publication Date
JP2015516099A JP2015516099A (ja) 2015-06-04
JP2015516099A5 JP2015516099A5 (enExample) 2016-06-30
JP6116670B2 true JP6116670B2 (ja) 2017-04-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015511621A Active JP6116670B2 (ja) 2012-05-07 2013-05-07 インタラプトステータスに基づく構成可能なブレークポイントを有するデバイス

Country Status (6)

Country Link
US (1) US9336122B2 (enExample)
EP (1) EP2847681B1 (enExample)
JP (1) JP6116670B2 (enExample)
KR (1) KR20150008447A (enExample)
CN (1) CN104471545B (enExample)
WO (1) WO2013169767A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9785536B2 (en) 2013-11-29 2017-10-10 Nxp Usa, Inc. Code injection for conditional breakpoints
GB2530050B (en) * 2014-09-10 2021-07-21 Advanced Risc Mach Ltd Debugging in a data processing apparatus
GB2551747B (en) * 2016-06-29 2019-04-10 Advanced Risc Mach Ltd Diagnostic data capture
US10073759B2 (en) 2016-09-29 2018-09-11 International Business Machines Corporation Identification and handling of nested breakpoints during debug session
US10761967B2 (en) 2018-05-16 2020-09-01 Texas Instruments Incorporated Managing and maintaining multiple debug contexts in a debug execution mode for real-time processors
US11106567B2 (en) 2019-01-24 2021-08-31 International Business Machines Corporation Combinatoric set completion through unique test case generation
US11010282B2 (en) 2019-01-24 2021-05-18 International Business Machines Corporation Fault detection and localization using combinatorial test design techniques while adhering to architectural restrictions
US11099975B2 (en) 2019-01-24 2021-08-24 International Business Machines Corporation Test space analysis across multiple combinatoric models
US11010285B2 (en) 2019-01-24 2021-05-18 International Business Machines Corporation Fault detection and localization to generate failing test cases using combinatorial test design techniques
US11263116B2 (en) 2019-01-24 2022-03-01 International Business Machines Corporation Champion test case generation
WO2020186518A1 (en) * 2019-03-21 2020-09-24 Hangzhou Fabu Technology Co. Ltd Method and apparatus for debugging, and system on chip
US11232020B2 (en) 2019-06-13 2022-01-25 International Business Machines Corporation Fault detection using breakpoint value-based fingerprints of failing regression test cases
US11422924B2 (en) 2019-06-13 2022-08-23 International Business Machines Corporation Customizable test set selection using code flow trees
US10970195B2 (en) 2019-06-13 2021-04-06 International Business Machines Corporation Reduction of test infrastructure
US10990510B2 (en) 2019-06-13 2021-04-27 International Business Machines Corporation Associating attribute seeds of regression test cases with breakpoint value-based fingerprints
US10963366B2 (en) 2019-06-13 2021-03-30 International Business Machines Corporation Regression test fingerprints based on breakpoint values
US11036624B2 (en) 2019-06-13 2021-06-15 International Business Machines Corporation Self healing software utilizing regression test fingerprints
US10970197B2 (en) 2019-06-13 2021-04-06 International Business Machines Corporation Breakpoint value-based version control
CN112540288B (zh) * 2020-11-30 2023-02-21 海光信息技术股份有限公司 用于硅后芯片验证的方法、系统、设备以及存储介质

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6418348U (enExample) * 1987-07-23 1989-01-30
JPH0675819A (ja) * 1992-08-27 1994-03-18 Mitsubishi Electric Corp マイクロプロセッサ
US5951696A (en) 1996-11-14 1999-09-14 Hewlett-Packard Company Debug system with hardware breakpoint trap
JP2003271416A (ja) * 2002-03-12 2003-09-26 Seiko Epson Corp 情報処理装置及び電子機器
US7334161B2 (en) * 2004-04-30 2008-02-19 Arm Limited Breakpoint logic unit, debug logic and breakpoint method for a data processing apparatus
US7865704B2 (en) * 2006-03-29 2011-01-04 Freescale Semiconductor, Inc. Selective instruction breakpoint generation based on a count of instruction source events
KR20070109432A (ko) * 2006-05-11 2007-11-15 삼성전자주식회사 커널 인지 디버깅 장치 및 방법
CN101777021B (zh) * 2010-01-21 2012-07-04 龙芯中科技术有限公司 微处理器中精确数据断点的实现装置及其方法
KR101717494B1 (ko) * 2010-10-08 2017-03-28 삼성전자주식회사 인터럽트 처리 장치 및 방법

Also Published As

Publication number Publication date
CN104471545B (zh) 2017-10-27
KR20150008447A (ko) 2015-01-22
CN104471545A (zh) 2015-03-25
JP2015516099A (ja) 2015-06-04
US9336122B2 (en) 2016-05-10
US20130297975A1 (en) 2013-11-07
EP2847681A1 (en) 2015-03-18
EP2847681B1 (en) 2019-08-07
WO2013169767A1 (en) 2013-11-14

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