JP6111181B2 - 計算機の制御方法及び計算機 - Google Patents

計算機の制御方法及び計算機 Download PDF

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Publication number
JP6111181B2
JP6111181B2 JP2013226827A JP2013226827A JP6111181B2 JP 6111181 B2 JP6111181 B2 JP 6111181B2 JP 2013226827 A JP2013226827 A JP 2013226827A JP 2013226827 A JP2013226827 A JP 2013226827A JP 6111181 B2 JP6111181 B2 JP 6111181B2
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JP
Japan
Prior art keywords
processor core
interrupt
group
core group
virtualization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2013226827A
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English (en)
Japanese (ja)
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JP2015088014A (ja
JP2015088014A5 (https=
Inventor
貴之 今田
貴之 今田
俊臣 森木
俊臣 森木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2013226827A priority Critical patent/JP6111181B2/ja
Priority to US14/528,529 priority patent/US9639486B2/en
Publication of JP2015088014A publication Critical patent/JP2015088014A/ja
Publication of JP2015088014A5 publication Critical patent/JP2015088014A5/ja
Application granted granted Critical
Publication of JP6111181B2 publication Critical patent/JP6111181B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4406—Loading of operating system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G06F2009/45575—Starting, stopping, suspending or resuming virtual machine instances
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)
  • Debugging And Monitoring (AREA)
JP2013226827A 2013-10-31 2013-10-31 計算機の制御方法及び計算機 Expired - Fee Related JP6111181B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013226827A JP6111181B2 (ja) 2013-10-31 2013-10-31 計算機の制御方法及び計算機
US14/528,529 US9639486B2 (en) 2013-10-31 2014-10-30 Method of controlling virtualization software on a multicore processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013226827A JP6111181B2 (ja) 2013-10-31 2013-10-31 計算機の制御方法及び計算機

Publications (3)

Publication Number Publication Date
JP2015088014A JP2015088014A (ja) 2015-05-07
JP2015088014A5 JP2015088014A5 (https=) 2016-08-12
JP6111181B2 true JP6111181B2 (ja) 2017-04-05

Family

ID=52996776

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013226827A Expired - Fee Related JP6111181B2 (ja) 2013-10-31 2013-10-31 計算機の制御方法及び計算機

Country Status (2)

Country Link
US (1) US9639486B2 (https=)
JP (1) JP6111181B2 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10515023B2 (en) * 2016-02-29 2019-12-24 Intel Corporation System for address mapping and translation protection
US10585755B2 (en) * 2016-11-29 2020-03-10 Ricoh Company, Ltd. Electronic apparatus and method for restarting a central processing unit (CPU) in response to detecting an abnormality
US10324747B1 (en) * 2016-12-13 2019-06-18 EMC IP Holding Company LLC Distributed configuration checking and troubleshooting in data center using best practices rules
US10521273B2 (en) 2017-06-08 2019-12-31 Cisco Technology, Inc. Physical partitioning of computing resources for server virtualization
CN110741351B (zh) * 2017-06-16 2023-05-09 阿里巴巴集团控股有限公司 确定虚拟化多处理系统的处理器利用率
CN107479943B (zh) * 2017-07-03 2020-02-21 北京东土科技股份有限公司 基于工业互联网操作系统的多操作系统运行方法及装置
US11669335B2 (en) * 2019-03-28 2023-06-06 Intel Corporation Secure arbitration mode to build and operate within trust domain extensions
WO2022181020A1 (ja) * 2021-02-26 2022-09-01 パナソニックＩｐマネジメント株式会社 情報処理装置および情報処理方法
CN113094111B (zh) * 2021-04-16 2024-01-09 三星（中国）半导体有限公司 设备以及设备的启动方法
CN117389677A (zh) * 2022-07-05 2024-01-12 华为云计算技术有限公司 一种基于云计算技术的服务器以及云系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06325008A (ja) 1993-03-17 1994-11-25 Hitachi Ltd リセット機能を備えるコンピュータシステム
US7685635B2 (en) * 2005-03-11 2010-03-23 Microsoft Corporation Systems and methods for multi-level intercept processing in a virtual machine environment
US7900204B2 (en) * 2005-12-30 2011-03-01 Bennett Steven M Interrupt processing in a layered virtualization architecture
US8453197B2 (en) * 2006-09-07 2013-05-28 Intel Corporation Method, apparatus and system for isolating a temporary partition on a host
US20080155092A1 (en) * 2006-12-22 2008-06-26 Arvind Kumar Method, apparatus and system for securely metering resource usage on a computing platform
JP5405799B2 (ja) * 2008-10-30 2014-02-05 株式会社日立製作所 仮想計算機の制御方法、仮想化プログラム及び仮想計算機システム
US10684973B2 (en) * 2013-08-30 2020-06-16 Intel Corporation NUMA node peripheral switch

Also Published As

Publication number Publication date
US9639486B2 (en) 2017-05-02
JP2015088014A (ja) 2015-05-07
US20150120979A1 (en) 2015-04-30

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