JP6083194B2 - Surface emitting semiconductor laser array device, light source and light source module - Google Patents

Description

  The present invention relates to a surface emitting semiconductor laser array device, a light source, and a light source module.

  In recent years, there has been a demand for high-power semiconductor lasers in the medical and industrial fields. In general, an edge emitting laser is used in a high-power semiconductor laser, but the edge emitting laser causes end face destruction, and the device characteristics tend to deteriorate. On the other hand, surface-emitting semiconductor lasers are attracting attention as semiconductor lasers that do not cause end face destruction, and allowance for temperature rise is superior to end face emission lasers. In order to produce a high-power semiconductor laser using a surface emitting semiconductor laser, it is necessary to produce a large-scale array structure. Long-lived surface emitting semiconductor laser array in which surface emitting semiconductor laser elements are connected in series, and even if some surface emitting semiconductor laser elements fail, other surface emitting semiconductor laser elements can continue to emit light Has been proposed (Patent Document 1).

JP 2009-94308 A

  An object of the present invention is to provide a surface emitting semiconductor laser array device, a light source, and a light source module that can achieve high density and long life.

Claim 1 is a substrate having a first main surface, a second main surface opposite to the first main surface, and a plurality of surface emitting elements arranged in a matrix on the first main surface of the substrate And a first semiconductor laser element formed on the first main surface of the substrate and electrically connected in parallel to first electrodes of a plurality of surface emitting semiconductor laser elements arranged in a first row And a second electrode formed on the first main surface of the substrate and electrically connected in parallel to the second electrodes of the plurality of surface emitting semiconductor laser elements arranged in the second row. An electrode region, and at least one metal wiring disposed between the first electrode region and the second electrode region, wherein the metal wiring is arranged between one column and the other column. A first portion including a portion extending in the direction and electrically connected to each of the first electrodes of the plurality of surface-emitting type semiconductor laser elements in one row It possesses a connection part and a second connecting portion electrically connected to the second electrode of the plurality of surface emitting type semiconductor laser elements of the other row, the first connecting portion, the column A plurality of comb-shaped portions extending in the first row direction from a portion extending in the first row direction, and the second connection portion extends in the column direction at a position different from the comb-shaped portion of the first connection portion A plurality of comb-shaped portions extending in a second row direction opposite to the first row direction, each of the comb-shaped portions of the first connection portion being a plurality of surface-emitting semiconductors in one column Extending between each of the laser elements, each surface emitting semiconductor laser element has a columnar structure, and one columnar structure is located between a pair of comb-shaped portions of the first connection portion, Each of the comb-shaped portions of the first connection portion is electrically connected to the surface emitting semiconductor laser element at the bottom of the columnar structure in one row, Each of the comb-shaped portions of the second connection portion is electrically connected to the surface-emitting semiconductor laser element at the top of the columnar structure in the other row, and the substrate is semi-insulating and the surface-emitting semiconductor laser A surface-emitting semiconductor laser array device that is made of a material that can transmit the oscillation wavelength of the element and that emits laser light from a plurality of surface-emitting semiconductor laser elements from a second main surface of the substrate .
According to a second aspect of the present invention, a plurality of island regions electrically isolated from each other are formed on the first main surface of the substrate, and a plurality of surface emitting semiconductor laser elements arranged in the column direction in each island region The surface emitting semiconductor laser array device according to claim 1 , wherein a conductive layer common to the first electrodes of the plurality of surface emitting semiconductor laser elements is formed in each island region.
3. The surface emitting semiconductor laser array device according to claim 2 , wherein a connection hole for connecting the common conductive layer and the first connection portion is formed in each island region.
Claim 4, wherein the connection hole is formed between the columnar structures are arranged in the column direction, the surface-emitting type semiconductor laser array apparatus according to claim 3.
Claim 5, wherein the connection hole is formed to surround the respective columnar structure arranged in the column direction, the surface-emitting type semiconductor laser array apparatus according to claim 3.
Claim 6, wherein the connection hole is formed along the column direction of said island region, a surface-emitting type semiconductor laser array apparatus according to claim 3.
Claim 7, wherein the substrate is composed of semi-insulating semiconductor material, the island region is formed by forming a groove that reaches the substrate to the common conductive layer, according to claim 2 Surface emitting semiconductor laser array device.
In the eighth aspect , the first electrode region is an anode-side electrode pad, the second electrode region is a cathode-side electrode pad, and the anode-side electrode pad and the cathode-side electrode pad are the substrate. The length in the column direction of the anode side electrode pad and the cathode side electrode pad is equal to or larger than the entire interval of the plurality of surface emitting semiconductor laser elements in the column direction. Item 2. The surface emitting semiconductor laser array device according to Item 1.
According to a ninth aspect of the present invention, there is provided the surface-emitting type semiconductor laser array device according to any one of the first to eighth aspects, driving means for driving the surface-emitting type semiconductor laser array device, and the surface-emitting type semiconductor laser array device. A heat source that is thermally coupled to dissipate heat generated by the surface-emitting type semiconductor laser array device.
According to a tenth aspect of the present invention, there is provided a plurality of surface-emitting type semiconductor laser array devices according to any one of the first to eighth aspects, and an anode-side metal extending in parallel with the arrangement direction of the plurality of surface-emitting type semiconductor laser array devices. The anode side metal wiring is electrically connected in common to the anode side electrode pads of the plurality of surface emitting semiconductor laser array devices, The metal wiring on the cathode side is electrically connected in common to the cathode side electrode pads of the plurality of surface emitting semiconductor laser array devices, and the metal wiring for heat dissipation includes the metal wiring on the anode side and the metal on the cathode side. A light source module arranged between wirings.
Claim 11 is the anode pad and cathode pad of the plurality of surface emitting type semiconductor laser array device is surface-mounted on the metal wiring and the cathode side of the metal wire of the anode side, according to claim 10 Light source module.

According to the first aspect, compared to a conventional surface emitting semiconductor laser array device having no metal wiring, the life of the wiring and the density of the elements can be increased.
According to claim 1, in comparison with the structure having no first and second connecting portions, to reduce the heat generation of the array device.
According to the first aspect , the heat generated in the columnar structure can be effectively dissipated.
According to the first aspect , the step for thinning the substrate can be omitted.
According to the second and third aspects, the connection with the first electrode of the surface emitting semiconductor laser element can be facilitated.
According to the fourth, fifth, and sixth aspects , the contact resistance between the first connecting portion and the common conductive layer can be reduced.
According to the seventh aspect , the formation of the island region can be facilitated.
According to the eighth aspect , heat generation can be reduced.

1 is a schematic plan view of a surface emitting semiconductor laser array apparatus according to a first embodiment of the present invention. It is a top view which shows the state which removed the metal wiring from FIG. 3A is a cross-sectional view taken along line AA in FIG. 1, and FIG. 3B is a cross-sectional view taken along line BB in FIG. 4A and 4B are plan views for explaining the relationship between the surface emitting semiconductor laser element and the metal wiring. FIG. 4A is a plan view of the metal wiring on the anode side, and FIG. 4B is an intermediate metal. FIG. 4C is a plan view of the metal wiring on the cathode side. 2 is an equivalent circuit of the surface-emitting type semiconductor laser array device of FIG. 1. It is a top view which shows the other example of the surface emitting semiconductor laser array apparatus based on the 1st Example of this invention. 7A is a cross-sectional view taken along the line AA in FIG. 6, and FIG. 7B is a cross-sectional view taken along the line BB in FIG. It is a top view which shows the other example of the surface emitting semiconductor laser array apparatus based on the 1st Example of this invention. It is a top view which shows the state which removed the metal wiring from FIG. 9A is a cross-sectional view taken along the line AA in FIG. 8, and FIG. 9B is a cross-sectional view taken along the line BB in FIG. It is a schematic plan view of the surface emitting semiconductor laser array device according to the second embodiment of the present invention. It is a top view which shows the state which removed the metal wiring from FIG. 11A is a cross-sectional view taken along the line AA in FIG. 10, and FIG. 11B is a cross-sectional view taken along the line BB in FIG. Sectional drawing which shows schematic structure of the light source using the surface emitting semiconductor laser array apparatus based on the Example of this invention. It is a figure explaining the manufacturing process of the light source shown in FIG. It is a top view which shows the other structural example of the light source using the surface emitting semiconductor laser array apparatus based on the Example of this invention.

  A preferred embodiment of the present invention will be described with reference to the drawings. In the following description, a surface emitting semiconductor laser having an oxide confinement structure is exemplified, and the surface emitting semiconductor laser is referred to as a VCSEL (Vertical Cavity Surface Emitting Laser). It should be noted that the scale of the drawings is emphasized for easy understanding of the features of the invention and is not necessarily the same as the scale of an actual device.

  A VCSEL array is formed on a conductive substrate that transmits oscillation light, and the substrate is thinly polished (for example, 200 mm or less) so as to reduce light absorption depending on the carrier concentration of the substrate. A high-power VCSEL array that simultaneously drives a large current and suppresses heat generation has been devised by forming a back electrode having an opening and mounting the VCSEL array by inverting it.

  In this type of VCSEL array, the processing steps after polishing the substrate are complicated, and when a chip driven by a large current is arranged on the laser bar, a large number of wire bondings are required. It is difficult, and there is a problem that the entire laser bar does not emit light when a problem such as opening occurs in one chip.

  In a preferred embodiment of the present invention, the VCSEL array is configured using a semi-insulating (SI) substrate, thereby reducing light absorption by the substrate during backside emission. Since the influence of absorption by the substrate is suppressed, polishing for thinning the substrate as in the prior art is unnecessary, and the manufacturing process is facilitated. Further, by constructing a low current drive array chip in which the current flowing through the wiring on the chip is reduced, heat generation is reduced and the life of the wiring is improved. Further, by forming electrode pads for applying a current voltage at both ends of the chip, the density of the chip in the laser bar is increased.

  1 is a schematic plan view of a surface-emitting type semiconductor laser array device according to a first embodiment of the present invention, FIG. 2 is a plan view showing a state in which metal wiring is removed from the surface of FIG. 1, and FIG. ) Is a cross-sectional view taken along line AA in FIG. 1, and FIG. 3B is a cross-sectional view taken along line BB in FIG. 4A is a plan view of the electrode pad on the anode side, FIG. 4B is a plan view of metal wiring for series-parallel connection of VCSEL elements formed in the island region, and FIG. ) Is a plan view of the metal pad on the cathode side, and FIG. 5 is an equivalent circuit diagram of the VCSEL array of FIG.

  As shown in FIG. 2, a plurality of island regions S are formed on the substrate 100. One island region S extends in the column direction, and a plurality of island regions S are arranged in the row direction. In the example of the figure, four island regions S are represented in the row direction. In a preferred embodiment, the substrate 100 is composed of a semi-insulating (genuine) GaAs substrate, and a large number of semiconductor layers including an n-type GaAs layer 102 are formed on the substrate 100 as shown in FIG. ing. These semiconductor layers are formed by epitaxial growth. The island region S is formed by forming a separation groove 104 having a depth reaching the substrate 100 in the n-type GaAs layer 102. In the example of FIG. 2, four island regions S are formed by four rectangular separation grooves 104. Since the isolation groove 104 has a depth reaching the substrate, one island region S is separated from the adjacent island region S and is electrically insulated from each other.

  In one island region S, a plurality of cylindrical posts (mesa or columnar structures) P aligned in the column direction are formed. One post P defines one VCSEL element. In the example of the figure, four post P or VCSEL elements are formed in one island region S in the column direction. The n-type GaAs layer 102 formed in one island region S is an n-side electrode common to the four VCSEL elements.

  FIG. 2 shows a contact hole Cn for electrical connection with the n-side electrode of the VCSEL element and a contact hole Cp for electrical connection with the p-side electrode of the VCSEL element. The surface of the substrate 100 shown in FIG. 2 is covered with an interlayer insulating film 118 (see FIG. 3). The interlayer insulating film 118 is electrically connected to the n-side electrode of the VCSEL element, that is, the n-type GaAs layer 102. Are formed, and a contact hole Cp for connecting to the p-side electrode of the VCSEL element is formed. The contact hole Cn is formed between the posts P aligned in the column direction of one island region S. The side surface where the contact hole Cn faces the post P has a curved surface that follows the post P, and the contact hole Cn is adjacent to the post P as much as possible to form a contact hole Cn having a large area. The contact hole Cn exposes the n-type GaAs layer 102 as described above, and an n-side metal 122 for contact (see FIG. 3) is formed in the contact hole Cn as described later. On the other hand, the contact hole Cp is preferably formed at the top of the post P, and the contact hole Cp is preferably formed as large as possible. Also, a contact p-side metal 120 (see FIG. 3) is formed in the contact hole Cp.

Referring now to FIG. 1, the leftmost island region S _A of the drawings, the electrode pads 130 on the anode side is connected to the leftmost island region S _C, cathode-side electrode pad 140 is connected Is done. Further, on another island region S between the island region S _A and the island region S _C, intermediate metal wiring 150 is arranged, thereby VCSEL elements are connected in series-parallel.

The anode-side electrode pad 130 is disposed at one end of the substrate 100, and the length in the column direction is equal to or slightly larger than the length in the column direction of one island region S. The electrode pads 130 of the anode side, as shown in FIG. 4 (A), the external connection portion 132 having an area of relatively large rectangular for connecting with the outside, each VCSEL element in the island region S _A A plurality of circular finger portions 134 extending in a comb shape in the row direction for electrical connection with the p-side electrode. Here, the finger portions 134 of the four comb-shaped in accordance with the number of VCSEL elements formed in one island region S _A is formed. Each finger part 134 is electrically connected to the p-side metal 120 of the VCSEL element through a contact hole Cp formed at the top of the post P. Thus, p-side metal 120 of the VCSEL elements leftmost island region _{S A} are commonly connected to the anode side of the electrode pad 130.

The cathode-side electrode pad 140 is disposed at the other end of the substrate 100, and the length in the column direction is equal to or slightly larger than the length in the column direction of one island region S. Cathode-side electrode pad 140, as shown in FIG. 4 (C), an external connection portion 142 having an area of relatively large rectangular for connecting with the outside, each VCSEL element in the island region S _C A plurality of comb-shaped portions 144 extending in a comb shape in the row direction are provided for electrical connection with the n-side metal 122. The pair of comb-shaped portions 144 form a space 146 therebetween, and the opposing surfaces of the space 146 have a slightly curved surface in accordance with the post P. Here, the number of VCSEL elements formed in one island region S _C, i.e. five comb-shaped portion 144 in accordance with the number of fingers 154 are formed. As shown in FIG. 1, each comb-shaped portion 144 extends between the posts P and both sides of the posts P, and extends on both sides of the posts P, and the n-side metal 122 of the VCSEL element, that is, n-type GaAs via the contact hole Cn. The finger portion 154 of the intermediate metal wiring 150 is positioned in the space 146 of the pair of comb-shaped portions 144 that are electrically connected to the layer 102. Thus, n-side metal 122 of each VCSEL element rightmost island region _{S C} are commonly connected to the cathode side of the electrode pad 140.

  The intermediate metal wiring 150 is arranged between the anode-side electrode pad 130 and the cathode-side electrode pad 140, and connects VCSEL elements between adjacent island regions in series and parallel. As shown in FIG. 4B, the intermediate metal wiring 150 includes a portion 151 extending in the column direction and a plurality of comb-shaped portions extending in a comb shape in the row direction from one side of the extending portion 151. 152 and a plurality of circular finger portions 154 extending in a comb shape in the row direction on the opposite side. However, the positions where the finger portions 154 extend in the row direction are different from the positions where the comb portions 152 extend in the row direction, as if the comb portions 152 and the finger portions 154 alternately extend in the respective directions. The shape of the comb-shaped portion 152 is the same as that of the comb-shaped portion 144 of the cathode-side electrode 140, and a space 156 is formed at the center thereof, and in the space 156, the adjacent metal wiring finger portion 154 or anode The finger part 134 of the electrode pad 130 on the side is located. The shape of the finger part 154 is also the same as that of the finger part 134 of the electrode pad 130 on the anode side.

  As shown in FIG. 1, the portion 151 extending in the column direction extends on the separation groove 104, and the comb-shaped portion 152 passes between the posts P of the adjacent island region and passes through the contact regions Cn on both sides of the post P. The finger portion 154 is electrically connected to the p-side metal 120 via the contact region Cp at the top of each post P in the adjacent island region on the opposite side. Thus, the n-side metal 122 and the p-side metal 120 of the corresponding VCSEL element between adjacent island regions are electrically connected by the intermediate metal wiring 150. In the example of FIG. 1, three intermediate metal wires 150 are used to connect the VCSEL elements between the island regions.

  An equivalent circuit of the surface-emitting type semiconductor laser array device 10 of FIG. 1 is shown in FIG. As shown in the figure, four VCSEL elements formed in one island region S are connected in parallel, and each VCSEL element in the adjacent island region S is connected in series. When a forward bias voltage is applied between the anode-side electrode pad 130 and the cathode-side electrode pad 140, each VCSEL element is driven with a constant current. In such a circuit configuration, the VCSEL array can emit light even if some of the wirings are open.

  Next, individual VCSELs constituting the array device will be described with reference to the cross-sectional view of FIG. In the array apparatus 10 of this embodiment, an n-type GaAs layer 102 is formed on an i-type semi-insulating GaAs substrate 100, and further AlGaAs layers having different Al compositions are alternately stacked thereon. An active region 112 including an InGaAs quantum well layer sandwiched between upper and lower spacer layers formed on a lower distributed black reflector (hereinafter referred to as a DBR) 110 and a lower DBR 110, on the active region 112 The p-type upper DBR 116 is formed by alternately stacking AlGaAs layers formed with different Al compositions. These semiconductor layers are formed by MOCVD.

  Since the array apparatus 10 of this embodiment emits laser light from the back surface, that is, from the back surface of the substrate 100, the low refractive index layer of the upper DBR 116 is set so that the reflectance of the upper DBR 116 is larger than the reflectance of the lower DBR 110. And the period of the pair of high refractive index layers is adjusted to be larger than that of the lower DBR 110. The n-type GaAs layer 102 has a higher impurity concentration than the lower DBR 110 to provide a low resistance region. The GaAs layer 102 is adjusted to a thickness that does not increase light absorption. The active region 112 generates light having a wavelength of 980 nm, while the n-type GaAs layer 102 and the GaAs substrate 100 transmit light having a wavelength of 980 nm. Since the substrate 100 is semi-insulating, absorption of light by impurities in the substrate is suppressed.

  A cylindrical post (columnar structure) P is formed on the substrate 100 by etching the semiconductor layer from the upper DBR 116 to the lower DBR 110 using a normal photolithography process. In the oxidation step after the formation of the post P, the current confinement layer 114 in the upper DBR 116 is selectively oxidized from the side surface of the post P. The transverse mode oscillation is controlled by adjusting the diameter of the oxidized aperture surrounded by the oxidized region. When a relatively high output is required, an oxide aperture diameter that provides multimode oscillation is selected.

  Further, in order to form the island region S on the substrate, a separation groove 104 is formed in the n-type GaAs layer 102. The isolation groove 104 has a depth that reaches the substrate 100, so that the island regions are electrically isolated from each other.

  An interlayer insulating film 118 is formed on the entire surface of the substrate including the post P and the isolation trench 104, and contact holes Cp and Cn are formed at necessary portions of the interlayer insulating film 118. The interlayer insulating film 118 is made of, for example, SiN, SiON, or the like. A circular contact hole Cp is formed at the top of the post P so as to expose the p-type upper DBR 116. Preferably, a GaAs contact layer having a high impurity concentration is formed on the uppermost layer of the upper DBR 116, and the GaAs contact layer is ohmically connected to the p-side metal 120. On the other hand, a substantially rectangular contact hole Cn is formed between the posts P, and the n-side metal 122 formed in the contact hole Cn is ohmically connected to the n-type GaAs layer 102.

  The p-side metal 120 in the contact hole Cp is made of a laminated metal such as Au or Ti / Au. The n-side metal 122 in the contact hole Cn is made of Au / Ge or the like having good connectivity with the n-type semiconductor layer. The anode-side electrode pad 130, the cathode-side electrode pad 140, and the intermediate metal wiring 150 are preferably made of the same metal material (for example, the same material as the p-side metal 120) and patterned at the same time. The finger part 134 of the anode-side electrode pad 130 and the finger part 154 of the intermediate metal wiring 150 are connected to the p-side metal 120 of the VCSEL element, respectively, the comb-shaped part 144 of the cathode-side electrode pad 140, and the intermediate metal The wiring comb-shaped portions 154 are connected to the n-side metal 122 on the side of the post P, respectively. Since the laser light is emitted from the back side of the substrate, the finger portions 134 and 154 cover the entire top surface of the post P, and no emission window or opening is formed in the finger portions 134 and 154.

  In the array apparatus of this embodiment, a plurality of island regions are formed on one chip, a plurality of VCSEL elements are formed in one island region, and a plurality of VCSEL elements between the plurality of island regions are connected in series and parallel. To do. In the array device connected in series and parallel as described above, each VCSEL element can be driven with a constant current, and a uniform surface light source with less unevenness can be provided. Even if a defect such as an open occurs in some wirings or contacts, the array device can continue to emit light. Further, light absorption due to impurities does not occur due to the semi-insulating substrate, so that polishing for thinning the substrate as in the conventional case is unnecessary, and the manufacturing process can be facilitated. Further, in the array apparatus of this embodiment, anode and cathode electrode pads 130 and 140 are arranged at both ends of the chip, and an intermediate metal wiring 150 is arranged between VCSEL elements arranged in an array, so that Effectively use the area to increase the total area of the metal wiring, thereby reducing the current driving the array device by reducing the load resistance of the metal wiring and improving the heat dissipation characteristics Can do.

  Next, another configuration example of the surface-emitting type semiconductor laser array device of this embodiment will be described. FIG. 6 is a schematic plan view of an array apparatus 10A according to another configuration example, and FIG. 7 is a cross-sectional view taken along line AA and BB of FIG.

  As shown in FIG. 6, the array device 10 </ b> A having this configuration has a different configuration of the contact hole Cn, and accordingly, a part of the intermediate metal wiring 150 and the cathode-side electrode pad 140 is modified. A plurality of contact holes Cn are formed between the posts P and the separation grooves 104 in the column direction along the edge of one island region S. Here, since four posts P are arranged in one island region, four rectangular contact holes Cn are formed accordingly. On the other hand, the intermediate metal wiring 150A includes a portion 151 extending in the column direction and a plurality of finger portions 154 extending from the extending portion 151 in the row direction. The comb-shaped portion 152 is not provided. Instead, the portion 151 extending in the column direction extends over the contact hole Cn and is electrically connected to the n-side metal 122 via the contact hole Cn. Similarly, the cathode-side electrode pad 140 does not include a comb-shaped portion, and a portion 141 extending in the column direction extends over the contact hole Cn and is electrically connected to the n-side metal 122.

  In such a configuration, the intermediate metal wiring 150A and the cathode-side electrode pad 140 are not provided with a comb-shaped portion that enters between the posts P, so that the pitch in the column direction of the posts P can be further reduced. The density of the VCSEL element formed on the chip can be increased.

  FIG. 8 is a plan view showing still another configuration example of the array device of the present embodiment, FIG. 8A is a plan view in a state where the metal wiring 150 and the electrode pads 130 and 140 on the surface of FIG. 8 are removed, and FIG. FIG. 2 is a cross-sectional view taken along line AA and BB. In the array device 10B of this configuration example, the configuration of the contact hole Cn for electrical connection to the n-type GaAs layer 102 is different. As shown in FIG. 8A, the contact holes Cn formed in one island region are not separated from each other but have one continuous shape. It is as if a plurality of contact holes Cn shown in FIG. 2 are connected by the contact holes Cn shown in FIG. Therefore, contact holes Cn are formed so as to follow the shapes of the comb-shaped portion 152 of the intermediate wiring metal 150 and the comb-shaped portion 144 of the electrode pad 140 on the cathode side, and a relatively large area is formed directly below the comb-shaped portions 152 and 144. The n-side metal 122 is formed. In such a configuration, the contact area between the comb-shaped portions 152 and 144 and the n-type GaAs layer 102 can be increased as compared with the configuration of FIG. And at the same time, heat generation can be more effectively suppressed.

  10 is a plan view showing still another configuration of the array device of the present embodiment, FIG. 10A is a plan view in a state in which the intermediate metal wiring and electrode pads 130 and 140 in FIG. 10 are removed, and FIG. FIG. 10 is a cross-sectional view taken along line AA in FIG. The array device 10C of this configuration example is formed by completely separating each VCSEL element. As shown in FIG. 10A, the separation grooves 104 for defining the island regions are formed in a lattice shape, thereby forming a plurality of island regions S in the matrix direction. In the illustrated example, an island region S of 4 rows × 4 columns is shown. In one island region S, one VCSEL element (or post P) is formed, and a pair of contact holes Cn are formed on both sides of the post P. The shapes of the anode-side electrode pad 130, the cathode-side electrode pad 140, and the intermediate metal wiring 150 are the same as in FIG.

  In the above embodiment, an example in which laser light is emitted from the back surface of the substrate has been described. However, the present invention is not limited to this, and laser light may be emitted from the front surface side of the substrate. In this case, an opening for light emission is formed in the p-side metal 120 and finger portions 134 and 154 covering the top of the post P, and the reflectance of the lower DBR is higher than that of the upper DBR.

  In the above embodiment, the post P is formed in a cylindrical shape or a conical shape, but the post P may have any shape. For example, the post P may be formed continuously by one etching, or may be divided into a plurality of etchings. For example, when the post P is formed by two-stage etching, a discontinuous diameter may occur at the boundary between the post formed by the first etching and the post formed by the next etching.

  Further, in the above-described embodiment, a configuration in which a semiconductor layer is stacked by epitaxial growth using a semi-insulating semiconductor substrate is shown. However, the present invention is not limited to this, and other insulating substrates can be used as long as they can transmit an oscillation wavelength. It is also possible. Further, in the above embodiment, the n-type GaAs layer is used on the substrate, but the common conductive layer may be a layer made of a semiconductor material other than GaAs. Furthermore, in the above-described embodiment, a GaAs-based VCSEL using a semiconductor material of GaAs, AlAs, or AlGaAs has been exemplified. However, the present invention can also be applied to a VCSEL using another III-V group compound semiconductor. .

  Next, FIG. 12 shows a schematic sectional view of a light source using the surface-emitting type semiconductor laser array device of this example. The light source 200 according to the present embodiment is formed on the surface side of the surface emitting semiconductor laser array device 10 described above, the antireflection film 210 formed on the back surface of the substrate 100 of the array device 10, and the substrate side of the array device 10. The rewiring metal pattern 220, the solder layer 230 formed on the rewiring metal pattern 220, the heat sink 240 formed on the solder layer 230, and the cooling device 250 formed on the heat sink 240 are configured.

  The array apparatus 10 has a configuration as shown in FIGS. 1 to 11, and FIG. 12 shows a state in which the array apparatus 10 is inverted 180 degrees. The antireflection film 210 is formed on the back surface of the substrate 100 with a film thickness of λ / 4 of the oscillation wavelength, for example, and suppresses the laser light L emitted from the array device 10 from being reflected inside at the substrate interface.

  On the front surface side of the array apparatus 10, a redistributed metal pattern 220 is formed as will be described later. The metal pattern 220 is electrically connected to the anode-side electrode pad 130 and the cathode-side electrode pad 140, and is electrically isolated by the insulating film 260 from the light-emitting region where the other posts P are formed. . The anode-side electrode pad 130 and the cathode-side electrode pad 140 are connected to the heat sink 240 via the redistributed metal pattern 220 and the solder layer 230. For the solder layer 230, for example, In solder, Au / Su solder or the like is used. For example, copper (Cu) having good thermal conductivity is laminated on the heat sink 240. As the cooling device 250, an air cooling device using a radiating fin, a water cooling device using a refrigerant, a cooling device using a Peltier element, or the like is used.

  When forward drive power is supplied from a driving device (not shown) to the anode-side electrode pad 130 and the cathode-side electrode pad 140, each VCSEL element of the array device 10 emits light, and laser light L is emitted from the back surface of the substrate. The Each VCSEL element is driven at a constant current, and emits light uniformly with little unevenness. In addition, since the redistributed metal pattern 220 is formed on the surface of the array device, the heat generated in the array device is effectively dissipated to the outside through the metal pattern 220. Furthermore, by providing the heat sink 240 and the cooling device 250, the heat generated in the array device is forcibly dissipated to the outside, so that the cooling efficiency can be improved.

  FIG. 13 is a diagram for explaining a method of manufacturing the light source shown in FIG. First, the array apparatus 10 of this embodiment as shown in FIG. For example, a 16 × 16 VCSEL element is formed in an area of 1 mm × 1 mm. The VCSEL element has a post diameter of about 35 μm, a bit interval of 65 μm, and an oxidized aperture diameter of 25 μm.

  Next, an insulating film is applied so as to cover the entire surface of the array device 10, and then, as shown in FIG. 13B, the insulating film 260 is patterned so as to cover the light emitting region. That is, the insulating film 260 is patterned so as to expose the externally connected region of the anode-side electrode pad 130 and the externally connected region of the cathode-side electrode pad 140 and cover the other light-emitting region. Is done. The insulating film 260 is preferably a material having high thermal conductivity, and for example, a polyimide resin is used. At this time, the surface of the insulating film 260 may be planarized.

  Next, a metal film is formed so as to cover the entire surface of the array device 10, and then a redistributed metal pattern 220 is formed on the insulating film 260 as shown in FIG. The metal pattern 220A is formed on the electrode pad 130 on the anode side, and the metal pattern 220B is formed on the electrode pad 140 on the cathode side. The metal pattern 220C is separated from the metal patterns 220A and 220B, and is formed on the insulating film 260 that covers the light emitting region of the array device. Next, the array device of FIG. 13C is inverted, and the metal patterns 220 </ b> A and 220 </ b> B are connected to the heat sink 240 through the solder layer 230.

  FIG. 14 is a plan view showing an example of a light source module using the surface-emitting type semiconductor laser array device of the present embodiment. As shown in FIG. 14A, the light source module (laser bar) 300 of the present embodiment includes a plurality of array devices 10 arranged in a linear manner and anode-side metal wiring 310 extending in the arrangement direction of the array devices 10. A metal wiring 320 on the cathode side extending in parallel with the metal wiring 310, and a metal wiring 330 for heat dissipation extending in parallel between the metal wiring 310 and the metal wiring 320. These metal wirings are indicated by hatching for easy viewing. The metal wiring 310 on the anode side is electrically connected in common to the electrode pad 130 on the anode side of each array device 10, and the metal wiring 320 on the cathode side is commonly connected to the electrode pad 140 on the cathode side of each array device 10. Electrically connected. The heat dissipating metal wiring 330 is electrically separated from the metal wirings 310 and 320, extends the light emitting portion region of each light emitting device 10 through an insulating material, and dissipates heat generated in each array device.

  The electrode pad 130 on the anode side and the electrode pad 140 on the cathode side can be surface-mounted on the metal wirings 310 and 320 via solder or the like. For this reason, it is possible to increase the density of the array device (chip) to be mounted compared to a light source module that performs wire bonding connection, simplifying the manufacturing process, and reducing the size and thickness. become. Further, the light source module 300 in FIG. 14A can be two-dimensionally arranged as shown in FIG. 14B. By simultaneously lighting such light source modules 300 simultaneously, it is possible to obtain a surface light source with high light output that is uniform and has little unevenness.

  The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the specific embodiment, and various modifications can be made within the scope of the present invention described in the claims. Deformation / change is possible.

10, 10A, 10B, 10C: surface emitting semiconductor laser array device 100: substrate 102: n-type GaAs layer 104: separation groove 110: lower DBR
112: Active region 114: Current confinement layer 116: Upper DBR
118: Interlayer insulating film 120: p-side metal 122: n-side metal 130: anode-side electrode pad 132: external connection part 134: finger part 140: cathode-side electrode pad 142: external connection part 144: comb-shaped part 146: space 150: Intermediate metal wiring 151 1: Part extending in the column direction 152: Comb portion 154: Finger portion 156: Space Cn, Cp: Contact holes S, S _A , S _C : Island region

Claims (11)

A substrate having a first main surface, a second main surface opposite to the first main surface;
A plurality of surface-emitting type semiconductor laser elements arranged in a matrix on the first main surface of the substrate;
A first electrode region formed on the first main surface of the substrate and electrically connected in parallel to the first electrodes of the plurality of surface emitting semiconductor laser elements arranged in the first row;
A second electrode region formed on the first main surface of the substrate and electrically connected in parallel to the second electrodes of the plurality of surface-emitting type semiconductor laser elements arranged in the second row;
Having at least one metal wiring disposed between the first electrode region and the second electrode region;
The metal wiring includes a portion extending in the column direction between one column and the other column, and is electrically connected to the first electrodes of the plurality of surface-emitting type semiconductor laser elements in one column, respectively. a first connecting portion and a second connecting portion electrically connected to the second electrode of the plurality of surface emitting type semiconductor laser elements of the other row possess the,
The first connection portion includes a plurality of comb-shaped portions extending in a first row direction from a portion extending in the column direction, and the second connection portion includes a comb-shaped portion of the first connection portion and A plurality of comb-shaped portions extending in a second row direction opposite to the first row direction from portions extending in the column direction at different positions, and each of the comb-shaped portions of the first connection portion is , Extending between each of the plurality of surface emitting semiconductor laser elements in one row,
Each surface emitting semiconductor laser element has a columnar structure, and one columnar structure is located between a pair of comb-shaped portions of the first connection portion, and each of the comb-shaped portions of the first connection portion is Are electrically connected to the surface emitting semiconductor laser element at the bottom of the columnar structure in one row, and each of the comb-shaped portions of the second connecting portion is a surface emitting semiconductor at the top of the columnar structure in the other row. Electrically connected to the laser element,
The substrate is made of a material that is semi-insulating and capable of transmitting the oscillation wavelength of the surface-emitting semiconductor laser element, and laser light from the plurality of surface-emitting semiconductor laser elements is transmitted from the second main surface of the substrate. A surface-emitting type semiconductor laser array device that is emitted . A plurality of island regions electrically isolated from each other are formed on the first main surface of the substrate, and a plurality of surface-emitting type semiconductor laser elements arranged in a column direction are formed in each island region, 2. The surface emitting semiconductor laser array device according to claim 1 , wherein a conductive layer common to the first electrodes of the plurality of surface emitting semiconductor laser elements is formed in the island region. 3. The surface emitting semiconductor laser array device according to claim 2 , wherein a connection hole for connecting the common conductive layer and the first connection portion is formed in each island region. The surface emitting semiconductor laser array device according to claim 3 , wherein the connection holes are formed between columnar structures arranged in a column direction. The surface emitting semiconductor laser array device according to claim 3 , wherein the connection hole is formed so as to surround each columnar structure arranged in a column direction. The surface emitting semiconductor laser array device according to claim 3 , wherein the connection hole is formed along a column direction of the island region. The surface emitting semiconductor according to claim 2 , wherein the substrate is made of a semi-insulating semiconductor material, and the island region is formed by forming a groove reaching the substrate in the common conductive layer. Laser array device. The first electrode region is an anode side electrode pad, the second electrode region is a cathode side electrode pad, and the anode side electrode pad and the cathode side electrode pad are arranged at both ends of the substrate. The length in the column direction of the anode side electrode pad and the cathode side electrode pad is equal to or larger than the entire interval of the plurality of surface emitting semiconductor laser elements in the column direction. Surface emitting semiconductor laser array device. A surface-emitting type semiconductor laser array device according to any one of claims 1 to 8 ,
Driving means for driving the surface-emitting type semiconductor laser array device;
A heat radiating means thermally coupled to the surface emitting semiconductor laser array device and radiating heat generated by the surface emitting semiconductor laser array device;
Having a light source. A plurality of surface-emitting type semiconductor laser array devices according to any one of claims 1 to 8 ,
Including metal wiring on the anode side, metal wiring on the cathode side, and metal wiring for heat dissipation extending in parallel with the arrangement direction of the plurality of surface emitting semiconductor laser array devices,
The anode-side metal wiring is electrically connected in common to anode-side electrode pads of a plurality of surface-emitting type semiconductor laser array devices, and the cathode-side metal wiring is a cathode of a plurality of surface-emitting type semiconductor laser array devices. The light source module is electrically connected in common to a side electrode pad, and the metal wiring for heat dissipation is arranged between the metal wiring on the anode side and the metal wiring on the cathode side. 11. The light source module according to claim 10 , wherein anode-side electrode pads and cathode-side electrode pads of a plurality of surface-emitting type semiconductor laser array devices are surface-mounted on the anode-side metal wiring and the cathode-side metal wiring.

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