JP6065732B2 - Image processing apparatus and photographing apparatus - Google Patents

Description

  The present invention relates to an image processing apparatus and an imaging apparatus that process an image acquired by a planar image detector having a conversion film that converts radiation such as X-rays, electromagnetic waves such as visible light and infrared light into electric charges.

  As a planar image detector (X-ray detector) used in an X-ray imaging apparatus, for example, a flat panel detector (hereinafter referred to as “FPD” as appropriate) is known. The FPD is formed by depositing a conversion film such as a-Se (amorphous selenium) on an active matrix substrate. The active matrix substrate has a pixel electrode, a switching element such as a thin film transistor (TFT), a storage capacitor (capacitor) and the like arranged in a two-dimensional matrix (two-dimensional array).

  In the FPD, when an X-ray image that is irradiated onto a subject through an X-ray tube or the like and is transmitted through the subject is projected onto the conversion film, a charge proportional to the density of the X-ray image is generated in the conversion film. The charge generated in the conversion film is collected by the pixel electrode and accumulated in the storage capacitor. The electric charge accumulated in the accumulation capacitor is read out for each pixel by the operation of the switching element, and transmitted to the image processing unit to perform various processes.

  In the FPD provided with such a conversion film such as a-Se, defective pixels may occur in the conversion film manufacturing process. The output of the defective pixel by the conversion film cannot be used for the image because the linearity with respect to the incident X-ray is not maintained. For this reason, a dark image in a non-irradiation state in which the conversion film is not irradiated with X-rays is acquired, and a pixel having a large difference from the peripheral pixel value is extracted as a defective pixel in the dark image. The extracted defective pixels are interpolated using pixel values of surrounding normal pixels (see, for example, Patent Document 1).

JP 2008-301883 A

  However, the dark image used in the conventional defective pixel extraction method includes a leakage current due to a switching element such as a TFT, and the leakage current of the switching element varies for each switching element. Therefore, the conventional method for extracting defective pixels is performed without distinguishing whether the pixel is a defective pixel due to the leakage current of the conversion film or the defective pixel due to the leakage current of the switching element. For this reason, the number of defective pixels to be extracted increases, and the image quality deteriorates. Thus, since the pixel which does not need to perform an interpolation process is extracted as a defective pixel by the leakage current of the switching element, it is desired to improve this.

  Note that the leakage current of the switching element does not depend on the incident X-ray dose. In general, the leakage current of the switching element is corrected by performing offset correction using a dark image on a normal image acquired for a subject or the like.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an image processing apparatus and a photographing apparatus that can extract only defective pixels due to a conversion film with high accuracy.

  As a result of intensive studies to solve the above problems, the inventors have obtained the following knowledge. That is, the loss of the conversion film appears as an increase in leakage current in the bias voltage ON image (dark image) acquired by applying the bias voltage to the conversion film, and the bias voltage OFF image acquired without applying the bias voltage to the conversion film. Does not appear. On the other hand, the variation in the leakage current of the TFT is confirmed even in the bias voltage OFF image, and almost no increase in the leakage current occurs in the bias voltage ON image.

  The present invention based on such knowledge has the following configuration. That is, an image processing apparatus according to the present invention is a conversion film included in a planar image detector, which includes a bias voltage ON image obtained by applying a bias voltage to the conversion film that converts electromagnetic waves into electric charges, and the conversion film. In addition, a defective pixel extraction processing unit that extracts a defective pixel based on a bias voltage OFF image acquired without applying a bias voltage is provided.

  The image processing apparatus according to the present invention uses the following properties. The leakage current due to the conversion film appears clearly in the bias voltage ON image, but does not appear in the bias voltage OFF image. On the other hand, the leakage current variation of the switching element hardly changes between the bias voltage ON image and the bias voltage OFF image. Utilizing this property, a conversion film included in the planar image detector, which is a bias voltage ON image (dark image) obtained by applying a bias voltage to the conversion film that converts electromagnetic waves into electric charge, and a conversion film A defective pixel is extracted based on a bias voltage OFF image acquired without applying a bias voltage. Thereby, it is possible to extract only a defective pixel due to the conversion film with high accuracy without extracting a pixel that does not need to be interpolated as a defective pixel.

  In the image processing apparatus according to the present invention, it is preferable that the missing pixel extraction processing unit obtains a difference between the bias voltage ON image and the bias voltage OFF image and extracts a missing pixel from the image after the difference. Since the image after the difference is an image in which the variation in the leakage current of the switching element is suppressed, only the defective pixel due to the conversion film can be extracted with high accuracy.

  In the image processing apparatus according to the present invention, it is preferable that a high-pass filter process is performed on the image after the difference, and a defective pixel is extracted from the image after the high-pass filter process. The bias voltage ON image includes non-uniformity of luminance due to the bias voltage and gain variation of the array amplifier circuit in addition to the leakage current variation of the switching element. The image after the high-pass filter processing with respect to the image after the difference is one in which the luminance unevenness and gain variation are further removed. Therefore, only defective pixels due to the conversion film can be extracted with higher accuracy.

  In the image processing apparatus according to the present invention, the bias voltage OFF image is acquired at a preset time, and the bias voltage ON image is repeatedly acquired after acquiring the bias voltage OFF image. It is preferable. A bias voltage OFF image is acquired at a preset time, and after acquiring the bias voltage OFF image, for example, only the bias voltage ON image is acquired for each calibration, and defective pixels are extracted. It is not necessary to acquire the bias voltage OFF image every time the bias voltage ON image is acquired, and the extraction time of the defective pixel can be shortened.

  In the image processing apparatus according to the present invention, an example of the bias voltage OFF image is an image acquired before shipment. After shipment, every time a bias voltage ON image is acquired, it is not necessary to acquire a bias voltage OFF image, and the extraction time of defective pixels can be shortened.

  An X-ray imaging apparatus according to the present invention includes the above-described image processing apparatus and the planar image detector that acquires a planar image, and the planar image detector is biased to the conversion film and the conversion film. And a bias voltage supply source for applying a voltage and stopping the application.

  The imaging apparatus according to the present invention includes the above-described image processing apparatus, and the image processing apparatus uses the following properties. The leakage current due to the conversion film appears clearly in the bias voltage ON image, but does not appear in the bias voltage OFF image. On the other hand, the leakage current variation of the switching element hardly changes between the bias voltage ON image and the bias voltage OFF image. Utilizing this property, a conversion film included in the planar image detector, which is a bias voltage ON image (dark image) obtained by applying a bias voltage to the conversion film that converts electromagnetic waves into electric charge, and a conversion film A defective pixel is extracted based on a bias voltage OFF image acquired without applying a bias voltage. Thereby, it is possible to extract only a defective pixel due to the conversion film with high accuracy without extracting a pixel that does not need to be interpolated as a defective pixel.

  The image processing apparatus and the photographing apparatus according to the present invention utilize the following properties. The leakage current due to the conversion film appears clearly in the bias voltage ON image, but does not appear in the bias voltage OFF image. On the other hand, the leakage current variation of the switching element hardly changes between the bias voltage ON image and the bias voltage OFF image. Utilizing this property, a conversion film included in the planar image detector, which is a bias voltage ON image (dark image) obtained by applying a bias voltage to the conversion film that converts electromagnetic waves into electric charge, and a conversion film A defective pixel is extracted based on a bias voltage OFF image acquired without applying a bias voltage. Thereby, it is possible to extract only a defective pixel due to the conversion film with high accuracy without extracting a pixel that does not need to be interpolated as a defective pixel.

1 is a diagram illustrating a schematic configuration of an X-ray imaging apparatus according to Embodiment 1. FIG. It is sectional drawing which shows the structure of 1 pixel of FPD. It is a top view which shows the structure of FPD. FIG. 3 is a diagram illustrating a configuration of an image processing unit according to the first embodiment. 6 is a flowchart of a defective pixel extraction process according to the first embodiment. (A) And (b) is a figure where it uses for description of the effect of this invention. FIG. 10 is a diagram illustrating a configuration of an image processing unit according to a second embodiment. 10 is a flowchart of missing pixel extraction processing according to the second embodiment. 10 is a flowchart of a defective pixel extraction process according to Embodiment 3.

  Embodiment 1 of the present invention will be described below with reference to the drawings. In this embodiment, an X-ray imaging apparatus will be described as an example of an imaging apparatus. FIG. 1 is a diagram illustrating a schematic configuration of the X-ray imaging apparatus according to the first embodiment.

  Please refer to FIG. The X-ray imaging apparatus 1 includes a top plate 2 on which the subject M is placed, an X-ray tube 3 that irradiates the subject M with X-rays, and an FPD 4 that detects X-rays transmitted through the subject M. It has. The FPD 4 corresponds to the planar image detector of the present invention.

  The X-ray imaging apparatus 1 also includes an X-ray tube control unit 6 having a high voltage generation unit 5 that generates a tube voltage and a tube current of the X-ray tube 3 and an image (X-ray detection signal) output from the FPD 4. In addition to performing various processing on the A / D converter 7 to be digitized and the digital image (X-ray detection signal) converted by the A / D converter 7, the defective pixel L is extracted, And an image processing unit 8 for performing interpolation. The processing in the image processing unit 8 is realized by software or hardware. The image processing unit 8 corresponds to the image processing apparatus of the present invention. Details of the image processing unit 8 will be described later.

  In addition, the X-ray imaging apparatus 1 includes a main control unit 9 that controls and controls each component, a storage unit 10 that stores images processed by the image processing unit 8, and an input unit in which an operator performs input settings. 11 and a display unit 12 for displaying an image processed by the image processing unit 8 and the like.

  The main control unit 9 is composed of a central processing unit (CPU) and the like. The storage unit 10 is configured by a storage medium including a removable medium such as a ROM (Read-only Memory), a RAM (Random-Access Memory), or a hard disk. The input unit 11 includes a joystick, a mouse, a touch panel, and the like. The display unit 12 includes a liquid crystal monitor or the like.

  FIG. 2 is a cross-sectional view showing a configuration of one pixel of the FPD 4. As shown in FIG. 2, the FPD 4 includes a semiconductor layer 16 that generates charges in response to incident X-rays, a common electrode 17 that is formed on one surface of the semiconductor layer 16 and applies a bias voltage, A pixel electrode 18 formed on the other surface of the semiconductor layer 16 and partitioned into a plurality of pixels in a two-dimensional matrix. The semiconductor layer 16 is made of, for example, a-Se. The pixel electrode 18, the semiconductor layer 16, and the common electrode 17 are formed in this order on the active matrix substrate 19 by vapor deposition or the like. The semiconductor layer 16 corresponds to the conversion film of the present invention.

  The active matrix substrate 19 includes a storage capacitor 21 for storing charges generated in the semiconductor layer 16, a TFT 22 as a switching element for reading out the charges stored in the storage capacitor 21, and an insulating substrate 23 such as glass. ing. A storage capacitor 21, a TFT 22, a gate line 24 and a data line 25 are formed on the insulating substrate 23.

  As shown by a broken line in FIG. 2, the X-ray detection element DU corresponding to one pixel includes a semiconductor layer 16, a common electrode 17, a pixel electrode 18, a storage capacitor 21, a TFT 22, and the like. FIG. 3 is a plan view showing the configuration of the FPD 4. As shown in FIG. 3, a plurality of X-ray detection elements DU are configured in a two-dimensional matrix. The X-ray detection element DU is shown in FIG. 3 with 3 × 3 pixels for convenience of illustration, but is configured with, for example, 1024 × 1024 pixels.

  The active matrix substrate 19 includes a gate line 24 connected to the gates of a plurality of TFTs 22 arranged in one column in the row direction (X direction) in FIG. 3, and one column in the column direction (Y direction) in FIG. A data line 25 connected to the sources of the plurality of TFTs 22 arranged side by side is provided. A storage capacitor 21 is connected to the drain of the TFT 22.

  In the FPD 4, a gate driver circuit 26 is connected to the gate line 24. The data line 25 is connected to an array amplifier circuit 27 that amplifies the charge and converts it into a voltage signal. The output of the array amplifier circuit 27 is connected to a multiplexer 28 that selects and outputs one voltage signal from a plurality of voltage signals. Is done. The array amplifier circuit 27 has an amplifier 27 a provided for each data line 25.

  That is, the gate driver circuit 26 sends a signal for sequentially turning on the TFTs 22 to the plurality of gate lines 24. Then, each of the plurality of TFTs 22 connected to the gate line 24 is turned on, and the charge accumulated in the storage capacitor 21 is read out to the data line 25 side through the TFT 22 and sent to the array amplifier circuit 27 through the data line 25. . Each amplifier 27a of the array amplifier circuit 27 amplifies the charge and converts it into a voltage signal. Then, one voltage signal is selected from the plurality of voltage signals amplified and converted by the array amplifier circuit 27 and output.

  Further, the FPD 4 includes a bias voltage supply source 31 that applies a bias voltage to the common electrode 17 and stops the application (sets the voltage to approximately 0 V). The bias voltage supply source 31 applies a bias voltage to the semiconductor layer 16 by applying a preset bias voltage to the common electrode 17. In FIG. 2 and FIG. 3, the symbol Vh indicates a bias voltage.

  The gate driver circuit 26, the array amplifier circuit 27, the multiplexer 28 and the bias voltage supply source 31 are controlled by the FPD control circuit 33. The FPD control circuit 33 is controlled by the main control unit 9.

  The FPD 4 acquires two types of images in order to extract the defective pixel L in the image processing unit 8. One is a bias voltage ON image (dark image) G1 acquired by applying a bias voltage to the semiconductor layer 16, and the other is a bias voltage OFF image acquired without applying a bias voltage to the semiconductor layer 16. G2. Both the image G1 and the image G2 are performed in a non-irradiation state in which the X-ray tube 3 does not irradiate, and other acquisition conditions (for example, acquisition time of one frame, etc.) differ only in whether or not a bias voltage is applied. ) Is the same.

<Image processing unit 8>
Please refer to FIG. First, an outline of the image processing unit 8 which is a characteristic part of the present invention will be described. The image processing unit 8 extracts the defective pixel L based on the two images of the bias voltage ON image G1 and the bias voltage OFF image G2. After extracting the defective pixel L, an image G0 corresponding to the subject M or the like corresponding to normal imaging is acquired. Then, after acquiring the image G0, the image processing unit 8 interpolates pixels corresponding to the missing pixel L in the image G0 targeting the subject M and the like based on the extracted missing pixel L.

  Next, a detailed configuration of the image processing unit 8 will be described. The image processing unit 8 targets a defective pixel extraction processing unit 41 that extracts a defective pixel L based on the bias voltage ON image G1 and the bias voltage OFF image G2, and a subject M or the like based on the extracted defective pixel L. An interpolation processing unit 43 that interpolates pixels corresponding to the missing pixel L in the image G0.

  The defective pixel extraction processing unit 41 includes a subtracting unit 45 that subtracts the bias voltage OFF image G2 from the bias voltage ON image G1, and an extracting unit 47 that extracts the defective pixel L from the image G3 indicating the subtraction result. Yes.

  There are the following properties between the bias voltage ON image G1 and the bias voltage OFF image G2. In the bias voltage ON image G1, leakage current due to the semiconductor layer 16 appears clearly, but in the bias voltage OFF image G2, leakage current due to the semiconductor layer 16 does not appear. On the other hand, in the bias voltage OFF image G2, the leakage current of the TFT 22 is confirmed, but in the bias voltage ON image G1, an increase in leakage current is hardly confirmed with respect to the bias voltage OFF image G2. That is, there is almost no change between the bias voltage ON image G1 and the bias voltage OFF image G2 except for the defective pixel L.

  By utilizing such a property, the subtracting unit 45 subtracts the leakage current due to the TFT 22 from the bias voltage ON image G1, and leaves only the leakage current due to the semiconductor layer 16. The subtraction unit 45 performs subtraction between the same pixels having the same coordinates in the bias voltage ON image G1 and the bias voltage OFF image G2.

  The extraction unit 47 extracts the defective pixel L from the image G3 indicating the subtraction result of the subtraction unit 45. In the extraction of the defective pixel L, a pixel having a large difference from the peripheral pixel value is detected. For example, at least one of an upper limit threshold and a lower limit threshold is set in advance, and when the threshold is exceeded, the pixel is determined to be a defective pixel L and extracted. As a method for extracting the defective pixel L, other known methods may be used. The defective pixel L is registered (stored) in a storage unit (not shown) in the form of a defective pixel map or the like.

  Based on the extracted missing pixel L, the interpolation processing unit 43 interpolates pixels corresponding to the missing pixel L in the image G0 acquired for the subject M or the like, which corresponds to normal imaging. The interpolation process is performed by, for example, obtaining a median (median) of eight pixels around the defective pixel L and replacing it with the defective pixel L. In addition, other known methods such as obtaining an average value of the surrounding eight pixels and replacing the defective pixel L may be used. And the interpolation process part 43 outputs the image G10 which carried out the interpolation process.

  The image G0 acquired for the subject M or the like is an image acquired in a state in which a bias voltage is applied to the semiconductor layer 16 and X-rays are irradiated from the X-ray tube 3. This image is an image of the subject M with the subject M interposed between the X-ray tube 3 and the FPD 4 and, in some cases, acquired without the subject M being interposed. Includes images.

  Further, the image G0, the images G1 to G3, the image G4 to be described later, and the defective pixel L are stored in a storage unit (not shown) and are read out and processed when necessary.

<Operation of X-ray imaging apparatus 1>
Next, the operation of the X-ray imaging apparatus 1 will be described with reference to the flowchart of FIG. Here, the process of extracting the defective pixel L which is a characteristic part of the present invention will be mainly described.

[Step S01] Bias voltage OFF
First, in the FPD 4, the bias voltage supply source 31 does not apply a bias voltage to the common electrode 17 and does not apply a bias voltage to the semiconductor layer 16. If the bias voltage is applied (ON state), the bias voltage supply source 31 turns off the applied bias voltage (OFF state).

[Step S02] Acquisition of Bias Voltage OFF Image G2 An image is acquired without applying a bias voltage to the semiconductor layer 16. This image is the bias voltage OFF image G2. Further, the bias voltage OFF image G2 is performed in a state where X-rays are not irradiated from the X-ray tube 3. Although no leakage current due to the semiconductor layer 16 appears in the bias voltage OFF image G2, leakage current due to the TFT 22 is confirmed. That is, only the leakage current due to the TFT 22 is stored in the storage capacitor 21 of FIG.

[Step S03] Bias voltage ON
After the acquisition of the bias voltage OFF image G2, the bias voltage is applied to the common electrode 17 by the bias voltage supply source 31 in the FPD 4 so that the bias voltage is applied to the semiconductor layer 16.

[Step S04] Acquisition of Bias Voltage ON Image An image is acquired with a bias voltage applied to the semiconductor layer 16. This image is the bias voltage ON image G1. The bias voltage ON image G1 is performed in a state where X-rays are not irradiated from the X-ray tube 3 in the same manner as the image G2. The bias voltage ON image G1 is a normal dark image. In the bias voltage ON image G1, leakage current due to the semiconductor layer 16 clearly appears, and an increase in leakage current due to the TFT 22 is hardly confirmed with respect to the image G2. That is, the storage capacitor 21 in FIG. 3 stores and reads out the leakage current due to the semiconductor layer and the leakage current due to the TFT 22.

[Step S05] Subtraction The bias voltage ON image G1 and the bias voltage OFF image G2 are sent to the subtraction unit 45 of the image processing unit 8. The subtracting unit 45 subtracts the bias voltage OFF image G2 from the bias voltage ON image G1. Thereby, in the image G3 showing the subtraction result, the leakage current due to the TFT 22 is suppressed, and the leakage current due to the semiconductor layer 16 is clearly shown.

[Step S10] Extraction of Missing Pixel The missing pixel L is extracted from the image G3 showing the subtraction result. For the missing pixel L, at least one of an upper limit threshold and a lower limit threshold is set in advance. For example, when a certain pixel exceeds the upper limit threshold, the pixel is determined as the missing pixel L. The defective pixel L is registered (stored) in, for example, a storage unit (not shown) as a defective pixel map.

  Thereafter, by normal imaging, for example, X-rays irradiated from the X-ray tube toward the subject M and transmitted through the subject M are detected by the FPD 4, and an image G0 targeting the subject M is obtained. Suppose you get it. Note that a bias voltage is applied to the semiconductor layer 16 when the image G0 is acquired. The image G0 is sent to the interpolation processing unit 43 of the image processing unit 8. Based on the extracted defective pixel L, the interpolation processing unit 43 interpolates pixels (pixels having the same coordinates) corresponding to the defective pixel L in the image G0 acquired for the subject M or the like. The interpolation process is performed, for example, by obtaining a median (median) of eight neighboring pixels for the pixel to be interpolated and replacing the obtained value with the pixel to be interpolated. The interpolation process is performed on all the defective pixels L registered as the defective pixel map.

  After interpolation processing for all the defective pixels L is performed, the interpolation processing unit 43 outputs the image G10 after the interpolation processing. The interpolated image G10 is stored in the storage unit 10 or displayed on the display unit 12.

  According to the present embodiment, the image processing unit 8 uses the following property. The leakage current due to the semiconductor layer 16 clearly appears in the bias voltage ON image G1, but does not appear in the bias voltage OFF image G2. On the other hand, the leakage current variation of the TFT 22 hardly changes between the bias voltage ON image G1 and the bias voltage OFF image G2. Utilizing this property, a bias voltage ON image (dark image) G1 obtained by applying a bias voltage to the semiconductor layer 16 of the FPD 4 and generating a charge in response to X-rays, The defective pixel L is extracted based on the bias voltage OFF image G2 acquired without applying a bias voltage to the semiconductor layer 16. Thereby, it is possible to extract only the defective pixel L due to the semiconductor layer 16 with high accuracy without extracting the pixel that does not need to be interpolated as the defective pixel L.

  Further, the defective pixel extraction processing unit 41 subtracts the bias voltage OFF image G2 from the bias voltage ON image G1, and extracts the defective pixel L from the image G3 indicating the subtraction result. Since the image G3 showing the subtraction result is an image in which the variation in leakage current of the TFT 22 is suppressed, only the defective pixel L due to the semiconductor layer 16 can be extracted with high accuracy.

  6A and 6B are diagrams for explaining the effect of the present invention. FIG. 6A shows a case where a bias voltage is applied to the semiconductor layer 16, and FIG. 6B shows a case where a bias voltage is not applied to the semiconductor layer 16. In FIGS. 6A and 6B, the vertical axis indicates the pixel value, and the horizontal axis indicates the X-ray intensity.

  In FIG. 6A and FIG. 6B, two pixels P and Q are compared. Both the pixel P and the pixel Q are offset in the non-irradiation state of X-rays. FIG. 6A shows a case where a bias voltage is applied to the semiconductor layer 16. In FIG. 6A, the pixel P maintains linearity (straight line s) with respect to incident X-rays, while the pixel Q has linearity with respect to incident X-rays like the curve t and the curve u. Is not kept. The pixel Q is a pixel that has a leakage current due to the semiconductor layer 16 and is extracted as a defective pixel L. In FIG. 6A, the method of extracting the defective pixel L is a conventional method. In this case, the pixel P is also extracted as the defective pixel L.

  FIG. 6B shows a case where no bias voltage is applied to the semiconductor layer 16. In FIG. 6B, the pixel values of the pixel P and the pixel Q do not change with respect to the incident X-ray. Comparing FIG. 6B and FIG. 6A, the pixel value of the pixel P hardly changes, but the pixel value of the pixel Q decreases. That is, the pixel Q tends to increase when the bias voltage is applied.

  Therefore, the defective pixel extraction processing unit 41 subtracts the bias voltage OFF image G2 from the bias voltage ON image G1 and extracts the defective pixel L from the image G3 indicating the subtraction result, so that only the defective pixel L due to the semiconductor layer 16 is extracted. Extract with high accuracy.

  Next, Embodiment 2 of the present invention will be described with reference to the drawings. In addition, the description which overlaps with Example 1 is abbreviate | omitted. In this embodiment, the image processing unit 8 shown in FIG. 7 includes a high-pass filter unit 49 between the subtraction unit 45 and the extraction unit 47 in addition to the configuration of the first embodiment.

  In the image G3 showing the subtraction result of the subtraction unit 45, luminance unevenness due to generation of a minute leakage current in the semiconductor layer 16 due to application of a bias voltage, and the amplifier 27a of each of the plurality of array amplifier circuits 27 (see FIG. 3) There is a gain variation which is a variation. Therefore, the high-pass filter unit 49 removes the undulation component of luminance unevenness and gain variation from the image G3, and allows the leakage current component from the semiconductor layer 16 to pass through.

  That is, the high-pass filter unit 49 performs a high-pass filter process on the image G3 indicating the subtraction result of the subtracting unit 45, and acquires an image G4 after the high-pass filter process. The image G4 after the high-pass filter processing is obtained by, for example, Fourier transforming the image G3 into the frequency domain, performing processing by the frequency filter in the frequency domain, and then performing inverse Fourier transform, and then obtaining the image G3. Is obtained by performing processing with a spatial filter of n × n pixels.

  FIG. 8 is a flowchart of the defective pixel extraction process according to the second embodiment. FIG. 8 is obtained by adding the high-pass filter process of step S06 between step S05 and step S10 in the flowchart of FIG. In step S06, the high-pass filter unit 49 shown in FIG. 7 performs high-pass filter processing on the image G3 indicating the subtraction result in the subtraction unit 45. By the high-pass filter processing, the undulation component of luminance unevenness and gain variation is removed from the image G3, the leakage current component due to the semiconductor layer 16 is passed, and the image G4 after the high-pass filter processing is acquired. In step 10, the defective pixel L is extracted from the image G4 after the high-pass filter process.

  According to the present embodiment, the image processing unit 8 performs a high-pass filter process on the image G3 indicating the subtraction result, and extracts a defective pixel L from the image G4 after the high-pass filter process. The bias voltage ON image G <b> 1 includes luminance unevenness due to the bias voltage and gain variation of the array amplifier circuit 27 in addition to the leakage current variation of the TFT 22. The image G4 after the high-pass filter processing on the image G3 indicating the subtraction result is obtained by further removing such luminance unevenness and gain variation. Therefore, only the defective pixel L due to the semiconductor layer 16 can be extracted with higher accuracy.

  Next, Embodiment 3 of the present invention will be described with reference to the drawings. In addition, the description which overlaps with Example 1 and 2 is abbreviate | omitted. The configuration of the present embodiment is the same as that of the first embodiment and the second embodiment, but the configuration of the first embodiment (see FIG. 4) will be described. FIG. 9 is a flowchart of the defective pixel extraction process according to the third embodiment.

  In this embodiment, as shown in FIG. 9, once the bias voltage OFF image G2 is acquired, the latest bias voltage ON image G1 repeatedly acquired after the acquisition of the bias voltage OFF image G2 and the bias voltage OFF image G2. The defective pixels are extracted from the above. That is, the defective pixel extraction processing unit 41 extracts the defective pixel L based on the bias voltage OFF image G2 and the bias voltage ON image G1 acquired in advance.

  The bias voltage OFF image G2 is acquired at a preset time. For example, the bias voltage OFF image G2 is an image acquired before shipment. The term “before shipment” refers to the period before shipment from the factory where assembly or adjustment is performed. On the other hand, the bias voltage ON image G1 is repeatedly acquired after acquiring the bias voltage OFF image G2. The bias voltage ON image G1 is acquired at the time of calibration (calibration), for example. Since defective pixels L due to the semiconductor layer 16 increase with time, it is desirable to calibrate periodically.

  The operation of the X-ray imaging apparatus 1 of this embodiment will be described. Please refer to FIG. A bias voltage OFF image G2 is acquired without applying a bias voltage to the semiconductor layer 16 (steps S01 and S02). The bias voltage OFF image G2 is stored in a storage unit (not shown). The bias voltage OFF image G2 is an image acquired before shipment.

  After obtaining the bias voltage OFF image G2, for example, when calibrating at the shipping destination, the bias voltage is applied to the semiconductor layer 16 to obtain the bias voltage ON image G1 (steps S03 and S04). Then, the subtraction unit 45 subtracts the bias voltage OFF image G2 from the bias voltage ON image G1 (step S05). The extraction unit 47 extracts the missing pixel L from the image G3 indicating the subtraction result (step S10). In step S11, when the defective pixel L is extracted again, for example, when calibration is performed again (Yes), the process returns to step 03.

  According to the present embodiment, the bias voltage OFF image G2 is acquired at a preset time, and the bias voltage ON image G1 is repeatedly acquired after acquiring the bias voltage OFF image G2. The bias voltage OFF image G2 is acquired at a preset time, and after acquiring the bias voltage OFF image G2, for example, only the bias voltage ON image G1 is acquired for each calibration, and the defective pixel L is extracted. It is not necessary to acquire the bias voltage OFF image G2 every time the bias voltage ON image G1 is acquired, and the extraction time of the defective pixel L can be shortened.

  Further, when the bias voltage OFF image G2 is an image acquired before shipping, it is not necessary to acquire the bias voltage OFF image G2 every time the bias voltage ON image G1 is acquired after shipping. Extraction time can be shortened.

  In this embodiment, the missing pixel L is extracted from the image G3 indicating the subtraction result. However, as in the second embodiment, the missing pixel L may be extracted from the image G4 after the high-pass filter processing. . In this embodiment, the bias voltage OFF image G2 is acquired before shipment, but the present invention is not limited to this. That is, it may be after shipment. Further, for example, the bias voltage OFF image G2 may be acquired every predetermined period set in advance.

  The present invention is not limited to the above embodiment, and can be modified as follows.

  (1) In each of the above-described embodiments, the bias voltage OFF image G2 is subtracted from the bias voltage ON image G1, and the image G3 indicating the subtraction result is acquired. In this regard, the bias voltage ON image G1 may be subtracted from the bias voltage OFF image G2 to obtain an image G3 indicating the subtraction result. That is, the difference between the bias voltage ON image G1 and the bias voltage OFF image G2 may be obtained, and the image G3 after the difference may be acquired. The image G3 after the difference may be an absolute value. Note that the image G3 showing the subtraction result corresponds to the image after the difference of the present invention.

  (2) In Embodiments 1 and 2 and Modification (1) described above, the bias voltage ON image G1 is acquired after the bias voltage OFF image G2 is acquired. Thereby, since the bias voltage is applied during normal photographing, normal photographing can be performed smoothly after the bias voltage ON image is acquired and the defective pixel L is extracted. On the other hand, after acquiring the bias voltage ON image G1, the bias voltage OFF image G2 may be acquired.

  (2) In each example and modification (1) described above, the semiconductor layer 16 uses a-Se, but may be CdTe (cadmium telluride), CdZnTe (cadmium zinc telluride), or the like. .

  (3) In each embodiment and each modification described above, the image processing unit 8 extracts the missing pixel L from the image G3 indicating the subtraction result. In the second embodiment, the extraction unit 47 extracts the defective pixel L from the image G4 after the high-pass filter process for the image G3. In this regard, the image processing unit 8 may extract the defective pixel L based on the bias voltage ON image G1 and the bias voltage OFF image G2. For example, as in the conventional case, the defective pixel L is extracted from the bias voltage ON image (dark image) G1, and the pixel value of the extracted defective pixel L and the pixel having the same coordinate as the defective pixel L in the bias voltage OFF image G2 are extracted. Compare the pixel value. At this time, it is determined whether or not the leakage current component is due to the semiconductor layer 16, and if it is determined that the leakage current is not due to the semiconductor layer 16, the extracted defective pixel L may be canceled.

  (4) In each of the above-described embodiments and modifications, the A / D converter 7 and the image processing unit 8 are provided outside the FPD 4, but may be provided inside the FPD 4. In this case, the FPD 4 may include only the A / D converter 7 or may include the A / D converter 7 and the image processing unit 8.

  (5) In each embodiment and each modification described above, at least one of the bias voltage ON image G1 and the bias voltage OFF image G2 may be an image obtained by obtaining a plurality of frames and calculating an average.

1 ... X-ray imaging equipment 4 ... FPD
8 ... Image processing unit 9 ... Main control unit 16 ... Semiconductor layer 22 ... TFT
27 ... Array amplifier circuit 27a ... Amplifier 31 ... Bias supply power source 41 ... Missing pixel extraction processing unit 45 ... Subtraction unit 47 ... Extraction unit 49 ... High pass filter unit G1 ... Bias voltage ON image G2 ... Bias voltage OFF image G3 ... Subtraction result Image to be displayed G4 ... Image after high-pass filter processing L ... Missing pixel

Claims (6)

  A bias film ON image obtained by applying a bias voltage to the conversion film for converting electromagnetic waves into electric charge, and a bias obtained without applying a bias voltage to the conversion film, which is a conversion film included in the planar image detector An image processing apparatus comprising a defective pixel extraction processing unit that extracts a defective pixel based on a voltage OFF image. The image processing apparatus according to claim 1.
The image processing apparatus, wherein the defective pixel extraction processing unit obtains a difference between the bias voltage ON image and the bias voltage OFF image, and extracts a defective pixel from the image after the difference. The image processing apparatus according to claim 2,
The image processing apparatus, wherein the defective pixel extraction processing unit performs high-pass filter processing on the image after the difference, and extracts defective pixels from the image after high-pass filter processing. The image processing apparatus according to any one of claims 1 to 3,
The bias voltage OFF image is obtained at a preset time,
The image processing apparatus according to claim 1, wherein the bias voltage ON image is repeatedly acquired after the bias voltage OFF image is acquired. The image processing apparatus according to claim 4.
The image processing apparatus according to claim 1, wherein the bias voltage OFF image is an image acquired before shipment. An image processing apparatus according to any one of claims 1 to 5,
The planar image detector for obtaining a planar image,
The planar image detector includes the conversion film and a bias voltage supply source that applies a bias voltage to the conversion film and stops the application.

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