JP6058713B2 - Time synchronization method and time synchronization apparatus - Google Patents

Description

  The present invention relates to a technique for realizing time synchronization between devices connected via a packet network.

  A technique for performing time synchronization by transmitting and receiving time synchronization packets (PTP (Precision Time Protocol) packets) between devices connected via a packet network has been standardized (see Non-Patent Document 1). However, since a time error occurs due to delay fluctuations that occur in the packet network, it is difficult to obtain a highly accurate time accuracy on the order of μs, for example. Therefore, in order to achieve highly accurate time synchronization, delay distribution measurement test packets (reference packets (hereinafter referred to as Ref packets)) are sent and received, and delay fluctuations in PTP packets (Sync packets, DelayReq packets, etc.) A technique for correcting the above has been studied (see Patent Document 1). For example, the slave device uses the first Ref packet received from the master device as the reference timing, measures the difference between the reception timing of the subsequent Ref packet and the reference timing for each reception period, and delays it. Measure the distribution. Here, since the Master device and the Slave device operate with the same frequency-synchronized clock, the Slave device can accurately count the transmission cycle and can accurately measure the delay distribution. Then, the Slave device corrects the delay fluctuation of the PTP packet based on the minimum value of the delay distribution of the Ref packet.

  On the other hand, in wavelength multiplexing systems, etc., the asymmetry (link asymmetry) in which the delay time of the downstream PTP packet from the master device to the slave device and the delay time of the upstream PTP packet from the slave device to the master device are different. There is a problem, and a technique for correcting a link asymmetric delay time difference has been considered (see Non-Patent Document 2).

IEEE1588-2008 IEICE General Conference (2013), B-8-69, Study on time synchronization method considering delay time asymmetry, Suda et al.

Japanese Patent No. 5518805

  However, when there is a link asymmetric delay time difference, a time error occurs even if the delay fluctuation correction process is performed, and thus there is a problem that the user of the time synchronization service cannot satisfy the required accuracy of the time error.

  In addition, the use of GPS (Global Positioning System) and the method of connecting the Master device and the Slave device by direct connection of the core wire, etc., for time paths that can be synchronized with high accuracy, these high accuracy time paths are redundant. When constructing a time path through a packet network as a system, a time error occurs between redundant systems of a highly accurate time path and a time path of the packet network. When the Slave device performs switching between redundant systems, there is a problem that time jump occurs at the time of switching.

  It is an object of the present invention to provide a time synchronization method and a time synchronization apparatus capable of performing highly accurate time synchronization by performing delay fluctuation correction and link asymmetry correction.

The first invention synchronizes the time of the slave device with the time of the master device by transmitting and receiving a time synchronization packet including time information between the plurality of master devices having the reference time and the slave device having the plurality of time synchronization units. In the time synchronization method, the first time synchronization unit of the slave device uses the first time path that has no delay fluctuation and has no link asymmetric delay time difference between the uplink delay time and the downlink delay time. The second time synchronization unit of the slave device obtains a first offset by transmitting and receiving a time synchronization packet including time information to and from the first master device, and the second time synchronization unit of the slave device utilizing the second time pass there, each time in the uplink direction and the downlink direction to transmit and receive time synchronization packet including the time information with the second master device Measuring the delay fluctuation amount in the period packet, obtains a second time offset between the second master device based on the time obtained by correcting the delay fluctuation amount of the uplink and downlink direction, the second offset The time of the second time synchronization unit is synchronized with the time of the second master device based on the time error obtained by subtracting the offset of 1 to remove the link asymmetric delay time difference.

  The second invention is characterized in that when the delay fluctuation amount is measured as a shift of the reception time of the time synchronization packet with respect to the measurement reference, the delay fluctuation amount is measured by including a link asymmetric delay time difference in the measurement reference.

  In the third invention, the slave device measures the accuracy of time synchronization with the master device, monitors whether the accuracy of time synchronization is equal to or higher than a preset threshold value, and performs maintenance if the accuracy is higher than the threshold value. It is characterized in that a failure location is estimated by discriminating characteristics that change the accuracy of notification to the terminal or time synchronization.

According to a fourth aspect of the present invention, there is provided a time synchronization device that transmits and receives a time synchronization packet including time information to and synchronizes with a plurality of master devices having a reference time to synchronize with the time of the master device. The first offset is obtained by transmitting / receiving a time synchronization packet including time information to / from the first master device using a first time path that has no link asymmetric delay time difference between the link time and the downlink delay time. Using the second time path having the first time synchronizer and the delay fluctuation and the link asymmetric delay time difference, the time synchronization packet including the time information is transmitted / received to / from the second master device. the delay fluctuation amount of the respective time synchronization packet uplink and downlink time path is measured, based on the time obtained by correcting the delay fluctuation amount of the uplink and downlink A second time synchronizer for obtaining an offset of 2 and a second time synchronizer based on a time error obtained by subtracting the first offset from the second offset to remove a link asymmetric delay time difference. And a link asymmetry correction unit synchronized with the time of the master device.

  In the fifth invention, when the second time synchronization unit measures the delay fluctuation amount as a deviation of the reception time of the time synchronization packet with respect to the measurement reference, the delay time difference is measured by including the link asymmetric delay time difference in the measurement reference. It is characterized by doing.

  The sixth invention measures the accuracy of time synchronization with the master device, monitors whether the accuracy of time synchronization is equal to or higher than a preset threshold value, and notifies the maintenance terminal when the accuracy is higher than the threshold value. Or it has further the monitoring part which discriminate | determines the characteristic from which the precision of time synchronization changes, and estimates a failure location.

  The time synchronization method and time synchronization apparatus according to the present invention can perform highly accurate time synchronization by performing delay fluctuation correction and link asymmetry correction.

It is a figure which shows an example of a network structure. It is a figure which shows an example of a packet sequence. It is a figure which shows an example of the transmission / reception space | interval of a packet. It is a figure which shows an example of the functional block of a Master apparatus. It is a figure which shows an example of the functional block of the Slave apparatus of 1st Embodiment. It is a figure which shows an example of the functional block of the Slave apparatus of 2nd Embodiment. It is a figure which shows an example of the functional block of the Slave apparatus of 3rd Embodiment. It is a figure which shows an example of the waveform of TIE at the time of failure. It is a flowchart which shows the example of a process of failure recovery.

  Hereinafter, embodiments of a time synchronization method and a time synchronization apparatus according to the present invention will be described with reference to the drawings. First, a configuration and operation common to each embodiment will be described.

  FIG. 1 shows an example of a network configuration. In FIG. 1, two master devices 101, a master device 101 (0) and a master device 101 (1), and a slave device 102 are connected. The slave device 102 has two blocks, a slave unit 112 (0) and a slave unit 112 (1), and each has a function of the slave device. The master device 101 (0) and the slave unit 112 (0) are connected via the transmission path 104, and the master device 101 (1) and the slave unit 112 (1) are connected via the packet network 103. .

  In each embodiment described below, correction processing is performed by measuring the amount of delay fluctuation of a PTP packet when time synchronization is achieved by transmitting and receiving PTP packets via the packet network 103, and correction of a link asymmetric delay time difference is performed. Processing can be performed to achieve time synchronization between apparatuses. Note that the time synchronization method described in each embodiment can be applied to the portions surrounded by the dotted line (Master device 101 (1) and Slave unit 112 (1) of the Slave device 102) shown in FIG. Here, in the packet network 103, packet delay fluctuation and link asymmetric delay occur in a network device (switch or the like). Since there is no delay fluctuation and there is no delay time difference due to link asymmetry between the Master apparatus 101 (0) and the Slave unit 112 (0) connected by the transmission path 104 not using the packet network 103, the packet Time synchronization can be achieved with higher accuracy than when transmitting and receiving PTP packets via the network 103.

  In this way, the Slave device 102 has redundant time paths that connect to the two systems of master devices. In the following embodiments, it is assumed that a time offset obtained by a time path that has no delay fluctuation and no delay time difference due to link asymmetry is used.

  In FIG. 1, the Master device 101 (0), the Master device 101 (1), the Slave unit 112 (0), and the Slave unit 112 (1) of the Slave device 102 are timed by the PTP packet described in the IEEE 1588-2008 standard. Has the function of synchronization. The slave unit 112 (0) of the slave device 102 (0) operates based on the time acquired from the master device 101 (0) or the time generated in a self-running state without being synchronized with the external device. The Master device 101 (0) operates based on the time synchronized with the Global Navigation Satellite System (GNSS). Alternatively, the Master device 101 (0) may have a packet-based time synchronization function, similar to the Master device 101 (1). In the following embodiments, the time information acquisition form of the Master device 101 (0) and the Master device 101 (1) may be any method.

  FIG. 2 shows an example of a packet sequence transmitted / received between the Master device 101 (1) and the Slave unit 112 (1) of the Slave device 102.

Here, parameters described below are defined as follows. It is assumed that a relay device is included in the relay transmission path between the Master device 101 and the Slave device 102.
tm: Master device time
ts: Slave device time
Tms, Tsm: Transmission line delay in the relay transmission line (fixed value)
Pms, Psm: Processing delay of relay device (fixed value)
ΔJms, ΔJsm: Delay fluctuation amount due to packet collision in relay device (variable value)
Dms, Dsm: Delay amount
A: Difference between uplink delay time and downlink delay time (link asymmetric delay time difference)
Note that m at the end of the parameter means the master device 101, s means the slave device 102, and Tms, Pms, ΔJms, and Dms parameters are parameters in the downward direction from the master device 101 to the slave device 102. Show. Conversely, the Tsm, Psm, ΔJsm, and Dsm parameters indicate parameters in the upstream direction from the Slave device 102 to the Master device 101. Similarly, tm represents the time on the Master device 101 side, and ts represents the time on the Slave device 102 side. For each parameter described below, a symbol is added according to the same rule.

  In FIG. 2, when the times of the Master device 101 (1) and the Slave unit 112 (1) are synchronized, the time tm1 of the Master device 101 (1) corresponds to the time ts1 of the Slave unit 112 (1). . Then, for example, a packet (Sync packet 151 or Ref packet 161) transmitted by the master device 101 (1) at time tm1 is received by the slave unit 112 (1) at time ts1. Here, the path from the Master apparatus 101 to the Slave apparatus 102 includes a transmission path delay Tms, a processing delay Pms of the relay apparatus, and a delay fluctuation amount ΔJms, and the total time of these is the time difference between ts2 and ts1. Equivalent to.

  Similarly, when the times of the Master device 101 (1) and the Slave unit 112 (1) are synchronized, the time ts3 of the Slave unit 112 (1) corresponds to the time tm3 of the Master device 101 (1). Then, for example, a packet (DelayReq packet 152 or Ref packet 161) transmitted by the slave unit 112 (1) at time ts3 is received by the master device 101 (1) at time tm4. Here, the path from the slave unit 112 (1) to the master apparatus 101 (1) includes a transmission path delay Tsm, a processing delay Psm of the relay apparatus, and a delay fluctuation amount ΔJsm, and the total time thereof is tm4. Is equivalent to the time difference between and tm3.

  As described above, each packet such as the PTP packet such as the Sync packet 151, DelayReq packet 152, and DelayResp packet 153, and the Ref packet 161 transmitted / received between the Master apparatus 101 (1) and the Slave unit 112 (1) is delayed. Influenced by fluctuations.

  Here, the delay fluctuation amount ΔJms can be obtained, for example, by measuring the delay distribution of the Ref packet 161 transmitted from the Master device 101 (1) toward the Slave unit 112 (1) of the Slave device 102. The delay fluctuation amount is measured by a conventional method described in Patent Document 1 or the like. For example, in FIG. 2, the Master apparatus 101 transmits the Sync packet 151 and the Ref packet 161 at a constant transmission interval together with the Sync packet 151 and the Ref packet 161. At this time, by giving the Ref packet 161 with an identification value that can determine the value of the transmission interval, the receiving-side slave device 102 can grasp the transmission interval. Similarly, in FIG. 2, the slave unit 112 (1) of the slave device 102 transmits the DelayReq packet 152 and the Ref packet 161 together at a constant transmission interval, and the receiving-side master device 101 includes the DelayReq packet 152. The delay distribution of the Ref packet 161 is measured. The parameters shown in FIG. 2 will be described in detail later.

  FIG. 3 shows an example of a transmission / reception interval of each packet transmitted / received between the Master device 101 (1) and the Slave unit 112 (1) of the Slave device 102 with the horizontal axis as a time axis. 3A shows an example of a transmission / reception interval of each packet from the Master device 101 (1) to the Slave device 102 in the transmission direction, and FIG. 3B shows an example in which the transmission direction is from the Slave device 102 to the Master device 101. An example of the transmission / reception interval of each packet is shown. In FIG. 3A, the Master device 101 (1) transmits the Ref packet 161 and the Sync packet 151 at a constant interval Tr, but the interval at which the Slave unit 112 (1) receives is constant because of delay fluctuation. It will not be. Therefore, as shown in FIG. 3A, the delay distribution (probability density distribution) is measured by measuring the difference ΔJms between the reception timing tr1 of the Sync packet 151 and the Ref packet 161 and the reference timing trs1 for each reception period. Then, the Slave unit 112 (1) corrects the delay fluctuation of the PTP packet based on the minimum value of the delay distribution of the Ref packet including the Sync packet 151.

  Similarly, in FIG. 3B, the slave unit 112 (1) of the slave device 102 transmits the Ref packet 161 and the DelayReq packet 152 at a constant interval Tr, but the interval at which the master device 101 (1) receives is as follows. Because of delay fluctuation, it is not constant. Therefore, as in FIG. 3A, the delay distribution is measured by measuring the difference ΔJsm between the reception timing tr1 of the DelayReq packet 152 and the Ref packet 161 and the reference timing trs1 for each reception period. Then, the Master apparatus 101 (1) corrects the delay fluctuation of the PTP packet based on the minimum value of the delay distribution of the Ref packet including the DelayReq packet 152.

  Here, in the above description, the transmission interval of the Ref packet 161 including the Sync packet 151 is made constant, but the Master device 101 (1) transmits only the Ref packet 161 at a constant interval, and the Slave unit 112 (1) may measure the delay distribution of the Ref packet 161. Alternatively, although the measurement takes time, the slave unit 112 (1) may measure the delay distribution of the Sync packet 151 transmitted from the master device 101 (1) at regular intervals without using the Ref packet 161. Similarly, in the above description, the transmission interval of the Ref packet 161 including the DelayReq packet 152 is made constant. However, the Slave unit 112 (1) transmits only the Ref packet 161 at a constant interval, and the master device 101 (1) may measure the delay distribution of the Ref packet 161. Alternatively, although the measurement takes time, the Master apparatus 101 (1) may measure the delay distribution by transmitting the DelayReq packet 152 from the slave unit 112 (1) at regular intervals without using the Ref packet 161.

  If the transmission interval is constant and there is no delay fluctuation, and if there is only a fixed delay, the reception period is constant, but if there is delay fluctuation, the reception period is not constant, so the reception interval is the same as the transmission interval. The difference between the timing and the actual reception timing can be measured as a delay distribution. Based on the minimum value of the delay distribution, a PTP packet delay fluctuation measurement standard is set. Note that the PTP packet delay fluctuation metric is fixed after setting. Then, based on the delay fluctuation measurement standard of the PTP packet, the master apparatus 101 and the slave apparatus 102 can calculate the delay fluctuation amount ΔJ of the PTP packet.

Here, the delay time D until each packet reaches the opposite device has a relationship of (Equation 1).
Delay time D = transmission path delay T + device processing delay P + delay fluctuation ΔJ (Equation 1)
In (Expression 1), the delay time D has a different value in the direction from the Master device 101 to the Slave device 102 and in the direction from the Slave device 102 to the Master device 101.

Here, the delay amounts Dms and Dsm of packets transmitted and received between the Master device 101 and the Slave device 102 have the relationship of (Equation 2) and (Equation 3).
Dms = Tms + Pms + ΔJms (Equation 2)
Dsm = Tsm + Psm + ΔJsm (Formula 3)
The delay amounts Dms ′ and Dsm ′ after correcting the delay fluctuation amount are expressed by (Equation 4) and (Equation 5), and the delay time difference A between the upstream delay time and the downstream delay time is ( It is expressed by equation 6).
Dms' = Tms + Pms (Formula 4)
Dsm '= Tsm + Psm (Formula 5)
A = Dms'- Dsm '
= (Tms + Pms)-(Tsm + Psm) (Formula 6)
Next, a method for calculating a time lag (offset: offset) with respect to the master device 101 on the slave device 102 side and correcting a link asymmetric delay time difference will be described. Note that offset is expressed by (Expression 7).
offset = ts-tm (Formula 7)
Here, in the 0-system time path of FIG. 1, when the time difference of the clock of the slave unit 112 (0) of the slave device 102 with respect to the clock of the master device 101 (0) is offset (0), (Equation 8) And (Equation 9), and offset (0) is derived from (Equation 10).
ts2 (0)-tm1 (0) = Tms (0) + offset (0) ... (Formula 8)
tm4 (0)-ts3 (0) = Tsm (0)-offset (0) ... (Formula 9)
offset (0) = [(ts2 (0)-tm1 (0))-(tm4 (0)-ts3 (0))-(Tms (0)-Tsm (0))] / 2 ... (Equation 10)
On the other hand, when the time difference of the clock of the slave unit 112 (1) of the slave device 102 with respect to the clock of the master device 101 (1) in the 1-system time path of FIG. (Equation 12) has the relationship, and offset (1) is derived from (Equation 13).
ts2 (1)-tm1 (1) = Dms' (1) + ΔJms (1) + offset (1) (Equation 11)
tm4 (1)-ts3 (1) = Dsm '(1) + ΔJsm (1)-offset (1) ... (Formula 12)
offset (1) = [(ts2 (1)-ΔJms (1)-tm1 (1))-(tm4 (1)-ΔJsm (1)-ts3 (1))-(A (1))] / 2… (Formula 13)
Here, since the link asymmetric delay time difference A is an unknown amount, a time error A (1) / 2 occurs in the time path of the 1 system of the Slave unit 112 (1). At this time, the time error ΔT caused by the link asymmetric delay time difference A can be calculated by (Equation 14) as a difference between the 0-system time path and the 1-system time path.
ΔT = ts (1)-ts (0)
= tm (1)-tm (0) + offset (1)-offset (0) ... (Formula 14)
Then, as shown in (Equation 15), by adding the time error ΔT to the time (ts (1)) of the 1-system time path, the time (ts (1) ′) from which the delay time difference due to link asymmetry is removed. Can be requested.
ts (1) ′ = ts (1) −ΔT (Equation 15)
As described above, the time of the 1-system time path having the delay fluctuation amount and the link asymmetric delay time difference is synchronized with the time error of the 0-system time path having no delay fluctuation amount and the link asymmetric delay time difference. Can do. As a result, the time error between the 0-system time path and the 1-system time path can be eliminated, and even when switching to the 1-system time path as a redundant system of the 0-system time path, the time jump at the time of switching Etc. can be prevented. Further, once the time of the 1-system time path of the Slave unit 112 (1) is matched with the 1-system Master apparatus 101 (1), the subsequent fixed time error can be eliminated. Since the variable time error can be corrected at any time, even when the time path of the 0-system is abolished after correcting the link asymmetric delay time difference, the Slave device 102 is highly accurate with the time path of the 1-system alone. The time can be maintained.

  FIG. 4 shows an example of functional blocks of the Master device 101 (1) connected to the Slave device 102 described in the following embodiments. In FIG. 4, the master device 101 (1) includes a master clock 105, a PTP processing unit 106, a delay fluctuation correction unit 107, and a transmission / reception unit 108.

  The master clock 105 holds time information to which the slave device 102 connected to the transmission / reception unit 108 should depend.

  The PTP processing unit 106 performs various packet generation, sequence processing, offset calculation processing, and the like in accordance with the IEEE 1588-2008 standard. For example, the PTP processing unit 106 transmits PTP packets (Sync packet 151, DelayReq packet 152, DelayResp packet 153, etc.) to and from the slave unit 112 (1) of the slave device 102 via the delay fluctuation correcting unit 107 and the transmitting / receiving unit 108. By transmitting and receiving, the slave unit 112 (1) provides time information and the like for synchronizing with the time of the master clock 105.

  The delay fluctuation correction unit 107 generates and terminates the Ref packet 161 described with reference to FIG. 2, measures the delay distribution of the Ref packet 161 received from the Slave unit 112 (1) at a predetermined time interval, The delay fluctuation amount of the DelayReq packet 152 is calculated. Then, the delay fluctuation correction unit 107 corrects the reception time tm4 of the DelayReq packet 152 from the calculated delay fluctuation amount. The delay fluctuation correcting unit 107 notifies the corrected reception time tm4 to the PTP processing unit 106.

  The transmission / reception unit 108 performs transmission / reception of data packets such as PTP packets and Ref packets 161 and transmission / reception of clock signals.

  In this way, the master device 101 (1) transmits and receives PTP packets to and from the slave unit 112 (1) of the slave device 102, so that the slave unit 112 (1) can synchronize with the time of the master clock 105. In addition to providing time information, the delay fluctuation amount of the DelayReq packet 152 is calculated, and the reception time of the DelayReq packet 152 is corrected.

Here, the Master device 101 (0) shown in FIG. 1 performs time synchronization by transmitting and receiving PTP packets to and from the Slave unit 112 (0) of the Slave device 102 via the transmission path 104 without delay fluctuation. In the block of the Master device 101 (1) shown in FIG. 4, the delay fluctuation correction unit 107 is not processed. Therefore, illustration of the functional blocks of the Master device 101 (0) is omitted.
(First embodiment)
FIG. 5 shows an example of functional blocks of the Slave device 102 according to the first embodiment. The slave device 102 includes a slave unit 112 (0), a slave unit 112 (1), a link asymmetric correction value calculation unit 113, and a slave clock 114.

  The slave unit 112 (0) includes a transmission / reception unit 121 (0), a PTP processing unit 122 (0), and a slave clock 123 (0). The slave unit 112 (0) is connected to the master device 101 (0) by the transmission / reception unit 121 (0) through a 0-system time path that has no delay fluctuation amount or link asymmetric delay time difference. The PTP processing unit 122 (0) performs various packet generation, sequence processing, offset calculation processing, and the like in accordance with the IEEE 1588-2008 standard. For example, the PTP processing unit 122 (0) transmits / receives a PTP packet to / from the master device 101 (0) via the transmission / reception unit 121 (0), and sets the time of the slave clock 123 (0) to the master device 101 (0). ) Synchronize with the time of the Master clock. The slave clock 123 (0) corrects the time based on the time offset input from the PTP processing unit 122 (0) and synchronizes with the time of the master device 101 (0).

  The slave unit 112 (1) includes a transmission / reception unit 121 (1), a PTP processing unit 122 (1), a slave clock 123 (1), and a delay fluctuation correction unit 124. The slave unit 112 (1) is connected to the master device 101 (1) shown in FIG. 1 and FIG. 4 by a transmission / reception unit 121 (1) through a one-time time path having a delay fluctuation amount and a delay time difference that is asymmetric to the link. The Then, the delay fluctuation correcting unit 124 transmits and receives the Ref packet 161 between the Slave unit 112 (1) and the Master apparatus 101 (1) to obtain the delay fluctuation amount. The PTP processing unit 122 (1) performs various packet generation, sequence processing, offset calculation processing, and the like in accordance with the IEEE 1588-2008 standard. In addition, the PTP processing unit 122 (1) calculates a time offset in which the time information of the PTP packet is corrected based on the delay fluctuation amount notified from the delay fluctuation correction unit 124. Then, the PTP processing unit 122 (1) transmits / receives a PTP packet to / from the master device 101 (1) via the transmission / reception unit 121 (1), and from the time information to be transmitted / received, the slave clock 123 (1) and the master The offset of the time with the device 101 (1) is obtained, and the time of the slave clock 123 (1) is synchronized with the time of the master clock 105. The slave clock 123 (1) corrects the time based on the time offset input from the PTP processing unit 122 (1) and synchronizes with the time of the master clock 105.

  As described in (Equation 8) to (Equation 15), the link asymmetric correction value calculation unit 113 calculates the time offset (offset (0)) obtained by the Slave unit 112 (0) and the Slave unit 112 (1). Is used to calculate the time error between the slave clock 123 (0) and the slave clock 123 (1), in which the delay time difference of the link asymmetric is corrected using the offset (offset (1)) obtained by Adjust.

  The slave clock 114 is time-corrected based on the time error output by the link asymmetric correction value calculation unit 113 and is synchronized with the time of the master clock 105 of the master device 101 (1). As a result, the Slave device 102 can remove the link asymmetric delay time difference between the Master device 101 (1) and the Slave unit 112 (1).

In this way, the Slave device 102 having the time path of the 1 system having the delay fluctuation amount and the link asymmetric delay time difference and the time path of the 0 system having no delay fluctuation amount and the link asymmetric delay time difference can By correcting the link asymmetric delay time difference, the slave clock 114 synchronized with the time of the master device 101 (1) with the same time accuracy as the slave clock 123 (0) synchronized with the time of the 0-system time path. The time can be adjusted.
(Second Embodiment)
FIG. 6 shows an example of the Slave device 102a according to the second embodiment. In FIG. 6, blocks having the same reference numerals as those in FIG. 5 have the same or similar functions. The slave device 102a in FIG. 6 differs from the slave device 102 in FIG. 5 in that the slave clock 114 shown in FIG. 5 is not provided, and the link asymmetry correction value calculation unit 113 and the delay fluctuation correction unit 124 are replaced with a link asymmetry. The correction value calculation unit 113a and the delay fluctuation correction unit 124a are provided, and the link asymmetric delay time difference output from the link asymmetric correction value calculation unit 113a is input to the delay fluctuation correction unit 124a. Hereinafter, a different part from the Slave apparatus 102 shown in FIG. 5 is demonstrated.

  The link asymmetric correction value calculation unit 113a grasps the uplink / downlink delay time difference A and outputs the delay time difference A to the delay fluctuation correction unit 124a.

  The delay fluctuation correction unit 124a corrects the measurement standard of the delay fluctuation of the PTP packet including the link asymmetric delay time difference A in advance, and measures the delay fluctuation amount of the PTP packet with respect to the corrected measurement standard. That is, the reception time of the PTP packet (for example, the Sync packet 151) is corrected in advance by the time error including the link asymmetric delay time difference A.

In this way, the slave device 102a according to the second embodiment can correct the delay time difference that is asymmetric to the link simultaneously with the correction of the delay fluctuation amount. Thus, in the slave device 102a according to the second embodiment, when the link asymmetric correction value calculation unit 113a fails, the slave device 102 illustrated in FIG. 5 is prevented from being unable to control the slave clock 114. Can do. Alternatively, the slave device 102a according to the second embodiment does not require the slave clock 114 of the slave device 102 shown in FIG.
(Third embodiment)
FIG. 7 shows an example of the Slave device 102b according to the third embodiment. In FIG. 7, blocks having the same reference numerals as those in FIG. 5 have the same or similar functions. The slave device 102b in FIG. 7 differs from the slave device 102 in FIG. 5 in that it has a time accuracy monitoring unit 115, and a link asymmetric correction value calculation unit 113, a slave clock 114, and a delay fluctuation correction unit 124 instead of a link. That is, an asymmetric correction value calculation unit 113b, a slave clock 114b, and a delay fluctuation correction unit 124b are provided. A maintenance terminal 132 is connected to the slave device 102b via a network 131. Hereinafter, a different part from the Slave apparatus 102 shown in FIG. 5 is demonstrated.

  In FIG. 7, the delay fluctuation correction unit 124b corrects the delay fluctuation amount in the same manner as the delay fluctuation correction unit 124. However, the recovery operation (such as re-determining the delay fluctuation amount) is controlled by the control of the time accuracy monitoring unit 115 described later. )I do. The link asymmetric correction value calculation unit 113b corrects the link asymmetric delay time difference in the same manner as the link asymmetric correction value calculation unit 113, but the recovery operation (link asymmetric delay time difference is controlled by the time accuracy monitoring unit 115 described later. For example). The time accuracy monitoring unit 115 monitors the time of the slave clock 114b to monitor whether or not the correction of the delay fluctuation amount and the correction of the link asymmetric delay time difference are correctly performed.

  The time accuracy monitoring unit 115 measures a time fluctuation value (for example, TIE (Time Interval Error)) output from the slave clock 114b. Then, the time accuracy monitoring unit 115 monitors whether the TIE exceeds a preset threshold value. When the TIE exceeds the threshold, the time accuracy monitoring unit 115 notifies the maintenance terminal 132 of an alarm via the network 131 and notifies the maintenance person of the abnormality of the slave device 102. In addition, the time accuracy monitoring unit 115 stores the measured TIE for a preset period, and the maintenance person can read it from the maintenance terminal 132 and check it.

  FIG. 8A shows an example of a TIE waveform when the delay fluctuation correcting unit 124b fails. In FIG. 8A, the horizontal axis represents time, and the vertical axis represents the TIE value. At time Tx in FIG. 8A, when the delay fluctuation correction unit 124b fails and changes from the normal state to the abnormal state, the TIE tends to fluctuate more and more momentarily as compared with the normal state, and the TIE exceeds the threshold value. .

  On the other hand, FIG. 8B shows an example of a TIE waveform when the link asymmetric correction value calculation unit 113b fails. In FIG. 8B, the horizontal axis represents time and the vertical axis represents the TIE value. Then, at time Tx in FIG. 8B, when the link asymmetry correction value calculation unit 113b fails and changes from the normal state to the abnormal state, the TIE fluctuates stepwise and the TIE exceeds the threshold value.

  The maintenance person determines that the delay fluctuation correction unit 124b has a failure (such as a case where the reference timing fluctuates due to an abnormality in frequency synchronization, etc.) from the tendency of the TIE measurement results as shown in FIGS. 8A and 8B. It is possible to determine whether there is a failure in the link asymmetric correction value calculation unit 113b (such as a case where the link asymmetric correction value has disappeared due to a memory failure or the like). However, in any case, there is a possibility that the master device 101 (0) and the master device 101 (1) on the upstream side are at fault, so that the maintenance person is in a state of not only the slave device 102 but also the upstream master device 101. Also check.

  In addition, not the maintenance person, the slave device 102 can automatically determine the tendency of failure from the measured TIE by software processing. Thereby, the Slave device 102 can autonomously try to recover from the failure.

  FIG. 9 shows an example of a flowchart when the slave device 102 autonomously performs failure recovery.

  In step S101, the time accuracy monitoring unit 115 measures the TIE of the time of the slave clock 114b.

  In step S102, the time accuracy monitoring unit 115 determines whether or not the TIE exceeds a preset threshold. If the TIE value is less than the threshold, the process returns to step S101 to continue the TIE measurement. If the TIE value is greater than or equal to the threshold, the process proceeds to step S103.

  In step S103, the time accuracy monitoring unit 115 determines whether or not the condition that the variation in TIE is the step-shaped variation illustrated in FIG. 8B and the total number of occurrences is one is satisfied. . When the condition is satisfied, the time accuracy monitoring unit 115 determines that there is a problem in the link asymmetry correction process and proceeds to the process of step S104. When the condition is not satisfied, the time accuracy monitoring unit 115 proceeds to the process of step S105. .

  In step S104, the time accuracy monitoring unit 115 performs a recovery operation of the link asymmetric correction process (link asymmetric correction value calculation unit 113b), and returns to the process of step S101. For example, as the recovery operation, the time accuracy monitoring unit 115 resets the processing of the link asymmetry correction value calculation unit 113b and restarts.

  In step S105, the time accuracy monitoring unit 115 determines whether or not the condition that the TIE fluctuation is continuously severe as shown in FIG. 8A and the cumulative occurrence count is 1 is satisfied. To do. Then, the time accuracy monitoring unit 115 determines that there is a problem in the delay fluctuation correction process when the condition is satisfied, and proceeds to the process of step S106. If the condition is not satisfied, the time accuracy monitoring unit 115 proceeds to the process of step S107. .

  In step S106, the time accuracy monitoring unit 115 performs a recovery operation of the delay fluctuation correction process (delay fluctuation correction unit 124b), and returns to the process of step S101. For example, as the recovery operation, the time accuracy monitoring unit 115 resets the processing of the delay fluctuation correction unit 124b and restarts.

  In step S107, the time accuracy monitoring unit 115 determines that the failure is other than the link asymmetry correction value calculation unit 113b and the delay fluctuation correction unit 124b, and notifies the maintenance terminal 132 of the occurrence of the failure.

  In this way, the time accuracy monitoring unit 115 accumulates the variation amount of the TIE that varies with time until the TIE exceeds the threshold value, so that the variation continuously occurs or the temporary variation Is determined. As a result, the Slave device 102 can determine whether the delay fluctuation correction unit 124b is faulty or the link asymmetric correction value calculation unit 113b is faulty. When there is a possibility of failure of the link asymmetric correction value calculation unit 113b, the time accuracy monitoring unit 115 estimates a cause of failure such as a case where the link asymmetric delay time difference (correction value) disappears due to a memory failure. In this case, the time accuracy monitoring unit 115 restarts the calculation process of the link asymmetric delay time difference by the link asymmetry correction value calculation unit 113b, and corrects the link asymmetry correction target system (system 1 in the example of FIG. 1) again. Try to recover from the failure by processing. On the other hand, in the case of a failure in the delay fluctuation correction unit 124b, the time accuracy monitoring unit 115 estimates a cause of the failure such as a change in reference timing due to an abnormality in frequency synchronization. In this case, the time accuracy monitoring unit 115 waits for recovery of the frequency synchronization abnormality, resets the reference timing, and tries to recover from the failure. When the time accuracy monitoring unit 115 determines that the failure is other than the link asymmetry correction value calculation unit 113b and the delay fluctuation correction unit 124b, the time accuracy monitoring unit 115 notifies the maintenance terminal 132 of the occurrence of the failure.

  As described above, the time synchronization method and the time synchronization apparatus according to each embodiment can perform highly accurate time synchronization even when there is a link asymmetric delay time difference in the PTP packet. In addition, a time path via a packet network can be used as a time path redundancy system capable of highly accurate time synchronization by GPS or direct connection with a core wire. And the time accuracy obtained by the time path through the packet network can maintain the same quality as the time synchronization accuracy by GPS or direct connection of the core wire, so the time error is eliminated between redundant systems and switching between redundant systems Even if it is performed, no time jump occurs, and the user of the time synchronization service is not affected.

101 (0), 101 (1) ... Master device; 102, 102a, 102b ... Slave device; 103 ... Packet network; 104 ... Transmission path; 105 ... Master clock; PTP processing unit; 107 ... delay fluctuation correction unit; 108 ... transmission / reception unit; 112 (0), 112 (1) ... Slave unit; 113, 113a ... link asymmetric correction value calculation unit; (0), 121 (1)... Transceiver unit; 122 (0), 122 (1)... PTP processing unit; 123 (0), 123 (1), 114, 114a. , 124a, delay fluctuation correction unit, 115, time accuracy monitoring unit, 131, network, 132, maintenance terminal

Claims (6)

A time synchronization method for transmitting and receiving a time synchronization packet including time information between a plurality of master devices having a reference time and a slave device having a plurality of time synchronization units to synchronize the time of the slave device with the time of the master device In
The first time synchronization unit of the slave device uses a first time path that has no delay fluctuation and has no link asymmetric delay time difference between the uplink delay time and the downlink delay time. Sending and receiving the time synchronization packet including time information to and from the master device to obtain a first offset,
The second time synchronization unit of the slave device uses the second time path having the delay fluctuation and the link asymmetric delay time difference, and includes the time information including time information with the second master device. Sending and receiving the synchronization packet, measuring the delay fluctuation amount of the time synchronization packet in each of the uplink direction and the downlink direction, and correcting the delay fluctuation amount in the uplink direction and the downlink direction with the second master device A second offset of the second time synchronization unit based on a time error obtained by subtracting the first offset from the second offset to remove the link asymmetric delay time difference. Is synchronized with the time of the second master device. The time synchronization method according to claim 1,
When measuring the delay fluctuation amount as a deviation of the reception time of the time synchronization packet with respect to a measurement reference, the delay fluctuation amount is measured by including the link asymmetric delay time difference in the measurement reference. . In the time synchronization method according to claim 1 or 2,
The slave device measures the accuracy of time synchronization with the master device, and monitors whether the accuracy of the time synchronization is equal to or higher than a preset threshold value. A time synchronization method characterized in that a failure location is estimated by distinguishing a feature whose accuracy of notification or time synchronization changes. In a time synchronization device that transmits and receives a time synchronization packet including time information with a plurality of master devices having a reference time to synchronize with the time of the master device,
Uses a first time path that has no delay fluctuation and has no link asymmetric delay time between the uplink delay time and the downlink delay time, and includes time information with the first master device. A first time synchronization unit for transmitting and receiving the time synchronization packet to obtain a first offset;
Utilizing the second time pass the delay time difference of the link asymmetry and the delay fluctuation is present, the transmitting and receiving the time synchronization packet including the time information with the second of the master device second time pass A second time synchronization unit that measures the amount of delay fluctuation of each of the time synchronization packets in each of the uplink direction and the downlink direction, and obtains a second offset based on the time obtained by correcting the amount of delay fluctuation in the uplink direction and the downlink direction When,
The time of the second time synchronization unit is synchronized with the time of the second master device based on a time error obtained by subtracting the first offset from the second offset to remove the link asymmetric delay time difference. A time synchronization apparatus comprising: a link asymmetric correction unit. In the time synchronizer of Claim 4,
The second time synchronization unit measures the delay fluctuation amount by including the link asymmetric delay time difference in the measurement reference when measuring the delay fluctuation amount as a deviation of the reception time of the time synchronization packet with respect to the measurement reference. A time synchronization apparatus characterized by: In the time synchronizer of Claim 4 or Claim 5,
Measure the accuracy of time synchronization with the master device and monitor whether the accuracy of the time synchronization is above a preset threshold value. A time synchronization apparatus, further comprising a monitoring unit that discriminates a feature whose accuracy changes and estimates a fault location.

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