JP6037261B2 - Display device - Google Patents

Description

  The present invention relates to a display device, and more particularly to a technique for preventing damage associated with generation of static electricity during a manufacturing process.

  In an active matrix liquid crystal display device, two adjacent scanning signal lines (hereinafter referred to as gate lines) and two adjacent video signal lines (also referred to as source lines or drain lines; hereinafter referred to as drain lines). The thin film transistor that is turned on by the scanning signal from the gate line and the pixel electrode to which the video signal from the drain line is supplied through the thin film transistor are formed in the region surrounded by .

  In recent years, in a small and medium-sized display device mounted on a car navigation system, a portable information terminal, etc., it is necessary to form a large number of pixels within a limited display area. For this reason, lighting inspection in the manufacturing process of the display device is very important. In particular, when the number of pixels increases, the method of lighting the display device in the same procedure as normal image display increases the time required for the lighting inspection. For example, pseudo dynamic lighting inspection (QD lighting inspection) or the like In general, a lighting inspection circuit (QD lighting inspection circuit) for performing a lighting inspection is previously formed in the display device.

  The lighting inspection circuit is provided for each of the inspection thin film transistors and the R (red), G (green), and B (blue) pixels disposed at the ends of the lead lines from the drain lines and gate lines in the display area. There are provided inspection terminal portions for inputting inspection control signals to corresponding inspection video signals and scanning signals, and inspection thin film transistors. The lighting inspection circuit branches the inspection video signal and the scanning signal input from the inspection terminal section, and connects the inspection terminal section and the inspection thin film transistor with inspection wiring, The control signal line is connected in common to the gate electrode of the thin film transistor and to which a signal for controlling ON / OFF of the thin film transistor for inspection is input.

  In the lighting inspection circuit having this configuration, one of the drain electrode and the source electrode (for example, the drain electrode) of the thin film transistor for inspection is connected to the lead wiring from the drain line or the gate line, and the other electrode (for example, the drain electrode) , Source electrode) is connected to the inspection wiring. At this time, the control signal line is connected to the gate electrode of the thin film transistor for inspection, and the other end is only connected to the terminal portion for inspection, and is in a floating state. For this reason, when the charge accumulated in the control signal line exceeds a predetermined amount, that is, the breakdown voltage of the thin film transistor, an electrostatic spark is generated between the gate electrode and the drain electrode (or source electrode) of the thin film transistor for inspection, There is a problem that the inspection thin film transistor is destroyed.

As a result of earnestly examining the cause of the destruction of the inspection thin film transistor, the cause is
(1) In the rubbing step, charges are generated by contact between the rubbing cloth and the alignment film pattern arranged in the effective display area (display area), and the charges are accumulated in the alignment film.

(2) Since the alignment film and the pixel electrode are in contact with each other, charges are also accumulated in the pixel electrode.

(3) A potential difference is generated between the pixel electrode and the lighting inspection circuit, and the accumulated charge moves to the lighting inspection circuit via the drain line and the lead-out wiring.

(4) The charges moved through the drain line and the lead-out line move from the source / drain electrode to the gate electrode through the semiconductor layer of the thin film transistor (inspection thin film transistor) of the lighting inspection circuit.

(5) When the gate electrode of the inspection thin film transistor is in a floating state, there is no escape for the accumulated electric charge, which destroys the inspection thin film transistor and leads to disconnection failure.

I found out.

  As a method for solving the problem of destroying such an inspection thin film transistor, for example, there is an organic light emitting display device described in Patent Document 1. In the technique disclosed in Patent Document 1, a resistance is formed between the drain electrode and the gate electrode to prevent the control signal line from being in a floating state and to prevent electrostatic breakdown of the thin film transistor. Yes.

JP 2009-276734 A

  However, in the technique described in Patent Document 1, since the drain electrode and the gate electrode are electrically connected by the resistor element formed on the substrate, it is necessary to form a resistor element having a relatively large resistance value. . For this reason, a process of forming a resistance element is required separately from the process of forming a thin film transistor, which increases the number of processes.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a display device capable of preventing a disconnection failure of a video signal line.

(1) In order to solve the above problem, a display device of the present invention includes a scanning signal line extending in the first direction and arranged in parallel in the second direction intersecting the first direction, and extending in the second direction. A display area formed with video signal lines that are present in parallel in the first direction, and a terminal group that is formed outside the display area and includes a plurality of terminals that supply signals to the video signal lines; A lighting test comprising a plurality of first thin film transistors in which a drain electrode is connected to the video signal line, a source electrode is connected to an inspection terminal, and a gate electrode is commonly connected via an inspection control signal line A display device comprising a circuit,
A conductive thin film layer disposed at a predetermined distance from the control signal line for inspection;
A second thin film transistor formed in a region between the conductive thin film layer and the first thin film transistor and having a gate electrode connected to the control signal line for inspection;
The first thin film transistor and the second thin film transistor have the same characteristics,
The first spark generation voltage at which electrostatic spark is generated between the gate electrode and the source / drain electrode in the first thin film transistor is an electrostatic spark between the control signal line for inspection and the conductive thin film layer. This is a display device having a voltage higher than the second spark generation voltage at which.

  According to the present invention, it is possible to prevent electrostatic breakdown of the thin film transistor that constitutes the lighting inspection circuit, and thus it is possible to prevent disconnection failure of the video signal line.

  Other effects of the present invention will become apparent from the description of the entire specification.

It is a top view for demonstrating the whole structure of the liquid crystal display device which is a display apparatus of Embodiment 1 of this invention. It is a circuit diagram for demonstrating schematic structure of the lighting test circuit in the display apparatus of Embodiment 1 of this invention. It is a pattern diagram for demonstrating the detailed structure of the lighting test circuit in the display apparatus of Embodiment 1 of this invention. It is a figure for demonstrating the voltage change of each part of the lighting test circuit in the display apparatus of Embodiment 1 of this invention. It is an equivalent circuit of the control signal line of the lighting test circuit in the display device of Embodiment 1 of the present invention. It is a pattern diagram for demonstrating the detailed structure of the lighting test | inspection circuit in the display apparatus of Embodiment 2 of this invention. It is a pattern diagram for demonstrating the detailed structure of the lighting test | inspection circuit in the display apparatus of Embodiment 3 of this invention. It is a pattern diagram for demonstrating the detailed structure of the lighting test | inspection circuit in the display apparatus of Embodiment 4 of this invention. It is a pattern figure of the lighting test circuit in the conventional display apparatus.

  Embodiments to which the present invention is applied will be described below with reference to the drawings. However, in the following description, the same components are denoted by the same reference numerals, and repeated description is omitted.

<Embodiment 1>
<overall structure>
FIG. 1 is a diagram for explaining the overall configuration of a liquid crystal display device that is a display device according to a first embodiment of the present invention. Hereinafter, the overall configuration of the display device according to the first embodiment of the present invention will be described with reference to FIG. explain. Note that the display device is not limited to a non-luminous display device such as a liquid crystal display device, and is applicable to a self-luminous display device typified by an organic EL display device. In the following description, the case of an IPS liquid crystal display device will be described, but the present invention can also be applied to a VA liquid crystal display device.

  The liquid crystal display device according to the first embodiment shown in FIG. 1 includes a first substrate SUB1 on which pixel electrodes and the like are formed, a color filter and a black matrix (light-shielding film), and a first substrate SUB1 disposed opposite to the first substrate SUB1. A backlight unit (not shown) serving as a light source of the liquid crystal display panel has a liquid crystal display panel composed of two substrates SUB2 and a liquid crystal layer (not shown) sandwiched between the first substrate SUB1 and the second substrate SUB2. By combining them, a liquid crystal display device is configured. The first substrate SUB1 and the second substrate SUB2 are fixed and the liquid crystal is sealed with a sealing material (not shown) applied in a ring shape around the second substrate, and the liquid crystal is also sealed. . In the following description, the liquid crystal display panel is also referred to as a liquid crystal display device.

  As the first substrate SUB1 and the second substrate SUB2, for example, a well-known glass substrate is generally used. However, the first substrate SUB1 and the second substrate SUB2 are not limited to the glass substrate, and other types such as quartz glass and plastic (resin) are used. An insulating substrate may be used. For example, when quartz glass is used, since the process temperature can be increased, a gate insulating film of a thin film transistor (switching thin film transistor) STFT described later can be densified, so that reliability can be improved. On the other hand, when a plastic (resin) substrate is used, a liquid crystal display device that is lightweight and excellent in impact resistance can be provided.

  In the liquid crystal display device according to the first embodiment, a region in which display pixels (hereinafter abbreviated as pixels) are formed in a region in which liquid crystal is sealed becomes a display region AR, and is aligned so as to cover the display region. A film ORI is formed. At this time, even in a region where liquid crystal is sealed, a region where pixels are not formed and which is not involved in display is not the display region AR.

  In the liquid crystal display device of the first embodiment, the scanning signal line (gate line) GL that extends in the X direction and is arranged in parallel in the Y direction in the display area AR on the liquid crystal side surface of the first substrate SUB1. Is formed. In addition, video signal lines (drain lines) DL extending in the Y direction and juxtaposed in the X direction are formed.

  A rectangular region surrounded by the drain line DL and the gate line GL constitutes a region in which pixels are formed, whereby each pixel is arranged in a matrix in the display region AR. Each pixel includes, for example, a thin-film transistor (switching thin-film transistor) STFT that is turned on by a scanning signal from the gate line GL and a thin-film transistor that is turned on, as shown in an enlarged view A ′ in a circle A in FIG. A pixel electrode PX to which a video signal from the drain line DL is supplied via the STFT, and a common electrode CT connected to the common line CL and supplied with a common signal having a reference potential with respect to the potential of the video signal. I have. In the configuration of the common electrode CT shown in the enlarged view A ′, the common signal is input to the common electrode CT formed independently for each pixel through the common line CL. However, the configuration is limited to this. Rather, the common electrode CT is formed so that the common electrodes CT of the pixels adjacently arranged in the X direction are directly connected, and the common electrode CT is common from one end of the left and right (end portion of the first substrate SUB1) in the X direction or from both sides. A configuration may be adopted in which a common signal is input via the line CL.

  Each drain line DL and each gate line GL extend beyond the sealing material at the end thereof, and are mounted on the liquid crystal surface side of the first substrate SUB1 larger than the second substrate SUB2, or the scanning signal drive circuit GDR or The video signal drive circuit DDR is connected to each other. However, in the liquid crystal display device of the first embodiment, the scanning signal driving circuit GDR or the video signal driving circuit DDR is formed of a semiconductor chip and mounted on the first substrate SUB1, but the DDR video signal driving circuit and the scanning signal driving circuit are configured. One or both of the drive circuits of GDR may be mounted on the flexible printed circuit board FPC by a tape carrier system or a COF (Chip On Film) system and connected to the first substrate SUB1.

<Lighting inspection circuit configuration>
FIG. 2 is a diagram for explaining a schematic configuration of the lighting inspection circuit in the display device according to the first embodiment of the present invention. Hereinafter, the configuration of the lighting inspection circuit according to the first embodiment will be described with reference to FIG. However, in the following description, the side connected to the inspection terminals CR, CG, and CB among the pair of source / drain electrodes opposed to each other through the semiconductor layer of the inspection thin film transistor TFT is referred to as a source electrode, The side connected to the drain line DL is referred to as a drain electrode. Further, in the lighting inspection circuit QD of the first embodiment, the circuit portion that supplies the scanning signal for inspection to the gate line GL has the same configuration as the conventional one, and thus detailed description thereof is omitted.

  In the liquid crystal display device according to the first embodiment, a lighting inspection circuit QD is formed in a region on the liquid crystal side of the first substrate SUB1 and outside the display region AR. The lighting inspection circuit QD according to the first embodiment is configured to include a plurality of inspection thin film transistors (first thin film transistors) TFT having the same gate electrode, and the gate electrode of the inspection thin film transistor TFT is a signal line ( A control signal line (SIG) is connected to the inspection terminal CTG. That is, the control signal line SIG, which is an inspection signal line connected to the gate electrode of the inspection thin film transistor TFT, is connected to the gate electrodes of all the inspection thin film transistors TFT.

  In addition, among the inspection thin film transistors TFT, the source electrode of the inspection thin film transistor TFT whose drain electrode is connected to the drain line DL of the R (red) pixel is connected to the inspection terminal CR via the wiring (inspection wiring) DRW. It is connected to the. Further, among the inspection thin film transistors TFT, the source electrode of the inspection thin film transistor TFT whose drain electrode is connected to the drain line DL of the G (green) pixel is connected to the inspection terminal CG via the wiring (inspection wiring) DGW. It is connected to the. Further, among the inspection thin film transistors TFT, the source electrode of the inspection thin film transistor TFT whose drain electrode is connected to the drain line DL of the B (blue) pixel is the inspection terminal via the wiring (inspection wiring) DBW. Connected to CB. That is, the drain electrode of each inspection thin film transistor TFT is connected to a different drain line. On the other hand, the source electrode of the inspection thin film transistor TFT has three inspection wirings DRW, DGW, to which inspection video signals corresponding to the respective colors of R (red), G (green), and B (blue) are input. Connected to any DBW.

  In the lighting inspection circuit QD of the first embodiment, the floating electrode FLT, which is a conductive thin film made of a metal thin film, a transparent conductive film, or the like, is disposed in the vicinity of the control signal line SIG, and the floating electrode FLT and the inspection thin film transistor A dummy thin film transistor (second thin film transistor) TFT4 is arranged between the TFTs. In the dummy thin film transistor TFT4 of the first embodiment, as described in detail later, only the gate electrode is connected to the control signal line SIG, and the other electrodes, that is, the source electrode and the drain electrode are not connected to the other signal lines. It has become.

  In the lighting inspection circuit QD configured as described above, ON / OFF of all the inspection thin film transistors TFT is controlled based on a control signal input from the inspection terminal CTG at the time of lighting inspection. At this time, inspection video signals corresponding to the respective colors of R (red), G (green), and B (blue) are input from the inspection terminals CR, CG, and CB, and are inspected via the wirings DRW, DGW, and DBW. Is input to the source electrode of the thin film transistor TFT. When the inspection thin film transistor TFT is ON, an inspection video signal is output to each drain line DL via the ON inspection thin film transistor TFT. On the other hand, an inspection scanning signal is input from an inspection terminal (not shown) to the gate line GL connected to the gate electrode of the switching thin film transistor STFT disposed in each pixel. The scanning signal for inspection and the video signal for inspection are input in synchronization. Therefore, an inspection video signal corresponding to each color of R (red), G (green), and B (blue) is output to each pixel electrode via the switching thin film transistor STFT disposed in each pixel. A pseudo dynamic lighting inspection (so-called QD lighting inspection) is performed.

  At this time, the floating electrode FLT and the dummy thin film transistor TFT4 included in the lighting inspection circuit QD of the first embodiment are configured to be insulated from other signal lines, respectively. Inspection is possible.

  Next, FIG. 3 shows a pattern diagram of the lighting inspection circuit in the liquid crystal display device which is the display device according to the first embodiment of the present invention. Hereinafter, the detailed configuration of the lighting inspection circuit according to the first embodiment will be described with reference to FIG. To do. However, the pattern diagram shown in FIG. 3 is an enlarged view of a pattern indicated by a circle B in FIG. 2, and is an enlarged view of a pattern of a region portion on which the drain signal drive circuit DDR is mounted.

  As shown in FIG. 3, in the lighting inspection circuit QD of the first embodiment, the drain lines DL extending in the Y direction are arranged in parallel in the X direction as in the conventional lighting inspection circuit. The control signal line SIG extends in the direction in which the drain lines DL are arranged, and the inspection thin film transistor TFT is formed at the end of the drain line DL.

  The semiconductor layer of the inspection thin film transistor TFT is formed so as to intersect with the control signal line SIG formed under the semiconductor layer via a gate insulating film (insulating film) (not shown), and the control signal line SIG is used for the inspection. The structure also serves as the gate electrode of the thin film transistor TFT. The drain line DL is connected to a semiconductor layer of the inspection thin film transistor TFT formed above the control signal line SIG via an insulating film, and the drain line DL also serves as a drain electrode. Further, three wirings (inspection wirings) DRW, DGW, and DBW extending in the X direction, which is a parallel arrangement direction of the drain lines DL, are provided in the Y direction through the inspection thin film transistor TFT. Are installed side by side. In the first embodiment, the wirings (inspection wirings) DRW, DGW, and DBW are formed in the same layer as the control signal line SIG, and are in contact with the source electrode extending in the Y direction of the inspection thin film transistor TFT. It is electrically connected through a hole (through hole) TH. As described above, similarly to the gate line of the switching thin film transistor STFT which is a thin film transistor in the pixel, the control signal line SIG connected to the gate electrode of the inspection thin film transistor TFT is formed above the control signal line SIG formed in a straight line. The semiconductor layer of the inspection thin film transistor TFT is disposed so as to overlap with the insulating film (gate insulating film) interposed therebetween. With this configuration, it is possible to reduce the area occupied by the lighting inspection circuit QD.

  Furthermore, the lighting inspection circuit QD according to the first embodiment is configured to be formed in a region (shown by a solid line in the drawing) where the drain signal drive circuit DDR is mounted. Accordingly, a terminal portion PD for electrically connecting the output terminal of the drain signal drive circuit DDR and the drain line DL is formed on the drain line DL in the vicinity of the inspection thin film transistor TFT. This terminal portion PD is also electrically connected to the drain line DL through the contact hole TH.

  With this configuration, in the lighting inspection circuit QD of the first embodiment, R (red), G (green), and B (blue) color display drain lines for each pixel, and the drain line DL with R (red), Wiring (inspection wiring) DRW, DGW, and DBW for supplying G (green) and B (blue) inspection signals are electrically connected to and disconnected from each other by input from the control signal line SIG. ing.

  As is clear from FIG. 3, the lighting inspection circuit QD according to the first embodiment has a configuration in which the floating electrode FLT is disposed in the vicinity of the control signal line SIG. The floating electrode FLT of the first embodiment is formed of a conductive film in the same layer as the control signal line SIG (for example, a known metal thin film or a transparent conductive film such as ITO or ZnS). With this configuration, in the lighting inspection circuit QD of the first embodiment, the control signal line SIG and the floating electrode FLT can be formed in the same process, and the interval is a mask for forming the control signal line SIG and the floating electrode FLT. It is possible to form the pattern with very high accuracy, that is, pattern formation accuracy and conductive film etching accuracy. As a result, it is possible to obtain a special effect that it is possible to control the electrostatic spark generation voltage (second spark voltage) generated between the control signal line SIG and the floating electrode FLT with very high accuracy. .

  Note that the control signal line SIG and the floating electrode FLT are not limited to the same conductive film. For example, it may be configured by a conductive film of a different thin film layer such as a conductive film of the same layer as the source / drain electrodes of the inspection thin film transistor TFT. In addition, the floating electrode FLT is provided separately from other signal lines and the like, but is not limited thereto. For example, the lighting inspection circuit QD may be configured to use wiring for inputting a scanning signal for inspection to the gate line GL (gate wiring drawn out of the display area). This wiring has a configuration in which one end side is connected to the drain electrode of the inspection thin film transistor and the other end side is connected to an inspection terminal (not shown) for inputting an inspection scanning signal. Accordingly, since this wiring is in a floating state during the rubbing process, it can be used as the floating electrode FLT, and the effects described in detail later can be obtained.

  Further, in the lighting inspection circuit QD of the first embodiment, a dummy thin film transistor TFT4 is arranged in a region between the floating electrode FLT and the inspection thin film transistor TFT. The dummy thin film transistor TFT4 of the first embodiment is disposed adjacent to the inspection thin film transistor TFT (denoted as the thin film transistor TFT1 in the drawing) formed at the end of the inspection thin film transistor TFT on the side where the floating electrode FLT is disposed. It is the composition which becomes. The dummy thin film transistor TFT4 is formed in the same process as the inspection thin film transistor TFT. The gate electrode of the dummy thin film transistor TFT4 is also used as the control signal line SIG. Further, the source electrode and the drain electrode of the dummy thin film transistor TFT4 are configured to extend by a predetermined length along the source electrode and the drain electrode (drain line DL) of the adjacent inspection thin film transistor TFT1. . That is, the source electrode and the drain electrode of the dummy thin film transistor TFT4 extend only a predetermined length and are not connected to other signal lines or the like, and are insulated from the source electrode and the drain electrode of the adjacent inspection thin film transistor TFT1. It becomes the composition which is done.

  Although the dummy thin film transistor TFT4 of the first embodiment is configured to be formed at regular intervals with the inspection thin film transistor TFT, the formation positions thereof are not limited to regular intervals. For example, the dummy thin film transistor TFT4 may be formed closer to the floating electrode FLT than the position shown in FIG. 3 by forming it larger than the formation interval of the inspection thin film transistors TFT. However, the dummy thin film transistor TFT4 is preferably formed at a position closer to the thin film transistor TFT1 than the floating electrode FLT, as will be described in detail later.

  The voltage at which electrostatic spark is generated between the control signal line SIG and the floating electrode FLT is a voltage at which electrostatic spark is generated between the gate electrode and the source / drain electrodes of the thin film transistors TFT1 and TFT4, that is, a voltage lower than the withstand voltage. Is set. However, the voltage at which electrostatic spark is generated between the gate electrode and the source / drain electrode of the thin film transistor TFT1 depends on the forming process such as the thickness of the gate insulating film of the thin film transistor TFT. Therefore, in the configuration of the first embodiment, the relationship between the interval between the floating electrode FLT and the control signal line SIG and the voltage (withstand voltage) at which electrostatic spark is generated is experimentally determined in advance, and the interval is obtained. Thus, the floating electrode FLT and the control signal line SIG are formed.

  With this configuration, even when static electricity is generated by the rubbing process, first, an electrostatic spark is generated between the control signal line SIG and the floating electrode FLT. Next, although the potential of the control signal line SIG is lowered due to the electrostatic spark, the control signal is generated by generating the electrostatic spark between the gate electrode and the source / drain electrode of the dummy thin film transistor TFT4. Since the potential of the line SIG can be lowered, it is possible to prevent the test thin film transistor TFT of the lighting test circuit QD from being damaged due to the rubbing process. In the above description, the lighting inspection circuit QD connected to the drain line DL has been described. However, the lighting inspection circuit QD also controls the thin film transistor (not shown) for inputting a scanning signal for inspection to the gate line GL. The signal line SIG is a gate electrode. For example, the inspection thin film transistor TFT connected to the drain line is arranged in parallel.

  In contrast to the lighting inspection circuit of the first embodiment, in the configuration of the conventional lighting inspection circuit QD shown in FIG. 9, the charge Q2 accumulated in the control signal line SIG which is a floating wiring is only accumulated. As a result, when the difference between the potential V2 of the control signal line SIG and the potential of the inspection thin film transistor TFT exceeds the breakdown voltage between the gate electrode and the drain electrode of the inspection thin film transistor TFT, the electrostatic spark is generated. This will cause destruction of the thin film transistor TFT for inspection.

<Protection operation of inspection thin film transistor>
Next, FIG. 4 is a diagram for explaining a voltage change in each part of the lighting inspection circuit in the liquid crystal display device according to the first embodiment of the present invention. FIG. 5 is a diagram showing a dummy from the floating electrode in the lighting inspection circuit according to the first embodiment of the present invention. FIG. 4 shows an equivalent circuit of a control signal line extending from the thin film transistor to the inspection thin film transistor, and the protection operation of the inspection thin film transistor TFT in the lighting inspection circuit QD according to the first embodiment will be described in detail below with reference to FIGS. To do.

  However, in the protection operation of the inspection thin film transistor TFT shown in FIG. 4, a case will be described in which the dummy thin film transistor TFT4 is destroyed with the occurrence of one electrostatic spark. Further, in the following description, the description will be given focusing on the charge of the thin film transistor TFT1 formed in the position closest to the thin film transistor TFT1 on the left side in the drawing, that is, the dummy thin film transistor, among the inspection thin film transistors TFT. Furthermore, in the description in FIG. 4, the voltages V1, V2, and V4 are different from each other in order to clarify the change of the voltage shown in the drawing in the range of time t0 to t1, but the actual voltage is V1. = V2 = V4. The charge also moves to other inspection thin film transistors TFT forming the lighting inspection circuit QD.

  As shown in FIG. 4, among the inspection thin film transistors TFT constituting the lighting inspection circuit QD, the charge amount of the source / drain electrodes of the dummy thin film transistor TFT4 is Q4, the capacitance of the source / drain electrodes is C4, and the source / drain electrodes Is set to V4. Further, the charge amount of the source / drain electrode of the thin film transistor TFT1 disposed closest to the dummy thin film transistor TFT4, that is, the charge amount from the pixel to the source / drain electrode of the thin film transistor TFT1, is represented by Q1, and the capacitance of the source / drain electrode, that is, the pixel to thin film transistor. The capacitance to the source / drain electrode of TFT1 is C1, and the potential of the source / drain electrode is V1. Further, the charge amount in the control signal line SIG serving as a gate line (gate electrode) common to each inspection thin film transistor TFT constituting the lighting inspection circuit QD is Q2, the capacitance of the control signal line SIG is C2, and the control signal line SIG Is set to V2. Further, the charge amount of the floating electrode FLT, which is a floating conductor disposed near the control signal line SIG, is Q3, the capacitance of the floating electrode FLT is C3, and the potential of the floating electrode FLT is V3. Further, in the following description, for the sake of simplicity, a case will be described in which the voltage increase due to the charges generated in the effective display area (display area) AR accompanying the progress of the rubbing process changes linearly. It is not limited to.

  Hereinafter, based on the potential change of each part shown in FIG. 4, the protection operation | movement with respect to the thin-film transistor which comprises the lighting test circuit QD by the structure of Embodiment 1 is demonstrated.

  (1) In the range shown at times t0 to t1, it is generated by the contact between the rubbing cloth and the alignment film ORI formed so as to cover the inside of the effective display area (display area) AR by the progress of the rubbing process in the rubbing process. The accumulated charges are accumulated in the alignment film. Charge is also accumulated in the ITO of the pixel electrode in contact with the alignment film, and the potential V1 and the charge amount Q1 are increased. Here, when the potential V2 and the charge amount Q2 are lower than the potential V1 and the charge amount Q1, a potential difference is generated between the pixel electrode and the control signal line SIG, and the accumulated charges are such that Q1 = Q2. The electric potential moves to the control signal line SIG, that is, the electric charge moves from the source / drain electrode to the gate electrode through the semiconductor layer (for example, made of amorphous silicon a-Si) of the inspection thin film transistor TFT of the lighting inspection circuit QD. V2 and the charge amount Q2 increase. At this time, the potential V1 and the charge amount Q1 remain high. Thus, V1 high, V2 low (V1> V2) → V2 high, V1 high, and Q1 high, Q2 low (Q1> Q2) → Q2 high, Q1 high.

  Thus, when the rubbing process is started, static electricity is generated due to friction between the liquid crystal surface side (opposing surface side) of the first substrate SUB1 and the rubbing cloth. The charges generated by the static electricity move to the drain line DL via the pixel electrode and the switching thin film transistor STFT in the pixel, and then move to the lighting inspection circuit QD connected to the drain line DL. Due to the movement of the electric charge, the electric charge also moves to the drain electrode side of the thin film transistor TFT1 constituting the lighting inspection circuit QD, and the potential V1 rises as shown by the graph G1. Due to the rise of the potential V1 on the drain electrode side, the charge moves from the drain electrode of the thin film transistor TFT1 to the gate electrode, and the potential V2 of the control signal line SIG also rises similarly to the potential V1, as shown in the graph G2. (Time t0 to t1).

  Here, when the potential V4 and the charge amount Q4 are lower than the potential V2 and the charge amount Q2, the charge moves from the gate electrode to the source / drain electrode through the semiconductor layer of the dummy thin film transistor TFT4 so that Q2 = Q4. Therefore, the potential V4 and the charge amount Q4 are increased. At this time, the potential V2 and the charge amount Q2 remain high. Thus, the potential V2 is high and V4 is low (V2> V4) → V4 is high and V2 is high, and Q2 is high and Q4 is low (Q2> Q4) → Q4 is high and Q2 is high.

  That is, the control signal line SIG is connected to the gate line (gate electrode) of another inspection thin film transistor TFT. Furthermore, since the dummy thin film transistor TFT4 and the thin film transistor TFT1 of the lighting inspection circuit QD are bottom gate type MIS thin film transistors, the source electrode and the drain electrode are directly connected to the semiconductor layer. The layer and the gate electrode are arranged to face each other with a gate insulating film interposed therebetween. Further, the control signal line SIG is connected to the gate line (gate electrode) of another inspection thin film transistor TFT. Therefore, when the static electricity accompanying the rubbing process continues and the potential V1 on the drain electrode side of the thin film transistor TFT1 rises, the voltage V2 of the control signal line SIG also rises. As a result, the charge amount Q4 of the semiconductor layer disposed opposite to the control signal line SIG via the gate insulating film also increases, and as shown in the graph G4, the potential V4 of the drain electrode of the dummy thin film transistor TFT4 is also equal to the potential V1, It rises similarly to V2 (time t0 to t1).

  On the other hand, the floating electrode FLT formed in the vicinity of the control signal line SIG is formed to have a distance larger than the film thickness of the gate insulating film of the thin film transistor. Therefore, the potential V3 of the floating electrode FLT is an initial potential (for example, V3 = 0 V (zero volt)), and is held at a constant potential that remains the initial potential even in the range of time t0 to t1. At this time, during the period from t0 to t1, the potentials V1, V2, and V4 continue to generate static electricity due to the rubbing process. Therefore, as shown in the graphs G1, G2, and G4, the drain electrode side of the thin film transistor TFT1 As the potential V1 increases, the potential V2 of the control signal line SIG and the potential V4 of the drain electrode of the dummy thin film transistor TFT4 also increase. As a result, in the configuration of the first embodiment, when the potential difference between the floating electrode FLT and the control signal line SIG is V, the potential difference V = V2−V3 gradually increases.

  (2) When the potential V3 and the charge amount Q3 are lower than the potential V2 and the charge amount Q2, the charge becomes the gate electrode of the inspection thin film transistor TFT of the lighting inspection circuit QD and the dummy thin film transistor TFT4 so that Q2 = Q3. An attempt is made to move from the control signal line SIG to the floating electrode FLT. Here, when the potential between the potentials V2 and V3 reaches the limit withstand voltage, electrostatic spark is generated (time t1), and the potential changes suddenly (time t1 to t2) even if both voltages become the same potential. At this time, the potential V3 and the charge amount Q3 are increased, and the potential V2 and the charge amount Q2 are rapidly decreased. Thus, V2 high, V3 low (V2> V3) → V3 high, V2 low, and Q2 high, Q3 low (Q2> Q3) → Q3 high, Q2 low.

  That is, when the potential difference V = V2−V3 reaches the limit withstand voltage (discharge voltage, second spark voltage) Ved between the floating electrode FLT and the control signal line SIG at time t1, the floating electrode FLT and the control signal line A discharge spark (electrostatic spark) is generated between the SIG and the SIG. Due to this discharge spark, as shown in the graph G3, the potential of the floating electrode FLT rises greatly in a very short time from time t1 to time t2. Further, the charge V2 accumulated in the control signal line SIG moves to the floating electrode FLT, and the potential V2 of the control signal line SIG rapidly decreases in a very short time from time t1 to time t2 (time t1). ~ T2). When an abrupt voltage change occurs in a short time, such as the occurrence of electrostatic sparks, a relatively large current flows. For this reason, the wiring resistance of the control signal line SIG, which does not cause a large difference when static electricity generated by rubbing or the like is accumulated, has a great influence. Details will be described below.

  When a relatively large current is generated in the control signal line SIG, as shown in FIG. 5, the wiring resistances Ra and Rb of the control signal line SIG from the vicinity of the floating electrode FLT to the thin film transistor TFT1 through the dummy thin film transistor TFT4 are obtained. The difference in voltage will appear remarkably, and a difference in voltage drop will occur. Therefore, as shown in FIG. 5, the potential of the control signal line SIG in the vicinity of the floating electrode FLT is V2a, the potential of the control signal line SIG in the gate electrode region of the dummy thin film transistor TFT4 is V2b, and the QD lighting test circuit When the potential of the control signal line SIG in the gate electrode region of the thin film transistor TFT1 is V2c, the potential V2a of the control signal line SIG in the vicinity of the floating electrode FLT rapidly decreases due to the occurrence of electrostatic spark, and the potential of the floating electrode FLT The voltage drops to substantially the same potential as the potential V3 (time t2). At this time, the potential V2b of the control signal line SIG in the vicinity of the dummy thin film transistor TFT4 is moderately lowered than the change in the potential V2a of the control signal line SIG because the potential drop is mitigated by the wiring resistance Ra of the control signal line SIG. Will be. Similarly, the potential V2c of the control signal line SIG is further reduced by the total wiring resistance (Ra + Rb) of the wiring resistance Ra and the wiring resistance Rb of the control signal line SIG, and further lower than the change of the potential V2b. Becomes moderate.

On the other hand, as described above, the potential V1 of the drain electrode of the thin film transistor TFT1 at time t2, the potential V4 of the drain electrode of the thin film transistor TFT 4, the same or almost the same potential. Therefore, the potential difference between the potential V4 of the drain electrode of the dummy thin film transistor TFT4 and the potential V2b of the control signal line SIG in the period from time t1 to t2 is Vb, and the potential V1 of the drain electrode of the thin film transistor TFT1 and the potential V2c of the control signal line SIG. And the potential difference Vb is larger than the potential difference Vc. At this time, the thin film transistor TFT1 and the thin film transistor TFT4 are formed in the same process, and the formation positions thereof are arranged close to each other, so that they have substantially the same characteristics. Accordingly, when the thin film transistor TFT is destroyed due to the occurrence of electrostatic spark, the dummy thin film transistor TFT4 is destroyed.

  (3) When the charge amount Q2 (potential V2b) is lower than the charge amount Q4 (potential V4), the charge is transferred through the semiconductor layer of the dummy thin film transistor TFT4 so that Q2 = Q4. Since the electrode moves to the gate electrode (control signal line SIG), the charge amount Q2 (potential V2) increases. At this time, the amount of charge Q4 (potential V4) rapidly decreases, so that electrostatic spark is generated and the dummy thin film transistor TFT4 is destroyed. In this case, V4 high, V2 low (V4> V2) → V2 high, V4 low, and Q4 high, Q2 low (Q4> Q2) → Q2 high, Q4 low.

  That is, in the configuration of the first embodiment, as described above, the potential difference (first spark generation voltage) between the potential V4 of the drain electrode of the dummy thin film transistor TFT4 and the potential V2b of the control signal line SIG in the period of time t1 to t2. Vb becomes larger than the potential difference Vc between the potential V1 of the drain electrode of the thin film transistor TFT1 and the potential V2c of the control signal line SIG. Therefore, the potential difference Vb between the potential V4 of the drain electrode of the dummy thin film transistor TFT4 and the potential V2b of the control signal line SIG is the fastest due to the rapid decrease (drop) in the potential V2 of the control signal line SIG caused by the electrostatic spark. (First spark generation voltage) is reached. As a result, a second electrostatic spark is generated between the drain electrode of the dummy thin film transistor TFT4 and the control signal line SIG which is the gate electrode, and the gate insulating film is destroyed and short-circuited (time t2). . However, the gate insulating film breakdown in this case may be between the gate electrode and the source electrode or both.

  Due to the destruction of the gate insulating film of the dummy thin film transistor TFT4 at the time t2, the charge Q4 stored in the drain electrode (source electrode) is immediately supplied to the control signal line SIG. As a result, as shown in the graph G4 at times t2 to t3, the potential V4 of the drain electrode of the dummy thin film transistor TFT4 rapidly decreases. On the other hand, as indicated by V2b in the graph G2, the potential V2b of the control signal line SIG, which is the gate electrode, rapidly increases and becomes higher. As a result, at time t2 to t3, the charge supplied from the drain electrode of the dummy thin film transistor TFT4 is supplied to the vicinity of the floating electrode FLT of the control signal line SIG and the gate electrode region of the thin film transistor TFT4 via the wiring resistors Ra and Rb. As a result, the respective potentials V2a and V2c also rise. Thereafter, when the charge amount Q4 of the drain electrode of the dummy thin film transistor TFT4 becomes equal to the charge amount Q2 of the control signal line SIG, the rapid movement of the charge in the control signal line SIG, that is, generation of a large current ends, and the control signal The potential in the line SIG becomes the same potential V2 (time t3). At time t3, the potential V2 rises because the potential V4 of the drain electrode of the dummy thin film transistor TFT4 and the potential V2b of the control signal line SIG become the same potential. At this time, as apparent from the graphs G2b and G2c at time t2, since the potential Vc = V1-V2c is smaller than the potential Vb = V4-V2b, the thin film transistor TFT1 of the lighting inspection circuit QD does not reach the limit breakdown voltage. That is, the inspection thin film transistor TFT is not destroyed.

  (4) Since the accumulation of static electricity by the rubbing process is continued in the range indicated by the times t3 to t4, as shown in the graph G1, the potential V1 of the thin film transistor TFT1 of the lighting inspection circuit QD increases with time. It becomes. Therefore, the potential V2 of the control signal line SIG that is short-circuited due to the breakdown of the gate insulating film and the potential V4 of the drain electrode (including the source electrode) of the dummy thin film transistor TFT4 also increase with time. At this time, since the potentials V2 and V4 are lower than the potential V1, the potentials V2 and V4 approach the V1 voltage while being short-circuited. However, although the increase degrees of the potentials V2 and V4 are larger than the potential V1, since the charges move through the gate insulating film of the thin film transistor TFT1, the increase degrees of the potentials at the potential V1 and the potential V2 (potential 4) The difference is relatively small.

  (5) When the capacitance C in each inspection thin film transistor TFT of the lighting inspection circuit QD is saturated at time t4, the charge of the drain electrode potential V1 of the thin film transistor TFT1 is also saturated, and the subsequent drain electrode potential V1 of the thin film transistor TFT1. Becomes the saturated potential V1. Since the potentials V2 and V4 at this time are lower than the potential V1, they continue to rise with time. However, the increase level of the potentials V2 and V4 in the period from the time t4 to the time t5 when the rubbing process ends is not increased because the potential V1 does not increase. Further, as is apparent from FIG. 4, the electric potential moved by the electrostatic spark at time t1 is held in the potential V3 of the floating electrode FLT, and the increased potential is maintained until time t5 when the rubbing process ends. Become. Accordingly, since no electrostatic spark is generated between the floating electrode FLT and the control signal line SIG, the inspection thin film transistor TFT of the lighting inspection circuit QD is caused by the electrostatic spark generated between the floating electrode FLT and the control signal line SIG. It will not be destroyed.

  As a result, in the period from the time t2 when the dummy thin film transistor TFT4 is destroyed due to the occurrence of electrostatic spark between the floating electrode FLT and the control signal line SIG to the time t5 when the rubbing process ends, the drain of the thin film transistor TFT1 The potential difference between the potential V1 of the electrode (including the source electrode) and the potential V2 (potential V2c) of the control signal line SIG serving as the gate electrode does not reach the limit breakdown voltage that causes breakdown of the gate insulating film. Therefore, it is possible to prevent destruction of the inspection thin film transistor TFT forming the lighting inspection circuit QD. In addition, at time t3 to t5 in FIG. 4, it is described that the potentials V2 and V4 rise rapidly for the purpose of explanation (that is, the slope indicating the degree of rise increases), but the potential V2 in the actual rubbing process. , V4 rises smaller than those shown in the figure, so that the effects described above can be obtained.

  However, in the configuration of the first embodiment, it is preferable that the capacitance C4 of the dummy thin film transistor TFT4 is large. In this case, more charge can be held, and the amount of charge supplied to the gate electrode (control signal line SIG) when the drain electrode of the dummy thin film transistor TFT4 and the gate electrode (control signal line SIG) are short-circuited is increased. Therefore, the potential V2 of the control signal line SIG and the potential V4 of the dummy thin film transistor TFT4 (the potential at time t3 in FIG. 4) after the destruction of the dummy thin film transistor TFT4 are lowered to a lower potential. It becomes possible to make it. As a result, the potential V2 of the control signal line SIG (the potential V4 of the dummy thin film transistor TFT4) during the period from time t3 to time t5 can be held at a low potential.

  As described above, the liquid crystal display device according to the first embodiment includes a plurality of first thin film transistors (inspection thin film transistors) that include a conductive thin film layer that is not fixed to a specific potential during at least the rubbing process and that form the lighting inspection circuit QD. ) It is arranged in the vicinity of the control signal line connected to the gate electrode of the TFT, and the gate electrode is connected to the control signal line between the first thin film transistor and the conductive thin film layer forming the lighting inspection circuit QD. In addition, the drain electrode and the source electrode include a second thin film transistor (dummy thin film transistor) that is not connected to a signal line having a specific potential. Therefore, even when static electricity generated in the rubbing process is accumulated in the gate electrode of the inspection thin film transistor TFT of the lighting inspection circuit QD, it can be reduced by electrostatic spark generated between the gate electrode and the conductive thin film layer. , The rapid voltage fluctuation between the gate electrode and the source / drain electrode of the inspection thin film transistor TFT caused by the electrostatic spark, that is, the rapid voltage fluctuation between the source / drain electrode of the inspection thin film transistor TFT and the control signal line. Since it can be eliminated by electrostatic spark generated between the gate electrode and the source / drain electrode of the second thin film transistor (dummy thin film transistor), the destruction of the plurality of inspection thin film transistors forming the lighting inspection circuit QD is prevented. can do.

  In the liquid crystal display device according to the first embodiment, the floating electrode FLT and the control signal line SIG are formed of the same conductive film. However, the present invention is not limited to this. For example, the floating electrode FLT is formed of a conductive film in the same layer as the source and drain electrodes of the thin film transistors TFT1 and 4, and the distance in the in-plane direction of the first substrate SUB1 and the normal direction of the first substrate SUB1, that is, the thin film layer The configuration may be such that the voltage of the electrostatic spark generated between the floating electrode FLT and the control signal line SIG is adjusted by the sum of the distances in the stacking direction.

  In the floating electrode FLT according to the first embodiment, the case where the shape is formed in a rectangular shape has been described. However, the shape is not limited to a rectangular shape, and may be another shape. In particular, the optimum floating electrode FLT can be formed with a small area by adopting a shape that matches the shape of the region where the floating electrode FLT is to be formed. Further, the floating electrode FLT is formed of a linear conductive film like other signal lines, or is formed of a bent linear conductive film like a drain electrode of a dummy thin film transistor TFT4 of the second embodiment described later. It may be configured to.

(Embodiment 2)
FIG. 6 is an enlarged view of a lighting inspection circuit in the liquid crystal display device according to the second embodiment of the present invention, and corresponds to FIG. 4 of the first embodiment. However, the liquid crystal display device of the second embodiment has the same configuration as that of the first embodiment except for the configuration of the dummy thin film transistor TFT4 disposed adjacent to the lighting inspection circuit QD and the size of the floating electrode FLT. . Therefore, in the following description, the configuration of the dummy thin film transistor TFT4 and the floating electrode FLT will be described in detail.

  As is clear from FIG. 6, the dummy thin film transistor TFT4 of the second embodiment has a configuration including an extending portion EXL extending from the drain electrode. In particular, the extension portion EXL of the second embodiment is formed of a conductive film material formed in the same layer as the drain electrode. In addition, the extension part EXL of the second embodiment is formed of a linear conductive film having a wiring width similar to that of the drain line of the inspection thin film transistor TFT or the like constituting the lighting inspection circuit QD. At this time, in the configuration of the second embodiment, after extending upward in the drawing, it is bent and extended leftward. After this, after bending and extending to the right, it extends upward, and further bends and extends to the left, reaching the end. As described above, the extending portion EXL according to the second embodiment extends in the direction in which the drain electrode is formed and is sequentially bent in a direction perpendicular to the extending direction. With this configuration, the size of the thin film transistor TFT1 with respect to the extending direction of the drain line, that is, the extending direction of the lead line can be reduced, the wiring length can be increased, and the capacitance C4 of the drain electrode can be increased. It has become. At this time, also in the dummy thin film transistor TFT4 of the second embodiment, the source electrode, the drain electrode, and the extending portion EXL are in a floating state.

  On the other hand, as shown in FIG. 6, the floating electrode FLT according to the second embodiment has a configuration in which the length of each side in the vertical direction and the left-right direction in the drawing is larger than that of the floating electrode FLT according to the first embodiment. ing. With this configuration, in the floating electrode FLT formed in the rectangular shape of the second embodiment, the capacitance C3 is formed larger than that of the first embodiment, and if the film thickness and the conductive film material are the same as those of the first embodiment, The capacity C3 is proportional to the area.

  Also in the liquid crystal display device according to the second embodiment configured as described above, the charge accumulated in the gate electrode (control signal line SIG) of the thin film transistor TFT1 can be reduced by electrostatic spark generated between the gate electrode and the conductive thin film layer. Since the rapid voltage fluctuation of the control signal line SIG can be eliminated by the electrostatic spark generated between the gate electrode (control signal line SIG) of the second thin film transistor and the source / drain electrode, the lighting inspection circuit QD is provided. It is possible to obtain an effect that the plurality of inspection thin film transistors TFT to be formed can be prevented from being destroyed.

  In the liquid crystal display device of the second embodiment, the capacitor C3 of the floating electrode FLT and the capacitor C4 on the drain electrode side of the dummy thin film transistor TFT4 are both formed large, but the present invention is not limited to this. A configuration in which one of the capacities is increased may be employed. In this case, it is preferable that the capacitance of the floating electrode FLT is large as in the first embodiment.

  In the liquid crystal display device according to the second embodiment, the wiring extending from the drain electrode side of the dummy thin film transistor TFT4 is extended to increase the capacity of the drain electrode of the thin film transistor TFT4. There is no limit. For example, a flat conductive film layer such as the floating electrode FLT may be formed and electrically connected to the drain electrode.

  Furthermore, in the liquid crystal display device of the second embodiment, the capacitance on the drain electrode side of the dummy thin film transistor TFT4 is increased, but the extension portion EXL and the flat conductive film are formed on the lower source electrode side in the figure. Further, a configuration in which an extension portion EXL and a flat conductive film are provided on the drain electrode side and the source electrode side, respectively, may be used.

(Embodiment 3)
FIG. 7 is an enlarged view of a lighting inspection circuit in the liquid crystal display device according to the third embodiment of the present invention. However, also in the liquid crystal display device of the third embodiment, the configuration other than the configuration of the dummy thin film transistor TFT4 and the floating electrode FLT disposed adjacent to the lighting inspection circuit QD is the same as that of the first embodiment. Therefore, in the following description, the configuration of the dummy thin film transistor TFT4 and the floating electrode FLT will be described in detail.

  As shown in FIG. 7, the dummy thin film transistor TFT4 of the third embodiment has a configuration in which an electrode portion EXP is formed on the other end side of the drain electrode. In particular, the electrode portion EXP of the third embodiment functions as a gate insulating film in the first conductive film CN1 formed in the same layer as the drain electrode at the other end of the signal line extending from the drain electrode, and in the formation region of the thin film transistor. The second conductive film CN2 is formed below the first conductive film CN1 through an insulating film.

  At this time, the first conductive film CN1 is electrically connected to the drain electrode of the dummy thin film transistor TFT4, and the second conductive film CN2 is not connected to another conductive film, that is, from another signal line or the like. It has an insulated configuration. With this configuration, the electrode unit EXP according to the third embodiment is configured such that the capacitive electrode unit EXP is formed by the first conductive film CN1 and the second conductive film CN2 that are arranged so as to overlap each other with an insulating film interposed therebetween. It has become. As a result, the capacitance C4 on the drain electrode side of the dummy thin film transistor TFT4 can be increased with a small occupied area. In particular, in the configuration of the third embodiment, the first conductive film CN1 is a process for forming the source and drain electrodes of the thin film transistors TFT1 and TFT4, and the second conductive film CN2 is a process for forming the gate electrode. Therefore, the effect that the capacitive electrode part EXP can be formed can be obtained without adding the step of forming the electrode part EXP of the third embodiment.

  In the electrode part EXP of the third embodiment, the area of the second conductive film CN2 is smaller than that of the first conductive film CN1 connected to the drain electrode of the dummy thin film transistor TFT4. Further, the side portion of the second conductive film CN2 does not protrude from the side portion of the first conductive film CN1 in plan view. In the dummy thin film transistor TFT4 of the third embodiment, the source electrode has the same configuration as that of the first embodiment, but is not limited to this. For example, the configuration similar to that of the drain electrode described above may be used, and the electrode portion EXP described above may be formed on the source electrode side, and the drain electrode side may be configured similarly to the first embodiment.

  On the other hand, also in the floating electrode FLT of the third embodiment, the second electrode made of the conductive film is formed on the first electrode FLT1 made of the conductive film having the same shape as that of the first embodiment with an insulating film (gate insulating film) interposed therebetween. The electrode FLT2 is formed. At this time, the first electrode FLT1 and the second electrode FLT2 have a floating configuration that is not connected to other signal lines or the like, that is, a configuration that is insulated from other signal lines or the like. Therefore, in the third embodiment, the capacitive floating electrode FLT formed by the first electrode FLT1 and the second electrode FLT2 that are arranged so as to overlap with each other via the insulating film is configured. Therefore, the capacitance C3 of the floating electrode FLT can be made larger than that of the first embodiment even if the area is the same as in the first embodiment.

  At this time, in the floating electrode FLT of the third embodiment, the area of the second electrode FLT2 is smaller than that of the first electrode FLT1 formed in the same layer as the control signal line SIG. Further, the conductive film forming the second electrode FLT2 does not protrude from the side portion of the first electrode FLT1 in plan view.

  With this configuration, the variation in the distance between the control signal line SIG and the floating electrode FLT accompanying the alignment accuracy in the step of forming the first electrode FLT1 and the second electrode FLT2, that is, the control signal line SIG and the floating electrode FLT It is possible to reduce the area of the floating electrode FLT occupying the first substrate SUB1, while suppressing variations (fluctuations) in the voltage generated by electrostatic sparks during the period.

  As described above, also in the QD lighting inspection circuit of the third embodiment, the floating electrode FLT is disposed in the vicinity of the control signal line SIG, and the region between the floating electrode FLT and the thin film transistor TFT1 of the QD lighting inspection circuit Since the dummy thin film transistor TFT4 is arranged, the same effect as that of the first embodiment can be obtained. At this time, the electrode portions EXP connected to the floating electrode FLT of the third embodiment and the drain electrode of the dummy thin film transistor TFT4 are configured to overlap each other with the floating conductive film via an insulating film. A special effect is obtained in that the capacitances C3 and C4 can be increased without increasing. Further, since the capacitors C3 and C4 can be formed larger than in the first embodiment, it is possible to obtain a special effect that the potential of the control signal line SIG after the occurrence of electrostatic spark can be made lower than that in the first embodiment. .

  In the liquid crystal display device according to the third embodiment, the upper conductive thin film is formed smaller than the lower conductive thin film to form the floating electrode FLT, and the electrode portion EXP has a lower layer than the upper conductive thin film. Although the conductive thin film is formed to be small, the reverse structure may be used.

(Embodiment 4)
FIG. 8 is an enlarged view of a lighting inspection circuit in the liquid crystal display device according to the fourth embodiment of the present invention. However, the liquid crystal display device according to the fourth embodiment is other than the dummy thin film transistor TFT4 disposed adjacent to the lighting inspection circuit QD, the thin film transistor TFT4a connected to the thin film transistor TFT4, and the floating thin film transistor TFT3 serving as the floating electrode FLT. The configuration is the same as that of the first embodiment. Therefore, in the following description, the configuration of the dummy thin film transistor TFT4, the thin film transistor TFT4a, and the floating electrode FLT will be described in detail. In the following description, for the thin film transistors TFT1 and TFT4, of the pair of electrodes electrically connected to the semiconductor layer, the upper electrode in the figure is referred to as the drain electrode, and the lower electrode in the figure is the source electrode. In the thin film transistor TFT4a, the lower electrode in the drawing is referred to as a drain electrode, and the upper electrode in the drawing is referred to as a drain electrode.

  As apparent from FIG. 8, in the lighting inspection circuit QD of the fourth embodiment, the thin film transistor TFT3 that is not connected to other signal lines is used as the floating electrode FLT, and the dummy thin film transistor TFT4 and the three thin film transistors TFT4 connected to the thin film transistor TFT4 are used. The thin film transistor TFT4a is provided. In particular, in the configuration of the dummy thin film transistors TFT4 and TFT4a in the fourth embodiment, the thin film transistor TFT4 is juxtaposed with the thin film transistor TFT1 constituting the lighting inspection circuit QD, and in particular, a semiconductor is formed so as to overlap with the control signal line SIG having a linear shape. A drain electrode and a source electrode are respectively formed.

  On the other hand, the three thin film transistors TFT4a are formed at positions away from the thin film transistor TFT4, and the gate electrode of each thin film transistor TFT4a is connected to the control signal line SIG branched from the control signal line SIG. The drain electrode of each thin film transistor TFT4a is electrically connected, and the drain electrode of this thin film transistor TFT4a is also electrically connected to the drain electrode of the dummy thin film transistor TFT4. On the other hand, like the source electrode of the dummy thin film transistor TFT4, the source electrode of the thin film transistor TFT4a has a floating configuration in which each is not connected to other signal lines or the like. However, although the three thin film transistors TFT 4a in the fourth embodiment have been described in the same parallel direction as the inspection thin film transistor TFT forming the lighting inspection circuit QD, the present invention is not limited to this. For example, it may be arranged in parallel in the direction in which the drain line extends, that is, in the direction perpendicular to the direction in which the inspection thin film transistors TFT are arranged.

  With the configuration described above, the capacitance of the wiring for connecting the drain electrode of the dummy thin film transistor TFT4 and the drain electrode of each thin film transistor TFT4a and the capacitance (parasiticity) between the drain electrode and the gate electrode in the three thin film transistors TFT4a. The total capacity of the capacity between the gate and drain which is a capacity) and the capacity between the gate electrode and the source / drain electrode of the dummy thin film transistor TFT4 is the capacity C4 of the dummy thin film transistor TFT4. That is, as in the second and third embodiments, the capacitance C4 of the dummy thin film transistor TFT4 can be increased.

  Furthermore, in the configuration of the fourth embodiment, three thin film transistors TFT3 are formed in the vicinity of the control signal line SIG. A floating electrode FLT is formed by the three thin film transistors TFT3. That is, in the fourth embodiment, similarly to the inspection thin film transistor TFT of the lighting inspection circuit QD, only the gate electrodes of the three thin film transistors TFT3 are connected in parallel in the horizontal direction in the drawing. . At this time, in the configuration of the fourth embodiment, the signal line (wiring) connecting the gate electrodes of the three thin film transistors TFT3 is formed in the same layer by the same process as the control signal line SIG, that is, by the same conductive film material. The extending direction is formed in parallel with the control signal line SIG. As a result, the end portion of the source electrode is brought close to the control signal line SIG among the source electrode, the drain electrode, and the gate electrode of the three thin film transistors TFT3. Therefore, in the fourth embodiment, electrostatic spark is generated according to the distance between the other end side of the source electrode of each thin film transistor TFT3, that is, the side close to the control signal line SIG, and the control signal line SIG. Therefore, in the lighting inspection circuit QD of the fourth embodiment, the total capacitance of the source electrode wiring capacitance of the thin film transistor TFT3 and the capacitance between the source / drain electrodes and the gate electrode is the capacitance of the floating electrode FLT of the fourth embodiment. C3.

  Also in the floating electrode FLT of the fourth embodiment configured as described above, the charge Q4 accumulated in the control signal line SIG due to the occurrence of electrostatic spark can be reduced as in the first embodiment. The same effect can be obtained. Furthermore, since the capacitors C3 and C4 can be formed larger than in the first embodiment as in the third and fourth embodiments, the potential of the control signal line SIG after the occurrence of electrostatic spark is set to a lower potential than in the first embodiment. A special effect of being able to do so can be obtained.

  However, in the configuration of the fourth embodiment, three thin film transistors TFT3 are connected in series in order to ensure sufficient capacitance C3. At this time, in the fourth embodiment, the capacitance between the source / drain electrode and the gate electrode is used together with the capacitance of the conductive film forming the source electrode of each thin film transistor TFT3. Furthermore, since the thin film transistor TFT3 having the same size as the inspection thin film transistor TFT forming the lighting inspection circuit QD is formed, only the gate electrode of each thin film transistor TFT3 is electrically connected, and the source electrode and the drain electrode are connected to other transistors. The configuration uses three thin film transistors TFT3 that are not connected to signal lines or the like and are in a floating state.

  In the configuration of the fourth embodiment, the thin film transistor TFT4a may be destroyed first instead of the thin film transistor TFT4. However, the inspection thin film transistor TFT can be protected by any destruction of the thin film transistors TFT4 and TFT4a1. It becomes.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment of the invention. However, the invention is not limited to the embodiment of the invention, and various modifications can be made without departing from the scope of the invention. It can be changed.

SUB1 …… First substrate, SUB2 …… Second substrate, AR …… Display area, DL …… Drain line GL …… Gate line, CL …… Common line, TFT …… Switching thin film transistor PX …… Pixel electrode, CT: Common electrode, GDR: Scanning signal driving circuit, PD: Terminal portion DDR: Video signal driving circuit, QD: Lighting inspection circuit, TFT: Thin film transistor CR, CG, CB, CTG: Inspection terminal , TFT: inspection thin film transistor TFT4: dummy thin film transistor, FLT: floating electrode SIG: control signal line, DRW, DGW, DBW ... inspection wiring, EXL: extension TH: contact hole, FLT1... First electrode, FLT2... Second electrode CN1... First conductive film, CN2... Second conductive film, EXP. T3, TFT4a ...... thin film transistor

Claims (8)

A scanning signal line extending in the first direction and juxtaposed in the second direction intersecting the first direction and a video signal line extending in the second direction and juxtaposed in the first direction are formed. A display area formed on the outside of the display area, a terminal group including a plurality of terminals for supplying a signal to the video signal line, a drain electrode connected to the video signal line, and a source electrode inspected A lighting inspection circuit comprising a plurality of first thin film transistors connected to a terminal for use and having a gate electrode commonly connected via a control signal line for inspection,
A conductive thin film layer disposed at a predetermined distance from the control signal line for inspection;
A second thin film transistor formed in a region between the conductive thin film layer and the first thin film transistor and having a gate electrode connected to the control signal line for inspection;
The first thin film transistor and the second thin film transistor have the same characteristics,
The first spark generation voltage at which electrostatic spark is generated between the gate electrode and the source / drain electrode in the first thin film transistor is an electrostatic spark between the control signal line for inspection and the conductive thin film layer. The display device is characterized in that the voltage is higher than a second spark generation voltage at which the above occurs.   The display device according to claim 1, wherein the second thin film transistor is disposed closer to the first thin film transistor than the conductive thin film layer.   The conductive thin film layer is disposed apart from the inspection control signal line in plan view, and is formed in the same layer as the inspection control signal line connected to the gate electrode of the first thin film transistor. The display device according to claim 1, wherein the display device is a display device.   2. The second thin film transistor includes two or more thin film transistors, and at least one of a drain electrode and a source electrode of the second thin film transistor is electrically connected to each other. 4. The display device according to any one of items 3 to 3. The conductive thin film layers display device according to any one of claims 1 to 4, characterized in Rukoto such from at least two layers of the conductive thin film which is superimposed disposed through an insulating film. An extending portion bent in the first direction and the second direction;
One end of the extending portion is opened, according to claim 1 and the other end, characterized in Rukoto is electrically connected to the electrode of the one electrode of the drain electrode and the source electrode of the second thin film transistor 6. The display device according to any one of 5 to 5. Comprising a capacitor portion composed of at least two or more conductive thin films disposed in an overlapping manner via an insulating film;
The capacitor portion is the display device according to any of claims 1 to 5, wherein among the drain electrode and the source electrode of the second thin film transistor, wherein Rukoto disposed on at least one. The conductive thin film layer, the display device according to any one of claims 1 to 5, characterized in Rukoto a thin film transistor.

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