JP6019602B2 - Phase adjusting device and imaging device - Google Patents

Description

  The present invention relates to a phase adjustment device and an imaging device including the phase adjustment device.

  Conventionally, a clock is used for reading data. In such a case, a phase shift between the data and the clock becomes a problem. It is known that the phase shift is an influence caused by heat generated by continuous operation of the apparatus or a configuration of a peripheral circuit. Therefore, in the invention of Patent Document 1, the clock edge is compared with the edge of the clock, and when the interval falls below the reference value, the clock edge is controlled so as to be away from the data edge. It is carried out.

Japanese Patent Application No. 2004-180188

  However, the adjustment method of Patent Document 1 has a problem in that the operation sequence has a time restriction, and suitable adjustment cannot be performed depending on a change in the driving state of the apparatus or a change in the environment inside the apparatus.

  The present invention has been made in view of the above problems, and it is an object of the present invention to suppress time restrictions in phase adjustment and perform phase adjustment according to the driving state of the apparatus and environmental changes.

The phase adjustment device according to the present invention includes a second clock for detecting phase shift from the first data to be phase-adjusted by the first clock signal, and the second clock having a phase different from that of the first clock signal or the first clock signal. An acquisition unit for acquiring recording third data from the first data by a signal; and, when acquiring the third data by the first clock signal, the synchronization data included in the first data from the synchronization code. When detecting the phase shift amount of one data and acquiring the third data by the second clock signal, a detection unit for detecting the phase shift amount from the second data and the third data, and the detection unit An adjustment unit that adjusts the phase of the first data according to the detected phase shift amount .

  When the adjustment unit acquires the third data by the second clock signal, the adjustment unit adjusts the phase of the first data based on the phase shift amount detected by comparing the second data and the third data. adjust.
  In addition, when the detection unit obtains the third data from the second clock signal, the detection unit detects the phase shift amount from the synchronization code, and the adjustment unit obtains the third data from the second clock signal. When acquiring, the phase of said 1st data is adjusted with the said phase shift amount detected by the said synchronous code.
  The acquisition unit acquires the second data by a rising edge of the first clock signal.
  The acquisition unit acquires the second data by a falling edge of the first clock signal.
  The acquisition unit acquires the third data by a rising edge of the second clock signal.
  The acquisition unit acquires the third data by a falling edge of the second clock signal.
  A controller that switches between a mode in which the third data is acquired by the first clock signal and a mode in which the third data is acquired by the second clock signal;

The controller may select one of a mode in which the third data is acquired by the first clock signal and a mode in which the third data is acquired by the second clock signal. Switching between a fluctuation mode in which data is acquired and a fixed mode in which the third data is acquired by the first clock signal.

  Further, the control unit switches between the fluctuation mode and the fixed mode based on at least one of the number of times that the phase adjustment of the first data is performed by the adjustment unit, temperature information, and driving time.

An imaging apparatus according to the present invention includes an imaging unit that captures a subject image and generates image data, and any one of the phase adjustment devices described above, wherein the phase adjustment device uses the image data as the first data. Is entered.

The acquisition unit acquires the second data and the third data for each line constituting the image data or for each frame of the image data .

Further, the detecting unit detects a pre-Symbol phase shift amount for each frame line intervals or the image data constituting the image data.

The adjustment unit adjusts the phase of the first data for each line constituting the image data or for each frame of the image data .

  An imaging apparatus according to the present invention includes an imaging unit that captures a subject image to generate image data, and a phase adjustment device that can switch between the variation mode and the fixed mode. The image data is input as the first data, and the change mode and the fixed mode are switched by the control unit for each line constituting the image data, for each frame of the image data, or for each predetermined number of frames.

  ADVANTAGE OF THE INVENTION According to this invention, while restraining the time restriction | limiting in a phase adjustment, the phase adjustment according to the drive state and environmental change of an apparatus can be performed.

It is a functional block diagram which shows the structure of the electronic camera of this embodiment. It is a schematic diagram explaining the data in this embodiment. 3 is a functional block diagram showing a configuration of a phase adjustment unit 21. FIG. It is a schematic diagram explaining a clock. It is a flowchart which shows operation | movement of the phase adjustment apparatus 11 at the time of performing phase adjustment. It is a timing chart at the time of performing phase adjustment. It is another flowchart which shows operation | movement of the phase adjustment apparatus 11 at the time of performing phase adjustment. It is another timing chart at the time of performing phase adjustment. It is another flowchart which shows operation | movement of the phase adjustment apparatus 11 at the time of performing phase adjustment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Hereinafter, an electronic camera equipped with the phase adjusting device of the present invention will be described as an example.

  FIG. 1 is a functional block diagram showing the configuration of the electronic camera of this embodiment. FIG. 1 shows only the part related to the characteristic part of the present invention. Since the configuration of each part not shown in FIG. 1 is the same as that of a known technique, the illustration and description are omitted.

  As shown in FIG. 1, the electronic camera 1 includes an imaging unit 10 and a phase adjustment device 11. The output of the imaging unit 10 is input to the phase adjustment device 11, and the output of the phase adjustment device 11 is recorded in a recording unit (not shown) via an image processing unit (not shown). The phase adjustment device 11 is supplied with a control clock CLK from the imaging unit 10.

  The imaging unit 10 includes a known imaging device, an OB clamp circuit, an A / D conversion unit, an I / F unit, a clock generation unit, and the like, and inputs digital image data to the phase adjustment device 11. Hereinafter, data input from the imaging unit 10 to the phase adjustment device 11 is referred to as Data (I). Further, as shown in FIG. 2, data input from the imaging unit 10 to the phase adjustment device 11 is frame data, and includes blanking data, synchronization code data, and image data. When input from the imaging unit 10 to the phase adjustment device 11, data is input line by line in accordance with the readout direction shown in FIG. Further, a mode signal indicating a readout mode described later is supplied from the phase adjustment device 11 to the imaging unit 10. The imaging unit 10 can change the output rate of the image data described with reference to FIG.

  As shown in FIG. 1, the phase adjustment device 11 includes a phase adjustment unit 21, a synchronization code detection unit 22, a data acquisition unit 23, a phase shift detection unit 24, a phase control unit 25, and a CLK control unit 26.

  As shown in FIG. 3, the phase adjustment unit 21 includes a delay control unit 31 and a plurality of delay elements 32. The delay control unit 31 includes a plurality of delay elements (not shown), and adjusts the phase of Data (I) according to the delay amount setting signal supplied from the phase control unit 25 (details will be described later). The delay element 32 performs a fixed delay process on the output of the delay control unit 31, Data (O) having the same phase as the output of the delay control unit 31, and Data (+ S delayed by a predetermined amount from Data (O). ) And Data (-S) advanced by a predetermined amount from Data (O) are generated and output to the synchronization code detector 33.

  The synchronization code detection unit 22 detects a synchronization code from each data (Data (O), Data (+ S), Data (−S)) input from the phase adjustment unit 21. Details of the detection of the synchronization code will be described later. After the synchronization code is detected, the image data is output to the data acquisition unit 25 and the phase shift detection unit 24, and information indicating that the synchronization code has been detected is supplied to the phase control unit 25.

  The data acquisition unit 23 outputs Data (O) as output data among the data input from the synchronization code detection unit 22. The data acquisition unit 23 uses one of two types of clocks (CLK_A and CLK_B, details will be described later) supplied from the CLK control unit 26.

  The phase shift detector 24 detects a phase shift based on each data (Data (O), Data (+ S), Data (−S)) input from the synchronization code detector 22. Similar to the data acquisition unit 23 described above, the phase shift detection unit 24 uses one of two types of clocks (CLK_A and CLK_B, details will be described later) supplied from the CLK control unit 26. Further, the phase shift detector 24 supplies the detection result to the phase controller 25.

  The phase control unit 25 sets a delay amount when performing phase adjustment based on the information supplied from the synchronization code detection unit 22 and the phase shift detection unit 24 and supplies the delay amount setting signal to the phase adjustment unit 21. . In addition, a mode signal indicating a readout mode described later is supplied to the imaging unit 10.

  Based on the clock (CLK) supplied from the imaging unit 10, the CLK control unit 26 generates a clock (CLK_A) having the same phase and a clock (CLK_B) shifted by ¼ period, and supplies the clock (CLK_B) to each unit. FIG. 4 illustrates CLK, CLK_A, and CLK_B. The CLK control unit 26 supplies only CLK_A to the phase adjustment unit 21 and the synchronization code detection unit 22, and supplies both CLK_A and CLK_B to the data acquisition unit 23 and the phase shift detection unit 24. . Note that CLK_A and CLK_B may be separately oscillated as long as the synchronization between CLK_A and CLK_B can be strictly controlled.

  In the electronic camera 1 having the configuration described above, the operation of the phase adjustment device 11 when suppressing the time restriction in the phase adjustment and performing the phase adjustment according to the driving state of the device and the environmental change, This will be described with reference to the timing chart of FIG. In addition, the arrow in FIG. 6 means the timing of data acquisition.

  In step S1, the phase adjustment device 11 controls the phase control unit 25 and the phase adjustment unit 21 to perform initial adjustment.

  The initial adjustment is performed based on an initial delay amount setting signal preset in the phase controller 25. This initial adjustment is performed in the same manner as a known technique using a predetermined test pattern, for example. Therefore, there is a time restriction and phase adjustment according to the driving state of the electronic camera 1 and environmental changes cannot be performed.

  In step S <b> 2, the phase adjustment device 11 controls the synchronization code detection unit 22 to acquire a synchronization code. The synchronization code is embedded in advance in the portion of the synchronization code data shown in FIG. Here, a description will be given by taking as an example a synchronization code composed of four words “ff 00 ff 00”.

  Data acquisition in the synchronization code detection unit 22 is performed according to CLK_A supplied from the CLK control unit 26. When data is input from the imaging unit 10 to the phase adjustment device 11, the synchronization code detection unit 22 first detects the first word of Data (O). The first word is “ff”, and when the first word is detected, the synchronization code detection unit 22 performs the second operation for each data (Data (O), Data (+ S), Data (−S)). Detect words. The second word is “00”, and when the second word is detected, the phase difference adjusting device 11 proceeds to step S3.

  In step S <b> 3, the phase adjustment device 11 controls the phase shift detection unit 24 to determine whether or not phase adjustment is necessary. If the phase adjustment device 11 determines that the phase adjustment is necessary, the process proceeds to step S4. If the phase adjustment device 11 determines that the phase adjustment is not necessary, the phase adjustment apparatus 11 proceeds to step S6 described later.

  The phase shift detection unit 24 has “00” for both Data (+ S) and Data (−S) among the data (Data (O), Data (+ S), Data (−S)) acquired in step S2. It is determined whether or not. If both are determined to be “00”, it is determined that the position adjustment is unnecessary because correct synchronization codes have been detected for both Data (+ S) and Data (−S). On the other hand, if it is determined that at least one of Data (+ S) and Data (−S) is not “00”, the phase shift detector 24 detects a correct synchronization code for at least one of Data (+ S) and Data (−S). Since it is not completed, it is determined that position adjustment is necessary.

  In step S4, the phase adjusting device 11 controls the phase control unit 25 to detect the amount of phase shift. Of the second words of Data (+ S) and Data (−S) described in step S3, a phase shift has occurred in the direction determined not to be “00”. A phase shift amount that adjusts the delay amount in a direction opposite to the direction is determined. The details of the processing are the same as in the known technique.

  In step S5, the phase adjusting device 11 controls the phase control unit 25 to perform phase adjustment. The phase control unit 25 performs phase adjustment by supplying a delay amount setting signal to the phase adjustment unit 21 according to the phase shift amount detected in step S4.

  In step S <b> 6, the phase adjustment device 11 controls the data acquisition unit 23 and the phase shift detection unit 24 to acquire data.

  When the synchronization code detection unit 22 detects the third word and the fourth word of the synchronization code, the data acquisition unit 23 and the phase shift detection unit 24 prepare for data acquisition.

  Data acquisition by the data acquisition unit 23 is performed according to CLK_B supplied from the CLK control unit 26. As illustrated in FIG. 6, the data acquisition unit 23 sequentially acquires image data according to CLK_B. This image data is data for recording. The data acquisition unit 23 appropriately outputs the recording data as Data (O) to an image processing unit (not shown).

  On the other hand, the acquisition of data in the phase shift detector 24 is performed according to both CLK_A and CLK_B supplied from the CLK controller 26. As illustrated in FIG. 6, the data acquisition unit 23 sequentially acquires image data according to the rising edge and falling edge of CLK_A, and sequentially acquires image data according to the rising edge of CLK_B. These image data are data for detecting a phase shift. The phase shift detector 24 temporarily records the acquired phase shift detection data in an internal memory (not shown) or the like.

  In step S7, the phase adjustment device 11 determines whether or not the processing for one line has been completed. If the phase adjustment device 11 determines that the processing for one line has been completed, the process proceeds to step S8, and if it is determined that the processing for one line has not ended, the processing returns to step S6.

  In step S8, the phase adjustment device 11 controls the phase shift detector 24 to determine whether or not phase adjustment is necessary. If the phase adjustment device 11 determines that the phase adjustment is necessary, the process proceeds to step S9. If the phase adjustment device 11 determines that the phase adjustment is not necessary, the phase adjustment apparatus 11 proceeds to step S10 described later.

  The phase shift detection unit 24 uses, among the data acquired in step S6, the phase shift detection data acquired according to the rising edge of CLK_A and the phase shift detection data acquired according to the falling edge of CLK_A. , Respectively, to compare with the data for phase shift detection acquired according to the rising edge of CLK_B. Then, both the phase shift detection data acquired according to the rising edge of CLK_A and the phase shift detection data acquired according to the falling edge of CLK_A are acquired according to the rising edge of CLK_B. It is determined whether or not the data is the same. If both are determined to be the same as the phase shift detection data acquired according to the rising edge of CLK_B, the data is acquired according to the phase shift detection data acquired according to the rising edge of CLK_A and the falling edge of CLK_A. Since correct detection has been performed for both of the detected phase shift data, it is determined that position adjustment is unnecessary. On the other hand, the phase shift detection data acquired according to the rising edge of CLK_B is at least one of the data for phase shift detection acquired according to the rising edge of CLK_A and the data for phase shift detection acquired according to the falling edge of CLK_A. If it is determined that the data is different from the data for use, the phase shift detection unit 24 determines that position adjustment is necessary because at least one of the data for phase shift detection acquired according to the rising edge of CLK_B is not correctly detected. judge.

  That is, the phase shift detection unit 24 replaces the Data (+ S) and Data (−S) used in the determination described in step S3 with the phase shift detection data acquired according to the rising edge of CLK_A and the CLK_A The same determination is performed using phase shift detection data acquired according to the falling edge.

  In step S9, the phase adjusting device 11 controls the phase control unit 25 to detect the phase shift amount. The phase control unit 25 obtains the phase shift direction as in step S4 and determines the phase shift amount.

  In step S10, the phase adjustment device 11 controls the phase control unit 25 and performs phase adjustment in the same manner as in step S5. This phase adjustment is preferably performed during the blanking data read period after the end of one line.

  In step S11, the phase adjustment device 11 determines whether or not the processing for one frame has been completed. If the phase adjustment device 11 determines that the processing for one frame has been completed, the phase adjustment device 11 ends the series of processing. If the phase adjustment device 11 determines that the processing for one frame has not been completed, the next line is read and the process returns to step S2.

  Through the series of processes described above, the first clock and the second clock having a phase different from that of the first clock are generated based on the first clock, and the input data is generated according to the rising edge and the falling edge of the first clock. The phase shift detection data is acquired, and the recording data is acquired from the input data in accordance with the rising edge or falling edge of the second clock. Then, the phase shift detection data acquired in synchronization with the first clock is compared with the recording data acquired in synchronization with the second clock, and the phase shift amount of the input data is determined based on the comparison result. Detection is performed, and the phase is adjusted based on the detected phase shift amount. Therefore, it is possible to suppress time restrictions in phase adjustment and perform phase adjustment in accordance with the driving state of the apparatus and environmental changes.

  In particular, it is possible to perform preferable phase adjustment without newly adding a large circuit configuration for phase adjustment. Further, even during acquisition of synchronization code data and image data, it is possible to detect a phase shift state and perform phase adjustment.

  In addition, the above-described effects are particularly useful in an apparatus such as an electronic camera that outputs only once and cannot perform retransmission when acquisition fails.

  Note that the phase shift detection data described in step S6 of the flowchart of FIG. 5 may be acquired for all pixels or only for some pixels. Alternatively, it may be acquired only immediately before the phase shift amount detection and phase adjustment described in steps S9 and S10.

  Further, the determination described in step S8 in the flowchart of FIG. 5, the detection of the phase shift amount described in step S9, and the phase adjustment described in step S10 may be performed during the blanking data reading period after the end of one line. However, it may be performed at other timings. For example, it may be performed in the middle of an arbitrary line, may be performed every time a predetermined line ends, may be performed at the timing when one frame ends, or may be performed every time a predetermined frame ends. good. Further, the determination described in step S8 in the flowchart of FIG. 5, the detection of the phase shift amount described in step S9, and the phase adjustment described in step S10 may be performed continuously or separately. For example, the determination described in step S8 may be performed after the end of one line, and after the completion of the next line, the detection of the phase shift amount described in step S9 and the phase adjustment described in step S10 may be performed.

  Further, the recording data described in step S6 in the flowchart of FIG. 5 may be obtained according to CLK_A.

  The phase adjustment described above is phase adjustment based on the premise of reading in a so-called single data rate mode (hereinafter referred to as SDR mode). In recent years, reading in a double data rate mode (hereinafter referred to as DDR mode) with a higher data rate has become common. Hereinafter, the operation of the phase adjustment device 11 when performing phase adjustment based on the DDR mode will be described with reference to the flowchart of FIG. 7 and the timing chart of FIG. Hereinafter, only differences from the flowchart of FIG. 5 (SDR mode premise) will be described.

  In step S21 to step S27, the phase adjusting device 11 performs the same processing as in step S1 to step S7 in the flowchart of FIG. However, the phase adjustment device 11 performs the following processing when acquiring data in step S26.

  In step S <b> 26, the phase adjustment device 11 controls the data acquisition unit 23 to acquire data.

  When the synchronization code detection unit 22 detects the third word and the fourth word of the synchronization code, the data acquisition unit 23 prepares for data acquisition.

  Data acquisition by the data acquisition unit 23 is performed according to CLK_A supplied from the CLK control unit 26. As shown in FIG. 8, the data acquisition unit 23 sequentially acquires image data according to the rising edge and falling edge of CLK_A. This image data is data for recording. The data acquisition unit 23 appropriately outputs the recording data as Data (O) to an image processing unit (not shown).

  That is, in step S26, unlike the step S6 in FIG. 5, the recording data is acquired according to CLK_A. Further, in step S26, unlike step S6 in FIG. 5, acquisition of data for detecting a phase shift is not performed.

  In step S28, the phase adjustment device 11 determines whether or not the processing for one frame has been completed. When the phase adjustment device 11 determines that the processing for one frame has been completed, the phase adjustment device 11 ends the series of processing. When the phase adjustment device 11 determines that the processing for one frame has not been completed, the next line is read and the process returns to step S22.

  Through the series of processes described above, even in the DDR mode in which reading is performed at a higher speed than in the SDR mode, Data (+ S) delayed by a predetermined amount from Data (O) and Data (−S advanced by a predetermined amount from Data (O). ) And the phase adjustment in addition to the initial adjustment can be performed.

  Next, the operation of the phase adjustment device 11 when the SDR mode and the DDR mode described above are automatically switched according to the driving state of the electronic camera 1 and the environmental change will be described with reference to the flowchart of FIG.

The series of processes shown in FIG. 9 is started at any of the following timings.
-When the power is turned on (including when returning from sleep mode)
After a series of processing shown in FIG. 9 is completed and a predetermined time has elapsed. When the internal temperature of the electronic camera 1 falls below a reference value by a temperature sensor (not shown). When an instruction is given by the user. Step S41 The phase adjustment device 11 sets the DDR mode.

  In step S42, the phase adjusting device 11 executes the DDR mode. The phase adjustment device 11 performs the processing from step S21 to step S28 in the flowchart of FIG. 7, and proceeds to step S43.

  In step S43, the phase adjustment device 11 determines whether or not phase adjustment has been performed. If the phase adjustment device 11 determines that phase adjustment has been performed, the process proceeds to step S44. If it is determined that phase adjustment has not been performed, the phase adjustment apparatus 11 proceeds to step S45 described below.

  The phase adjustment device 11 determines whether or not the phase adjustment in step S25 has been performed when the DDR mode is executed in step S42. The criteria for determination may be determined in any way. For example, when the DDR mode is executed in step S42, if the phase adjustment is performed once during the reading of one frame, it may be determined that the phase adjustment has been performed, or a predetermined number of times or more during the reading of one frame. When the phase adjustment is performed, it may be determined that the phase adjustment has been performed.

  In step S44, the phase adjusting device 11 increments a counter (not shown) by 1.

  In step S45, the phase adjusting device 11 determines whether or not the processing of n frames has been completed. If the phase adjustment device 11 determines that the processing of n frames has been completed, the process proceeds to step S46. If the phase adjustment device 11 determines that the processing of n frames has not been completed, the phase adjustment device 11 sets the next frame as a read target and returns to step S42. Note that n is a predetermined number of frames (for example, 30 frames). The switching timing between the SDR mode and the DDR mode decreases as n increases, and the switching timing between the SDR mode and DDR mode increases as n decreases.

  In step S46, the phase adjusting device 11 determines whether or not counter> threshold Ta. If the phase adjustment device 11 determines that counter> threshold Ta, it proceeds to step S47, and if it determines that counter ≦ threshold Ta, it returns the counter to 0 and returns to step S42. The threshold value Ta is predetermined. The case where counter> threshold Ta is a state in which it is possible to estimate that the frequency of phase adjustment is high because reading by DDR is unstable, and a case where a change from DDR mode to SDR mode is necessary. Show. On the other hand, the case of counter ≦ threshold Ta is a state where it can be estimated that reading by DDR is stably performed. Therefore, the larger the threshold Ta, the lower the possibility of changing from the DDR mode to the SDR mode, and the smaller the threshold Ta, the higher the possibility of changing from the DDR mode to the SDR mode.

In step S47, the phase adjusting device 11 sets the SDR mode. In step S48, the phase adjusting device 11 executes the SDR mode. The phase adjustment device 11 performs the processing from step S1 to step S11 in the flowchart of FIG. 5, and proceeds to step S49.

  In step S49, the phase adjustment device 11 determines whether or not phase adjustment has been performed. If the phase adjustment device 11 determines that the phase adjustment has been performed, the process proceeds to step S50. If the phase adjustment device 11 determines that the phase adjustment has not been performed, the process proceeds to step S51 described below.

  The phase adjustment device 11 determines whether or not the phase adjustment in steps S5 and S10 has been performed when the SDR mode is executed in step S48. The criteria for determination may be determined in any way. For example, when the SDR mode is executed in step S48, if the phase adjustment is performed even once during the reading of one frame, it may be determined that the phase adjustment has been performed, or a predetermined number of times or more during the reading of one frame. When the phase adjustment is performed, it may be determined that the phase adjustment has been performed. Further, the phase adjustment in step S5 and the phase adjustment in step S10 may be handled equivalently, or weighting or priority order may be given.

  In step S50, the phase adjusting device 11 increments the counter by one.

  In step S51, the phase adjustment device 11 determines whether or not the processing of n frames has been completed. If the phase adjustment device 11 determines that the processing of the n frame has been completed, the process proceeds to step S52. If the phase adjustment device 11 determines that the processing of the n frame has not been completed, the phase adjustment device 11 returns to step S48 with the next frame as a read target. Note that n is a predetermined number of frames (for example, 30 frames). The switching timing between the SDR mode and the DDR mode decreases as n increases, and the switching timing between the SDR mode and DDR mode increases as n decreases.

  In step S52, the phase adjustment device 11 determines whether or not counter <threshold value Tb. When determining that the counter <the threshold value Tb, the phase adjusting device 11 returns the counter to 0, and returns to step S41 with the next frame as a read target. On the other hand, if it is determined that counter ≧ threshold value Tb, the counter is reset to 0, and the next frame is read out and the process returns to step S48. The threshold value Tb is predetermined. The case of counter <threshold value Tb is a state where it can be assumed that the change from the SDR mode to the DDR mode is preferable because reading by SDR is sufficiently stable. On the other hand, the case of counter ≧ threshold value Tb is a state in which reading by SDR is unstable, so that it can be estimated that the frequency of phase adjustment is high, and a state in which reading in SDR mode can be presumed to be preferable. is there. Therefore, the larger the threshold value Tb, the lower the possibility of changing from the SDR mode to the DDR mode, and the smaller the threshold value Tb, the higher the possibility of changing from the SDR mode to the DDR mode.

  Through the series of processes described above, the SDR mode and the DDR mode can be automatically switched according to the driving state of the electronic camera 1 and the environmental change. Therefore, reading can be performed stably and at high speed.

  In addition, the above-described effect is particularly useful in an apparatus such as an electronic camera that outputs only once and cannot perform retransmission when acquisition fails.

In the flowchart of FIG. 9, the example in which the switching timing between the SDR mode and the DDR mode is determined using the counter is shown, but the present invention is not limited to this example. For example, the switching timing between the SDR mode and the DDR mode may be determined at the following timing.
When performing continuous shooting (so-called continuous shooting), moving image shooting, etc., switching between the SDR mode and the DDR mode is performed when a fixed number of frames or a continuous operation for a fixed time continues.
A temperature sensor (not shown) switches between the SDR mode and the DDR mode based on the comparison result between the internal temperature of the electronic camera 1 and the reference value.
-Measure the elapsed time starting from power-on, and switch between SDR mode and DDR mode when the elapsed time exceeds a predetermined time.

  Further, in the flowchart of FIG. 9, an example in which it is determined whether or not the phase adjustment is performed every time one frame is finished is shown, but the present invention is not limited to this example. For example, determination may be performed in the middle of an arbitrary line, determination may be performed every time one line ends, or determination may be performed every time a predetermined line ends.

  In the flowchart of FIG. 9, an example is shown in which the counter is compared with the threshold every time n frames are completed, but the present invention is not limited to this example. For example, a comparison may be performed in the middle of an arbitrary line, a comparison may be performed every time one line ends, a comparison may be performed every time a predetermined line ends, or one line ends. You may compare each time. However, when the reading mode is changed in the middle of an arbitrary line, a buffer or the like may be prepared as appropriate to absorb a delay caused by the clock change.

  In the above-described embodiment, an example in which both the phase adjustment in step S5 and the phase adjustment in step S10 in the flowchart of FIG. 5 are performed in the SDR mode is shown, but the present invention is not limited to this example. For example, the phase adjustment described in step S5 may be omitted, and only the phase adjustment described in step S10 may be performed.

  In the above-described embodiment, an example in which the detection of the phase shift amount and the phase adjustment are continuously performed has been described. However, the detection result of the phase shift amount is recorded in a tag or the like of the image data, and the electronic camera 1 It is good also as a structure used for the diagnosis of this condition.

  In the above-described embodiment, the electronic camera has been described as an example, but the present invention is not limited to this example. For example, the present invention can be similarly applied to an image reading apparatus such as an electronic camera or a scanner that captures a moving image.

  Moreover, you may implement | achieve part or all of the process demonstrated with the flowchart of FIG.5, FIG.7, FIG.9 of this invention with a computer. In this case, a part or all of the processing described in the flowcharts of FIGS. 5, 7, and 9 may be recorded in the computer. Such a program may be recorded on a recording medium or may be downloaded via the Internet.

DESCRIPTION OF SYMBOLS 10 ... Imaging part, 11 ... Phase adjustment apparatus, 21 ... Phase adjustment part, 22 ... Synchronization code detection part, 23 ... Data acquisition part, 24 ... Phase shift detection part, 25 ... Phase control part, 26 ... CLK control part

Claims (15)

Recording from the first data by the second clock signal having a phase different from the second data for detecting the phase shift from the first data to be phase-adjusted by the first clock signal and the first clock signal or the first clock signal. An acquisition unit for acquiring third data for use;
When acquiring the third data by the first clock signal, the phase shift amount of the first data is detected from the synchronization code included in the first data, and the third data is detected by the second clock signal. When acquiring, a detection unit that detects the phase shift amount from the second data and the third data;
An adjustment unit that adjusts the phase of the first data according to the phase shift amount detected by the detection unit;
A phase adjustment apparatus comprising: The adjustment unit adjusts the phase of the first data based on the phase shift amount detected by comparing the second data and the third data when acquiring the third data by the second clock signal. The phase adjusting device according to claim 1 . The detection unit detects the phase shift amount from the synchronization code when acquiring the third data by the second clock signal,
The said adjustment part adjusts the phase of the said 1st data with the said phase shift amount detected by the said synchronous code, when acquiring the said 3rd data with the said 2nd clock signal. phase adjustment device. 4. The phase adjustment apparatus according to claim 1, wherein the acquisition unit acquires the second data by a rising edge of the first clock signal . 5. The phase adjustment device according to claim 4, wherein the acquisition unit acquires the second data by a falling edge of the first clock signal . 6. The phase adjustment device according to claim 1, wherein the acquisition unit acquires the third data by a rising edge of the second clock signal . 7. 6. The phase adjustment apparatus according to claim 1, wherein the acquisition unit acquires the third data by a falling edge of the second clock signal . 7. 8. The control unit according to claim 1, further comprising a control unit that switches between a mode in which the third data is acquired by the first clock signal and a mode in which the third data is acquired by the second clock signal. phase adjustment device. The control unit selects one of a mode in which the third data is acquired by the first clock signal and a mode in which the third data is acquired by the second clock signal to select the third data The phase adjustment device according to claim 8, wherein the phase adjustment device switches between a fluctuation mode in which acquisition is performed and a fixed mode in which the third data is acquired by the first clock signal . The control unit switches the fluctuation mode and the fixed mode based on at least one of the number of times that the phase adjustment of the first data is performed by the adjustment unit, temperature information, and driving time. The phase adjusting device according to 1. An imaging unit that captures a subject image and generates image data;
  A phase adjustment device according to any one of claims 1 to 10,
  The phase adjustment device is an imaging device to which the image data is input as the first data. The imaging device according to claim 11, wherein the acquisition unit acquires the second data and the third data for each line constituting the image data or for each frame of the image data. The imaging device according to claim 11, wherein the detection unit detects the phase shift amount for each line constituting the image data or for each frame of the image data. The imaging device according to claim 11, wherein the adjustment unit adjusts a phase of the first data for each line constituting the image data or for each frame of the image data. An imaging unit that captures a subject image and generates image data;
  A phase adjustment device according to claim 9,
  The phase adjustment device inputs the image data as the first data, and the control unit controls the fluctuation mode and the line for each line constituting the image data, for each frame of the image data, or for each predetermined number of frames. An imaging device that switches between fixed modes.

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