JP6004946B2 - Solar cell and solar cell module - Google Patents

Description

  The present invention relates to a solar cell and a solar cell module.

  2. Description of the Related Art Conventionally, a technique for forming a solar battery cell by forming a stack of an amorphous intrinsic semiconductor layer and a conductive semiconductor layer on substantially the entire surface of any one surface of a crystalline semiconductor substrate has been disclosed. In this technique, the amorphous semiconductor layer formed on one surface undesirably turns around to the side surface of the semiconductor substrate or the other surface opposite to the semiconductor substrate, resulting in a problem that the characteristics deteriorate. For this reason, the structure of the photovoltaic element for preventing the amorphous semiconductor layer formed on one surface from undesirably wrapping around the side surface or the other surface of the semiconductor substrate is disclosed in Patent Document 1 and Patent Document 2 is disclosed.

  In the photovoltaic device of Patent Document 1, by providing a separation groove, the amorphous semiconductor layer formed on one surface is physically cut from wrapping around the side surface or the other surface of the semiconductor substrate. Yes.

  In the photovoltaic element of Patent Document 2, the amorphous semiconductor layer formed on one surface is formed on one side or both sides of the semiconductor substrate in a smaller area than the semiconductor substrate. Or it suppresses going around to the other side.

Japanese Patent No. 3349308 Japanese Patent No. 3825585

  However, in the cell structures of Patent Documents 1 and 2, there is the following problem when trying to prevent the characteristic deterioration due to the wraparound as described above. For example, in the cell structure of Patent Document 1, wraparound is suppressed by providing a separation groove. However, when the groove is formed on the surface where the junctions of different conductivity types are formed, although leakage can be prevented, carriers cannot be collected in the outer region where the groove is formed, and the effective area is reduced. In addition, when a groove is formed on the surface on which a junction of the same conductivity type is formed, the positive and negative electrodes are short-circuited through the substrate, and the leakage current cannot be ignored. In both cases of Patent Documents 1 and 2, an additional step for forming the groove is required, and the formation of the groove in the passivation film and the conductive film makes the process complicated, resulting in an increase in manufacturing cost. Further, for example, when the separation groove is formed using a laser, for example, there is a problem that the wafer is damaged and the characteristics are deteriorated.

  On the other hand, in Patent Document 2, since it is necessary to design in consideration of individual variations of the wafer and each laminated film in the manufacturing process, an invalid area that cannot contribute to power generation, which is a non-film-forming area at the outer periphery of the wafer edge However, there is a problem that the light receiving area is reduced and the characteristics cannot be sufficiently improved.

  The present invention has been made in view of the above, and a solar cell and a solar cell capable of reducing the ineffective area of the cell and suppressing deterioration in characteristics due to the wraparound of the semiconductor layer without increasing the number of manufacturing steps. The purpose is to obtain a module.

In order to solve the above-described problems and achieve the object, the present invention relates to a crystalline semiconductor substrate having a first conductivity type and a circuit from a first main surface of the semiconductor substrate to a side surface of the semiconductor substrate. A second conductive type amorphous semiconductor layer different from the first conductive type, a light transmitting conductive film formed on the second conductive type amorphous semiconductor layer, and the light transmitting A first current collecting electrode formed on the conductive film; and a second current collecting electrode formed on the second main surface side of the semiconductor substrate, the first and second current collecting electrodes. Current collecting electrodes located on the light-receiving surface side are formed along the outer periphery of the semiconductor substrate over the entire outer periphery , and the second conductive type amorphous semiconductor layer has a light-shielded region over the entire outer periphery. And electrically separated .

  According to the present invention, the current collecting electrode (bus bar wiring) is disposed on the outer peripheral portion, thereby forming a light shielding portion and making it impossible to perform photoelectric conversion without physically separating the amorphous semiconductor layer. The photoelectric conversion layer of the cell is substantially electrically separated. The heterojunction solar cell is electrically connected in part by an amorphous semiconductor layer formed on one surface of the heterojunction solar cell undesirably wrapping around the side surface or the other surface of the semiconductor substrate. Often in a state. That is, by arranging the bus bar wiring on the outer periphery so as to cover the end of the cell as a light-shielding part that blocks light irradiation, photoelectric conversion cannot be performed at the end of the cell, and the cell is not separated physically. The photoelectric conversion layer can be substantially electrically separated. Therefore, there is no need to physically separate the photoelectric conversion layer of the cell, and there is an effect that it is possible to suppress deterioration in characteristics due to wraparound without increasing the number of manufacturing steps of the solar battery cell.

FIG. 1-1 is a plan view schematically illustrating a main configuration of the light receiving surface side (first main surface side) of the solar cell according to the first embodiment of the present invention. FIG. 1-2 is a plan view schematically showing the main configuration of the back surface side (second main surface side). FIG. 1-3 is a cross-sectional view schematically showing an A ₀ -A ₀ cross section of FIG. 1-1. Figure 2 is an enlarged sectional view the main part, a diagram showing the A ₁ -A ₁ section of Figure 1-1. FIG. 3-1 is a process cross-sectional view illustrating the manufacturing process of the solar cell. FIG. 3-2 is a process cross-sectional view illustrating the manufacturing process of the solar cell. FIG. 3-3 is a process cross-sectional view illustrating the manufacturing process of the solar cell. FIG. 3-4 is a process cross-sectional view illustrating the manufacturing process of the solar cell. FIG. 3-5 is a process cross-sectional view illustrating the manufacturing process of the solar cell. FIG. 4 is a flowchart showing manufacturing steps of the solar cell according to Embodiment 1 of the present invention. FIG. 5-1 is a plan view schematically showing a main configuration of the light receiving surface side (first main surface side) of the solar cell of the second embodiment. FIG. 5B is a plan view schematically illustrating the main configuration of the back surface side, that is, the second main surface side. FIG. 5C is a cross-sectional view schematically showing an A ₀ -A ₀ cross section of FIG. FIG. 6-1 is a plan view schematically showing the main configuration of the light-receiving surface side (first main surface side) of the solar cell according to Embodiment 3 of the present invention. FIG. 6B is a plan view schematically illustrating the main configuration of the back surface side (second main surface side). FIG. 7 is a plan view schematically showing a main configuration of the solar cell module according to Embodiment 4 of the present invention. FIG. 8-1 is a plan view schematically illustrating the main configuration of the light receiving surface side (first main surface side) of the solar cell of the conventional example. FIG. 8-2 is a plan view schematically illustrating the main configuration of the back surface side, that is, the second main surface side. FIG. 8C is a cross-sectional view schematically showing an A ₀ -A ₀ cross section of FIG. FIG. 9 is an enlarged cross-sectional view of a main part, and is a view showing a cross section A ₁ -A ₁ of FIG.

  Embodiments of a solar cell according to the present invention will be described below in detail with reference to the drawings. In addition, this invention is not limited by this embodiment, In the range which does not deviate from the summary of this invention, it can change suitably. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding. The same applies between the drawings.

Embodiment 1 FIG.
FIG. 1-1 is a plan view schematically illustrating a main configuration of a light receiving surface side, that is, a first main surface side of a solar cell according to the first embodiment (hereinafter may be referred to as a solar cell). . FIG. 1-2 is a plan view schematically showing the main configuration of the back side, that is, the second main surface side. 1-3 is a cross-sectional view schematically showing an A ₀ -A ₀ cross section of FIGS. 1-1 and 1-2. FIG. 2 is an enlarged cross-sectional view of a main part, and is a view showing an A ₁ -A ₁ cross section of FIGS. 1-1 and 1-2. In particular, in order to describe the end portion of the solar battery cell which is the center of the problem in the present embodiment, the feature of the corresponding portion is drawn in an exaggerated form. This solar cell is characterized in that the collecting electrode is formed over the entire periphery of the substrate. This solar cell includes an i-type amorphous silicon layer 3i as a light-receiving surface-side intrinsic semiconductor layer, which is sequentially stacked immediately above the first main surface 1A, which is the light-receiving surface of an n-type single crystal silicon substrate 1, and a conductive layer. A p-type amorphous silicon layer 3p doped with impurities as an amorphous layer, a light-receiving surface-side transparent conductive film 5, and a light-receiving surface-side current collecting electrode 7 as a first current collecting electrode are provided. On the back surface side, an i-type amorphous silicon layer 2i is formed as a back surface-side intrinsic semiconductor layer, which is sequentially stacked immediately above the second main surface 1B side, which is the back surface of the n-type single crystal silicon substrate 1, and conductive non-conductive. An n-type amorphous silicon layer 2n doped with impurities as a crystalline layer, a back-side translucent conductive film 4 as a second collector electrode, and a back-side collector electrode 6 are provided. The light receiving surface side collecting electrode 7 formed on the light receiving surface side is also called a bus bar wiring, and has a width only around the entire outer periphery between 1.0 mm from the end of the n-type single crystal silicon substrate 1 constituting the solar battery cell. x. On the other hand, the back-side current collecting electrode 6 is also formed with a width x ′ only around the entire outer periphery between 0.8 mm from the end of the n-type single crystal silicon substrate 1.

  The i-type amorphous silicon layer 3i and the p-type amorphous silicon layer 3p on the light-receiving surface side wrap around from the light-receiving surface side to the back surface side through the gas in the film forming process using the CVD method. It is out. On the other hand, even if attached to the back side i-type amorphous silicon layer 2i and the n-type amorphous silicon layer 2n, they pass from the back side to the light-receiving side. However, since the light-receiving-surface-side collecting electrode 7 is formed on the entire periphery of the outer periphery between 1.0 mm from the end of the n-type single crystal silicon substrate 1 and constitutes a light-shielding region, In the crystalline silicon layer, photoelectric conversion does not occur and an insulating region is formed. For this reason, photoelectric conversion cannot be performed at the end of the cell, and the photoelectric conversion layer of the cell can be substantially electrically separated even if the cell is not physically separated. Therefore, it is not necessary to physically separate the photoelectric conversion layer of the cell, and no margin for separation is required, and the cell can be reduced in size. Moreover, the characteristic fall resulting from the generation | occurrence | production of the leakage current by wraparound of an amorphous silicon layer can be suppressed, without increasing the manufacturing man-hour of a photovoltaic cell.

  3-1 to 3-5 are process cross-sectional views illustrating the manufacturing process of the solar cell, and FIG. 4 is a flowchart illustrating the manufacturing process of the solar cell according to the first embodiment of the present invention.

  In the solar cell of the first embodiment, the entire width of the first main surface 1A of the n-type single crystal silicon substrate 1 is covered, and the peripheral portion of the second main surface 1B is covered through the side surface 1C over a predetermined width, A p-type amorphous silicon layer 3p is formed through the light-receiving surface side i-type amorphous silicon layer 3i. On the other hand, an n-type amorphous silicon layer 2n is formed on the second main surface 1B of the n-type single crystal silicon substrate 1 via an i-type amorphous silicon layer 2i on the back surface side. Then, the light-receiving surface side translucent conductive film 5 formed so as to be in contact with the p-type amorphous silicon layer 3p, and the back-surface side translucent provided so as to be in contact with the n-type amorphous silicon layer 2n. The conductive film 4 is provided.

  Here, an n-type single crystal silicon substrate 1 having a first main surface 1A, a side surface 1C, and a second main surface 1B and having a thickness of 100 to 500 μm is used as a first conductivity type semiconductor substrate. Moreover, as the light-receiving surface side translucent conductive film 5 and the back surface side translucent conductive film 4, an ITO (indium tin oxide) layer is used.

  Next, the manufacturing method of the solar cell of Embodiment 1 will be described according to the flowchart of FIG. Here, as the crystalline semiconductor substrate, an n-type single crystal silicon substrate 1 is prepared as shown in FIG. Since this n-type single crystal silicon substrate 1 is usually cut by slicing an ingot obtained by pulling up, the surface is contaminated with a natural oxide film, structural defects, metal, etc. Yes. Therefore, the n-type single crystal silicon substrate 1 used here is cleaned and damaged layer etched (S1001).

  After cleaning and damage layer etching are performed on the n-type single crystal silicon substrate 1, gettering is performed to remove impurities in the n-type single crystal silicon substrate 1 (S1002). In the gettering step, impurities are segregated in a phosphorus glass layer formed by thermal diffusion of phosphorus at a processing temperature of about 1000 ° C., and the phosphorus glass layer is etched with hydrogen fluoride or the like.

  After gettering, a texture is formed by wet etching using an alkaline solution and an additive for the purpose of reducing light reflection loss on the substrate surface (S1003). Potassium hydroxide, sodium hydroxide or the like is used for the alkaline solution, and isopropyl alcohol or the like is used for the additive. In FIGS. 3-1 to 3-5, the uneven shape is not drawn and is made flat to facilitate understanding of the configuration of the present embodiment.

  After the texture formation, substrate cleaning is performed in order to remove particles, organic matter contamination, and metal contamination on the surface of the n-type single crystal silicon substrate that becomes the heterojunction interface (S1004). For the cleaning, so-called RCA cleaning, SPM cleaning (sulfuric acid hydrogen peroxide cleaning), HPM cleaning (hydrochloric hydrogen peroxide cleaning), DHF cleaning (dilute hydrofluoric acid cleaning), alcohol cleaning, or the like is used.

Here, the RCA cleaning is a method shown below. First, the wafer is put in a dilute hydrofluoric acid aqueous solution (HF) to elute the thin silicon oxide film. At this time, the silicon oxide film is eluted, and at the same time, many foreign substances adhering to the silicon oxide film are also removed. Further, organic substances and particles are removed with ammonia (NH ₄ OH) + hydrogen peroxide (H ₂ O ₂ ). Next, the metals are removed with hydrochloric acid (HC1) + hydrogen peroxide (H ₂ O ₂ ), and finally, finishing is performed with ultrapure water.

After performing substrate cleaning using any of the above-described cleaning methods, in order to form a heterojunction and a pn, nn ⁺ junction, a semiconductor of each conductivity type is sequentially formed on the n-type single crystal silicon substrate 1. Form a layer. The n-type single crystal silicon substrate 1 obtained through the texture forming step and the cleaning step had a thickness of 100 to 500 μm.

  First, as shown in FIG. 3-2, the entire surface of the second main surface 1B of the n-type single crystal silicon substrate 1 is covered, and from the second main surface 1B, the side surface 1C and the peripheral portion of the first main surface 1A Then, a backside amorphous silicon i layer 2i having a thickness of about 1 to 10 nm and an n-type amorphous silicon layer 2n having a thickness of about 5 to 50 nm are deposited in this order using a plasma CVD method (S1005). : Back side intrinsic amorphous semiconductor layer formation, S1006: first conductivity type amorphous semiconductor layer formation). Here, although the back side i-type amorphous silicon layer 2i and the n-type amorphous silicon layer 2n are each amorphous, microcrystalline silicon may be used.

  Subsequently, as shown in FIG. 3C, as the second step, the n-type single crystal silicon substrate 1 on which the i-type amorphous silicon layer 2i and the n-type amorphous silicon layer 2n on the back side are formed is formed. The i-type amorphous silicon layer 3i on the light-receiving surface side having a thickness of about 1 to 10 nm and the p-type amorphous silicon having a thickness of about 5 to 50 nm are formed on the entire main surface 1A of the first layer by plasma CVD. The layers 3p are deposited in this order (S1007: light-receiving surface side intrinsic amorphous semiconductor layer formation, S1008: second conductivity type amorphous semiconductor layer formation). Here, the light-receiving surface side i-type amorphous silicon layer 3i and the p-type amorphous silicon layer 3p are each amorphous, but microcrystalline silicon may also be used.

Subsequently, as shown in FIG. 3-4, an ITO layer is formed as the back surface side light transmitting conductive film 4 (S1009: back side light transmitting conductive film formation) and the light receiving surface side light transparent conductive film 5 is an ITO layer. (S1010: Formation of light-receiving surface side translucent conductive film). A sputtering method or a CVD method is used for forming the ITO layer. Examples of the material of the light-transmitting conductive film include ITO, indium oxide, zinc oxide, SnO _{2 and the} like, but are not limited to these materials.

  And finally, as shown in FIG. 3-5, the second and first main surfaces 1B and 1A are provided with a back-side current collecting electrode 6 and a light-receiving surface-side current collecting electrode 7 made of a light-shielding metal using a mask. It forms over the perimeter so that it may become width 0.8mm and 1mm, respectively from the peripheral part of a board | substrate (S1011: Current collection electrode formation).

  As described above, according to the solar cell of the present embodiment, electrical separation can be performed without forming a physical separation region by forming a light shielding region on the peripheral edge of the substrate. Therefore, the effective area can be maximized and the characteristics can be improved while preventing the leakage current. Moreover, a complicated additional process is not required.

  Although not shown, grid electrodes are formed at predetermined intervals on the first main surface 1A side and the second main surface 1B side of the n-type single crystal silicon substrate 1.

  The width of the bus bar wiring formed on the light-receiving surface side that is the first main surface 1A, that is, the light-shielding light-receiving surface-side collecting electrode 7 is 1 in the region of 1.0 mm or less from the end of the n-type single crystal silicon substrate 1. Since it is formed with a width of 0.0 mm or less and functions as a light-blocking region that blocks light irradiation, it can block light incident on the photoelectric conversion layer in a region where the distance x from the edge of the cell is up to 1.0 mm. The reason why it is formed in the region of 1.0 mm or less is that, in many cases, when the bus bar wiring is formed further inside, the decrease in the short circuit current Isc due to the reduction of the light receiving area exceeds the FF improvement due to the effect of the configuration of the present embodiment, This is because it is difficult to obtain an effect as a characteristic. Also on the back surface side, the back surface side collecting electrode 6 is formed so as to surround the periphery, and light incident on the photoelectric conversion layer in the region of the distance x ′ from the end of the cell can be blocked.

The light-receiving-surface-side collector electrode 7 in the present embodiment prevents the FF from being lowered as a light-shielding region, but functions as a collector electrode that is the original function, and thus is shown in FIGS. 8-1 to 8-3 and FIG. The current collecting electrodes 17s and 16s near the center as in the conventional solar cell are not necessarily required. Therefore, the effect of the present embodiment can be obtained without substantially changing the light receiving area when compared with the four bus bar wiring of the solar cell of this conventional example. Here, FIG. 8A is a plan view schematically showing the main configuration of the light receiving surface side, that is, the first main surface side of the solar cell of the conventional example. FIG. 8-2 is a plan view schematically showing the main configuration of the back side, that is, the second main surface side. FIG. 8C is a cross-sectional view schematically showing the A ₀ -A ₀ cross section of FIGS. 8A and 8B. FIG. 9 is an enlarged cross-sectional view of a main part, and is a view showing an A ₁ -A ₁ cross section of FIGS. 8A and 8B. Other than the collecting electrodes 17s and 16s are the same as those in the above-described embodiment, and thus the description thereof is omitted here.

  Also, the end of the solar cell has an undesired film thickness or film quality with respect to the center of the solar cell, and the conversion efficiency is low due to scratches due to contact with jigs and tools in the manufacturing process. There are many cases. As a result, even if the end portion becomes an ineffective region as a photoelectric conversion region due to light shielding, the decrease in the short-circuit current Isc is smaller than that in the case where the central portion is shielded from light.

  In the conventional solar cell shown in FIGS. 8A to 8C and FIG. 9, four current collecting electrodes 16s and 17s are formed in the vicinity of the central portion of the n-type single crystal silicon substrate 1 in parallel. Yes. In general, the bus bar wiring is arranged to be equal to the cell area according to the number of lines formed. This is because the carriers generated in the photoelectric conversion layer by the incidence of light are collected, so that the distance traveled by the carriers is made as short as possible to suppress resistance loss, and the generated electric power is efficiently extracted.

  The width of the bus bar wiring, that is, the light-shielding current collecting electrodes 16s and 17s is generally 1.0 mm or less. This is because if the thickness is too large, the light receiving area becomes small, and on the other hand, if the thickness is too small, the wiring resistance becomes high. In general, it is often formed with a thickness of about 0.5 to 1.0 mm.

  The number of current collecting electrodes 16s and 17s is determined by calculating an optimum value according to the size of the substrate, the width of the bus bar wiring, the width and number of grid electrodes (also referred to as finger electrodes), the material of the electrodes, and the like. Actually, there are two, three, and four solar cells that are currently on the market due to differences in the design philosophy of each company.

  When the number of conventional current collecting electrodes 16s and 17s is 3 or less, when the current collecting electrode of the present embodiment is applied, the effective area that can be received by the current collecting electrode as the light shielding region in the outer peripheral portion is reduced. The short circuit current Isc decreases. Further, when the current collecting electrode is formed only on the outer periphery, the distance to the current collecting electrode becomes longer, the electric resistance becomes higher, and the fill factor FF is lowered. In the solar cell of the present embodiment, the effect of the present invention can be obtained when the FF improvement due to the wraparound suppression is larger than the decrease in the short circuit current Isc due to the reduction in the light receiving area. The balance between the reduction in Isc and the improvement in FF is determined by factors such as the structure and cell size of the heterojunction solar cell, the number of busbar wires, the width, the material and film quality of the transparent electrode, and the like.

  Next, the amorphous semiconductor layer formed on one side of the semiconductor substrate undesirably wraps around the side or other side of the semiconductor substrate, resulting in a partially connected state, resulting in a decrease in output characteristics. This will be described below. As described in Patent Document 2 described above, when an amorphous semiconductor layer is formed on substantially the entire surface of the substrate, the amorphous semiconductor layer is also formed on the side surface or the other surface of the substrate. As shown in FIG. 2, which is a schematic enlarged cross-sectional view of the end portion (side surface side) of the substrate, an amorphous semiconductor layer is formed. In particular, in the manufacturing process of the present embodiment, since the intrinsic semiconductor layer and the n-type conductivity type semiconductor layer are first formed from the back side of the substrate, the side surface of the substrate, particularly at the edge of the surface, from the outside. As a result, an amorphous silicon pin layer is formed. Power generation as a photovoltaic element usually occurs mainly at the junction of the amorphous silicon pi / n-type crystal semiconductor substrate, and the output can be taken out from the front side and the back side. However, in the comparative solar cells shown in FIGS. 8-1 to 8-3 and FIG. 9, an unusual amorphous pin layer is formed on the side surface and the edge of the surface of the substrate. As a result, the front surface side and the back surface side are connected by an unusual amorphous pin layer, and when light is incident, a photovoltaic force is generated, and the current undesirably flows from the front surface to the back surface. It is considered that the generated electrons and holes disappear at this portion, do not contribute to power generation, and the output characteristics deteriorate.

  At this time, in the present embodiment, since the current collecting electrode is formed at the end of the substrate as a light shielding region that blocks light irradiation, light irradiation to the portion located in the current collecting electrode forming region is hindered. In a solar battery cell, electric charges are generated by light irradiation, so that the conductivity is remarkably reduced in a portion where light irradiation is hindered. As a result, the photoelectric conversion layers on the front surface and the back surface as solar cells are substantially electrically separated. That is, even if the photoelectric conversion layer on the surface of the solar battery cell and the photoelectric conversion layer on the back surface are formed as an unusual amorphous pin layer and physically connected, the photoelectric conversion on the surface of the solar battery cell The photoelectric conversion layer on the back surface and the back surface are substantially electrically separated.

  As described above, in the solar cell of this embodiment, a part of the amorphous semiconductor layer formed on one surface is electrically connected to the side surface or the other surface of the semiconductor substrate undesirably. Even if not physically separated, a partial area from the end of the semiconductor substrate to 1.0 mm so that the collector electrode (bus bar wiring) that blocks light irradiation functions as a light shielding portion Thus, the photoelectric conversion layer of the cell can be substantially electrically separated. Therefore, it is not necessary to physically separate the photoelectric conversion layer of the cell, and it is possible to suppress deterioration in characteristics due to wraparound without increasing the number of manufacturing steps of the solar battery cell.

  Further, in order to electrically separate the front surface and the back surface, for example, as in the conventional example, when forming an amorphous layer, an undesired amorphous material is formed on the side surface of the substrate, particularly at the end portions of the front surface and the back surface. Masking to prevent the formation of a silicon pin layer or other methods such as laser scribing after film formation are generally performed, but for accuracy, the thickness is 1.0 mm or less from the end of the cell. It is difficult to invalidate some areas. On the other hand, in the present invention, since the photoelectric conversion layer of the cell is formed up to the end, there is no problem as described above.

  The current collecting electrode intended for light shielding in the present embodiment is arranged on the light receiving surface side of the solar battery cell, and blocks light irradiation to the photoelectric conversion layer. Since the heterojunction solar battery cell of this embodiment can generate power from both sides, the effect of the present invention can be obtained by forming a bus bar wiring on the back side for the purpose of light shielding. The amount of power generation on the back surface side is smaller than that on the light receiving surface side, and sufficient effects of the present invention cannot be obtained. Therefore, in the above embodiment, the light receiving surface side collecting electrode 7 is slightly wider than the back side collecting electrode 6, but the width of the back side collecting electrode may be appropriately selected, and the entire surface It does not have to be formed at the periphery. In consideration of light wraparound, it is desirable to form the back surface side collecting electrode 6 on the peripheral portion on the back surface side.

  Next, the thickness of the light receiving surface side collecting electrode 7 and the back surface side collecting electrode 6 is not particularly limited as long as at least part of the light irradiation to the photoelectric conversion layer can be blocked. It is appropriately selected according to the function of the bus bar wiring.

  The width of the light-receiving surface side collecting electrode 7 is usually 1.0 mm or less. Therefore, it is not particularly limited as long as it is 1.0 mm or less, and is appropriately set mainly according to the current collecting function as the light receiving surface side current collecting electrode 7, preferably 0.3 mm or more and 1.0 mm or less. is there. In general, if the width of the light receiving surface side current collecting electrode 7 is less than 0.3 mm, the resistance in the light receiving surface side current collecting electrode 7 is increased, and the light receiving surface side current collecting electrode 7 on the light receiving surface side current collecting electrode 7 is modularized. This is not suitable because the resistance of the lead connected to the electrode becomes high, and if it exceeds 1 mm, the resistance in the light receiving surface side collecting electrode 7 can be reduced to a negligible level. This is not suitable because it causes a reduction in Isc of the element.

  In addition, if the light receiving surface side collector electrode 7 is formed in a region on the center side of the substrate that is 1.0 mm or more away from the edge of the substrate, power is generated by the photoelectric conversion layer from the substrate end to the light receiving surface side collector electrode 7. Therefore, the effect of the present embodiment cannot be sufficiently obtained.

  Since it is better that the light receiving surface side collecting electrode 7 and the back surface side collecting electrode 6 are not likely to be electrically connected to the first main surface and the second main surface, the end of the substrate (first main surface) It is preferable that they are not formed in the thickness direction of the surface and the second main surface.

  The light receiving surface side collecting electrode 7 and the back surface collecting electrode 6 of the present invention need only have a sufficient light shielding property, and a general light receiving surface side collecting electrode 7 and a back surface collecting electrode. A highly conductive metal such as silver or copper, which is the material of No. 6, is preferable.

Embodiment 2. FIG.
Next, a second embodiment of the present invention will be described. In the present embodiment, with respect to the light receiving surface side collecting electrode 7 and the back surface collecting electrode 6 on the outer periphery of the substrate in the first embodiment, the light receiving surface side collecting electrode 7s is located near the center of the substrate as in the conventional example. , A back side collecting electrode 6s is additionally formed. The conductive electrode bus bar wiring, that is, the light receiving surface side current collecting electrode 7s and the back surface side current collecting electrode 6s formed in the vicinity of the central portion are current collecting electrodes that function as original bus bar wiring. Here, FIG. 5-1 is a plan view schematically showing a main configuration of the light receiving surface side, that is, the first main surface side of the solar cell of the second embodiment. FIG. 5B is a plan view schematically showing the main configuration of the back side, that is, the second main surface side. FIG. 5C is a cross-sectional view schematically showing an A ₀ -A ₀ cross section of FIG. Other than the collecting electrodes 16, 17, 16s, and 17s are the same as those in the above embodiment, and the description thereof is omitted here.

  According to such a configuration, the light receiving surface side collecting electrode 6s and the back surface side collecting electrode 7s are added to the first embodiment, and the distance traveled by the carriers generated in the photoelectric conversion layer due to the incidence of light. Therefore, since the carrier path is shortened and the resistance can be reduced electrically, the characteristics can be improved.

  However, since the light receiving surface side collecting electrode 6s is added and the light receiving area is reduced, the characteristics are deteriorated. Therefore, the additional number and width of the bus bar wiring near the central portion are determined by balance with the characteristic improvement. There is a need. Furthermore, since the characteristic improvement depends on the area of the bus bar formed at the end, it depends on the size of the substrate and the shape of the substrate used (square, pseudo-square, rectangle, circle, etc.) Different.

Embodiment 3 FIG.
A third embodiment of the present invention will be described with reference to FIGS. In the present embodiment, in addition to the light receiving surface side current collecting electrode 7s and the back surface side current collecting electrode 6s similar to the conventional example, the light receiving surface side current collecting electrode 7a and the back surface side current collecting electrode are provided only at a part of the outer peripheral portion of the end. An electrode 6a is additionally formed. Here, FIG. 6A is a plan view schematically showing a main configuration of the light receiving surface side, that is, the first main surface side of the solar cell of the third embodiment. FIG. 6B is a plan view schematically illustrating the main configuration of the back surface side, that is, the second main surface side. Other than the light receiving surface side collecting electrodes 7a and 7s and the back surface side collecting electrodes 6a and 6s are the same as those in the above embodiment, and the description thereof is omitted here.

  For the solar cell of Embodiment 3 shown in FIGS. 6-1 and 6-2, although suppression of characteristic deterioration due to an amorphous semiconductor layer undesirably wrapping around at an end is insufficient, some Since the light receiving surface side collecting electrode 7a and the back side collecting electrode 6a are shielded from light, a part of characteristic deterioration can be suppressed. In addition, since the amount of electrode material used is small because it is not formed around the entire periphery, the material cost can be reduced. The material used for the electrode is mainly based on silver and is very expensive, so the reduction effect is not small.

Embodiment 4 FIG.
In the present embodiment, solar cell module 100 in which solar cells 10 are arranged in a matrix of 3 rows and 4 columns will be described. FIG. 7 is a plan view of the solar cell module. In FIG. 7, since the back sheet 8 is translucent, the lower solar cell 10 is seen as it is. In the present embodiment, the solar battery cells 10 are connected by an interconnector 19 in a matrix of 3 rows and 4 columns. Each of the solar cells 10 is the same as that described in the third embodiment, and the light receiving surface side collecting electrode 7 is provided so as to surround the outer peripheral edge over two sides, and the outer edge becomes a light shielding region. ing.

When manufacturing, first, the solar cells 10 are connected to each other by the interconnector 19. A low melting point solder or the like is used to connect the interconnector 19. Next, a surface sheet (not shown) made of a glass plate, a sealing resin (not shown), the solar cells 10 connected to each other by the interconnector 19, and the sealing resin are sequentially stacked and heated in a vacuum. The sealing process to press is performed. The sealing resin melts and fills a gap between the light-receiving surface-side topsheet and the back-side backsheet 8 to fix the solar cells 10. In this way, the solar cell module 100 is completed. This figure shows a state in which the top sheet is removed for easy understanding. About the photovoltaic cell 10, the current collection electrode structure of the said Embodiment 3 shown to FIGS. 6-1 and 6-2 is taken.

  At this time, since there are no adjacent cells on the outer peripheral side US, RS, DS, LS of this solar cell module, there is no fear of short circuit even if the collecting electrode is formed to the end, but the outer peripheral side US, RS, DS , LS are arranged so that the sides facing the adjacent cells are partially discontinuous. Further, a structure without a collecting electrode may be employed, and it is desirable that the side facing the adjacent cell has a short-circuit preventing structure. Although the suppression of the characteristic deterioration due to the amorphous semiconductor layer undesirably wrapping around the end is insufficient, the substrate 2 side is shielded by the light-receiving surface side collecting electrode 7, so the characteristic deterioration is partially suppressed it can. In addition, since the light receiving surface side collecting electrode 7 and the back surface side collecting electrode 6 are arranged in parallel to the central portion of the substrate, existing equipment that is usually widely used when connecting a plurality of cells at the time of module fabrication is used. Since it can be used, it is not necessary to make a new capital investment.

  As described above, of the first and second collector electrodes, the collector electrode located on the light receiving surface side only needs to be formed along the outer periphery of the semiconductor substrate. The first collector electrode may not be present at all (discontinuous) on the side where adjacent solar cells exist, but the first collector electrode is partially present and has a discontinuous portion. It may be.

  In the above-described embodiment, an example using a single crystal silicon substrate has been described. However, the present invention is not limited to this and can be applied to other crystal semiconductor substrates such as SiC.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

  As described above, the solar cell according to the present invention and the solar cell module using the solar cell have excellent condensing efficiency, and in particular, the sun installed in a place where it is difficult to use a condensing auxiliary material such as a reflector. Suitable for battery modules.

1 n-type single crystal silicon substrate, 2i i-type amorphous silicon layer, 2n n-type amorphous silicon layer, 3i i-type amorphous silicon layer, 3pp p-type amorphous silicon layer, 4 back side translucency Conductive film 5, light-receiving surface side light-transmitting conductive film, 6 back surface side current collecting electrode, 7 light receiving surface side current collecting electrode, 8 back surface sheet.

Claims (5)

A crystalline semiconductor substrate having a first conductivity type;
An amorphous semiconductor layer of a second conductivity type different from the first conductivity type formed by wrapping from the first main surface of the semiconductor substrate to the side surface of the semiconductor substrate;
A translucent conductive film formed on the amorphous semiconductor layer of the second conductivity type;
A first collector electrode formed on the translucent conductive film;
A second collector electrode formed on the second main surface side of the semiconductor substrate,
Of the first and second current collecting electrodes, a current collecting electrode located on the light receiving surface side is formed over the entire outer periphery along the outer periphery of the semiconductor substrate, and the second conductive type amorphous semiconductor layer A solar cell having a region shielded from light around the entire periphery of the outer periphery and electrically separated . The second conductive type amorphous semiconductor layer is formed on the semiconductor substrate via an intrinsic semiconductor layer,
A first conductive type semiconductor layer and a conductive thin film are formed on the second main surface side of the semiconductor substrate via an intrinsic semiconductor layer,
The collector electrode located in the light-receiving surface side among the said 1st and 2nd collector electrodes is formed between 1.0 mm from the edge of a photovoltaic cell, It is characterized by the above-mentioned. Solar cells.   The solar cell according to claim 1, wherein the semiconductor substrate has a rectangular shape with a rectangular shape or a corner portion removed.   4. The solar cell according to claim 1, wherein the current collecting electrode has a width of 0.3 mm or more and 1 mm or less. A crystalline semiconductor substrate having a first conductivity type;
An amorphous semiconductor layer of a second conductivity type different from the first conductivity type formed by wrapping from the first main surface of the semiconductor substrate to the side surface of the semiconductor substrate;
A translucent conductive film formed on the amorphous semiconductor layer of the second conductivity type;
A first collector electrode formed on the translucent conductive film;
A second collector electrode formed on the second main surface side of the semiconductor substrate,
Of the first and second current collecting electrodes, a current collecting electrode located on the light receiving surface side is formed over the entire outer periphery along the outer periphery of the semiconductor substrate, and the second conductive type amorphous semiconductor layer and the solar cell but which are electrically isolated has a light shielding region over the outer periphery all around,
Solar cell modules connected via the interconnector by arranging a plurality of the solar cell.

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