JP5970806B2 - Insulated gate type semiconductor device manufacturing method - Google Patents

Description

  The present invention relates to a method for manufacturing an insulated gate semiconductor device used for a power converter and the like, and more particularly, to a method for forming an isolation diffusion layer and a manufacturing method for a dicing process in a reverse blocking device having bidirectional breakdown characteristics. .

  In a reverse blocking type semiconductor device, a reverse blocking capability equivalent to the forward blocking capability is required. This reverse-blocking semiconductor device is different from a device that originally has both a forward breakdown voltage junction and a reverse breakdown voltage junction, such as a device represented by an IGBT (insulated gate bipolar transistor). Is the name given because it was not easy to guarantee the reliability of the breakdown voltage characteristics of both forward and reverse junctions at the same time. In the following description, reverse blocking and reverse breakdown voltage are treated as synonyms. When the IGBT is used as a switching element or the like in an AC circuit, the reverse breakdown voltage is configured to be borne by a separate diode connected in series to the switching element. Therefore, since the switching element only needs to have the reliability of the forward breakdown voltage characteristics, the device design that makes the reliability of the reverse breakdown voltage junction effective is omitted, and the switching element is manufactured by a method of giving priority to cost reduction. However, in order to omit the reverse breakdown voltage diode as a cost reduction item from the circuit side, there has been a demand for a reverse blocking IGBT having high reliability in reverse breakdown voltage (reverse blocking voltage) of the IGBT.

  As such a reverse blocking type insulated gate semiconductor device, for example, there is a reverse blocking IGBT shown in the end cross-sectional view of the semiconductor substrate in FIG. In this reverse blocking IGBT, in order to make the reverse blocking (reverse breakdown voltage) capability highly reliable, the reverse blocking pn junction 20 in the vicinity of the back surface side of the semiconductor substrate 1 is extended to the front surface side, and the reverse blocking junction is provided. The end face is protected by an insulating film on the same surface side as the joint end face for forward blocking. A diffusion layer necessary for forming the pn junction 21 for extending the pn junction 20 to the surface is a p-type diffusion separation layer 22 formed with a depth that substantially spans between both main surfaces of the semiconductor substrate. .

However, since such deep diffusion is accompanied by high-temperature and long-time diffusion, it is known that the breakdown voltage characteristic is more likely to deteriorate as the breakdown voltage becomes higher. Of the device structure described in the reverse blocking IGBT of FIG. Reference numeral 3 denotes a p base region, 4 denotes an n ⁺ emitter region, 5 denotes a gate insulating film, 6 denotes a gate electrode, 7 denotes an interlayer insulating film, 8 denotes a guard ring, 9 denotes a field plate, and 10 denotes a field insulating film ( Patent documents 1, 2, 3).

  Further, as shown in FIG. 6, there is also known a method of forming the p-type separation diffusion layer 22b without diffusing at a high temperature for a long time by ion implantation and laser annealing on a cut surface 21a divided by a dicing blade (see FIG. 6). Patent Document 1).

  Furthermore, as a different method for avoiding the above-mentioned high-temperature and long-time diffusion, as shown in the cross-sectional view of the IGBT of FIG. 7, the p-type isolation diffusion layer 22b is an inclined surface 23 made of (111) plane formed by alkali etching. A method is also known in which a high temperature and long time diffusion without diffusion is performed by boron ion implantation (Patent Document 3). Further, there is a description that after a diffusion separation layer is formed on the inclined surface of the alkali etching groove formed from the surface side, dicing is performed by laser irradiation to the bottom of the etching groove (Patent Document 2).

JP 2009-177039 A (paragraphs 0024 to 0027, FIGS. 7 and 1) JP 2006-156926 A (0043 paragraph, 0096 paragraph, FIG. 26) JP 2006-303410 A (paragraph 0044)

  However, as described in Patent Document 1, the dicing tape 25 is attached to the back surface side of the semiconductor substrate shown in FIG. 3, and the semiconductor substrate 1 is divided into chips by blade dicing (not shown) from the front surface side of the substrate 1. In this case, the crack 30 or the chipping 31 often enters the cut surface 21a at a depth of several tens of micrometers simultaneously with dicing. Therefore, in order not to generate a leak current due to the cracks 30 and the chipping 31, impurities are distributed or diffused to a depth greater than the maximum depth of the cracks 30 and the chipping 31 in the entire area of the dicing surface. To separate the diffusion layer 22c. However, it is very difficult to precisely control and distribute or diffuse impurities to a depth of 10 μm or more on the dicing cut surface 21a containing a large amount of cracks 30 due to dicing, and it is difficult to adopt as a mass production process. It is.

  Further, as described in Patent Documents 2 and 3 described above, in the process of forming a groove having a (111) plane from the back surface side of the semiconductor substrate by wet alkali etching with different etching rates due to crystal orientation differences, A damage-free tilted crystal plane without chipping can be obtained. For example, as shown in FIG. 2, when the etching groove 27 is formed in the semiconductor substrate having the crystal plane (100) as the main surface, the semiconductor functional region is formed on the front surface side, and then from the back surface side to the (100) surface. A concave groove 27 having an inclined surface 23 made of a (111) surface inclined by 125 ° is formed by alkali etching. Further, after the separation diffusion layer 22b is formed along the inclined surface 23 formed of the (111) surface as shown in FIGS. 2A, 2B, and 2C, the dicing tape 25 is attached to the back surface side. Then, a step of cutting the bottom portion 26 of the groove 27 from the front surface side with a dicing blade (not shown) and dividing it into chips is performed. However, at the time of high-speed cutting with this dicing blade, the substrate of the groove bottom portion 26 is thin and low in strength, so that many chippings 31 (small chips and cracks) are likely to occur. In addition, the tip of the generated chipping 31 often enters the interior in the vicinity of the separation diffusion layer 22b and further beyond the separation diffusion layer 22b, which tends to cause an increase in leakage current and a decrease in breakdown voltage. There is.

  The present invention has been made in consideration of the points described above. An object of the present invention is to use an etching groove to form a separation diffusion layer for extending the junction end face of the reverse pressure bonding to the surface, and then chipping even if the thin plate portion at the bottom of the etching groove is diced at high speed. It is an object of the present invention to provide a method for manufacturing an insulated gate semiconductor device capable of suppressing generation of defects and reducing electrical characteristic defects.

In order to achieve the object of the present invention, a forward breakdown voltage junction formed by a p-type base region provided on one main surface side of an n-type semiconductor substrate and a p-type collector layer provided on the other main surface side The p-type base of the one main surface is disposed to protect the end surface of the forward withstand voltage junction and both end surfaces of the reverse withstand voltage junction on one main surface. A p-type semiconductor region formed inside the semiconductor substrate from the outer peripheral surface of the pressure-resistant structure surrounding the region, and an etching groove formed from the other main surface to a depth reaching the bottom of the p-type semiconductor region; is formed along the inclined plane formed by the etching trench, a semiconductor substrate having a p-type isolation diffusion layer connected to the p-type collector layer, a tape that transmits a laser beam on the main surface side of said one After pasting, the etching groove Bottom laser irradiation from said one main surface side of the substrate, a method for manufacturing an insulated gate semiconductor device of chip divided by a wall opening of a starting point of cracks generated by the laser irradiation. More preferably, the inclined surface is a crystal surface formed by alkali etching . Before SL laser irradiation, a laser radiation having a wavelength greater than 1.0 .mu.m, it is preferable to focus on the internal board of 5 to 50μm from the bottom of the etching groove. Before Stories and more preferably focus from the bottom into the substrate 10 to 30μm in the etching groove. Further, it is more preferable that the one main surface and the other main surface are (100) surfaces, and the inclined surface formed by the etching groove is a (111) surface.

  According to the present invention, the etching groove is used to form the separation diffusion layer for extending the junction end face of the reverse pressure bonding to the surface, and then chipping even if the thin plate portion at the bottom of the etching groove is diced at high speed. Therefore, it is possible to provide a method for manufacturing an insulated gate semiconductor device capable of suppressing the occurrence of defects and reducing electrical characteristic defects.

It is sectional drawing of the wafer immediately after the laser dicing process concerning this invention. 1A is a plan view showing an etching pattern of a semiconductor substrate, FIG. 2A is a cross-sectional view taken along line A-A ′ in FIG. 1A, and FIG. 3C is a cross-sectional view of a wafer immediately after a dicing process as a final wafer process. It is principal part sectional drawing of the semiconductor substrate when irradiating the laser shown in Example 1-7 and Comparative Example 1-4, or when performing blade dicing. It is a stereo projection figure of the semiconductor substrate which makes (100) plane the main surface concerning this invention. It is the edge part sectional drawing of IGBT which has the isolation | separation diffused layer formed by the conventional high temperature long time thermal diffusion. It is the edge part sectional drawing of conventional IGBT by which the isolation | separation diffused layer was formed in the surface by which the dicing cut was carried out perpendicular | vertical to the main surface. It is sectional drawing of conventional IGBT by which the isolation | separation diffused layer was formed in the inclined surface divided | segmented by the alkali etching from the back surface. It is a related figure of the wavelength and the transmittance | permeability of the laser beam irradiated to a silicon substrate.

  Embodiments of an insulated gate semiconductor device and a manufacturing method thereof according to the present invention will be described below in detail with reference to the drawings. In the present specification and the accompanying drawings, it means that electrons or holes are majority carriers in layers and regions with n or p, respectively. Further, the following description will be given with one main surface of the semiconductor substrate as the front surface and the other main surface of the semiconductor substrate as the back surface. In the following description of the embodiments and the accompanying drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted. The present invention is not limited to the description of the examples described below unless it exceeds the gist.

  Since a method for producing a semiconductor diffusion region, a gate insulating film, an electrode film, and the like, which are semiconductor functional regions of the insulated gate semiconductor device according to the present invention, is the same as the conventional method, detailed description thereof will be omitted. In the following description, a method for forming a semiconductor substrate as a characteristic part of the present invention will be mainly described.

  In the case of a single crystal brittle material such as Si (silicon semiconductor), generally, when the wall is opened along the crystal plane, a clean and less affected surface such as chipping is obtained. On the other hand, as can be seen from the stereo projection view of the (100) plane of the semiconductor substrate shown in FIG. 4, the cut surface for forming the chip into a rectangle is the (110) plane parallel to the (111) side wall surface. The opening of the wall at the (110) plane can be used for cutting for chip formation. Further, since the substrate of the etching groove bottom portion 26 having the (111) side wall surface is thinned, it is relatively easy to open the wall at the thin plate. Therefore, if a crack that triggers the opening of the wall can be made with high positional accuracy on the substrate surface or inside the substrate of the etching groove bottom 26, the wall can be easily obtained by extending the tape attached to the substrate thereafter. Can be opened and chipped.

  On the other hand, as shown in FIG. 8, the relationship between the wavelength of the laser beam and the transmittance with respect to the silicon semiconductor substrate (silicon substrate) is absorbed almost without transmission at a wavelength of 1.0 μm or less, and the transmittance is about 1.1 μm at the wavelength. It can be seen that the transmittance is about 15% at 10%, the wavelength of 1.2 μm, and the transmittance is about 20% at the wavelength of 1.5 μm. That is, in the case of laser irradiation with a wavelength of 1.0 μm or less, in order to minimize the occurrence of cracks other than the cracks used for opening the walls by minimizing the damage caused by the laser beam to the inside of the silicon substrate, the focal point is set. It is preferable to set it on the substrate surface. In laser irradiation with a wavelength exceeding 1.0 μm, the focal point is preferably set within a silicon substrate having a depth of 50 μm or less, preferably 30 μm or less, from the bottom of the etching groove on the back side to the inside of the substrate. The laser dicing method using the above-described two types of laser irradiation will be described below.

In the case of laser irradiation with a wavelength of 1.0 μm or less (first method), after forming a semiconductor functional region including the etching groove 27 on the semiconductor substrate, as shown in FIG. The tape 25 is affixed to the back side. Thereafter, a laser beam having a wavelength of 1.0 μm or less is irradiated from the substrate surface side. At that time, the focal point of the laser irradiation is set on the surface of the semiconductor substrate, and the scribe line 50 (FIG. 2) is scanned. In the case of this first method, the second harmonic (532 nm) of the YAG laser, the excimer laser, or the semiconductor laser is used as the laser beam, and a delay time of 0 to 5,000 nsec is provided, and the intensity is 2 Dicing is preferably performed at a rate of 0.0 J / cm ² or more. By this method, a crack is formed without adversely affecting the semiconductor characteristics, and a chip can be formed.

In the case of laser irradiation with a wavelength exceeding 1.0 μm (second method), after forming a semiconductor functional region including an etching groove 27 on the semiconductor substrate, as shown in FIG. A tape 25 that transmits laser light having a wavelength exceeding 1.0 μm is attached. Next, a laser beam having a wavelength exceeding 1.0 μm is irradiated from the surface side through the tape 25. At that time, the focal point of laser irradiation is set within a range of 5 to 50 μm from the bottom of the etching groove to the inside of the substrate, and scanning is performed on the scribe line 50 (FIG. 2). In the case of this second method, as the laser light, a YAG laser having a high transmittance with respect to the silicon substrate is used in the infrared wavelength range such as 1.064 μm, 1.320 μm, 1.44 μm, and 0 to 5,000 nsec. It is preferable to dice by providing a delay time and setting the strength to 2.0 J / cm ² or more. Even with this method, cracks are formed without adversely affecting the semiconductor characteristics, and a chip can be formed. In this case, since the focal point of laser irradiation is inside the substrate and is highly permeable to the tape, the tape maintains the substrate holding ability without being cut by heat.

  Cracks generated at the focal point by the laser irradiation of these first and second methods are propagated only in the direction perpendicular to the semiconductor substrate to open the walls, and the semiconductor substrate is divided into semiconductor chips. This division method will be described in more detail. After opening the wall due to the progress of the cracks described above, the semiconductor substrate that has been kept from falling apart by the attached tape 25 is separated and divided as a semiconductor chip by uniformly stretching the tape from the center toward all directions of the outer periphery. Can be made.

  Furthermore, as a different chip formation method, after laser irradiation, cracks are applied by applying physical stimulation such as applying ultrasonic waves to the semiconductor substrate and hitting the laser irradiation part with a jig made of a metal material such as stainless steel or Al. There are also ways to make progress. However, in the chip formation according to the present invention, the substrate thickness at the bottom of the etching groove of the laser irradiation part is etched, and the thickness before etching is reduced from about 200 μm to several tens μm to 100 μm, so that physical stimulation is applied. On the contrary, new chipping may occur. Therefore, when applying a physical stimulus, it is necessary to pay close attention to the magnitude of the stimulus.

  In addition, since the refractive index of light in the infrared region is as large as about 3.5, a Si semiconductor not only requires a lens with a large NA (numerical aperture) value to focus on laser irradiation. It is necessary to reduce the distance between the lens and the substrate. For this purpose, it is preferable to perform laser irradiation from the surface side of the semiconductor substrate having a small distance between the lens and the substrate. By doing so, the distance passing through the Si semiconductor substrate having a high refractive index is shortened and the focal point can be narrowed down to a more accurate position, so that cracks are stably generated and the position in the depth direction can be easily stabilized. it can.

  Hereinafter, with respect to the method for manufacturing an insulated gate semiconductor device according to the present invention, an experiment in which conditions are changed particularly with respect to the dicing method will be described, and results evaluated as examples and comparative examples according to the present invention will be described.

  The examples and comparative examples according to the present invention were evaluated using reverse blocking IGBTs. A semiconductor substrate having a total thickness of 200 μm was used as an input wafer for manufacturing the reverse blocking IGBT. As shown in the cross-sectional view of FIG. 1, at the end of the wafer process, the reverse blocking IGBT used in this example and the comparative example has a substrate thickness of about 100 μm at the bottom of the groove 27 of the semiconductor substrate by alkali etching. Experiments were conducted to change the conditions such as dicing type, laser wavelength, focal position of laser irradiation, dicing speed, etc., in order to form a wafer after the reverse blocking IGBT process. In each column of Examples 1 to 7 and Comparative Examples 1 to 4 in Table 1 below, the contents of the condition change and the evaluation results (non-defective product rate) are described. The non-defective product ratio indicates the ratio of non-defective products obtained by subtracting the pressure resistance and the appearance defect from 200 chips obtained by laser irradiation dicing. A non-defective product ratio of 95% or more is suitable as a production method employed for mass production.

From the tests shown in Table 1, in Examples 1 and 2 in which the other conditions were the same and only the dicing speed was changed, both non-defective product rates were 95% or more, which was considered to be sufficient as a process adopted for mass production. In Example 2, the dicing rate was 100 mm / sec. To 250 mm / sec. This is preferable because high production efficiency can be obtained. In Examples 3 to 6, the dicing speed was 100 mm / sec. The laser irradiation is performed by laser irradiation from the front side under the condition that the focal point of laser irradiation is a deep position in the range of 6 μm to 40 μm from the groove bottom side (back side) to the inside of the substrate. These experimental results all have a non-defective product ratio of 95% or more, but indicate that the non-defective product ratio is the highest and preferable especially when the focal point is 25 μm from the back surface side. In Example 7, the focal point was fixed to the aforementioned 25 μm, and the dicing speed was 250 mm / sec. This is a high condition. As a result, the laser dicing speed of Example 7 was 100 mm / sec. From 250 mm / sec. This shows that the yield rate is 4% higher. If production efficiency is prioritized, the conditions of Example 7 are advantageous.

  On the other hand, Comparative Example 1 and Comparative Example 2 are blade dicing rather than laser irradiation. In this blade dicing, there were many chippings, many withstand pressure defects and defective appearances, and the yield rate was 92% and 53%. In particular, the cutting speed is 100 mm / sec. To 250 mm / sec. The tendency to increase the number of defects due to the effect was noticeable. It can be seen that in the laser dicing of Examples 1 to 7, no significant deterioration of the yield rate is observed even if the speed is increased.

  However, as in Comparative Examples 3 and 4, even when laser irradiation with a wavelength of 1064 nm is used for dicing, from the vicinity of the outermost surface of the groove bottom portion of the semiconductor substrate or a deep position (back surface side (hollow portion side) 2 μm, or from the groove bottom portion When focusing on a depth of 70 μm, damage to the surface of the semiconductor substrate occurred and the appearance defect tended to increase. This is probably because the appearance defect increases when the length of crack propagation from the crack generation position to the substrate surface or back surface is long.

  From Table 1 as a whole, it is understood that the focal position is preferably in the range of 5 to 50 μm from the bottom of the etching groove to the inside of the substrate, and more preferably in the range of 10 to 30 μm.

  The present invention is not limited to reverse-blocking IGBTs, but also applies to other reverse-blocking devices, bidirectional devices, or insulated gate semiconductor devices such as MOSFETs, bipolar transistors, and MOS-type thyristors that involve the formation of isolation diffusion layers. it can.

  According to the method of manufacturing an insulated gate semiconductor device including the step of forming the separation diffusion layer and the step of dividing the semiconductor substrate by laser irradiation as described in the above embodiments, a laser that hardly generates cracks extending in the direction across the junction. Since dicing can be performed, a reverse blocking capability with high withstand voltage and high reliability is possible, and a reverse blocking IGBT excellent in mass productivity can be realized at low cost.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Collector layer 3 p base layer 4 n emitter layer 5 Gate insulating film 6 Gate electrode 7 Interlayer insulating film 8 Guard ring 9 Field plate 10 Field insulating film 20 Collector junction, reverse withstand voltage junction 21 Cut surface 22 Separation diffusion layer 23 Inclined surface 25 Adhesive tape, dicing tape 26 Groove bottom 27 Groove 30 Crack 31 Chipping 50 Scribe line

Claims (5)

A forward breakdown voltage junction formed by a second conductivity type base region provided on one main surface side of the first conductivity type semiconductor substrate and a reverse formed by a second conductivity type collector layer provided on the other main surface side. In order to arrange and protect the both end faces of the forward withstand voltage junction and the reverse withstand voltage junction on one main surface, the withstand voltage structure surrounding the second conductivity type base region of the one main surface A second conductivity type semiconductor region formed inside the semiconductor substrate from the outer surface of the portion, an etching groove formed from the other main surface to a depth reaching the bottom of the p-type semiconductor region, and the etching groove is formed along the inclined plane formed, a semiconductor substrate having a second conductivity type isolation diffusion layer connected to the second conductivity type collector layer, a tape that transmits a laser beam on the main surface side of said one After pasting, the etching groove Bottom laser irradiation from said one main surface side of the substrate, method of manufacturing the insulated gate semiconductor device characterized by dividing into chips by a cleavage originating from the cracks generated by the laser irradiation. 2. The method of manufacturing an insulated gate semiconductor device according to claim 1, wherein the inclined surface is a crystal surface formed by alkali etching. Before SL laser irradiation, a laser radiation having a wavelength greater than 1.0 .mu.m, the insulated gate semiconductor device of claim 1, wherein the focus inside the substrate of 5 to 50μm from the bottom of the etching groove Manufacturing method. 4. The method of manufacturing an insulated gate semiconductor device according to claim 3, wherein focusing is performed on the inside of the substrate having a thickness of 10 to 30 [mu] m from the bottom of the etching groove. 3. The insulated gate semiconductor device according to claim 2, wherein the one main surface and the other main surface are (100) surfaces, and an inclined surface formed by the etching groove is a (111) surface. Manufacturing method.