JP2006059876A - Manufacturing method of semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To highly precisely activate an impurity layer by laser irradiation. <P>SOLUTION: When the impurity layer is activated, the impurity layer is scanned by irradiating it with a laser beam of irradiation energy density of capacity that can activate the impurity layer. An impurity concentration profile hardly changes in a region with which the laser beam is once irradiated even if a part or a whole part is irradiated with the laser beam of same irradiation energy density. Thus, the respective irradiation regions are sufficiently activated irrespective of whether the respective regions are overlapped and are irradiated with the laser beam or not. The impurity layer in the region with which the laser beam is to be irradiated can be activated by avoiding the region with which the laser beam is not to be irradiated. Thus, the semiconductor element having the region with which the laser beam is to be irradiated and the region with which the laser beam is not to be irradiated can be formed with a sufficient device characteristic. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device such as an IC (Integrated Circuit), a MOS (Metal Oxide Semiconductor), an insulated gate bipolar transistor (IGBT).

  In recent years, an IC in which a large number of transistors, resistors, and the like are connected so as to form an electric circuit and integrated on one chip is frequently used in important parts of computers and communication devices. Among such ICs, those including power semiconductor elements are called power ICs.

  The IGBT is a power element having high-speed switching of a MOSFET, voltage drive characteristics, and low on-voltage characteristics of a bipolar transistor. IGBTs have been increasingly applied to industrial fields such as general-purpose inverters, AC servos, uninterruptible power supplies (UPS), and switching power supplies, as well as consumer devices such as microwave ovens, rice cookers, and strobes. Development for the next generation is also progressing, and the development of lower on-voltage IGBTs using a new chip structure has led to lower loss and higher efficiency of application devices.

  The IGBT structure mainly includes a punch through (PT) type, a non punch through (NPT) type, a field stop (FS) type, and the like. Most IGBTs currently mass-produced have an n-channel vertical double diffusion structure except for a p-channel type for some audio power amplifiers. In the following, unless otherwise indicated, the IGBT is an n-type IGBT.

PT-type IGBT has a structure in which an n ⁺ layer (n buffer layer) is provided between a p ⁺ epitaxial substrate and an n ⁻ layer (n type active layer), and a depletion layer in the n type active layer reaches the n buffer layer It is the basic structure of the mainstream in IGBT. However, for example, a thickness of about 70 μm is sufficient for an IGBT having a withstand voltage of 600 V, but the total thickness is about 200 μm to 300 μm when the p ⁺ epitaxial substrate portion is included. Therefore, an NPT type IGBT in which a shallow p ⁺ collector layer having a low dose is formed by using an FZ substrate formed by an FZ (Floating Zone) method without using an epitaxial substrate to achieve a reduction in thickness and cost. FS type IGBT has been developed.

FIG. 12 is an example of a cross-sectional structure of an NPT type IGBT.
An NPT type IGBT 100 shown in FIG. 12 has a gate electrode 103 made of polysilicon or the like formed on a surface side of an n ⁻ type FZ substrate (FZ-N substrate) 101 via a gate oxide film 102 made of SiO ₂ or the like. A surface electrode 105 such as an aluminum / silicon film is formed thereon via an interlayer insulating film 104 such as BPSG (Boro-Phospho Silicate Glass). A p ⁺ base layer 106 and an n ⁺ emitter layer 107 are formed in the p ⁺ base layer 106 on the front side of the FZ-N substrate 101, and a p ⁺ collector layer on the back side of the FZ-N substrate 101. 108 is formed, and several kinds of metal films are laminated thereon to form a back electrode 109.

In the NPT type IGBT 100 having such a configuration, a shallow low implantation p ⁺ collector with a low dose is used for the p ⁺ collector layer 108. In this NPT type IGBT 100, since a p ⁺ epitaxial substrate is not used, the total thickness is significantly thinner than that of the PT type IGBT.

In the NPT structure, since the hole injection rate can be controlled, high-speed switching is possible without performing lifetime control. On the other hand, the ON voltage depends on the thickness and specific resistance of the n-type active layer. Become. Since the FZ substrate is used instead of the p ⁺ epitaxial substrate, the cost of the chip can be reduced.

FIG. 13 is an example of a cross-sectional structure of an FS type IGBT. However, in FIG. 13, the same elements as those shown in FIG. 12 are denoted by the same reference numerals, and detailed description thereof is omitted.
In the FS type IGBT 200 shown in FIG. 13, the FZ-N substrate 101 is used instead of the p ⁺ epitaxial substrate as in the case of the NPT type IGBT 100, and the total thickness is about 100 μm to 200 μm. As with the PT-type IGBT, the n-type active layer is depleted by setting it to about 70 μm according to the 600V breakdown voltage. Therefore, in the FS type IGBT 200, an n ⁺ layer (n buffer layer) 201 is formed on the back surface of the FZ-N substrate 101, and a p ⁺ collector layer 108 and a back electrode 109 are formed on the n buffer layer 201. . In the FS type IGBT 200, as in the case of the NPT type IGBT 100, lifetime control is unnecessary.

  For the purpose of reducing the on-voltage, there is also a combination of a trench structure IGBT in which a narrow and deep groove is formed on the IGBT surface and a MOS gate is formed on the side surface of the IGBT with the FS structure. Recently, the total thickness has been reduced by optimizing the design.

  Here, an example of an IGBT forming method will be described with reference to FIGS. 14 to 18 by taking the FS type IGBT 200 shown in FIG. 13 as an example. 14 is a sectional view after completion of the front surface side process, FIG. 15 is a sectional view of the substrate grinding process, FIG. 16 is a sectional view of the back surface ion implantation process, FIG. 17 is a sectional view of the back surface annealing process, and FIG. It is sectional drawing of a process. However, in FIGS. 14 to 18, the same elements as those shown in FIGS. 12 and 13 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The formation of the FS type IGBT 200 is roughly divided into a front side process and a back side process. First, the surface side process will be described with reference to FIG.
In the surface side process, first, SiO ₂ and polysilicon are deposited on the surface side of the FZ-N substrate 101, and a window process is performed to form the gate oxide film 102 and the gate electrode 103, respectively. Subsequently, BPSG is deposited on the surface, and window processing is performed to form an interlayer insulating film 104. Thereby, an insulated gate structure is formed on the surface side of the FZ-N substrate 101.

Next, a p ⁺ base layer 106 is formed on the surface side of the FZ-N substrate 101, and an n ⁺ emitter layer 107 is formed in the p ⁺ base layer 106. Further, an aluminum / silicon film is deposited so as to be in contact with the n ⁺ emitter layer 107 to form a surface electrode 105 serving as an emitter electrode. The aluminum / silicon film is then heat-treated at a low temperature of about 400 ° C. to 500 ° C. in order to realize stable matching and low resistance wiring.

Although not shown in FIGS. 13 and 14, an insulating protective film is formed on the surface electrode 105 using polyimide or the like so as to cover the surface.
Next, the back side process will be described with reference to FIGS. In the back surface side process, first, as shown in FIG. 15, the FZ-N substrate 101 is ground from the back surface side to a desired thickness by grinding such as back grinding or etching to reduce the thickness of the wafer.

Next, as shown in FIG. 16, after phosphorus (P ⁺ ) and boron (B ⁺ ) are implanted in this order into the back side of the FZ-N substrate 101, an n ⁺ layer 201a and a p ⁺ layer 108a are formed. Then, heat treatment (annealing) is performed at a low temperature of 350 ° C. to 500 ° C. using an electric furnace. This activates the n ⁺ layer 201a implanted with phosphorus and the p ⁺ layer 108a implanted with boron, and the n buffer layer 201 and the p ⁺ collector are formed on the back side of the FZ-N substrate 101 as shown in FIG. Each layer 108 is formed.

Thereafter, as shown in FIG. 18, a back electrode 109 is formed on the surface of the p ⁺ collector layer 108 by combining metal films such as an aluminum layer, a titanium layer, a nickel layer, and a gold layer.
Finally, after dicing into chips, an aluminum wire electrode is fixed to the surface of the front electrode 105 by an ultrasonic wire bonding apparatus, and the back electrode 109 is connected to a predetermined fixing member via a solder layer.

Note that here, the case where phosphorus and boron are sequentially ion-implanted to form the n buffer layer 201 and the p ⁺ collector layer 108 on the back surface side of the FZ-N substrate 101 is shown. In order to secure the ohmic contact, boron fluoride (BF ₂ ⁺ ) may be further implanted as a surface contact layer after boron implantation.

  By the way, in recent years, matrix converters that perform direct AC-AC conversion without using direct current are in the spotlight. Unlike the conventional inverter, there is an advantage that a capacitor is unnecessary and power supply harmonics are reduced. However, since the input is AC, the semiconductor switch is required to have a reverse breakdown voltage. When the conventional IGBT is used, it is necessary to connect reverse blocking diodes in series.

FIG. 19 is an example of a cross-sectional structure of the reverse blocking IGBT. However, in FIG. 19, the same elements as those shown in FIG. 12 are denoted by the same reference numerals, and detailed description thereof is omitted.
As shown in FIG. 19, the reverse blocking IGBT 300 is an IGBT having the reverse breakdown voltage with the p ⁺ isolation layer 301 formed while following the basic performance of the conventional IGBT. Since the reverse blocking IGBT 300 having such a structure does not require a series diode, the conduction loss can be reduced by half, which greatly contributes to the improvement of the conversion efficiency of the matrix converter. A high-performance reverse-blocking IGBT can be manufactured by combining a technology for forming a deep junction of 100 μm or more and a technology for producing an ultra-thin wafer having a thickness of 100 μm or less.

The main flow of the manufacture of the reverse blocking IGBT300 and the NPT type IGBT100 is, FZ-N that only the p ⁺ collector layer 108 without n buffer layer is formed on the back surface side of the substrate 101 is formed and p ⁺ Except for the point that the separation layer 301 is formed, this is the same as in the case of the FS type IGBT 200.

  However, when manufacturing an IGBT, in order to realize a thin element of about 70 μm, a backside back grind, ion implantation from the backside, backside heat treatment, etc. are required. There are many technical issues.

  As one of such manufacturing process technologies, there is a problem of activation of a p-type impurity layer (p layer) and an n-type impurity layer (n layer) necessary for forming various semiconductor elements including the IGBT exemplified here. There are various methods for this, however.

For example, when forming an NPT type IGBT, after forming a surface side structure such as an insulated gate structure on an FZ-N substrate and grinding the back surface of the wafer, proton irradiation is performed and low temperature electric furnace annealing is performed to form an n buffer layer. There has been proposed a method of forming a p ⁺ collector layer on an n-type defect layer by forming a functional n-type defect layer, and then performing ion implantation of boron on the back surface and laser annealing (see Patent Document 1). . Further, as an activation method of the p layer and the n layer, impurity ions implanted into the back surface of the FZ-N substrate after the surface side structure is formed are subjected to laser annealing using a pulse laser having a predetermined wavelength and a half width, or laser annealing. There has also been proposed a method for activating by combining electric furnace annealing and electric furnace annealing (see Patent Document 2).

In addition, in order to avoid warping and cracking of the wafer that occurs as a result of thinning, the wafer after back grinding is fixed to the support substrate with an adhesive sheet or the like to form the front side structure, and then the support substrate is removed to the back side A method of activating impurity ions by performing ion implantation (refer to Patent Document 3), or fixing a support substrate with an adhesive sheet or the like on the side of the surface side structure formed on the wafer, grinding the back surface, A method of activating impurity ions by performing implantation and laser annealing (see Patent Document 4) has been proposed.
JP 2001-160559 A JP 2003-59856 A JP 2004-119498 A JP 2004-140101 A

However, the activation of the impurity layer in the manufacturing process of various semiconductor devices has the following problems in the conventional method.
First, in annealing using an electric furnace, p layer on the upper surface side (shallow region) when a p layer on the front surface or back surface of the wafer or a pn continuous layer in which the p layer and the n layer are continuous in this order is formed. There is a problem that it is difficult to fully activate the layer. In addition, when an adhesive sheet is used for fixing the support substrate to form a thin wafer, there is a problem that electric furnace annealing cannot be performed because the heat-resistant temperature of the adhesive sheet is usually as low as 200 ° C. or lower.

  Therefore, a method of activating the impurity layer by laser annealing instead of electric furnace annealing or together with electric furnace annealing has been proposed. In laser annealing, an irradiation region of a laser beam can be instantaneously heated, so that the impurity layer can be activated in a very short time of ns order. Then, the entire surface of the wafer is annealed by scanning and irradiating a laser beam from one region to the next adjacent region.

  However, in the case of such laser annealing, if a single laser irradiation device is used to irradiate one area with a sufficiently large irradiation energy density (energy density in the irradiation area), the processing traces due to laser irradiation on the wafer May be formed. However, in this regard, for example, a plurality of laser irradiation devices are used, the irradiation energy density from each device is kept low, and a laser pulse with a low irradiation energy density is continuously irradiated to one region. It is possible to cope by scanning the wafer with such laser irradiation.

  However, with conventional laser irradiation methods, laser irradiation can be performed only on the entire wafer surface. For example, when forming an IGBT, the laser irradiation on the back surface side is limited to a specific area in accordance with the shape of the front surface structure of the wafer. Even if you want to do it, you couldn't irradiate the laser to a specific area.

FIG. 20 is a diagram for explaining an example of limiting the laser irradiation region.
FIG. 20 shows an example of a cross-sectional view of the main part of an anode short type IGBT 400. For example, an anode short type IGBT 400 having a p base layer 402, an n emitter layer 403, a gate oxide film 404 and a gate electrode 405 on the front surface side of such an n type substrate 401 and a p collector layer 406 on the back surface side is formed. At this time, the p collector layer 406 on the back surface of the wafer is formed in an island shape. In order to form such an island-shaped p collector layer 406, it is desired to perform annealing by irradiating only the island region with laser irradiation as an example of limiting the laser irradiation region.

FIG. 21 is a diagram for explaining another example when the laser irradiation area is limited.
FIG. 21 shows an example of a main part plan view of the wafer 500 on which the IGBT is formed and the IGBT chip 501 thereof. As another example of limiting the laser irradiation region, for example, as shown in FIG. 21, only the active region 502 in which the surface side structure of the IGBT chip 501 diced from the wafer 500 is formed is irradiated with the laser. In this case, there is a case where the pressure-resistant structure region 504 such as a guard ring or a field plate provided between the isolation layer 503 is not irradiated with laser.

  In these cases, in order to prevent laser irradiation on the entire surface of the wafer, a method of performing laser irradiation by placing a mask having an opening having a fixed shape on the wafer has been adopted so far.

22A and 22B are schematic views for explaining laser annealing using a mask, where FIG. 22A is a plan view and FIG. 22B is a side view.
As shown in FIG. 22, by arranging a mask 601 on a wafer 600, it is possible to perform laser irradiation only on a region corresponding to an opening (not shown) of the mask 601. However, in many laser irradiation apparatuses, the stage side on which the wafer 600 is placed moves during laser irradiation, and the mask 601 may move when the stage moves. If the mask 601 is displaced from the initial position, there arises a problem that the laser irradiation position deviates from the target position.

  Further, when the impurity layer is activated by laser irradiation while moving the mask 601 by a certain distance, it is possible to avoid laser irradiation unevenness, but at the boundary between the laser irradiation region and the laser irradiation region. It is possible that the irradiated area protrudes into an area that should not be irradiated with laser. Further, when the movement distance of the mask 601 is adjusted in order to prevent the laser from being irradiated to the region that should not be irradiated with the laser in this way, the laser is further irradiated to the region that has already been irradiated with the laser. Variations in the impurity concentration profile can occur.

  Furthermore, the mask 601 is often formed using a metal such as stainless steel so that it can withstand the temperature rise caused by laser irradiation, and the wafer 600 and the mask 601 are in contact with each other in the case of arrangement or when displacement occurs. As a result, there is a problem that metal contamination occurs.

  The present invention has been made in view of the above points, and provides a method for manufacturing a semiconductor element capable of effectively activating the impurity layer in the region to be irradiated with laser while suppressing contamination and the like. For the purpose.

  In the present invention, in order to solve the above problem, in a method of manufacturing a semiconductor device having a step of activating an impurity layer by laser irradiation, a laser beam having an irradiation energy density of a size capable of activating the impurity layer. There is provided a method for manufacturing a semiconductor device, wherein the impurity layer is activated by performing scanning irradiation so that at least a part of the irradiation region overlaps.

  According to such a method for manufacturing a semiconductor element, the irradiation energy density of the irradiated laser beam is set to a size that can activate the impurity layer. As a result, once the region irradiated with such a laser beam is irradiated with a laser beam partially or entirely, the impurity concentration profile hardly changes. Therefore, when trying to irradiate an area that has not been irradiated yet, avoiding areas that should not be irradiated with laser, even if the irradiated area overlaps with the previously irradiated area irradiated with laser, the irradiated areas overlap. Regardless of whether or not it is present, any area irradiated with the laser is fully activated. In addition, since a mask that is disposed in contact with the irradiation surface is not necessary for laser irradiation, the occurrence of contamination due to the mask is prevented.

  According to the present invention, in the method of manufacturing a semiconductor device having a step of activating the impurity layer by laser irradiation, a mask having an opening through which a laser beam passes is disposed away from the irradiation surface of the laser beam, and the opening There is provided a method of manufacturing a semiconductor device, wherein the impurity layer is activated by scanning and irradiating the laser beam having a certain shape through a portion.

  According to such a method for manufacturing a semiconductor element, a mask is used for laser irradiation, and the laser beam is irradiated in a fixed shape through the opening. For example, if it is necessary to irradiate a laser beam at a position that crosses the boundary between the region that does not irradiate the laser and the region that does not irradiate, use a mask with an opening shape that blocks the laser beam to the region that is not irradiated with laser. The laser beam is irradiated only to the laser irradiation region. In addition, since the mask is arranged away from the laser beam irradiation surface, the occurrence of contamination of metals and the like due to the mask coming into contact with the irradiation surface is prevented.

  In the method for manufacturing a semiconductor device of the present invention, a laser beam having an irradiation energy density that can activate the impurity layer is scanned and irradiated so that at least a part of the irradiation region overlaps. Regardless of whether or not the laser beam is overlapped, it is fully activated. Thereby, it is possible to effectively activate the impurity layer in the region to be irradiated with laser while avoiding the region that should not be irradiated with laser. Since the mask is not used when the impurity layer is activated, it is possible to prevent the occurrence of contamination such as metal.

  Further, in the method for manufacturing a semiconductor device of the present invention, a laser beam is formed into a fixed shape using a mask, so that a laser beam can be selectively irradiated onto a region to be irradiated with laser. Furthermore, the occurrence of contamination can be prevented by disposing the mask at a position away from the irradiation surface.

  The region irradiated with the laser can stably activate the impurity layer on the order of ns, and a semiconductor element having a region that should not be a region to be irradiated with a laser can be formed with good device characteristics.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings, taking as an example the case of application to IGBT formation.
First, the first embodiment will be described.

  Here, the activation of the p layer when forming the p collector layer of the NPT type IGBT will be described as an example. That is, for example, after a surface side structure such as an insulated gate structure is formed on an n-type Si wafer, the back surface thereof is ground, boron is ion-implanted into the ground wafer back surface, and this is activated by laser annealing. For the activation of the p layer, a YAG2ω laser (wavelength 532 nm, half width 100 ns) is used, and one laser irradiation device is used. Here, the size of the laser beam at the time of wafer irradiation is 2 mm (long axis) × 1 mm (short axis). In laser annealing, one pulse of a laser beam having such an irradiation size is sequentially scanned and irradiated from one irradiation region to an adjacent region at an appropriate overlap rate (overlapping range).

FIG. 1 shows a concentration profile when laser irradiation is performed at an irradiation energy density of 3.0 J / cm ² after boron ion implantation, and FIG. 2 shows a concentration profile when laser irradiation is performed at an irradiation energy density of 1.2 J / cm ² after boron ion implantation. It is a profile. FIG. 3 is a diagram showing a superposition state of laser beams at the time of laser irradiation. FIG. 3A shows a case where the superposition of laser beam long axes at the time of wafer irradiation is 0.5 mm, and FIG. When the superposition of the laser beam long axes at the time of irradiation is 1 mm, (C) is when the superposition of the laser beam long axes at the time of wafer irradiation is 1.5 mm, and (D) is the laser beam length at the time of wafer irradiation. This is a case where the axes are completely overlapped.

1 and 2, the horizontal axis represents the depth (μm) from the wafer surface, that is, the ion implantation surface, and the vertical axis represents the boron concentration (cm ⁻³ ) in the wafer. FIGS. 1 and 2 respectively illustrate boron superimposing of laser beam long axes when boron is ion-implanted at a dose of 1 × 10 ¹⁵ cm ⁻² and an acceleration voltage of 50 keV and laser irradiation is performed at a predetermined irradiation energy density. ) To (D) show the density profiles in each case when changed. The concentration profile is measured by the spreading resistance method (SR method). Further, the superposition of the short axis of the laser beam at the time of laser irradiation is constant at an overlap rate of 90% in any case. The symbols A to D shown in FIG. 1 and FIG. 2 correspond to the superimposed states of FIGS. 3 (A) to 3 (D), respectively.

First, as shown in FIG. 1, when the irradiation energy density of one pulse at the time of laser irradiation is 3.0 J / cm ² , as shown in FIG. Even if it is changed, there is almost no difference in the boron concentration profile. In other words, at an irradiation energy density of 3.0 J / cm ² , the concentration profile does not vary between the region where the laser beams overlap and the region where they do not overlap. That is, it can be said that boron is sufficiently activated by one laser irradiation and the boron concentration is increased to a saturated state.

On the other hand, as shown in FIG. 2, when the irradiation energy density of one pulse at the time of laser irradiation is 1.2 J / cm ² , if the overlap rate of the laser beam is changed, a difference in density profile occurs. Unlike the case of 3.0 J / cm ² , the density profile varies between the region where the laser beam overlaps and the region where the laser beam does not overlap, and is not stable.

  In this way, if the irradiation energy density at the time of laser irradiation is increased to a level at which the boron concentration at the time of ion implantation is activated, that is, a level at which saturation occurs, laser beams are overlapped between adjacent regions and lasers are superimposed. There is no problem with irradiation. By utilizing this fact, for example, as shown below, it becomes possible to form a region that is not partially irradiated with laser on one wafer.

FIG. 4 shows an example of partial irradiation.
As shown in FIG. 4, when a region 2 to be laser-irradiated and a region 3 not to be laser-exposed exist on the wafer 1 implanted with boron, a laser beam is applied to the region 2 to be laser-irradiated, for example, Laser irradiation is performed with the major axis as the overlap rate of any of FIGS. 3A to 3C and the minor axis as the 90% overlap rate. As a result, in the region irradiated with the laser, the ion-implanted boron is sufficiently activated regardless of whether the laser beams are overlapped.

In a region including the boundary 10 between the region 2 to be laser-irradiated and the region 3 that should not be laser-irradiated, when the region 2 to be laser-irradiated is sequentially irradiated toward the boundary 10 at a constant overlap rate, If the overlap ratio remains as it is, the laser beam is also applied to the region 3 that should not be irradiated with the laser. Therefore, in a region including the boundary 10, laser irradiation is performed so that the boundary 10 becomes the end of the laser beam. In this case, the overlap rate differs from the other regions only in the laser irradiation region 4 near the boundary 10, but the irradiation energy density is set to 3.0 J / cm ² at which boron is sufficiently activated as described above. Thus, boron can be activated in the laser irradiation region 4 in the same manner as other regions. Thereby, it is possible to accurately form a region where the wafer 1 is not partially irradiated with the laser.

Next, a second embodiment will be described.
When a mask is used to limit the laser irradiation area, as described above, a metal contamination problem may occur when a metal mask is brought into contact with the wafer. Therefore, in the second embodiment, masking is performed by disposing the mask not on the wafer side but on the laser beam side away from the irradiation surface. Further, in the second embodiment, the shape of the opening of the mask is devised in consideration of the irradiation shape of the laser beam required in the region including the boundary between the region to be irradiated with the laser and the region not to be irradiated with the laser. .

  FIG. 5 is a diagram showing the relationship between the standard shape mask and the laser beam shape, and FIG. 6 is an irradiation example using the standard shape mask. However, in FIG. 6, the same elements as those shown in FIG.

  Usually, a standard shape mask 5 having a rectangular opening 5a as shown in FIG. 5 is used, a part of the laser beam 6 is blocked by the light shielding part 5b, and the laser beam 6 is cut out by the opening 5a, and the laser beam 6 is fixed. As shown in FIG. 6, the laser irradiation is sequentially performed from the region 2 where the laser irradiation is to be performed to the boundary 10 where the laser irradiation is not performed, as shown in FIG.

  Here, as described in the first embodiment, it is assumed that the irradiation energy density is set to an appropriate value and the irradiation position is not devised. Then, laser irradiation is performed in order from the region 2 to be laser-irradiated using the standard shape mask 5, and a certain overlap is still applied to the boundary 10 with the region 3 that should not be laser-irradiated as it is. If laser irradiation is continued at a rate, the laser beam will be irradiated to the region 3 that should not be irradiated.

  Therefore, in the second embodiment, the shape of the opening of the mask to be used is parallel, for example, as shown in FIG. The idea is to change to a quadrilateral shape.

  FIG. 7 is a diagram showing the relationship between the parallelogram mask and the laser beam shape, and FIG. 8 is an irradiation example using the parallelogram mask. 7 and 8, the same elements as those shown in FIGS. 5 and 6 are denoted by the same reference numerals.

  When a parallelogram mask 7 having a parallelogram-shaped opening 7a as shown in FIG. 7 is used in an appropriate direction, the laser beam 6 cut out by the opening 7a can be reduced in size and irradiated with laser. It becomes possible. That is, in the example of FIG. 7, the laser beam 6 can be irradiated with the laser beam with the long axis length shortened.

  Therefore, by using a parallelogram mask 7 having such an opening 7a and a light-shielding portion 7b at the boundary 10 between the region 2 to be laser-irradiated and the region 3 not to be laser-irradiated, FIG. 6 and FIG. As shown in FIG. 6, the laser beam 6 that protrudes into the region 3 that should not be irradiated with the laser when the long axis overlaps at the boundary 10 can be masked by the light shielding portion 7b. When using the standard shape mask 5 and switching to the parallelogram mask 7 at the boundary 10, the switching includes, for example, the mask switching point 8 shown in FIG. 8, that is, the region including the boundary 10 when the scanning irradiation is turned back. May be performed when laser irradiation is performed. Thus, by using the parallelogram mask 7, it is possible to accurately form a region where the laser beam is not partially irradiated to the wafer 1.

  Such a parallelogram mask 7 may be used from the beginning when the wafer 1 is irradiated with laser, and the laser beam 6 is initially formed into a rectangular shape at the center of the parallelogram mask 7 depending on the laser irradiation region. At the boundary 10, the laser beam 6 may be cut out short at the end of the parallelogram mask 7 as described above, and laser irradiation may be performed. In addition, the mask is not limited to a parallelogram shape and may be any other opening shape as long as it can block the laser beam 6 to the region 3 that should not be irradiated when the region including the boundary 10 is irradiated. It may be configured.

Next, a third embodiment will be described.
In the third embodiment, the shape of the opening of the mask arranged on the laser beam side is devised as in the second embodiment.

FIG. 9 shows the relationship between the mask and the laser beam shape. However, in FIG. 9, the same elements as those shown in FIG.
In the third embodiment, there is a problem that may occur when the standard shape mask 5 as shown in FIG. 5 is used, that is, a problem that the region 3 that should not be irradiated with laser is also irradiated with laser. In order to avoid this, a mask 9 having an opening 9a and a light shielding portion 9b as shown in FIG. 9 is used.

  The shape of the mask 9 shown in FIG. 9 is the same as that of the standard shape mask 5 shown in FIG. 5, but the width of the opening 9a is set to the overlap rate at the time of laser irradiation for each region to be irradiated with laser. Is set accordingly. If the region to be irradiated with the laser is determined, the overlap beam ratio can be obtained because the irradiation beam size in one shot is determined. A plurality of masks 9 having different widths of the opening 9a are prepared, and the overlap ratio is calculated for each region to be irradiated with the laser. A mask 9 having an opening width may be selected and used. By using the mask 9 having the optimum opening width corresponding to the overlap rate in this way, the degree of freedom for controlling the range of the irradiation area is increased. By using this mask, the wafer 1 is not partially irradiated with the laser. The region can be formed with high accuracy.

  Similarly to the second embodiment, as shown in FIG. 6 and FIG. 8, the vicinity of the boundary 10 with the region 3 that should not be irradiated with laser from the beginning of irradiation to the region 2 that should be irradiated with laser is reached. Up to this point, laser irradiation may be performed using the standard shape mask 5 or the like, and the mask switching point 8 or the like may be switched to the mask 9 having an opening width corresponding to the overlap ratio of the region 2 to be irradiated with the laser. .

Next, a fourth embodiment will be described.
Here, description will be given by taking as an example the activation of the pn continuous layer when forming the n buffer layer and the p collector layer of the FS-type IGBT. That is, for example, after a surface side structure is formed on an n-type Si wafer, the back surface thereof is ground, phosphorus and boron are sequentially ion-implanted into the ground wafer back surface, and this is activated by laser annealing. For the activation of the pn continuous layer, a YAG2ω laser (wavelength: 532 nm, half width: 500 ns) is used, and two laser irradiation apparatuses are used. Similar to the first embodiment, the laser beam size at the time of wafer irradiation is 2 mm (major axis) × 1 mm (minor axis), and a laser beam having such a size is scanned and irradiated with an appropriate overlap rate. Perform laser annealing.

In the fourth embodiment, two YAG2ω laser irradiation apparatuses are used, and the irradiation energy density of one pulse of the laser beam emitted from each laser irradiation apparatus is 1.5 J / cm ² . Then, one pulse of laser beam is irradiated on the first region from the first unit, and then one pulse of laser beam is irradiated on the region from the second unit with a delay time of 500 ns which is the same as the half width. As a result, the region is irradiated with a laser beam at an irradiation energy density of 3.0 J / cm ^{2 in} total. In laser annealing, a laser beam irradiated onto one region in this way is scanned and irradiated from one irradiation region to an adjacent region with an appropriate overlap rate.

  According to such a laser irradiation method, it is possible to obtain the same effect as when a single pulse having a long half width is irradiated by continuously irradiating one region with two pulses. That is, the heat transfer time is longer than that of single pulse laser irradiation, and activation from the laser irradiation surface to a deep region can be performed in a short time. Therefore, even a deep impurity layer such as this pn continuous layer can be sufficiently activated by laser irradiation. Further, while ensuring the irradiation energy density required for laser annealing in total, the irradiation energy density per pulse can be kept low, and the possibility of processing marks on the wafer can be minimized. Furthermore, when pulses are continuously irradiated in this way, even if the surface layer in an amorphous state or a crystal defect remains after ion implantation cannot be recrystallized by the previous pulse, It is possible to promote recrystallization and to increase the concentration (high activation) of the shallow region (p layer).

  Here, the delay time from the irradiation of the previous pulse to the irradiation of the subsequent pulse is made the same as the half width of one pulse, that is, two pulses are irradiated continuously without delay. Even if two pulses are slightly shorter than the half-value width and slightly overlap each other, or even if there is a break between the two pulses longer than the half-value width, the same effect as described above can be obtained.

FIG. 10 shows a concentration profile when laser irradiation is performed at an irradiation energy density of 3.0 J / cm ² after ion implantation of phosphorus and boron. FIG. 11 is a concentration profile when laser irradiation is performed at an irradiation energy density of 1.2 J / cm ² after ion implantation of phosphorus and boron. In the case of an irradiation energy density of 1.2 J / cm ² , the irradiation energy density of the YAG2ω laser pulse with a half width of 500 ns irradiated from each laser irradiation apparatus to be irradiated is 0.6 J / cm ^2, and one region Are continuously irradiated with a delay time of 500 ns. The laser beam size is the same as when the irradiation energy density is 3.0 J / cm ² .

10 and 11, the horizontal axis represents the depth (μm) from the wafer surface, that is, the ion implantation surface, and the vertical axis represents the concentration of phosphorus and boron in the wafer (cm ⁻³ ). In FIGS. 10 and 11, phosphorus is ion-implanted at a dose of 1 × 10 ¹³ cm ⁻² and an acceleration voltage of 240 keV, and then boron is ion-implanted at a dose of 1 × 10 ¹⁵ cm ⁻² and an acceleration voltage of 50 keV. The density profiles in each case when the superposition of the laser beam long axes is changed as shown in FIGS. 3A to 3D at the time of laser irradiation at a predetermined irradiation energy density are shown. The density profile is measured by the SR method, and the superposition of the laser beam short axes during laser irradiation is constant at an overlap rate of 90% in any case. The symbols A to D shown in FIG. 10 and FIG. 11 correspond to the superimposed states of FIGS. 3 (A) to 3 (D), respectively.

As shown in FIG. 10, when the total irradiation energy density at the time of laser irradiation is 3.0 J / cm ² , even if the overlap ratio of the laser beam is changed, the concentration profile of phosphorus and boron is almost the same. There is no difference. On the other hand, as shown in FIG. 11, when the total irradiation energy density at the time of laser irradiation is 1.2 J / cm ² , a difference in density profile occurs due to a difference in overlap rate.

Further, when the total irradiation energy density is 3.0 J / cm ² , both the p layer and the n layer are highly concentrated as compared with 1.2 J / cm ² . This indicates that heat is effectively transferred from a shallow region to a deep region of the wafer by continuously irradiating the laser beam with an appropriate delay time.

  In this way, if the irradiation energy density at the time of laser irradiation is increased to a level at which the boron concentration at the time of ion implantation is activated, there is no problem even if laser irradiation is performed by overlapping laser beams between adjacent regions, By utilizing this, similarly to the case described in the first embodiment, it is possible to accurately form a region where one laser is not partially irradiated with laser.

  In addition, although the case where two laser irradiation apparatuses were used was demonstrated here, you may use two or more laser irradiation apparatuses. In that case, the total of the irradiation energy densities of one pulse of the laser beam emitted from each laser irradiation apparatus is set to a level that can activate the boron concentration at the time of ion implantation. Although the irradiation energy density which one laser irradiation apparatus bears can also be set individually, it is preferable to make it the value which divided the required total irradiation energy density by the number of laser irradiation apparatuses.

  Although the case where the pn continuous layer is activated has been described here, for example, a surface contact layer is formed on the p collector layer by ion-implanting boron fluoride further on the p layer in the same FS IGBT. In this case, the same applies. In addition to this, it is formed to perform impurity implantation to an nn continuous layer in which the n layer is continuous in the depth direction, an np continuous layer in which the n layer and the p layer are continuous in the depth direction in this order, or a deeper region. When activating a continuous layer of argon (Ar) layer and p layer (the order in the depth direction is not limited) and a continuous layer of argon layer and n layer (the order of the depth direction is not limited). Is equally applicable. Of course, a single layer such as a p layer or an n layer can be similarly applied.

  Further, as described in the fourth embodiment, a laser irradiation method for continuously irradiating a plurality of pulses for each irradiation region using a plurality of laser irradiation apparatuses is described in the first, second, and third. You may apply to the laser irradiation in embodiment.

  As described above, since the impurity layer is activated by laser irradiation, the irradiation energy density is increased to such an extent that the ion-implanted impurity can be activated so that the impurity concentration profile does not change even if the irradiation regions overlap. The mask shape is devised so as to block the laser beam to the non-irradiated region, or the mask shape is optimized according to the overlap rate. Thereby, the impurity layer can be stably activated in the order of ns, and a region not irradiated with laser can be partially formed by irradiating only the region to be irradiated with laser. Therefore, an IGBT having a region that should be irradiated with a laser and a region that should not be irradiated can be formed with good device characteristics.

  Here, the activation of the impurity layer in the IGBT formation process has been described as an example, but the above method can be applied to the formation of various semiconductor elements that require the activation of the impurity layer in the formation process. .

This is a concentration profile when laser irradiation is performed at an irradiation energy density of 3.0 J / cm ² after boron ion implantation. It is a concentration profile when laser irradiation is performed at an irradiation energy density of 1.2 J / cm ² after boron ion implantation. It is a figure which shows the superimposition of the laser beam at the time of laser irradiation, Comprising: (A) is a laser beam length at the time of wafer irradiation when superposition of the laser beam long axis at the time of wafer irradiation is 0.5 mm When the superposition of the axes is 1 mm, (C) is the superposition of the laser beam long axes at the time of wafer irradiation is 1.5 mm, and (D) is the superposition of the laser beam long axes at the time of wafer irradiation. This is the case. It is an example of partial irradiation. It is a figure which shows the relationship between a standard shape mask and a laser beam shape. It is an irradiation example using a standard shape mask. It is a figure which shows the relationship between a parallelogram mask and a laser beam shape. It is an example of irradiation using a parallelogram mask. It is a figure which shows the relationship between a mask and a laser beam shape. It is a concentration profile when laser irradiation is performed at an irradiation energy density of 3.0 J / cm ² after ion implantation of phosphorus and boron. It is a concentration profile when laser irradiation is performed at an irradiation energy density of 1.2 J / cm ² after ion implantation of phosphorus and boron. It is an example of the cross-sectional structure of NPT type IGBT. It is an example of the cross-sectional structure of FS type IGBT. It is sectional drawing after the surface side process completion | finish. It is sectional drawing of a substrate grinding process. It is sectional drawing of a back surface ion implantation process. It is sectional drawing of a back surface annealing process. It is sectional drawing of a back surface electrode film formation process. It is an example of the cross-sectional structure of reverse blocking IGBT. It is a figure explaining an example in the case of restrict | limiting a laser irradiation area | region. It is a figure explaining another example in the case of restrict | limiting a laser irradiation area | region. It is a schematic diagram explaining the laser annealing using a mask, (A) is a top view, (B) is a side view.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wafer 2 Area | region which should be irradiated with laser 3 Area | region which should not be irradiated with laser 4 Laser irradiation area 5 Standard shape mask 6 Laser beam 7 Parallelogram-shaped mask 8 Mask switching point 9 Mask 10 Boundary

Claims (7)

In a method for manufacturing a semiconductor device having a step of activating an impurity layer by laser irradiation,
A semiconductor element characterized by activating the impurity layer by scanning and irradiating a laser beam having an irradiation energy density of a size capable of activating the impurity layer so that at least a part of the irradiation region overlaps. Manufacturing method.   The region where the laser beam is irradiated so that at least a part of the irradiation region overlaps is a region where the laser irradiation is performed in the vicinity of a boundary between a region where laser irradiation is performed and a region where laser irradiation is not performed. A method for manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein when the laser beam is irradiated by scanning, a plurality of laser irradiation apparatuses are used and a plurality of pulses are continuously irradiated for each irradiation region. In a method for manufacturing a semiconductor device having a step of activating an impurity layer by laser irradiation,
A mask having an opening through which a laser beam passes is arranged away from the laser beam irradiation surface, and the impurity layer is activated by scanning and irradiating the laser beam having a fixed shape through the opening. A method for manufacturing a semiconductor device, comprising:   The mask allows the laser beam to pass through the laser-irradiated region and blocks the laser beam to the non-laser-irradiated region when irradiating near the boundary between the laser-irradiated region and the non-laser-irradiated region. The method of manufacturing a semiconductor element according to claim 4.   When scanning and irradiating the laser beam, prepare a plurality of the masks having different sizes of the opening in advance, select the size according to the degree of overlap of the region irradiated with the laser beam, 5. The method of manufacturing a semiconductor device according to claim 4, wherein the laser beam having a fixed shape is irradiated using the selected mask.   5. The method of manufacturing a semiconductor device according to claim 4, wherein when the laser beam is scanned and irradiated, a plurality of laser irradiation apparatuses are used and a plurality of pulses are continuously irradiated for each irradiation region.

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