JP5965173B2 - Moving image processing system, image processing apparatus, and moving image processing system operating method - Google Patents

Description

  The present invention relates to an image processing technique.

  An imaging device such as a digital still camera or a digital video camera has a so-called through image display function that displays a captured image in real time on a display unit such as an LCD in a moving image manner while imaging an object with an imaging element. (For example, Patent Document 1).

  In such an imaging apparatus, the display unit is driven at a relatively high frame rate of about 60 fps in order to display an image on the display unit without a sense of incongruity. Correspondingly, the image sensor also displays an image for display. Was driven at the same frame rate to get.

JP 2005-311699 A

  However, when the image sensor is driven at the same relatively high frame rate as the display unit, the exposure time is shortened, so that a sufficient amount of light cannot be obtained in a dark room or the like. A low image of was displayed.

  Such a phenomenon may occur not only in the imaging apparatus but also in other apparatuses and systems that display an image acquired by the imaging element on the display unit.

  Therefore, an object of the present invention is to provide a technique capable of acquiring an image having a relatively high luminance even in a dark room and displaying the image on a display unit.

According to a first aspect of the moving image processing system of the present invention, an image sensor that acquires an image related to a subject image, a reduction processing unit that performs a reduction process on the image acquired by the image sensor, and an image after the reduction process Storage means for storing the image, and an enlargement process for returning the image read from the storage means to the image size before the reduction process is performed, and the image after the enlargement process is displayed at a predetermined frame display rate. Display control means for displaying on the display unit, drive means for driving the image sensor at a frame capture rate that is lower than the frame display rate, image acquisition operation for one frame by the image sensor, and the display section and a synchronizing means for synchronizing the plurality of image display operation using the same frame by said synchronization means, defining said frame display rate A signal generation means for generating an operation synchronization signal having a multiple of the period of the vertical synchronization signal by masking a part of the vertical synchronization signal based on the vertical synchronization signal and the mask signal, The driving means uses a frame rate defined by the operation synchronization signal as the frame capture rate.

The second aspect of the moving image processing system according to the present invention is the above first condition like, the moving image processing system, one frame image acquired by the image acquisition operation, the following Each image is displayed by a plurality of image display operations synchronized with the image acquisition operation.

Further, a third aspect of the moving image processing system according to the present invention is the first aspect or the second aspect , wherein the reduction processing means calculates a horizontal component of an image acquired by the image sensor. By performing thinning, a reduction process for reducing the image in the horizontal direction is performed, and the display control unit enlarges the image read from the storage unit in the horizontal direction.

The image processing apparatus according to the present invention includes an image sensor that acquires an image related to a subject image, a reduction processing unit that performs a reduction process on the image acquired by the image sensor, and a memory that stores the image after the reduction process. And the image read from the storage means are subjected to an enlargement process for returning to the image size before the reduction process, and the image after the enlargement process is displayed on the display unit at a predetermined frame display rate. Display control means, drive means for driving the image sensor at a frame capture rate that is lower than the frame display rate, image acquisition operation for one frame by the image sensor, and the same frame by the display section and a plurality of times synchronization means to synchronize the image display operation using the synchronization means, the vertical defining the frame display rate synchronous Signal generating means for generating an operation synchronization signal having a multiple of the period of the vertical synchronization signal by masking a part of the vertical synchronization signal based on a signal and a mask signal; Uses a frame rate defined by the operation synchronization signal as the frame capture rate.

In addition, the operation method of the moving image processing system according to the present invention includes: a) a step of acquiring an image related to a subject image by an imaging device; b) a step of performing a reduction process on the image acquired by the imaging device; c) A step of storing the image after the reduction process in a storage unit; and d) performing an enlargement process for returning to the image size before the reduction process is performed on the image read from the storage unit, and A step of displaying an image on a display unit at a predetermined frame display rate, and the step a) is performed by driving the image sensor at a frame capture rate that is lower than the frame display rate. wherein a) an image acquisition operation for one frame in step, the plurality of image display operation using the same frame in the step d) performed synchronously, e) the full Generating an operation synchronization signal having a multiple of the period of the vertical synchronization signal by masking a part of the vertical synchronization signal based on the vertical synchronization signal and the mask signal for defining the frame display rate And a frame rate defined by the operation synchronization signal is used as the frame capture rate.

  According to the present invention, an image with relatively high luminance can be acquired and displayed on the display unit even in a dark room.

It is a block diagram which shows the function structure of the moving image processing system which concerns on 1st Embodiment. It is a figure which shows the operation | movement outline | summary of the moving image processing system which concerns on 1st Embodiment. It is a figure which shows the detailed structure of a synchronizing signal generation circuit. It is a figure which shows the input signal input into a synchronizing signal generation circuit, and the output signal output from a synchronizing signal generation circuit. It is a time chart which shows the relationship between image acquisition operation | movement and image display operation | movement. It is a figure which shows the operation | movement outline | summary of the moving image processing system which concerns on 2nd Embodiment. It is a figure which shows a mode that an image is reduced by horizontal thinning. It is a figure which shows a mode that an image is reduced by vertical thinning.

  Each embodiment will be described below with reference to the drawings. In addition, the element which attached | subjected the same code | symbol in different drawing shall show the same or corresponding element.

<1. First Embodiment>
[1-1. Constitution]
The moving image processing system 1A according to the first embodiment captures a subject to acquire an image and displays a captured image on a display unit in real time (real time) (so-called live view display function (through image display function)). have. As such a moving image processing system 1A, for example, an imaging device such as a digital still camera or a digital video camera, a portable information terminal and a mobile phone having a photographing function, or an image processing device is assumed.

  First, the configuration of the moving image processing system 1A will be described. FIG. 1 is a block diagram showing a functional configuration of a moving image processing system 1A according to the first embodiment.

  As illustrated in FIG. 1, the moving image processing system 1A includes an imaging unit 11, a signal processing circuit 12A, a memory 13A, a memory control unit 14, a display unit 15, and a display control circuit 16A. .

  The imaging unit 11 includes, for example, an imaging element 111 (FIG. 2) such as a COMS sensor or a CCD sensor. The imaging element 111 has a function of receiving light (subject light) forming a subject image and generating image data of an image related to the subject image. In addition, the imaging unit 11 performs A / D conversion processing, pixel interpolation processing, YUV conversion processing, and the like on the image data generated by the imaging element 111, and converts the YUV digital image data to the signal processing circuit 12A. Output.

  The imaging unit 11 further includes a drive circuit (not shown) that controls the image data acquisition operation by the imaging element 111.

  The signal processing circuit 12A temporarily buffers the image data input from the imaging unit 11, and outputs the image data to the memory 13A. Here, the case where the image data input from the imaging unit 11 is digital data in YUV format is illustrated, but the image data input from the imaging unit 11 is image data in RGB format. Also good. In this case, the RGB format image data is converted into YUV format image data by the signal processing circuit 12A.

  The memory 13A is configured using a DRAM or the like, and functions as a storage unit that stores image data. The memory 13A according to the present embodiment has a double buffer configuration having two physically different memories.

  The memory control unit 14 controls the image data writing operation to the memory 13A and the image data reading operation from the memory 13A. For example, the memory control unit 14 acquires the image data output from the signal processing circuit 12A via the bus 17, and performs a writing operation (storage control) for storing the image data in the memory 13A. Further, the memory control unit 14 performs read control for reading image data from the memory 13A in response to a read instruction signal for image data from the display control circuit 16A.

  The display unit 15 is a display unit such as a liquid crystal display (LCD) or an organic EL display, and displays an image based on the image data input from the display control circuit 16A at a predetermined frame rate.

  Note that the frame rate (also referred to as “frame display rate” or “display frame rate”) of the display unit 15 when displaying an image is equal to the frequency of the vertical synchronization signal, and is 60 fps in this embodiment.

  The display control circuit 16 </ b> A controls the image display operation on the display unit 15. Specifically, the display control circuit 16A outputs a read instruction signal for reading image data from the memory 13A, and acquires the image data via the bus 17. Then, the display control circuit 16A converts the acquired image data into a format that can be displayed on the display unit 15 based on the vertical synchronization signal input from the display unit 15, and outputs the converted data.

  The display control circuit 16A also generates a synchronization signal (also referred to as an “operation synchronization signal”) for synchronizing the image display operation using the display unit 15 and the image acquisition operation (imaging operation) using the imaging unit 11. , A synchronization signal generation circuit (operation synchronization signal generation circuit) 161 that is generated based on the vertical synchronization signal. The operation synchronization signal generated by the synchronization signal generation circuit 161 is output to the imaging unit 11.

  Here, the display control circuit 16A is configured to obtain the vertical synchronization signal from the display unit 15, but the display control circuit 16A may generate the vertical synchronization signal by itself. In this case, the display control circuit 16A outputs the image data to the display unit 15 based on the vertical synchronization signal generated by itself, and the synchronization signal generation circuit 161 uses the vertical synchronization signal generated by itself to perform operation synchronization. A signal will be generated.

[1-2. Operation]
Next, the operation of the moving image processing system 1A will be described. FIG. 2 is a diagram showing an outline of the operation of the moving image processing system 1A.

  As shown in FIG. 2, in the moving image processing system 1A, the image sensor 111 in the image capturing unit 11 is, for example, 15 fps frame rate (“frame capture rate” or “frame acquisition rate”) according to the control of the drive circuit. Driven). The image data output from the imaging unit 11 is stored in the memory 13A for each frame.

  Here, the memory 13 </ b> A of the present embodiment has a double buffer configuration including a first memory 131 and a second memory 132 that are physically different.

  One frame of image data sequentially output from the imaging unit 11 is alternately stored in one of the first memory 131 and the second memory 132. In FIG. 2, the image data of the frame F1 output from the imaging unit 11 is stored in the first memory 131, and the image data of the frame F2 output from the imaging unit 11 is stored in the second memory 132. Embodiments are illustrated.

  On the other hand, the display unit 15 displays the image data read from the memory 13A for each frame, and the frame display rate of the display unit 15 is 60 fps as described above. Thus, since the frame display rate of the display unit 15 is higher than the frame capture rate (frame acquisition rate) of the image sensor 111, the moving image processing system 1A stores the image data for one frame in the memory 13A. In addition, the image data of the same frame is read from the memory 13A a plurality of times and output to the display unit 15.

  For example, as shown in FIG. 2, in the first period T1 from 0 s to 1/15 s, the image data of the frame F1 is acquired by the imaging unit 11, and the image data of the frame F1 is stored in the first memory 131. Assuming that In this case, during the second period T2 from the next 1 / 15s to 2 / 15s, the moving image processing system 1A acquires the image data of the frame F2 and stores the image data in the second memory 132. The image data of the frame F1 stored in the first memory 131 is read out 4 times at 1 / 60s intervals and output to the display unit 15. In the third period T3 from 2 / 15s to 3 / 15s, the moving image processing system 1A acquires the image data of the frame F3 and stores the image data in the first memory 131. 2 The image data of the frame F2 stored in the memory 132 is read four times at 1 / 60s intervals and output to the display unit 15.

  As described above, in the moving image processing system 1A, one frame image acquisition operation and one frame image display operation are performed in a state where the frame capture rate of the image sensor 111 is set lower than the frame display rate of the display unit 15. , Done in sync.

[1-3. Synchronization principle between image acquisition and image display]
Next, the synchronization principle between the image acquisition operation and the image display operation in the moving image processing system 1A will be described. FIG. 3 is a diagram illustrating a detailed configuration of the synchronization signal generation circuit 161. FIG. 4 is a diagram illustrating an input signal input to the synchronization signal generation circuit 161 and an output signal output from the synchronization signal generation circuit 161. FIG. 5 is a time chart showing the relationship between the image acquisition operation and the image display operation.

  In the moving image processing system 1A, the operation synchronization signal DS is used to synchronize the image acquisition operation and the image display operation. The operation synchronization signal DS is generated by a synchronization signal generation circuit 161 in the display control circuit 16A.

  As shown in FIG. 3, the synchronization signal generation circuit 161 includes a logical product circuit (AND circuit) and a negative circuit (NOT circuit). The synchronization signal generation circuit 161 is an inverted signal obtained by inverting the mask signal MS. And the vertical synchronization signal HS, and the operation synchronization signal DS is generated.

  The operation synchronization signal DS generated in this way is a signal obtained by masking a part of the vertical synchronization signal HS that defines the frame display rate, as shown in FIG. 4, and is a multiple of the vertical synchronization signal HS. (Here, four times). In other words, the frequency of the operation synchronization signal DS is 1/4 of the frequency of the vertical synchronization signal HS.

  The operation synchronization signal DS generated by the synchronization signal generation circuit 161 is output from the display control circuit 16A and input to the imaging unit 11. The drive circuit of the imaging unit 11 drives the image sensor 111 at a frame capture rate defined by the operation synchronization signal DS, and executes an image acquisition operation. Here, the drive circuit of the imaging unit 11 sets the frame capture rate of the imaging element 111 to a value equal to the frequency of the operation synchronization signal DS.

  Accordingly, as shown in FIG. 5, in the first period DP1 of the operation synchronization signal DS, for example, an image acquisition operation GF1 for acquiring image data of the frame F1 is executed, and in the second period DP2, the frame F2 The image acquisition operation GF2 for acquiring the image data is executed.

  On the other hand, the display unit 15 performs an image display operation at a frame display rate based on the vertical synchronization signal HS. Specifically, as shown in FIG. 5, the display unit 15 is driven at a frame display rate equal to the frequency of the vertical synchronization signal HS, and during execution of the image display operation, in each cycle of the vertical synchronization signal HS. The image display operations HF1 and HF2 are executed.

  Here, the operation synchronization signal DS is a signal generated by masking a part of the vertical synchronization signal HS, and the operation synchronization signal DS is a signal having the same timing as the signal of every four periods in the vertical synchronization signal HS. ing.

  Therefore, in the moving image processing system 1A, when an image acquisition operation for one frame is performed in a certain cycle of the operation synchronization signal DS, the vertical direction in the same time zone as the certain synchronization cycle of the operation synchronization signal DS. The image display operation of the same frame is performed in each of the four periods of the synchronization signal HS. For example, in FIG. 5, the image acquisition operation GF2 of the frame F2 is executed in the second period DP2 of the operation synchronization signal DS, and the four periods HP21 to HP20 of the vertical synchronization signal HS in the same period as the second period DP2 of the operation synchronization signal DS. A mode in which the image display operation HF1 of the same frame F1 is executed in each HP 24 is shown.

  As described above, the moving image processing system 1A includes a synchronization unit that synchronizes the image acquisition operation for one frame by the imaging device 111 and the image display operation of a plurality of times using the same frame by the display unit 15, The synchronization means includes a synchronization signal generation circuit 161 that generates an operation synchronization signal DS for synchronizing the image acquisition operation and the image display operation.

  As described above, the moving image processing system 1A includes the image sensor 111 that acquires an image related to a subject image, the memory 13A that stores the image acquired by the image sensor 111, and the image stored in the memory 13A in a predetermined frame. A display control circuit 16A that displays on the display unit 15 at a display rate, a drive circuit that drives the image sensor 111 at a frame capture rate that is a frame rate lower than the frame display rate, and an image acquisition operation for one frame by the image sensor 111 And a synchronizing means for synchronizing with a plurality of image display operations using the same frame by the display unit 15.

  In such a moving image processing system 1A, since the image sensor 111 is driven at a frame capture rate lower than the frame display rate of the display unit 15, a long exposure time can be secured, and a relatively bright image can be acquired even in a dark environment. Can be displayed on the display unit 15.

  On the other hand, in the moving image processing system 1A, an image is displayed while maintaining a high frame rate (for example, 60 fps) without lowering the frame display rate of the display unit 15 in accordance with the frame capture rate of the image sensor 111. Flickering of the screen can be suppressed.

  Further, the moving image processing system 1A displays the image for one frame acquired by the image acquisition operation GF1 by a plurality of image display operations HF1 synchronized with the next image acquisition operation GF2. In such a moving image processing system 1A, the newly acquired image is overwritten and saved on the displayed image, so that the storage capacity of the memory 13A can be set to a capacity capable of storing an image for two frames. Thus, the storage capacity of the memory 13A can be suppressed.

  Further, in such a moving image processing system 1A, it is possible to reduce a delay until the image is displayed after the image is acquired.

<2. Second Embodiment>
Next, a second embodiment of the present invention will be described. The moving image processing system 1A according to the first embodiment has the double buffer memory 13A, but the moving image processing system 1B according to the second embodiment has the single buffer memory 13A. Yes. The moving image processing system 1B has substantially the same structure and function (see FIGS. 1 and 3) as the moving image processing system 1A, and common portions are denoted by the same reference numerals and description thereof is omitted. . FIG. 6 is a diagram showing an outline of the operation of the moving image processing system 1B according to the second embodiment.

  As shown in FIG. 1, the moving image processing system 1B includes an imaging unit 11, a signal processing circuit 12B, a memory 13B, a memory control unit 14, a display unit 15, and a display control circuit 16B. .

  The imaging unit 11 includes, for example, an imaging element 111 (FIG. 2) such as a COMS sensor or a CCD sensor. Then, the imaging unit 11 acquires digital image data in YUV format by performing A / D conversion processing, pixel interpolation processing, YUV conversion processing, and the like on the image data generated by the imaging device 111, The digital image data is output to the signal processing circuit 12B.

  The signal processing circuit 12B has a function of performing a reduction process for reducing the image by 1/2 in the horizontal direction with respect to the image data input from the imaging unit 11. Such a reduction process is realized by a filter composed of an FIR filter and a reduction filter (bilinear filter), and the filter also has a function of reducing noise generated during the reduction process.

  Then, the signal processing circuit 12B outputs the image data after the reduction process to the memory 13B.

  Here, the case where the image data input from the imaging unit 11 is digital data in YUV format is illustrated, but the image data input from the imaging unit 11 is image data in RGB format. Also good. In this case, the RGB format image data is converted into YUV format image data by the signal processing circuit 12B.

  The memory 13B is configured using a DRAM or the like, and functions as a storage unit that stores image data. As described above, a single buffer configuration is adopted for the memory 13B.

  The memory control unit 14 controls the image data writing operation to the memory 13B and the image data reading operation from the memory 13B.

  The display control circuit 16B controls the image display operation on the display unit 15. Specifically, the display control circuit 16B outputs a read instruction signal for reading image data from the memory 13B, and acquires the image data via the bus 17. Then, the display control circuit 16B performs an enlargement process for enlarging the image twice in the horizontal direction with respect to the acquired image data. Further, the display control circuit 16B converts the image data after the enlargement processing into a format that can be displayed on the display unit 15 based on the vertical synchronization signal input from the display unit 15, and outputs the converted data.

  In addition, the display control circuit 16B includes a synchronization signal generation circuit 161 that generates an operation synchronization signal. The display control circuit 16 </ b> B outputs the operation synchronization signal generated by the synchronization signal generation circuit 161 to the imaging unit 11.

  The moving image processing system 1B having such a configuration reduces the image data for one frame output from the imaging unit 11 to ½ and stores it in the memory 13B, while storing the stored image data in the memory 13B. , And the image data is doubled and output to the display unit 15. In FIG. 6, the image data of the frame F1 output from the imaging unit 11 is stored in the memory 13B, and then the image data of the frame F2 output next is stored in the memory 13B, and the stored image data of the frame F1 is stored. The mode which reads out from memory 13B and outputs to the display part 15 is illustrated.

  As described above, since the moving image processing system 1B according to the second embodiment reduces the image and stores it in the memory 13B, the storage capacity of the memory 13B can be reduced, and the cost of the memory 13B can be reduced.

<3. Modification>
Although the embodiments of the present invention have been described above, the present invention is not limited to the contents described above.

  For example, in each of the embodiments described above, as an example in which the frame display rate of the display unit 15 is higher than the frame capture rate of the image sensor 111, the display unit 15 is driven at a frame display rate of 60 fps, and the image sensor 111 is 15 fps. Although the case of driving at the frame capture rate is illustrated, the present invention is not limited to this.

  Specifically, the display unit 15 may be driven at a frame display rate of 60 fps, and the image sensor 111 may be driven at a frame capture rate of 20 fps or 30 fps. Alternatively, the display unit 15 may be driven at a frame display rate of 80 fps, and the image sensor 111 may be driven at a frame capture rate of 15 fps, 20 fps, or 30 fps.

  In the second embodiment, the reduction rate of the image data is halved. However, the present invention is not limited to this, and the reduction rate of the image data may be 2/3 or 1/3. Good.

  In the second embodiment, the image is reduced in the horizontal direction when reduced, but may be reduced in the vertical direction. FIG. 7 is a diagram illustrating how an image is reduced by horizontal thinning. FIG. 8 is a diagram illustrating how an image is reduced by vertical thinning.

  Specifically, in the second embodiment, as shown in FIG. 7, the image GR is reduced in half in the horizontal direction by horizontal thinning (pixel thinning) for thinning the horizontal component of the image GR. On the other hand, as shown in FIG. 8, the image GR may be reduced in half in the vertical direction by vertical thinning (line thinning) for thinning the vertical component of the image GR.

  In addition, the display of the image on the display unit 15 sequentially displays the pixels from the start pixel at the upper left of the image along a certain row direction, and starts a line feed every time when the display in units of rows is finished. When the pixels are sequentially displayed along a so-called raster order, it is preferable to reduce the image by horizontal thinning.

  Specifically, in the image enlargement process performed by the display control circuit 16 before the image data is output to the display unit 15, the pixel values of the pixels thinned out during the reduction process are acquired by interpolation calculation.

  When enlarging the reduced image obtained by the vertical thinning, in order to calculate the pixel value of each pixel of the thinned row (thinning row), an interpolation operation is performed using the upper and lower rows of the thinning row. Become. At this time, when the image data is processed in raster order, in order to calculate the pixel value of the thinning row, the image data for one row on the thinning row is stored in the storage unit for interpolation calculation. become. For example, a line memory is employed as a storage unit for interpolation calculation that stores image data for one row.

  On the other hand, when a reduced image obtained by horizontal thinning is enlarged, in order to calculate the pixel value of the thinned pixel (thinned pixel), interpolation calculation is performed using the left and right pixels of the thinned pixel. It will be. At this time, when the image data is processed in raster order, in order to calculate the pixel value of the thinned pixel, the pixel value for one pixel to the left of the thinned pixel is stored in the storage unit for interpolation calculation. become. For example, a register is used as a storage unit for interpolation calculation that stores a pixel value for one pixel.

  In this way, the storage capacity of the storage unit for interpolation calculation can be reduced in the case of enlarging the reduced image obtained by horizontal thinning than in the case of enlarging the reduced image obtained by vertical thinning, Cost reduction of the storage unit can be realized.

  In each of the above embodiments, the case where the synchronization signal generation circuit 161 that generates the operation synchronization signal is present in the display control circuits 16A and 16B is illustrated, but the present invention is not limited to this. Specifically, the synchronization signal generation circuit 161 as a synchronization unit may be provided in the drive circuit of the image sensor 111 or separately from other functional units.

1A, 1B moving image processing system 11 imaging unit 111 imaging device 12A, 12B signal processing circuit 13A, 13B memory 131 first memory 132 second memory 14 memory control unit 15 display unit 16A, 16B display control circuit 161 synchronization signal generation circuit 17 Bus F1 to F3 Frame HS Vertical synchronization signal MS Mask signal DS Operation synchronization signal HP21 to HP24 Period in vertical synchronization signal DP1, DP2 Period in operation synchronization signal GF1, GF2 Image acquisition operation HF1, HF2 Image display operation GR image

Claims (6)

An image sensor for acquiring an image related to a subject image;
Reduction processing means for performing reduction processing on the image acquired by the imaging device;
Storage means for storing the image after the reduction processing ;
Display control means for performing an enlargement process for returning the image read from the storage means to the image size before the reduction process , and displaying the image after the enlargement process on the display unit at a predetermined frame display rate When,
Driving means for driving the image sensor at a frame capture rate which is a frame rate lower than the frame display rate;
Synchronization means for synchronizing an image acquisition operation for one frame by the image sensor and a plurality of image display operations using the same frame by the display unit;
Equipped with a,
The synchronization means masks a part of the vertical synchronization signal based on the vertical synchronization signal that defines the frame display rate and a mask signal, and thereby has an operation synchronization having a multiple of the period of the vertical synchronization signal. Signal generating means for generating a signal;
The moving image processing system in which the driving means uses a frame rate defined by the operation synchronization signal as the frame capture rate . The moving image processing system according to claim 1, wherein the moving image processing system displays an image for one frame acquired by the image acquisition operation by a plurality of image display operations synchronized with a next image acquisition operation . The reduction processing means performs a reduction process for reducing the image in the horizontal direction by thinning out a horizontal component of the image acquired by the image sensor,
The moving image processing system according to claim 1 , wherein the display control unit enlarges an image read from the storage unit in the horizontal direction .   An image sensor for acquiring an image related to a subject image;
  Reduction processing means for performing reduction processing on the image acquired by the imaging device;
  Storage means for storing the image after the reduction processing;
  Display control means for performing an enlargement process for returning the image read from the storage means to the image size before the reduction process, and displaying the image after the enlargement process on the display unit at a predetermined frame display rate When,
  Driving means for driving the image sensor at a frame capture rate which is a frame rate lower than the frame display rate;
  Synchronization means for synchronizing an image acquisition operation for one frame by the image sensor and a plurality of image display operations using the same frame by the display unit;
With
  The synchronization means masks a part of the vertical synchronization signal based on the vertical synchronization signal that defines the frame display rate and a mask signal, and thereby has an operation synchronization having a multiple of the period of the vertical synchronization signal. Signal generating means for generating a signal;
  The image processing apparatus using the frame rate defined by the operation synchronization signal as the frame capture rate.   a) acquiring an image related to the subject image with an imaging device;
  b) performing a reduction process on the image acquired by the image sensor;
  c) storing the image after the reduction processing in a storage means;
  d) A process of performing an enlargement process for returning the image read from the storage unit to an image size before the reduction process, and displaying the image after the enlargement process on the display unit at a predetermined frame display rate. When,
With
  The step a) is performed by driving the image sensor at a frame capture rate that is a frame rate lower than the frame display rate,
  The image acquisition operation for one frame in the step a) and the multiple image display operations using the same frame in the step d) are performed in synchronization,
  e) generating an operation synchronization signal having a multiple of the period of the vertical synchronization signal by masking a part of the vertical synchronization signal based on the vertical synchronization signal and the mask signal defining the frame display rate Further comprising the step of:
  An operation method of a moving image processing system in which a frame rate defined by the operation synchronization signal is used as the frame capture rate.   An image sensor for acquiring an image related to a subject image;
  Reduction processing means for performing a reduction process for reducing the horizontal component of the image by thinning out a horizontal component of the image acquired by the image sensor;
  Storage means for storing the image after the reduction processing;
  Display control means for enlarging the image read from the storage means in the horizontal direction and displaying the enlarged image on a display unit at a predetermined frame display rate;
  Driving means for driving the image sensor at a frame capture rate which is a frame rate lower than the frame display rate;
  Synchronization means for synchronizing an image acquisition operation for one frame by the image sensor and a plurality of image display operations using the same frame by the display unit;
A moving image processing system comprising:

Images