JP5955749B2 - Electronic circuits and electronic equipment - Google Patents

Description

  The present invention relates to an electronic device having storage means such as a memory element.

  In recent electronic devices, there are products with various functions that are extremely multipolar. For example, these functions in an electronic timepiece include a function for warning a user when the battery voltage drops, a function for mounting various sensors, and measuring temperature, altitude, water depth, and the like. In a timepiece having these functions, adjustment of manufacturing variations such as sensors, initial setting, or selection of equipment specifications is often performed based on data stored in a nonvolatile memory or the like. In recent years, electronic devices such as electronic timepieces and calculators that do not require a large amount of electric power during normal operation are combined with power generation means and power storage means as a power source, and electricity is generated by a power generation means such as a solar cell. Many of these are stored in the power storage means and operated by the stored electricity.

  Patent Document 1 discloses, as a conventional example, adjustment of manufacturing variation of a power supply voltage detection circuit (hereinafter referred to as BD circuit) using data stored in the nonvolatile memory described in FIG. Due to the configuration of the sense circuit, the output data from the non-volatile memory is fixed regardless of whether the non-volatile memory is written (“1”) or not written (“0”) when the power supply voltage is low. It is described that it becomes a value (“1”).

Japanese Patent Laid-Open No. 10-340576 (FIG. 5, paragraphs 0022-0026)

  In the charging power supply system, the voltage of the power supply varies greatly depending on the amount of electricity stored in the power storage means by the power generation means. In a system using the non-volatile memory, when the voltage of the power supply is significantly reduced, the output of the non-volatile memory regardless of the data (“1” or “0”) stored in advance in the non-volatile memory When the data changes to a fixed value (“1”), a specification that is different from the specification that should be originally selected may be selected, resulting in a malfunction that may cause an unintended operation.

  For example, it is assumed that a timepiece IC that is commonly used for a pointer type timepiece having different specifications selects a timepiece specification using the data of the nonvolatile memory. In such a case, the specification of the step motor driving pulse which is different for each timepiece is selected.

  Here, since the step motor of the electronic timepiece differs depending on the equipment, the required driving force also differs, and the driving cycle of the hands also differs depending on the specifications of the equipment. When controlling the operation according to the device specifications such as the driving force of the device and the driving cycle of the pointer based on the data of the non-volatile memory, the power supply voltage is significantly lowered and the output data of the non-volatile memory is changed. A driving condition different from the specification to be selected is selected, and an unexpected failure (irregular stop of the pointer, advance / delay due to different cycle selection, etc.) occurs. As a means for avoiding this, it is possible to mount a BD circuit so that selection by the non-volatile memory is not performed when the voltage drops. However, mounting the BD circuit also causes a problem that the IC becomes large.

An object of the present invention is to provide a highly reliable electronic device that does not malfunction even when the power supply voltage decreases.

In order to achieve the above object, the present invention has the following configuration. That is,
Is mounted on an electronic device, an electronic circuit implementing a plurality of specifications, have a plurality of bits of non-volatile memory,
Power supply voltage is output data stored in the nonvolatile memory when it exceeds a predetermined value, storage means for power supply voltage to have the characteristic that outputs a fixed value when drops below a predetermined value, the storage means A selection circuit that determines the specifications of the device based on the data output from
The selection circuit, when the power supply voltage exceeds a predetermined value,
Select the specifications of the device corresponding to the data output from the storage means,
When the power supply voltage drops below a predetermined value and all of the bits used to determine the specifications of the device out of the output data from the storage means are the fixed value,
It is configured to select a specification corresponding to a power supply voltage drop.

As described above, according to the present invention, when the output data from the storage means is a fixed value of all bits, the system is configured to select the operation when the power supply voltage drops, thereby reducing the power supply voltage. It is possible to prevent malfunction at the time.

It is a block diagram which shows the circuit structure of the electronic timepiece of the 1st Embodiment of this invention. It is a chart which shows the specification of the drive pulse which the circuit of the electronic timepiece of the 1st Embodiment of this invention generate | occur | produces. It is a wave form diagram of the drive pulse which the circuit of the electronic timepiece of the 1st embodiment of the present invention generates. It is a block diagram which shows the circuit structure of the electronic timepiece of the 2nd Embodiment of this invention. It is a chart which shows the specification of the drive pulse which the circuit of the electronic timepiece of the 2nd Embodiment of this invention generate | occur | produces. It is a block diagram which shows the circuit structure of the electronic timepiece of the 3rd Embodiment of this invention. It is a chart which shows the specification of the chronograph which the circuit of the electronic timepiece of the 3rd Embodiment of this invention generate | occur | produces. 3 is a circuit diagram showing a configuration of a nonvolatile memory 5. FIG.

[First Embodiment]
The first embodiment is an example of a control method for stopping hand movement when all the bits output from the nonvolatile memory are fixed values. DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, a first embodiment of the invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a circuit configuration of an electronic timepiece according to the first embodiment of the present invention, and FIG. 2 shows specifications of drive pulses generated by the circuit of the electronic timepiece according to the first embodiment of the present invention. FIG. 3 and FIG. 3 are waveform diagrams of drive pulses generated by the electronic timepiece circuit according to the first embodiment of the present invention.
In FIG. 1, reference numeral 1 is a power source, 2 is an oscillation circuit 211 that generates a reference clock by oscillation of a crystal resonator (not shown), and a reference circuit configured by dividing a reference signal from the oscillation circuit 211. It is a signal generation circuit.

  Reference numeral 3 denotes a drive pulse generation circuit that generates a pulse based on the reference signal generation circuit 2, and generates a pulse A generation circuit 311 that generates a pulse A, a pulse B generation circuit 312 that generates a pulse B, and a pulse C. And a pulse C generation circuit 313.

  FIG. 3 shows waveforms of drive pulses generated by the pulse generation circuits 311, 312, and 313.

  With reference to the output timing t0 of the drive pulse (hereinafter referred to as SP), the SP output abort timing t1, the rotation detection start timing t2 at which the rotation detection pulse (hereinafter referred to as STB) is output, the output timing t3 of the correction drive pulse (hereinafter referred to as FP), Assume that the output abort timing t4 and the output period t5 of the drive pulse SP. The timing and period of pulse A, pulse B, and pulse C are set to the values shown in FIG.

  The FP output / non-output control of the pulse A, pulse B, and pulse C is performed based on the output result of the rotation detection circuit 9 described later. SP and FP are output as chopper pulses with a fine period at t0-t1 and t4-t5. The chopper duty ratio of SP and FP of pulse A, pulse B, and pulse C (ratio of pulse output in the chopper pulse period) is selected based on the output result of the duty selection circuit 11 described later.

  Reference numeral 4 denotes a latch circuit that holds data stored in a nonvolatile memory 5 (to be described later) based on a signal from the reference signal generation circuit 2 and supplies the stored data to a pulse selection circuit 6 (to be described later). Reference numeral 5 denotes storage means composed of a non-volatile memory, which is composed of 2 bits of bit1 and bit0. The non-volatile memory 5 of this embodiment outputs a fixed value of “1” or “1” as shown in Patent Document 1 when the power supply voltage drops below a predetermined value regardless of the data stored in advance. It has the characteristic to do.

  Here, the configuration of the nonvolatile memory 5 and the behavior when the power supply voltage decreases will be described with reference to FIG. FIG. 8 is a circuit diagram showing the configuration of the non-volatile memory 5. Reference numeral 501 denotes a memory cell to which data is written, 502 denotes a read transistor that is turned on when the signal ME becomes “H”, and enters a read state, and 503 is pulled up. The transistor is always on. Reference numeral 504 denotes a comparator.

  Next, when the operation of the nonvolatile memory 5 and the transistor 502 are turned on, the potential at the point P is determined by the inquiry between the memory cell 501 and the transistor 503, and the output of M1 is determined. When the memory cell 501 is in the off state, the potential at the point P becomes Vdd, so that the output of M1 is also “1”. On the other hand, when the memory cell 501 is turned on, since the resistance value of the memory cell 501 is small, the potential at the point P is pulled to the GND side, and the output of M1 becomes “0”.

  However, when the power supply voltage decreases, the relationship between the resistance values of the memory cell 501 and the pull-up transistor 503 is reversed. Even when the memory cell 501 is in the ON state, the potential at the point P is pulled to the Vdd side, and the output of the comparator 504 is “1 "

 As described above, when the power supply voltage Vdd falls below a certain value, the operation of the nonvolatile memory 5 becomes abnormal, and all outputs are “1” regardless of the adjustment data set in advance in the nonvolatile memory 5. End up.

  A pulse selection circuit 6 selects a pulse generated by the drive pulse generation circuit 3 based on data held by the latch circuit 4 (bit1 and bit0 data output from the nonvolatile memory 5). As shown in FIG. 2, if the data is “1” “0”, the pulse selection circuit 6 generates the pulse A generated by the pulse A generation circuit 311. If the data is “0” “1”, the pulse B generation circuit 6 If the pulse B generated in 312 is “0” “0” or “1” “1”, the pulse C generated in the pulse C generation circuit 313 is selected and output to the motor drive circuit 7. The motor drive circuit 7 supplies the supplied pulse to a coil (not shown) of a step motor 8 described later, and transmits the rotation state of a rotor (not shown) of the step motor 8 to a rotation detection circuit 9 described later.

  Reference numeral 8 denotes a step motor composed of a coil (not shown) and a rotor (not shown), which drives a pointer (not shown) via a train wheel (not shown).

  9 determines the rotation or non-rotation of the rotor of the step motor 8 by detecting the back electromotive force after the SP application is stopped by the rotation detection pulse (STB) shown in FIG. 3, and determines the drive pulse generation circuit 3, the counter circuit 10 and the duty The rotation detection circuit controls the selection circuit 11. When it is determined that the rotor of the step motor 8 is rotating, the supply of FP from the drive pulse generation circuit 3 to the pulse selection circuit 6 is prohibited.

  A counter circuit 10 counts the number of times that the rotation detection circuit 9 determines that the rotor (not shown) of the step motor 8 is rotating, and controls the duty selection circuit 11. The counter circuit 10 is further reset when the non-rotation of the rotor is determined, and is configured to count the number of times of continuous rotation determination.

  Reference numeral 11 denotes a duty selection circuit for selecting the chopper duty ratio of the SP. When the rotation detection circuit 9 detects that the rotor is not rotating, the duty selection circuit 11 selects the chopper duty ratio of the next step SP generated by the drive pulse generation circuit 3 to be a larger chopper duty ratio. When the counter circuit 10 counts the rotation as a predetermined number of times, control is performed so as to select a smaller duty ratio.

  A pulse stop determination circuit 12 determines that both data output from bit 1 and bit 0 of the nonvolatile memory 5 are fixed values of “1” and “1”. Here, as shown in FIG. 2, when both bit data stored in advance in the non-volatile memory 5 are fixed values of “1” and “1”, setting is made so that the hand movement is stopped. As described above, when both bit data stored in advance in the nonvolatile memory 5 due to the voltage drop of the power supply change to the fixed values “1” and “1”, the pulse stop determination circuit 12 determines that the state is the above-described state, By prohibiting the pulse supply from the motor drive circuit 7 to the step motor 8, the hand movement of the pointer is stopped.

  In this embodiment, in the case of fixed values “1” and “1”, the needle movement is stopped by prohibiting the pulse supply from the motor drive circuit 7 to the step motor 8. The pulse output may be stopped, or the output stop in both the pulse selection circuit 6 and the motor drive circuit 7 may be used in combination.

  As an advantage of prohibiting the pulse supply to the step motor 8 when the fixed value is “1” or “1”, it is possible to surely prevent the malfunction. This is because it is possible to prohibit the pulse supply and stop the driving of the step motor 8 regardless of the characteristics of the step motor 8.

Further, by stopping supply of pulses to the step motor 8, unnecessary consumption of power consumption in the step motor 8 can be prevented.
As described above, in the first embodiment, even if both data output from bit 1 and bit 0 of the nonvolatile memory 5 change to the fixed values “1” and “1” due to the voltage drop of the power supply, the hand movement is stopped. By setting in advance, the pulse stop determination circuit 12 stops the hand movement, so that no malfunction other than the original operation occurs and the user is not misunderstood.

In the above-described embodiment, the nonvolatile memory 5 that determines the pulse specification has a 2-bit configuration. However, the present invention is not limited to this. It may be configured by 3 bits or more, and 4 or more pulse specifications may be set. In addition, the nonvolatile memory 5 itself has N bits or more, but only n (<N) bits are used for determining the pulse specifications, and the voltage drops when all the nbits used for determining the specifications are fixed values “1”. It is also possible to use the specifications in this case (in this embodiment, pulse stop).
In short, when all the bits of the non-volatile memory 5 used for the specification determination become a fixed value “1”, the specification corresponding to the case where the voltage drops may be set.
The same applies to the embodiments described below.

[Second Embodiment]
The second embodiment is an example of a control method for warning the user that the power supply voltage has dropped when all the bits output from the nonvolatile memory are fixed values.

Hereinafter, a second embodiment according to the present invention will be described with reference to the drawings.
FIG. 4 is a block diagram showing a circuit configuration of an electronic timepiece according to the second embodiment of the present invention, and a voltage drop warning pulse generation circuit 314 that generates a drive pulse for warning a user of a drop in power supply voltage. Is a block diagram in which is mounted on the drive pulse generation circuit 3. Note that a description of the same contents as those in the first embodiment is omitted.

  FIG. 5 is a chart showing specifications of drive pulses generated by the electronic timepiece circuit according to the second embodiment of the present invention. As shown in FIG. 5, when the data output and held by the non-volatile memory 5 is “1” “0”, “0” “1”, “0” “0”, pulse A and pulse B, respectively. , Pulse C is assigned, and when it is “1” “1”, a voltage drop warning pulse is assigned. The other specifications of pulse A, pulse B, and pulse C are the same as those shown in FIG. 2, and the illustration in FIG. 5 is omitted.

  Next, the operation of the above configuration will be described. Based on the data output and held by the nonvolatile memory 5, the pulse selection circuit 6 generates a pulse A generated by the pulse A generation circuit 311 if the data is “1” or “0”, as in the first embodiment. If "0" or "1", the pulse B generated by the pulse B generation circuit 312 is generated, and if "1" or "1", the pulse C generated by the pulse C generation circuit 313 is converted by the motor drive circuit 7 The pointer is operated by selecting and outputting to the coil of the step motor 8.

  In the second embodiment, as shown in FIG. 5, when the output data of bit 1 and bit 0 of the nonvolatile memory 5 are fixed values of “1” and “1”, a pointer is displayed with a voltage drop warning pulse. It is set in advance to operate. When the power supply voltage decreases and the output data of bit 1 and bit 0 of the nonvolatile memory 5 change to fixed values “1” and “1”, the voltage selection warning pulse generated by the pulse selection warning pulse 314 is generated by the pulse selection circuit 6. Is selectively output to the motor drive circuit 7. The voltage drop warning pulse is not a pulse that is output in a regular time period such as 1 second or 2 seconds, such as pulse A, pulse B, or pulse C, but a pulse that is output in an irregular time period. For example, by the battery low warning pulse, anomalous pointer operation is performed such that two pulses are output in the first one second, the pointer is advanced by two seconds, and the second second is paused. Through the anomalous operation of the guideline as described above, the user is notified of a drop in the power supply voltage and suggests charging of the power supply or replacement of the battery.

  By outputting a battery low warning pulse in the case of a fixed value of “1” and “1”, there is an advantage of appealing the user to insufficient charging and prompting charging.

  As described above, in the second embodiment, when both data output from bit 1 and bit 0 of the nonvolatile memory 5 are fixed values such as “1” and “1”, the pointer operates with the voltage drop warning pulse. Thus, even when the data stored in advance in the non-volatile memory 5 changes to a fixed value as described above due to the voltage drop of the power supply, no malfunction other than the original operation occurs. In addition, it is possible to mount an additional function such as warning the user that the voltage of the power supply has dropped.

[Third Embodiment]
The third embodiment is an example of a control method for stopping an electronic timepiece having a chronograph function when all bits output from a nonvolatile memory are fixed values.

Hereinafter, a third embodiment according to the present invention will be described with reference to the drawings.
The chronograph is a stopwatch function that operates with the same power source as the clock function. Time measurement can be performed by starting, stopping, and resetting by external operation. FIG. 6 is a block diagram showing a circuit configuration of an electronic timepiece according to the third embodiment of the present invention, and FIG. 7 shows specifications of a chronograph generated by the circuit of the electronic timepiece according to the third embodiment of the present invention. It is a chart.

  In FIG. 6, reference numeral 13 denotes an external input terminal that supplies a signal generated by an external operation to an input circuit 14 that controls a chrono control circuit 15 described later, and is composed of SW1 and SW2. An input circuit 14 controls the chrono control circuit 15 based on a signal supplied from the external input terminal 13.

  The chrono control circuit 15 manages a clock state such as a measurement execution state, a measurement stop state, and a reset state based on a control signal from the input circuit 14 and controls a chrono counter 16 and a selector 18 described later. Reference numeral 16 denotes a chrono counter that performs time measurement by counting the count signal from the frequency dividing circuit 212. The chrono counter 16 is controlled by the latch circuit 4, a chrono control circuit 15 described later, and a chrono function stop determination circuit 19. The chrono counter 16 performs a counting operation when a signal indicating the measurement execution state is supplied from the chrono control circuit 15, and when a signal indicating the measurement stop state is supplied, the count signal input to the measurement counter is stopped and the counting operation is performed. To stop. Further, when a signal indicating the reset state is supplied, the counter is reset to initialize the measurement time, and the count signal input to the measurement counter is stopped to stop the counting operation.

  Further, as shown in FIG. 7, the chrono counter 16 continuously counts until the maximum measurement time of the clock specification is reached. When the maximum measurement time is reached, the chrono counter 16 notifies the chrono control circuit 15 to that effect. The received chrono control circuit 15 controls the timepiece state from the measurement execution state to the measurement stop state or the reset state. The maximum measurement time is selected and determined based on data output from bit 1 and bit 0 of the nonvolatile memory 5.

Reference numeral 17 denotes a hand movement period selection circuit 1711 for selecting a hand movement period of a chronograph hand (not shown) for displaying a measurement time, and a needle movement speed for returning the chronograph hand to a reference position when the measurement time is reset. This is a chrono specification selection circuit composed of a zero speed selection circuit 1712. Based on the data output from bit 1 and bit 0 of the nonvolatile memory 5 and held, the hand movement cycle selection circuit 1711 is one of the 1 Hz, 5 Hz, and 4 Hz reference signals supplied from the frequency divider 212 as shown in FIG. Is selectively output to the drive pulse generation circuit 3. Similarly, the zero return speed selection circuit 1712 is based on the data output from the bit 1 and bit 0 of the nonvolatile memory 5 and retained, as shown in FIG. 7, the reference signals of 32 Hz, 100 Hz and 64 Hz supplied from the frequency divider circuit 212. Is selectively output to the drive pulse generation circuit 3.
For example, when the data “1” and “0” output and held from bit 1 and bit 0 of the nonvolatile memory 5 are used, the hand movement cycle selection circuit 1711 receives the reference signal output from the frequency dividing circuit 212 as shown in FIG. 1 Hz is selected from among the reference signals, and the zero return speed selection circuit 1712 selects 32 Hz from the reference signal output from the frequency dividing circuit 212 and supplies the signal to the drive pulse generation circuit 3. The drive pulse generation circuit 3 generates a pulse based on the reference signal supplied from the chrono specification selection circuit 17.

Reference numeral 18 denotes a selector that selects a pulse to be supplied to the motor drive circuit 7 from the pulses generated by the drive pulse generation circuit 3 based on the output signal from the chrono control circuit 15.
When the signal indicating the measurement execution state is supplied from the chrono control circuit 15, the selector 18 selects the drive pulse having a 1 Hz cycle generated by the drive pulse generation circuit 3, and outputs it to the motor drive circuit 7. By supplying it to the coil of the motor 8, the chronograph hands are moved at a 1 Hz cycle, and the measurement state is displayed. When a signal indicating a measurement stop state is supplied from the chrono control circuit 15, the stop of the chronograph hands is stopped by selecting the stop of the pulse supply from the drive pulse generation circuit 3 to the motor drive circuit 7. At the same time, the measurement time is displayed according to the stop position. Furthermore, when a signal indicating the reset of the measurement time is supplied from the chrono control circuit 15, the drive pulse having a cycle of 32 Hz generated by the drive pulse generation circuit 3 is selected and output to the motor drive circuit 7, and the step By supplying it to the coil of the motor 8, the chronograph hand is returned to the reference position at a hand movement speed of 32 Hz, and the measurement time display is stopped.
Similarly, as shown in FIG. 7, when the data output from bit 1 and bit 0 of the nonvolatile memory 5 is “0” “1”, the chronograph specification selection circuit 17 sets the chronograph hand movement cycle to 5 Hz. When the zero return speed is selected as 100 Hz and the data is “0” “0” or “1” “1”, the chronograph specification selection circuit 17 sets the chronograph hand moving cycle to 4 Hz and the zero return speed. Is selected to 64 Hz, and the selector 18 controls the operation of the chronograph hands.

  Reference numeral 19 denotes a chrono function stop determination circuit that determines that both data output from bit 1 and bit 0 of the nonvolatile memory 5 are fixed values of “1” and “1”. In the third embodiment, as shown in FIG. 7, when the output data of bit1 and bit0 of the nonvolatile memory 5 are fixed values of “1” and “1”, the chronograph function is stopped. Is set in advance. When the voltage of the power supply decreases and both data output from bit 1 and bit 0 of the nonvolatile memory 5 change to fixed values “1” and “1”, the chrono function stop determination circuit 19 determines the state and performs chrono control. Control is performed so that the chronograph function does not work by putting the circuit 15 in the measurement stop state, initializing the measurement time of the chronograph counter 16 and prohibiting the count operation. Therefore, while the chrono function stop determination circuit 19 determines that the data of bit1 and bit0 of the nonvolatile memory 5 are “1” and “1”, the chronograph function is stopped.

  As described above, in the third embodiment, the chronograph function is preset to stop when both data output from bit 1 and bit 0 of the nonvolatile memory 5 are fixed values such as “1” and “1”. By doing so, even when the data stored in advance in the nonvolatile memory 5 changes to a fixed value as described above due to a decrease in the battery voltage, it is possible to prevent the occurrence of a malfunction such as an operation other than the original operation. . Furthermore, since control is performed so that the chronograph function does not work when the battery voltage is low, further battery voltage drop will be prevented, and in devices using batteries as power storage means, voltage drop due to power generation means The battery can be prevented from deteriorating by shortening the return time from the normal state to the normal state or suppressing excessive battery discharge.

[Modification of Third Embodiment]
Note that this embodiment can be modified not only in the above-described form but also in the following modifications.
In the third embodiment, when the data output from the non-volatile memory 5 determines that the chrono function stop determination time 19 is a fixed value of “1” and “1”, the chrono control circuit 15 is reset. At the same time, the chronograph function is stopped by prohibiting the counting operation of the chronograph counter 16 and resetting the measurement time. However, the chronograph function is stopped by the input signal from the external input terminal 13 in order to stop the chronograph function. The input circuit 14 may be controlled so that the clock state managed by the control circuit 15 does not shift to the measurement execution state.

  This makes it possible to prevent the chronograph from being inadvertently operated by an input operation in the stop state or the reset state when the power supply voltage is lowered.

In this embodiment, the chrono specification selection circuit 17 and the chrono stop determination circuit 19 determine the state of “1” and “1”. However, the chrono control circuit 15 may determine and perform the corresponding control. .
The embodiment of the present invention has been described in detail with reference to the drawings. However, the embodiment is merely an example of the present invention, and the present invention is not limited to the configuration of the embodiment. Accordingly, it is a matter of course that the present invention includes any design change within a range not departing from the gist of the present invention. Therefore, the following changes may be made.

  (1) In the above description, the case where the nonvolatile memory 5 as shown in FIGS. 2 and 7 is configured with 2 bits of bit 0 and bit 1 is discussed. However, in order to increase the specification of the device, it may be configured with 3 bits or more. Of course. Also, the SP output abort timing t1, the rotation detection start timing t2, the FP output timing t3, the FP output abort timing t4, the drive pulse output cycle t5, the chronograph hand movement cycle, the chronograph shown in FIG. The numerical values such as the maximum measurement time and zero return speed of the graph are not limited to the above numerical values, but should be optimized according to the motor and the display body (pointer, date plate, etc.) to be attached.

  (2) In the above description, regarding the hands of the analog timepiece, it has been discussed that when all the bit data output from the nonvolatile memory 5 is a fixed value, the hand movement mode is switched to the hand movement stop or the voltage drop warning hand movement. However, when the present invention is applied to a digital timepiece and all the bit data output from the nonvolatile memory 5 is a fixed value, the display body such as a liquid crystal may be stopped. In addition, in a timepiece in which an analog timepiece and a digital timepiece are mixed, a control method may be adopted in which only the display body is stopped and the operation state of only the hands is continued to reduce the heavy load of the power source.

  (3) In each embodiment, a charging system power source having a power generation unit and a power storage unit is used. However, the embodiment may be applied to a non-charging system power source using a primary battery. Many ICs for watches using a primary battery as a power source are not equipped with a BD circuit due to cost problems, and are suitable for implementing the present invention.

  (4) The present invention may be applied to a clock IC composed of a microcomputer in addition to a random logic IC. At this time, various determinations and processing for the fixed values “1” and “1” when the power is reduced may be performed by software processing by the CPU and a program.

DESCRIPTION OF SYMBOLS 1 Power supply 2 Reference signal generation circuit 211 Oscillation circuit 212 Frequency division circuit 3 Drive pulse generation circuit 311 Pulse A generation circuit 312 Pulse B generation circuit 313 Pulse C generation circuit 314 Voltage drop warning pulse generation circuit 4 Latch circuit 5 Non-volatile memory 6 Pulse Selection circuit 7 Motor drive circuit 8 Step motor 9 Rotation detection circuit 10 Counter circuit 11 Duty selection circuit 12 Pulse stop determination circuit 13 External input terminal 14 Input circuit 15 Chrono control circuit 16 Chrono counter 17 Chrono specification selection circuit 1711 Hand movement cycle selection circuit 1712 Zero-return speed selection circuit 18 Selector 19 Chrono function stop judgment circuit

Claims (5)

An electronic circuit that is mounted on an electronic device and realizes multiple specifications,
It has a plurality of bits of non-volatile memory,
Power supply voltage is output data stored in the nonvolatile memory when it exceeds a predetermined value, storage means for power supply voltage to have the characteristic that outputs a fixed value when drops below a predetermined value,
A selection circuit that determines the specifications of the device based on the data output from the storage means,
The selection circuit includes:
When the power supply voltage exceeds the specified value,
Select the specifications of the device corresponding to the data output from the storage means,
When the power supply voltage drops below a predetermined value and all of the bits used to determine the specifications of the device out of the output data from the storage means are the fixed value,
An electronic circuit configured to select a specification corresponding to a power supply voltage drop. Having a drive circuit for driving the display means of the mounted electronic device,
An electronic circuit according to claim 1, wherein said storage means, characterized in that that will be configured to store data corresponding to the drive specification of the driving circuit. The display means has a pointer and a step motor for driving the pointer,
The drive means is a drive pulse generation circuit for driving the step motor,
The selection circuit includes:
When the power supply voltage exceeds the specified value,
Select the specification of the drive pulse of the step motor corresponding to the data output from the storage means,
When the power supply voltage drops below a predetermined value and all of the bits used for determining the device specifications in the output data from the storage means are the fixed values, the drive specification corresponding to the power supply voltage drop is selected. The electronic circuit according to claim 2. The electronic circuit according to claim 3 , wherein the drive specification corresponding to the power supply voltage drop is a specification for stopping the drive pulse of the step motor or a specification for supplying a voltage drop warning pulse. . Having an input circuit for inputting an input signal generated by an external operation of the mounted electronic device;
The selection circuit invalidates an input signal from the input circuit when all of the bits used for determining the specifications of the device in the output data from the storage means are the fixed values.
Electronic circuit according to any one of claims 1 4, characterized in that.

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