JP5954254B2 - Semiconductor wafer evaluation system and evaluation method - Google Patents

Description

  The present invention relates to an evaluation apparatus for evaluating the fracture strength of a semiconductor wafer and specifying a defect site, and a wafer evaluation method.

In the semiconductor device manufacturing process, if a crack occurs in the semiconductor wafer of the material, a large loss occurs. For this reason, there is a high demand for semiconductor wafers that are difficult to break during device manufacturing.
In addition, semiconductor wafers as substrates have become larger in diameter, and importance has been placed more on fracture resistance.

  As a cause of the destruction of the silicon wafer, the existence of a Grown-in defect is pointed out. The silicon single crystal pulled by the CZ method has crystal defects due to supersaturated impurity oxygen, silicon vacancies, etc., and the crystal defects introduced during the growth of the silicon single crystal are called Grown-in defects. . When the growth conditions of the silicon single crystal are not good, for example, when the pulling rate varies greatly, a large amount of grown-in defects are generated in the crystal.

  In semiconductor and liquid crystal manufacturing processes, especially dry etching, ion implantation, vapor deposition, etc., high temperature / rapid heating / rapid cooling has progressed, and the number of manufacturing processes performed in a vacuum or in a dry environment is also increasing. . In such a process, there is a case where a bulk defect grows into a large crystal defect and becomes a starting point of destruction. For this reason, it is important to evaluate the existence of the Grown-in defect and the breaking strength of the defect site.

  However, since silicon wafers are brittle materials, the conventional general material evaluation techniques have large variations in measured values. Further, standard equipment for evaluating and inspecting the fragility of the wafer flat surface part is not commercially available, and there is no JIS standard.

Therefore, an apparatus as disclosed in Patent Document 1 has been devised. Here, the measuring apparatus and measuring method of Patent Document 1 will be briefly described. 6 and 7 are schematic explanatory views of a silicon wafer falling ball impact tester described in Patent Document 1. FIG.
A single-axis slider robot 102 is built on the apparatus base 101, an electromagnetic magnet 104 is set on the slider 103, and a steel ball 105 (chrome steel) is adsorbed by a magnetic force. In the impact fracture test, the steel ball 105 can be dropped from an arbitrary height (0 to 2000 mm) by moving the slider 103 up and down. On the silicon piece holding part 110, a polycarbonate cover 106 for preventing the steel ball 105 from bouncing when the silicon piece W is not broken is installed.

  Below the silicon piece holding part 110, a ball cradle 107 (made of polycarbonate) that receives the silicon piece and the steel ball 105 when the silicon piece is broken is installed. FIG. 7 is an exploded view of the silicon piece holder 110. The silicon piece W is placed on a silicon piece base 108 having a hole and held by a cylindrical silicon piece holding jig 109 with a constant force. In Patent Document 1, it is possible to control the strength of the fracture energy by changing the weight (size) of the steel ball 105 and changing the height of the fall.

JP 2011-165881 A

When the silicon wafer falling ball type impact tester described in Patent Document 1 is used, the fracture strength of the grown-in defect can be evaluated if the portion having the grown-in defect is known. However, the site of the Grown-in defect is rarely known.
In addition, in order to utilize the principle of the steer case method with constant drop weight, at least 20 samples are required for each sample.

Furthermore, since the grown-in defects of the CZ silicon wafer are extremely small, it is difficult to find them unless heat treatment at 800 ° C. or more is performed, but the heat treatment method requires a lot of cost and labor.
From these points, there has been a demand for a measurement method capable of more easily measuring the location of a practical Grown-in defect as a product inspection and its breaking strength.

  The present invention has been made in view of the above-described problems, and can easily measure the high-precision fracture strength of a silicon wafer, and further identify a portion of a grown-in defect in the silicon wafer without performing a heat treatment. An object of the present invention is to provide a semiconductor wafer evaluation system capable of satisfying the requirements.

In order to achieve the above object, according to the present invention, there is provided a semiconductor wafer evaluation system having a destructive device for applying a load to a semiconductor wafer and destroying the semiconductor wafer and a microscope for observing the fracture surface of the semiconductor wafer destroyed by the destructive device The breaking device includes a support jig for supporting a semiconductor wafer having a single groove processed in a diameter direction, and a load in a direction along the groove of the semiconductor wafer supported by the support jig. A load means for applying, and applying a load in a direction along the groove by the load means from a surface opposite to a surface of the semiconductor wafer processed by the support jig supported by the support jig; After damaging the semiconductor wafer, the fracture surface of the semiconductor wafer is observed with the microscope, thereby measuring the fracture strength of the semiconductor wafer and identifying the defect site. It is, evaluation system of a semiconductor wafer, characterized in that as it can evaluate the semiconductor wafer is provided.

When evaluating a semiconductor wafer using such an evaluation system, variations in the maximum breaking load can be reduced, and a more accurate evaluation can be easily performed, and the fracture surface of the semiconductor wafer can be observed with a microscope. Can accurately evaluate the distribution of the fracture starting points. As a result, a Grown-in defect site can be identified, and its breaking strength can be evaluated.
Further, since the maximum breaking load until breaking is reduced, it is not necessary to make the breaking device expensive and large, and the measurement time can be shortened, so that the evaluation cost can be suppressed.

  At this time, the load means installs a rod-shaped member having a length equal to or greater than the length of the groove along the groove on a surface opposite to the surface of the semiconductor wafer where the groove is processed, and the rod-shaped member. It is preferable to apply a load via

  If it has such a load means, a load can be easily applied equally along a groove | channel, As a result, the maximum destruction load of a semiconductor wafer can be measured with higher precision.

  Further, the present invention is a method for evaluating a semiconductor wafer, wherein a single groove is processed in the diameter direction of the semiconductor wafer, and the semiconductor wafer processed with the groove is supported, and then the groove of the semiconductor wafer is processed. After applying a load in the direction along the groove from the surface opposite to the finished surface, and destroying the semiconductor wafer, the fracture surface of the semiconductor wafer is measured by observing the fracture surface of the semiconductor wafer with a microscope. A semiconductor wafer evaluation method is provided, wherein the semiconductor wafer is evaluated by specifying a defective portion.

With such an evaluation method, variation in the maximum breaking load can be reduced, and more accurate evaluation can be easily performed. Furthermore, by observing the fracture surface of the semiconductor wafer with a microscope, the distribution of the fracture origin can be accurately evaluated. As a result, a Grown-in defect site can be identified, and its breaking strength can be evaluated.
Further, since the maximum breaking load until breaking is reduced, it is not necessary to use an expensive large breaking device, and the measurement time is shortened, so that the evaluation cost can be suppressed.

  At this time, it is preferable that a groove to be processed into the semiconductor wafer is a chevron notch, and the depth of the groove is 1% to 60% of the thickness of the semiconductor wafer.

By making the groove a chevron notch, a crack can be stably grown from the apex of the chevron notch to the limit crack length. As a result, the maximum breaking load until breaking can be easily obtained.
In addition, by changing the depth of the groove to be processed in this way, it is possible to set the optimum groove depth for the type and thickness of the semiconductor wafer to be measured, improving measurement sensitivity and measuring. Variation in values can be suppressed.

  Further, at this time, when a load is applied to the groove, a rod-shaped member having a length equal to or longer than the length of the groove is placed along the groove on the surface opposite to the surface of the semiconductor wafer where the groove is processed. It is preferable that the load be applied via the rod-shaped member.

  In this way, the load can be easily and evenly applied along the groove, and as a result, the maximum breaking load of the semiconductor wafer can be measured with higher accuracy.

The present invention is a semiconductor wafer evaluation system having a breaking device that breaks a semiconductor wafer by applying a load, and a microscope that observes a breaking surface of the semiconductor wafer broken by the breaking device. Is provided with a supporting jig for supporting a single-machined semiconductor wafer and a load means for applying a load in a direction along the groove of the semiconductor wafer, and along the groove from the surface opposite to the groove processed surface. After breaking the semiconductor wafer by applying a load in the direction, the semiconductor wafer can be evaluated by observing the broken surface of the semiconductor wafer with a microscope and measuring the breaking strength of the semiconductor wafer and identifying the defective part Therefore, variations in the maximum breaking load can be reduced, and more accurate evaluation can be easily performed. Furthermore, by observing the fracture surface of the semiconductor wafer with a microscope, it is possible to evaluate the distribution of the fracture start points, specify the Grown-in defect site, and accurately evaluate the relationship with the fracture strength.
Further, since the maximum breaking load until breaking is reduced, an expensive large breaking device is not necessary, and the measurement time is shortened, so that the evaluation cost can be suppressed.

It is the schematic which showed an example of the destruction system of this invention. It is the schematic explaining a mode that a groove | channel is processed into the semiconductor wafer which is an evaluation object in this invention, and a semiconductor wafer. It is a figure explaining the direction of the crack from the vertex of the chevron notch of the semiconductor wafer which is the evaluation object in the present invention. It is distribution of a fracture start point of a good quality wafer in an example, and a fracture surface photograph. It is distribution of the fracture origin of a defective wafer in an Example, and a fracture surface photograph. It is the schematic of a falling ball type impact fracture testing machine. It is the figure which expanded a part of falling ball type impact fracture testing machine.

Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.
As described above, since the semiconductor wafer is a brittle material, the conventional general material evaluation technique causes a large variation in measurement values.

  Conventionally, it is necessary to perform a heat treatment that requires a lot of cost and labor in order to identify a defective part, and there is a problem that a defective part cannot be identified without performing the heat treatment.

  Therefore, the present inventor has intensively studied in order to measure the practical fracture strength and specify the site of the Grown-in defect as a product inspection of a semiconductor wafer. As a result, a single groove is processed in the diameter direction of the semiconductor wafer, a load is applied in a direction along the groove from the surface opposite to the processed surface of the semiconductor wafer, and the semiconductor wafer is destroyed. By observing the fracture surface of the semiconductor with a microscope, it was conceived that the fracture strength of the semiconductor wafer can be measured with high accuracy and the defect site can be identified. And the best form for implementing these was scrutinized and the present invention was completed.

Hereinafter, the semiconductor wafer evaluation system of the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto.
As shown in FIG. 1, a semiconductor wafer evaluation system 1 according to the present invention includes a destruction device 2 for breaking a semiconductor wafer W and a microscope 3 for observing a broken surface of the broken semiconductor wafer. The breaking device includes a support jig 6 for supporting the semiconductor wafer W in which the grooves 4 are processed, and a load means 5 for applying a load to the semiconductor wafer W supported by the support jig 6.

Further, the load means 5 can apply a load in the direction along the groove 4 from the surface opposite to the surface where the groove of the semiconductor wafer W supported by the support jig 6 is processed.
The microscope 3 can accurately evaluate the distribution of the fracture starting points by observing the fracture surface after breaking the semiconductor wafer W with the breaker 2 described above.
Here, the groove 4 to be processed into the semiconductor wafer W may be a chevron notch 7 as shown in FIG. 2, but is not particularly limited and may have any other shape.

With such an evaluation system 1, the maximum breaking load when the semiconductor wafer W is brittlely broken can be measured. As a result, variation in the maximum breaking load can be reduced, and more accurate evaluation can be performed. Furthermore, by observing the fracture surface of the semiconductor wafer W with a microscope and measuring the distribution of the fracture start points, the Grown-in defect site can be identified and its influence can be evaluated.
Further, since the maximum breaking load until breaking is reduced, an expensive large breaking device is not necessary, and the measurement time is shortened, so that the evaluation cost can be suppressed.

As shown in FIG. 1, the support jig 6 is composed of, for example, two rod-shaped members, and supports each semiconductor wafer so that each of the rod-shaped members is parallel to the groove 4 and the groove 4 is positioned at the center. It can be configured as possible.
With such a configuration, it is possible to improve the measurement sensitivity of the destruction device and improve the measurement variation.

  Further, as shown in FIG. 1, a rod-like member 10 having a length equal to or greater than the length of the groove 4 is used as the load means 5 on the surface opposite to the surface of the semiconductor wafer W where the groove 4 is processed. It is preferable that the load is applied along the rod-shaped member 10.

  If it has such a load means 5, a load can be applied easily along a groove | channel, As a result, the maximum destruction load of the semiconductor wafer W can be measured with high precision.

Next, the method for evaluating a semiconductor wafer of the present invention will be described below by taking the case of using the semiconductor wafer evaluation system of the present invention as described above, but the present invention is not limited thereto.
First, the grooves 4 are processed in the diameter direction of the semiconductor wafer W to be evaluated using, for example, the dicer apparatus 8 or the like. The semiconductor wafer W is supported by the support jig 6. At this time, the semiconductor wafer W can be supported such that the surface on the processed side of the groove 4 faces downward. Next, from the surface opposite to the processed surface of the groove 4 of the semiconductor wafer W supported by the support jig 6, that is, from the upper surface of the semiconductor wafer W in the example shown in FIG. A load is applied in the direction along which the semiconductor wafer W is broken. Then, the fracture surface of the destroyed semiconductor wafer W is observed with the microscope 3, and the semiconductor wafer W is evaluated by measuring the fracture strength of the semiconductor wafer W and specifying the defective portion.

With such an evaluation method, variations in the maximum breaking load can be reduced, and more accurate evaluation can be performed. Furthermore, the Grown-in defect site can be specified by observing the fracture surface of the semiconductor wafer with a microscope and measuring the distribution of the fracture origin.
Further, since the maximum breaking load until breaking is reduced, an expensive large breaking device is not necessary, and the measurement time is shortened, so that the evaluation cost can be suppressed.

  At this time, as shown in FIGS. 2 and 3, the groove 4 to be processed into the semiconductor wafer W is preferably a chevron notch 7.

  The depth of the groove 4 is preferably 1% to 60% of the thickness of the semiconductor wafer.

  In this way, it is possible to set the optimum depth of the processing groove with respect to the type and thickness of the semiconductor wafer to be measured, thereby improving the measurement sensitivity and suppressing the variation in the measured value.

  At this time, as shown in FIG. 1, when a load is applied to the groove 4, the rod-shaped member 10 having a length equal to or longer than the length of the groove is placed on the opposite side of the surface of the semiconductor wafer W where the groove 4 is processed. It is preferable to install along the said groove | channel 4 in the surface of this, and to apply a load through the rod-shaped member 10. FIG.

  In this way, the load can be easily and evenly applied along the groove, and as a result, the maximum breaking load of the semiconductor wafer can be measured with high accuracy.

  EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples of the present invention, but the present invention is not limited to these.

(Example)
The semiconductor wafer was evaluated according to the semiconductor wafer evaluation method of the present invention.
As wafers to be evaluated, 20 silicon wafers having a diameter of 300 mm, a crystal orientation [100], a P-type, an oxygen concentration of 15 ppma, a resistivity of 20 Ωcm, and a thickness of 780 μm were used.
10 of them were defective wafers having a doughnut-shaped grown-in defect having a width of 5 mm at a position 30 mm from the outer periphery, and the remaining 10 wafers were non-defective wafers having no grown-in defects. The Grown-in defect occurred because this donut-shaped region had a lower interstitial oxygen concentration of 2.5 ppma than the surrounding area.
Here, a chevron notch was machined in the diameter direction on a semiconductor wafer to be evaluated with a dicer apparatus manufactured by DISCO Corporation having a blade thickness of 80 μm, a tip angle θ = 60 °, and a diamond particle size of 3000 aluminum bond. The chevron notch was processed so as to be in a 45 ° direction on the cleaved surface of the semiconductor wafer, and the groove depth was 160 μm.

Next, these silicon wafers were placed on a support jig with the surface processed with the chevron notch as the lower surface, and a bar-shaped member made of SiC, having a diameter of 5 mm and a length of 320 mm was formed from the upper surface of the silicon wafer to the chevron notch Pressed along the direction.
The distance between the supports of the silicon support jig was set to 150 mm, and a load was applied to the rod-shaped member from above at a load speed of 0.05 mm / s, and a three-point bending test was performed to break the silicon wafer. Then, the breaking strength when the silicon wafer was broken was measured, the fracture surface was observed with a microscope, the distribution of the fracture starting points was measured, and the silicon wafer was evaluated.

The silicon wafer changed elastically until rupture, and the bending elastic modulus was not different depending on the presence or absence of a Grown-in defect. When the silicon wafer reached the load limit Kc, it caused brittle fracture and instantaneously fractured.
All of the 20 silicon wafers were broken from the chevron notch grooves, and the silicon wafers were cracked cleanly in about 2 to 3 sections. This is because stress concentrates on the bottom of the groove and becomes a starting point of fracture.

Further, the load when these silicon wafers were broken was measured as the maximum breaking load (kN).
Table 1 shows the maximum breaking load (kN) of the non-defective wafer and the defective wafer. In the example, the maximum breaking load is suppressed to be considerably lower than the comparative example described later. Therefore, the semiconductor wafer was not shattered at the time of destruction, and the fracture surface could be observed with a microscope. It can also be seen that the standard deviation is small, that is, the variation in the maximum breaking load is small and stable.

  FIG. 4 is a distribution of fracture starting points of a good wafer and a photograph of the fracture surface. The fracture surface is cracked in a plane so as to be divided into two cleanly from the bottom of the groove, and there are many fractures from the center of the wafer, and a fracture pattern in the lateral direction from the fracture starting point to the outer periphery is observed. Since the destruction pattern is widely distributed in the groove direction, the initial point is difficult to understand. First, the destruction pattern extends so as to penetrate the wafer cross section, and a pattern spreading in a fan shape from the destruction starting point is observed.

FIG. 5 is a distribution of fracture starting points of a defective wafer and a photograph of the fracture surface.
The fracture surface is three-dimensionally cracked in a shape with many irregularities so that the bottom of the groove is rolled. The starting point of destruction is narrow and the starting point can be clearly confirmed. Around the starting point, there is a large, three-dimensionally cracked shell-shaped crack. As for the pattern of the destruction, the one in which the extension of the crack is stepped can be seen. This is thought to be because cracks are difficult to extend in a specific direction.

  The breakdown starting point is often a breakdown from a boundary with a grown-in defect area or a non-defective area. This is because the stress intensity factor is different between the grown-in defect area and the non-defective area, and the behavior of the physical properties near the crack tip is different, so stress concentration occurs in the grown-in defect area at the bottom of the groove, so It is thought that cracking occurs. The maximum breaking load (kN) of a defective wafer is about 1/3 of a non-defective wafer.

  From the above results, it was found that the variation of the maximum breaking load can be reduced by the present invention, and more accurate evaluation can be easily performed. Furthermore, by observing the fracture surface of the semiconductor wafer with a microscope, the distribution of the fracture starting points can be accurately evaluated as shown in FIG. As a result, it was confirmed that the Grown-in defect site 9 can be specified and its strength can be evaluated.

(Comparative example)
A three-point bending test was performed under the same conditions as in the Examples, except that the groove was not processed in the semiconductor wafer to be evaluated and an evaluation apparatus without a microscope was used.
As a result, the silicon wafer changed elastically until breakage, and no difference was observed in the flexural modulus without the presence of a Grown-in defect. When the silicon wafer reached its limit, it was brittle and fractured instantaneously. The sample was shattered and sharp debris was scattered in all directions.
Further, the maximum breaking load (kN) when these silicon wafers were broken was measured.
As shown in Table 1, the maximum breaking load (kN) was about 2 to 20 times that of the wafer having the chevron notch groove of the example.

  All 20 silicon wafers were crushed into pieces. This is because the entire silicon wafer is elastically deformed and accumulates a large bending stress, and at the same time when it breaks, the stress is released instantaneously to shatter the silicon pieces.

The maximum breaking load (kN) of a defective wafer is about 1/2 of that of a non-defective wafer, but the standard deviation is large and the variation is large, so that the significant difference in the maximum breaking load is not clear.
Moreover, since the comparative example requires a long measurement time and a large universal testing machine, the evaluation cost is higher than that of the example. Furthermore, the silicon wafer is shattered and the fracture surface cannot be observed, and there is also a problem in terms of safety, such as sharp pieces scattered.

  Further, since the comparative example does not include a microscope as in the present invention, the fracture surface cannot be observed with a microscope regardless of whether or not the wafer is crushed at the time of destruction. Therefore, the fracture surface was observed, and the defect site could not be identified from the distribution of the fracture starting points.

  Table 1 summarizes the results of the examples and comparative examples.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor wafer evaluation system, 2 ... Destruction apparatus, 3 ... Microscope,
DESCRIPTION OF SYMBOLS 4 ... Groove, 5 ... Load means, 6 ... Support jig, 7 ... Chevron notch, 8 ... Dicer device 9 ... Grown-in defect area | region, 10 ... Rod-shaped member, W ... Semiconductor wafer,
DESCRIPTION OF SYMBOLS 101 ... Device base, 102 ... Single-axis slider type robot, 103 ... Slider 104 ... Electromagnetic magnet, 105 ... Steel ball, 106 ... Polycarbonate cover 107 ... Ball cradle, 108 ... Silicon single stand, 109 ... Silicon piece pressing jig 110 ... Silicon piece holding part.

Claims (5)

A semiconductor wafer evaluation system having a destruction device that breaks a semiconductor wafer by applying a load, and a microscope that observes a destruction surface of the semiconductor wafer destroyed by the destruction device,
The breaking apparatus applies a load in the direction of the diameter along the groove of the semiconductor wafer supported with support jig for supporting a semiconductor wafer in which the grooves are machined one diametrically, with the supporting jig By applying a load in a direction of a diameter along the groove by the load means from a surface opposite to the surface of the semiconductor wafer processed by the load, the semiconductor wafer supported by the support jig. After destroying the wafer, by observing the fracture surface of the semiconductor wafer with the microscope, the semiconductor wafer can be evaluated by measuring the fracture strength of the semiconductor wafer and identifying the defect site. A semiconductor wafer evaluation system.   The load means installs a rod-shaped member having a length equal to or greater than the length of the groove along the groove on a surface opposite to the surface of the semiconductor wafer processed through the groove, and through the rod-shaped member. 2. The semiconductor wafer evaluation system according to claim 1, wherein a load is applied. A method for evaluating a semiconductor wafer, comprising:
After processing one groove in the diameter direction of the semiconductor wafer and supporting the semiconductor wafer processed in the groove, the direction of the diameter along the groove from the surface opposite to the surface processed in the semiconductor wafer The semiconductor wafer is evaluated by measuring the breaking strength of the semiconductor wafer and identifying the defect site by observing the fracture surface of the semiconductor wafer with a microscope after applying a load at and destroying the semiconductor wafer. A method for evaluating a semiconductor wafer.   4. The semiconductor wafer evaluation method according to claim 3, wherein a groove to be processed into the semiconductor wafer is a chevron notch, and a depth of the groove is 1% to 60% of a thickness of the semiconductor wafer.   When applying a load to the groove, a rod-shaped member having a length equal to or longer than the length of the groove is installed along the groove on the surface opposite to the surface of the semiconductor wafer where the groove is processed, 5. The method for evaluating a semiconductor wafer according to claim 3, wherein a load is applied through the rod-shaped member.

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