JP5947743B2 - Semiconductor polarization control element - Google Patents

Semiconductor polarization control element Download PDF

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JP5947743B2
JP5947743B2 JP2013089777A JP2013089777A JP5947743B2 JP 5947743 B2 JP5947743 B2 JP 5947743B2 JP 2013089777 A JP2013089777 A JP 2013089777A JP 2013089777 A JP2013089777 A JP 2013089777A JP 5947743 B2 JP5947743 B2 JP 5947743B2
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義弘 小木曽
義弘 小木曽
神徳 正樹
正樹 神徳
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Description

本発明は半導体偏波制御素子に関し、より詳しくは任意の偏光状態を高速に制御可能な導波路型の半導体偏波制御素子に関する。   The present invention relates to a semiconductor polarization control element, and more particularly to a waveguide type semiconductor polarization control element capable of controlling an arbitrary polarization state at high speed.

高速な偏波の制御は光通信システムにおいて重要な役割を担う技術である。例えば通常の長距離光通信で用いられている単一モードファイバ中では光の偏光状態が時間と共に複雑に変動するため、偏波依存性を有する光集積回路に接続する場合には偏波依存損失(PDL)が問題となる。また、直交する各偏波に光変調信号をのせた偏波多重伝送においては、光受信側でランダムに変動する偏光状態を高速に解析、制御しなければ各直交偏波にのせた信号を正確に受信することはできない。さらに、光伝送速度の高速化に伴う偏波モード分散(PMD)が無視できなくなる。これら背景を鑑みて、近年、無限追従可能な高速偏波コントローラの提案がなされている(例えば特許文献1)。   High-speed polarization control is a technology that plays an important role in an optical communication system. For example, in a single-mode fiber used in normal long-distance optical communications, the polarization state of light changes in a complicated manner with time, so when connecting to an optical integrated circuit having polarization dependence, the polarization dependence loss (PDL) is a problem. In addition, in polarization multiplexing transmission in which an optical modulation signal is placed on each orthogonal polarization, the signal on each orthogonal polarization is accurate unless the polarization state that randomly varies on the optical receiver side is analyzed and controlled at high speed. Cannot be received. Furthermore, polarization mode dispersion (PMD) accompanying an increase in optical transmission speed cannot be ignored. In view of these backgrounds, a high-speed polarization controller capable of infinite tracking has recently been proposed (for example, Patent Document 1).

無限追従可能な偏波コントローラとしては主に回転波長板を機械的に回転させることによって入射偏光を目標の出射偏光に変換するもの、及びニオブ酸リチウム(LN)に代表される電気光学効果をもつ結晶を基板材料とした導波路型のものがある。前者は、たとえば直交する2つの固有偏光軸間の位相差がそれぞれπ/2、πである1/4波長板と1/2波長板とが用いられ、入射側から1/4波長板、1/2波長板、1/4波長板を順次配置し、各波長板の軸方向を回転調整することによって、任意の出射偏光に変換出力できる。また後者は、結晶の圧電性を利用した電気光学効果を用いるため、機械的制御の前者に比べて、より高速(MHz以上)に偏波を制御できる点で優れている。   The polarization controller capable of infinite tracking mainly has an electro-optic effect typified by lithium niobate (LN), which converts incident polarized light into target emitted polarized light by mechanically rotating a rotating wave plate. There is a waveguide type using a crystal as a substrate material. The former uses, for example, a quarter-wave plate and a half-wave plate whose phase differences between two orthogonal orthogonal polarization axes are π / 2 and π, respectively. A half-wave plate and a quarter-wave plate are sequentially arranged, and by rotating and adjusting the axial direction of each wave plate, it can be converted into an arbitrary output polarized light. The latter is superior in that the polarization can be controlled at a higher speed (MHz or higher) than the former of the mechanical control because the electro-optic effect utilizing the piezoelectricity of the crystal is used.

特許第4113877号公報Japanese Patent No. 4113877 特許第2646558号公報Japanese Patent No. 2646558 特開昭63−118709号公報JP-A-63-1118709

Optics letters Vol. 11, No. 1, pp. 39-41, Suwat ThaniyavarnOptics letters Vol. 11, No. 1, pp. 39-41, Suwat Thaniyavarn

図2はX軸カットLN偏波制御素子(Z軸導波路形成)の断面概略図であり、図中の電極Pに一定のバイアス電圧を印加した状態で、偏波を回転させるための電圧を電極Rに印加して、偏波を制御する。ここでは一次の電気光学(ポッケルス)効果による媒質の複屈折制御を利用することで偏波の制御を行っている。ここで、その詳細について以下に述べる。   FIG. 2 is a schematic cross-sectional view of an X-axis cut LN polarization control element (Z-axis waveguide formation). The voltage for rotating the polarization in a state where a constant bias voltage is applied to the electrode P in the figure. Applied to the electrode R to control the polarization. Here, the polarization is controlled by utilizing the birefringence control of the medium by the primary electro-optic (Pockels) effect. Details thereof will be described below.

LN結晶において、X軸方向に電界を印加し、Z軸方向に光を伝搬させる場合には、媒質の屈折率楕円体は以下のように表される。   In an LN crystal, when an electric field is applied in the X-axis direction and light is propagated in the Z-axis direction, the refractive index ellipsoid of the medium is expressed as follows.

Figure 0005947743
Figure 0005947743

この式を図示すると図1のように表される。すなわち、電圧を印加しない場合にはXY面の屈折率楕円体は真円(等方性結晶)であったのに対し、電界印加により屈折率楕円体は真円を歪ませ(異方性結晶)、さらに主軸が45°傾く。これは波長板を45°傾けた状態と等価であり、この状態で、例えば結晶面に水平なTE偏波を当該媒質に入射させ適切な電圧値を印加させれば、偏波はTEモードからTMモード(基板垂直方向の偏光)に変換することができる。しかし、チタン(Ti)拡散で形成されるLNの光導波路は、導波路自体に構造的異方性を有するため、これら構造的異方性を何らかの方法で制御しなければ、前記電気光学効果によるTE−TMモード変換を効率的(低電圧制御)に行うことができない。下式はTE偏光入射に対して、TMモードに偏波変換される割合をモード結合理論に基づいて表した式である。 This equation is illustrated as shown in FIG. That is, when no voltage is applied, the refractive index ellipsoid on the XY plane is a perfect circle (isotropic crystal), whereas the refractive index ellipsoid distorts the perfect circle by applying an electric field (an anisotropic crystal). ) Further, the main axis is inclined 45 °. This is equivalent to a state in which the wave plate is tilted by 45 °. In this state, for example, if a TE polarized wave that is horizontal to the crystal plane is incident on the medium and an appropriate voltage value is applied, the polarized wave is changed from the TE mode. TM mode (polarized light in the vertical direction of the substrate) can be converted. However, since the optical waveguide of LN formed by titanium (Ti) diffusion has structural anisotropy in the waveguide itself, unless the structural anisotropy is controlled by any method, the above-described electro-optic effect is caused. TE-TM mode conversion cannot be performed efficiently (low voltage control). The following expression is an expression that expresses the ratio of polarization conversion to the TM mode with respect to TE polarized light incidence based on the mode coupling theory.

Figure 0005947743
Figure 0005947743

Figure 0005947743
Figure 0005947743

ここでκとは結合係数であり、TEモード⇔TMモード間のパワー移行のしやすさを表している。また、P0は全光出力パワー、δβはTE−TM間の伝搬定数差(複屈折)、zは伝搬方向の変数、αは光と電界の重なり合い(1≧α≧0)、rはポッケルス定数、noは媒質屈折率、Vは印加電圧、Gapは電極間距離である。 Here, κ is a coupling coefficient and represents the ease of power transfer between the TE mode and the TM mode. P 0 is the total optical output power, δβ is a propagation constant difference (birefringence) between TE and TM, z is a variable in the propagation direction, α is an overlap of light and electric field (1 ≧ α ≧ 0), and r is Pockels. constant, the n o medium refractive index, V is the applied voltage, Gap, is the distance between electrodes.

上式より、TMモード変換効率を高めるためにはδβを小さくするか、κを大きくする必要がある。LNデバイスの場合、前述した導波路構造上の複屈折によって無バイアス時にδβをゼロとすることは困難である。そこで、例えば図2に示すように(非特許文献1)電極Pに適切なバイアス電圧を印加し、導波路に対して基板水平方向電界を印加することによって、TE−TM間の伝搬定数差δβをゼロにしている。しかし、図中のGap2は>10μmと大きな間隔が求められるため、所望の電界強度を得るための印加電圧値は高くなってしまう(20V以上)といった問題がある。また、偏波変換に寄与するLNのポッケルス定数rは3.4pm/Vと決して大きな値とはいえず、図2に示すGap1の値も>3.5μmと大きいギャップ間隔が求められるため、偏波回転を行う上で必要な電極Rに印加する電圧値も高くなってしまう(電極長1cmに対し7V)といった問題がある。結果として、低い電圧値で偏波を制御しようとする場合には、電圧印加領域の長さをさらに長くする等の必要が生じてしまい、デバイスサイズが肥大化してしまうほか、長尺化に伴い複雑な電圧制御も求められる。なお、当該制御効率低下に対して、LNを薄膜化し、裏面電極を設けることで低電圧化を図る方法が提案されているが(例えば特許文献2)、複雑なデバイス構造が要求され、また大幅な低電圧化は困難であるため、依然としてLN材料による偏波制御素子の低電圧化、小型化には課題が残る。   From the above equation, in order to increase the TM mode conversion efficiency, it is necessary to decrease δβ or increase κ. In the case of an LN device, it is difficult to make δβ zero when there is no bias due to the above-described birefringence on the waveguide structure. Therefore, for example, as shown in FIG. 2 (Non-Patent Document 1), an appropriate bias voltage is applied to the electrode P, and a substrate horizontal direction electric field is applied to the waveguide, whereby a propagation constant difference δβ between TE and TM is applied. Is set to zero. However, since Gap2 in the figure requires a large interval of> 10 μm, there is a problem that an applied voltage value for obtaining a desired electric field intensity becomes high (20 V or more). Further, the Pockels constant r of LN contributing to polarization conversion is never a large value of 3.4 pm / V, and the gap interval of Gap1 shown in FIG. There is a problem that the voltage value applied to the electrode R necessary for wave rotation also becomes high (7 V for an electrode length of 1 cm). As a result, when the polarization is controlled with a low voltage value, the length of the voltage application region needs to be further increased, and the device size becomes larger and the lengthening becomes longer. Complex voltage control is also required. A method for reducing the voltage by reducing the LN thickness and providing a back electrode has been proposed (for example, Patent Document 2), but a complicated device structure is required and greatly reduced. Since it is difficult to reduce the voltage, problems still remain in reducing the voltage and reducing the size of the polarization control element made of the LN material.

本発明は、このような問題に鑑みてなされたものであって、導波路型の偏波制御素子を低電圧制御かつ小型に実現させることで簡易構成による高速偏波制御素子の実現を目的とする。   The present invention has been made in view of such problems, and aims to realize a high-speed polarization control element with a simple configuration by realizing a waveguide-type polarization control element with low voltage control and small size. To do.

上記目的を達成するために、第1の発明に係る偏波制御素子では、閃亜鉛鉱形半導体結晶の半絶縁性基板面上に、少なくとも第一のpクラッド層及び第二のpクラッド層が導波光を基板水平方向から挟んだ構造を有し、且つ導波層の上層に少なくとも第一のnクラッド層を設ける。さらに、前記pクラッド層間に水平方向電界が印加されるように電極A、Bが前記pクラッド層上にそれぞれ設けられ、且つ導波層へ基板垂直方向電界が印加されるように電極Cを前記nクラッド層上に設けることとした。   In order to achieve the above object, in the polarization control device according to the first aspect of the present invention, at least a first p-cladding layer and a second p-cladding layer are provided on the semi-insulating substrate surface of the zincblende semiconductor crystal. It has a structure in which guided light is sandwiched from the horizontal direction of the substrate, and at least a first n-clad layer is provided above the waveguide layer. Further, electrodes A and B are provided on the p-cladding layer so that a horizontal electric field is applied between the p-cladding layers, and the electrode C is arranged so that a substrate vertical electric field is applied to the waveguide layer. It was decided to be provided on the n-clad layer.

また、第2の発明に係る偏波制御素子では、閃亜鉛鉱形半導体結晶の半絶縁性基板面上に、少なくとも第一のpクラッド層及びnクラッド層が導波光を基板水平方向から挟んだ構造を有し、且つ導波層の上層に少なくとも第二のpクラッド層を設ける。さらに、前記第一のpクラッド層及びnクラッド層間に水平方向電界が印加されるように電極A、Bが前記第一のpクラッド層及びnクラッド層上にそれぞれ設けられ、且つ導波層へ基板垂直方向電界が印加されるように電極Cが第二のpクラッド層上に設けることとした。   In the polarization control element according to the second aspect of the invention, at least the first p-clad layer and the n-clad layer sandwich the guided light from the substrate horizontal direction on the semi-insulating substrate surface of the zincblende semiconductor crystal. At least a second p-cladding layer is provided on the waveguide layer. Furthermore, electrodes A and B are provided on the first p-cladding layer and the n-cladding layer, respectively, so that a horizontal electric field is applied between the first p-cladding layer and the n-cladding layer, and to the waveguide layer. The electrode C is provided on the second p-clad layer so that the substrate vertical direction electric field is applied.

上記手段について図3を用いてより詳しく説明する。InP等の閃亜鉛鉱構造結晶の場合、[110]方向と等価な方向に電圧を印加することで前記LNと同様な原理でTE−TM偏波変換を行うことができる。具体的には、例えば(100)面基板を用いた場合、[011]方向と等価な方向に導波路ストライプを形成し、当該導波路に対して基板水平法電界をかけることで、図1に示すように導波路断面の屈折率楕円体が45°傾いて歪む。また当該導波路に対して基板垂直(100)方向に電界をかけた場合にはTE−TM間の伝搬定数差が変化することが知られている。すなわち、LNデバイス同様に、導波路に対して基板垂直及び水平方向への印加電圧値をそれぞれ独立して制御できる機構を設けることで、閃亜鉛鉱形の半導体においても任意の偏波制御素子が実現可能となる。   The above means will be described in more detail with reference to FIG. In the case of a zinc blende structure crystal such as InP, TE-TM polarization conversion can be performed on the same principle as the LN by applying a voltage in a direction equivalent to the [110] direction. Specifically, for example, when a (100) plane substrate is used, a waveguide stripe is formed in a direction equivalent to the [011] direction, and a substrate horizontal electric field is applied to the waveguide. As shown, the refractive index ellipsoid of the waveguide cross section is tilted by 45 ° and distorted. Further, it is known that the propagation constant difference between TE and TM changes when an electric field is applied to the waveguide in the direction perpendicular to the substrate (100). In other words, as with the LN device, by providing a mechanism that can independently control the applied voltage values in the vertical and horizontal directions with respect to the waveguide, any polarization control element can be used even in a zinc blende type semiconductor. It becomes feasible.

InP等の閃亜鉛鉱形結晶を用いて前記偏波制御素子を作製する主な利点の一つとして、p−i−n、p−i−p構造の採用による、コア層へ局所的に高電圧を印加することができる点が挙げられる。LNをはじめとする絶縁材料の場合には電極間隔が電界強度の大小を決めているのに対して、pin構造等ではi層幅(例えばGap3)が電界強度の大小を決めている。すなわち、Gap1では、電極構造上、少なくても10μm以上の電極間隔が求められていたのに対して、Gap3では2μm以下に狭めることが可能であるため、より低い印加電圧で所望の電界強度を得ることができる。また、前記半導体の材料誘電率もLNの大よそ1/3程度であるため、前記Gapを狭めたとしても素子容量増大を抑制できることから、高速な偏波制御を行う上でも有用な材料といえる。   One of the main advantages of producing the polarization control element using zinc-blende crystal such as InP is that it is locally high to the core layer by adopting a pin structure and a pin structure. The point which can apply a voltage is mentioned. In the case of an insulating material such as LN, the electrode spacing determines the magnitude of the electric field strength, whereas in the pin structure or the like, the i-layer width (for example, Gap3) determines the electric field strength. That is, in Gap1, an electrode interval of at least 10 μm or more was required for the electrode structure, whereas in Gap3, it was possible to reduce the distance to 2 μm or less. Can be obtained. In addition, since the material dielectric constant of the semiconductor is about 1/3 of LN, even if the gap is narrowed, an increase in device capacity can be suppressed. Therefore, it can be said that the material is useful for high-speed polarization control. .

さらに、LNに比べInP等の化合物半導体は導波路メサ加工や、原子のイオン注入・熱拡散が容易であることから、図3のp型クラッド層のようにメタライズされた導電性クラッド層が対向電極として作用するため、光と電界の相互作用(前述した、重なり合いαの値)が大きい。例えばδβを調整する場合には基板水平方向電界を導波路に対して印加するが、その際の光-電界重なり合いαはプレーナ電極構造のLNは約0.5であるのに対して本発明構造の場合には0.9以上にすることができる。   Furthermore, since compound semiconductors such as InP are easier to process in waveguide mesa and ion implantation / thermal diffusion of atoms than LN, the conductive clad layer metalized like the p-type clad layer in FIG. Since it acts as an electrode, the interaction between light and electric field (the value of overlap α described above) is large. For example, when adjusting δβ, an electric field in the horizontal direction of the substrate is applied to the waveguide. At this time, the light-electric field overlap α is approximately 0.5 for the planar electrode structure LN. In this case, it can be 0.9 or more.

以上のように、構造的・材料的観点から本発明に係るデバイスの前記κの値を見積もると大よそLNの場合と比べて7倍の結合効率向上が見込まれ、さらに、δβを調整するためのTE−TM間位相シフトもLNの場合に比べて10倍のシフト効率向上が見込まれる。すなわち、既存のLN偏波制御素子に比べて素子の低駆動電圧化、小型化等が期待できる。   As described above, when the value of κ of the device according to the present invention is estimated from the structural and material viewpoints, it is expected that the coupling efficiency will be improved by 7 times compared to the case of LN, and δβ is adjusted. The TE-TM phase shift is expected to improve the shift efficiency by 10 times compared to the LN case. That is, it can be expected that the drive voltage of the element is reduced and the size is reduced as compared with the existing LN polarization control element.

本発明によれば、pn接合による強い電界閉じ込め、光と電気の強い相互作用等の点で優位なInP系材料を用いて、電界制御型の偏波制御デバイスを作製することで、当該デバイスの小型且つ低駆動電圧動作が実現可能となる。これにより、光通信システムで問題となる偏波の経時的変動を補償する偏波制御素子を、他の小型半導体デバイスと一体集積させた新規伝送システム、及び超小型偏波制御システム等を提供する。   According to the present invention, by using an InP-based material that is superior in terms of strong electric field confinement by a pn junction, strong interaction between light and electricity, and the like, an electric field control type polarization control device is manufactured. A small and low driving voltage operation can be realized. This provides a new transmission system, an ultra-compact polarization control system, and the like in which a polarization control element that compensates for a temporal change in polarization, which is a problem in an optical communication system, is integrated with other small semiconductor devices. .

電場印加による屈折率楕円体の変化を示すグラフである。It is a graph which shows the change of the refractive index ellipsoid by electric field application. 従来のLN偏波制御素子の概略図である。It is the schematic of the conventional LN polarization control element. 本発明の実施例1にかかる半導体偏波制御素子の断面図である。It is sectional drawing of the semiconductor polarization control element concerning Example 1 of this invention. 本発明の実施例1にかかる半導体偏波制御素子の上面図である。It is a top view of the semiconductor polarization control element concerning Example 1 of the present invention. 本発明の実施例1にかかる半導体偏波制御素子を直列に接続した偏波制御素子の上面図である。It is a top view of the polarization control element which connected the semiconductor polarization control element concerning Example 1 of this invention in series. 本発明の実施例2にかかる半導体偏波制御素子の断面図である。It is sectional drawing of the semiconductor polarization control element concerning Example 2 of this invention. 本発明の実施例2にかかる半導体偏波制御素子の上面図である。It is a top view of the semiconductor polarization control element concerning Example 2 of this invention. 本発明の実施例2にかかる半導体偏波制御素子を直列に接続した偏波制御素子の上面図である。It is a top view of the polarization control element which connected the semiconductor polarization control element concerning Example 2 of this invention in series. 本発明の実施例1にかかる半導体偏波制御素子のクラッド層をMOS構造に置き換えた場合の断面図である。It is sectional drawing at the time of replacing the clad layer of the semiconductor polarization control element concerning Example 1 of this invention with a MOS structure.

添付の図面を参照して本発明の実施形態を説明する。以下に説明する実施形態は本発明の実施例であり、本発明は、以下の実施形態に制限されるものではない。   Embodiments of the present invention will be described with reference to the accompanying drawings. The embodiments described below are examples of the present invention, and the present invention is not limited to the following embodiments.

[実施例1]
図3は、本実施例の偏波制御素子の断面図である。本実施例では基板水平方向に電界がかかるように基板水平方向にp−i−p構造を採用、また同時に基板垂直方向にも独立して電界がかけられるように、n型のクラッド層を導波路直上に堆積し、p−i−n構造を形成した。なお、前記n型クラッド層の代わりに、例えば図9に示すように絶縁膜(SiO等)23を介したMetal−Oxide−Semiconductor(MOS)構造を採用したとしても、導波層に垂直方向電界を加えることができるため、本発明の有用性は失われない。結晶成長は、結晶再成長プロセスに適した有機金属気相成長(MOVPE)法によって行い、基板結晶は(100) 面方位の半絶縁性(SI)基板を用いた。なお、例えば(011)面方位と等価な基板を用いた場合においても、電極Zを接地した場合、電極Xと電極Yに加えるそれぞれの電圧を(100)基板の場合の逆にすれば、本実施例の有用性は失われない。バルクのコア層はノンドープ層とし、そのバンドギャップ波長は動作光波長で電気光学効果が有効に作用しかつ光吸収が問題とならないように決定している。例えば、1.55μm帯の偏波制御デバイスとする場合には、コア層を発光波長が1.2μmのInGaAsP層によって形成するが、無論、当該波長領域で吸収の生じない、発光波長が1.5μm以下のInGaAsP又はInGaAlAs等を用いても問題ないことは明らかである。なお,コア層はバルク型でなくても例えば多重量子井戸(MQW)型であっても、本発明の有用性は失われないことは明らかである。
[Example 1]
FIG. 3 is a cross-sectional view of the polarization control element of this embodiment. In this embodiment, a p-i-p structure is adopted in the horizontal direction of the substrate so that an electric field is applied in the horizontal direction of the substrate, and at the same time, an n-type cladding layer is introduced so that an electric field can be applied independently in the vertical direction of the substrate. It was deposited immediately above the waveguide to form a pin structure. Note that, instead of the n-type cladding layer, a metal-oxide-semiconductor (MOS) structure with an insulating film (SiO 2 or the like) 23 interposed therebetween as shown in FIG. The utility of the present invention is not lost because an electric field can be applied. Crystal growth was performed by a metal organic chemical vapor deposition (MOVPE) method suitable for a crystal regrowth process, and a (100) plane-oriented semi-insulating (SI) substrate was used as a substrate crystal. For example, even when a substrate equivalent to the (011) plane orientation is used, when the electrode Z is grounded, if the respective voltages applied to the electrodes X and Y are reversed to those in the case of the (100) substrate, this The usefulness of the embodiment is not lost. The bulk core layer is a non-doped layer, and its band gap wavelength is determined so that the electro-optic effect is effective at the operating light wavelength and the light absorption is not a problem. For example, in the case of a polarization control device in the 1.55 μm band, the core layer is formed of an InGaAsP layer having an emission wavelength of 1.2 μm. Of course, no absorption occurs in the wavelength region, and the emission wavelength is 1. It is clear that there is no problem even if InGaAsP or InGaAlAs of 5 μm or less is used. It is obvious that the usefulness of the present invention is not lost even if the core layer is not a bulk type, for example, a multiple quantum well (MQW) type.

SI-InP基板7上にノンドープのInPクラッド層8を0.5μm堆積後、前記コア層9(0.5μm)、ノンドープのInPクラッド層10、及びn型InPクラッド層12(1.5μm)、n型InGaAs電極コンタクト層13(0.2μm)の順に結晶成長を行った。これらクラッド層のドーピング濃度は、コア層で効率良く電圧降下が生じるように5×1017cm−3以上とすることが望ましい。例えば、n型InPクラッド層のドーピング濃度を1×1018cm−3とし、n型InGaAs電極コンタクト層のドーピング濃度をそれぞれ5×1018cm−3とする。なお、電極コンタクト用に積層される層は十分な伝導性が確保できれば問題ないため、n型不純物がドーピングされる半導体は上記InGaAsに限定されず例えば、InGaAsPなどを用いてもよい。続いて、偏波制御素子を光導波路として機能させるべく、[011]方向に導波路形状が模られた、例えばSiOマスクを用いてドライエッチングによりn型InPクラッド層が露出するまでエッチング加工し、続いて、塩酸、リン酸の混合液を用いたウェットエッチングによりノンドープのInGaAsPコア層を露出させ、メサ構造(例えばコア幅が1.6μm)を作製する。 After depositing a non-doped InP clad layer 8 on the SI-InP substrate 7 by 0.5 μm, the core layer 9 (0.5 μm), the non-doped InP clad layer 10 and the n-type InP clad layer 12 (1.5 μm), Crystal growth was performed in the order of the n-type InGaAs electrode contact layer 13 (0.2 μm). The doping concentration of these cladding layers is desirably 5 × 10 17 cm −3 or more so that a voltage drop is efficiently generated in the core layer. For example, the doping concentration of the n-type InP cladding layer is 1 × 10 18 cm −3, and the doping concentration of the n-type InGaAs electrode contact layer is 5 × 10 18 cm −3 . Note that there is no problem as long as the layer laminated for the electrode contact can secure sufficient conductivity. Therefore, the semiconductor doped with the n-type impurity is not limited to InGaAs, and for example, InGaAsP may be used. Subsequently, in order to make the polarization control element function as an optical waveguide, etching is performed until the n-type InP cladding layer is exposed by dry etching using, for example, a SiO 2 mask having a waveguide shape in the [011] direction. Subsequently, the non-doped InGaAsP core layer is exposed by wet etching using a mixed solution of hydrochloric acid and phosphoric acid to produce a mesa structure (for example, the core width is 1.6 μm).

上記メサ構造を形成後、図4に示すpクラッド領域以外の領域をSiOマスク18でカバーし、Znをイオン注入により、打ち込むことでマスク窓の開いたノンドープInGaAsP領域をp型化させた。なお、p型化させる方法はイオン注入に限らず、例えばZn雰囲気中での熱拡散等でも問題ないことは明らかである。n型同様に、十分な伝導性が確保されるように、少なくても半導体表面から0.2μmの深さはドーピング濃度が5×1018cm−3以上となるようにした。 After forming the mesa structure, the region other than the p-clad region shown in FIG. 4 was covered with a SiO 2 mask 18 and Zn was ion-implanted to make the non-doped InGaAsP region with an open mask window p-type. It is obvious that the p-type method is not limited to ion implantation, and there is no problem even with thermal diffusion in a Zn atmosphere, for example. As with the n-type, at least a depth of 0.2 μm from the semiconductor surface was set to a doping concentration of 5 × 10 18 cm −3 or more so as to ensure sufficient conductivity.

上記p−i−n層及びp−i−p層を含む直線光導波路19を形成後、電極X形成を安定的に行うためにメサ脇をポリイミド14で覆った。その後、n型InGaAs電極コンタクト層上に例えばAuGeNi合金を、p型InGaAsP層上に例えばAuZnNi合金をそれぞれ蒸着した後にシンター炉を用いて熱処理を行った。その後、接着性を向上させるTiを介してAuを1μm堆積させた。   After forming the linear optical waveguide 19 including the p-i-n layer and the p-i-p layer, the mesa side was covered with polyimide 14 in order to stably form the electrode X. Thereafter, for example, an AuGeNi alloy was deposited on the n-type InGaAs electrode contact layer, and an AuZnNi alloy, for example, was deposited on the p-type InGaAsP layer, and then heat treatment was performed using a sintering furnace. Thereafter, 1 μm of Au was deposited through Ti for improving adhesiveness.

作製した素子を図4に示すようにチッピングを行うことで、一段構成の偏波制御素子は完成する。当該偏波コントローラにおいて任意の回転軸角、リターデーションを実現するためには電極X、Yに適切な電圧を印加する。印加電圧の大きさ、及び[100]、[011]方向の比率によって位相差、及び、回転角度が決まる。[100]方向の電界をE100、[011]方向の電界をE011とすると、結晶軸の回転角θは、
θ=(1/2)・Tan−1(E100/E011
となる。また、波長板の厚さは、(E100 +E011 1/2に比例する。
The manufactured element is chipped as shown in FIG. 4 to complete a one-stage polarization control element. In order to realize an arbitrary rotation axis angle and retardation in the polarization controller, appropriate voltages are applied to the electrodes X and Y. The phase difference and the rotation angle are determined by the magnitude of the applied voltage and the ratio in the [100] and [011] directions. When the electric field in the [100] direction is E 100 and the electric field in the [011] direction is E 011 , the rotation angle θ of the crystal axis is
θ = (1/2) · Tan −1 (E 100 / E 011 )
It becomes. Further, the thickness of the wave plate is proportional to (E 100 2 + E 011 2 ) 1/2 .

さらに、偏光状態のランダムな変動に対して偏光状態を固定させるためには、無限追従型の偏波コントローラが求められており、前記一段構成の偏波コントローラでは、低電圧駆動化での実現が困難であるため、前記偏波コントローラを直列多段に設置した構成が有効である(例えば、特許文献3)。図5は本実施例の偏波コントローラの少なくとも3つを直列多段に設けたものであり、各段のpドーピング層はそれぞれノンドープ層を介して形成されている。これにより、各導電層間での電気的分離が可能となる。   Furthermore, in order to fix the polarization state against random fluctuations in the polarization state, an infinite follow-up type polarization controller is required, and the polarization controller of the one-stage configuration can be realized with low voltage drive. Since it is difficult, a configuration in which the polarization controllers are installed in multiple stages in series is effective (for example, Patent Document 3). FIG. 5 shows a configuration in which at least three of the polarization controllers of this embodiment are provided in series in multiple stages, and the p-doping layers at each stage are formed via non-doped layers, respectively. Thereby, electrical separation between the conductive layers is possible.

このように本発明によれば、pn接合による強い電界閉じ込め、光と電気の強い相互作用等の点で優位なInP系材料を用いて、電界制御型の偏波制御デバイスを作製することで、当該デバイスの小型且つ低駆動電圧動作が実現可能となる。   Thus, according to the present invention, by using an InP-based material that is superior in terms of strong electric field confinement by a pn junction, strong interaction between light and electricity, etc., an electric field control type polarization control device is manufactured, A small and low driving voltage operation of the device can be realized.

ここで基板材料はInP以外にも同結晶構造を有する、例えばGaAs、GaP、ZnS、ZnSeを用いた場合においてもその有用性は変わらないことは明らかである。   Here, it is obvious that the usefulness of the substrate material does not change even when the substrate material has the same crystal structure other than InP, for example, GaAs, GaP, ZnS, or ZnSe.

なお、本実施例においては、1.55μm波長帯に対応する光変調素子を用いたが1.3μm波長帯に対応するものを用いてもよい。   In the present embodiment, the light modulation element corresponding to the 1.55 μm wavelength band is used, but an element corresponding to the 1.3 μm wavelength band may be used.

また例えばGaAsを用いれば0.6〜1.3μm波長帯にも対応できる。   For example, if GaAs is used, it can respond to a wavelength range of 0.6 to 1.3 μm.

[実施例2]
図6は、本実施例の偏波制御素子の断面図である。本実施例では基板水平方向に電界がかかるように基板水平方向にp−i−n構造を採用、また同時に基板垂直方向にも独立して電界がかけられるように、p型のクラッド層を導波路直上に堆積し、p−i−p構造を形成した。なお、前記導波路直上のp型クラッド層の代わりに、例えば図9に示すように絶縁膜(SiO等)を介したMetal−Oxide−Semiconductor(MOS)構造を採用したとしても、導波層に垂直方向電界を加えることができるため、本発明の有用性は失われない。結晶成長は、結晶再成長プロセスに適した有機金属気相成長(MOVPE)法によって行い、基板結晶は(100) 面方位の半絶縁性(SI)基板を用いた。なお、例えば(011)面方位と等価な基板を用いた場合においても、電極Rと電極Pに加えるそれぞれの電圧を(100)基板の場合の逆にすれば、本実施形態の有用性は失われない。バルクのコア層はノンドープ層とし、そのバンドギャップ波長は動作光波長で電気光学効果が有効に作用しかつ光吸収が問題とならないように決定している。例えば、1.55μm帯の偏波制御デバイスとする場合には、コア層を発光波長が1.2μmのInGaAsP層によって形成するが、無論、当該波長領域で吸収の生じない、発光波長が1.5μm以下のInGaAsP又はInGaAlAs等を用いても問題ないことは明らかである。なお、コア層はバルク型でなくても例えば多重量子井戸(MQW)型であっても、本発明の有用性は失われないことは明らかである。
[Example 2]
FIG. 6 is a cross-sectional view of the polarization control element of this embodiment. In this embodiment, a p-i-n structure is employed in the horizontal direction of the substrate so that an electric field is applied in the horizontal direction of the substrate, and at the same time, a p-type cladding layer is introduced so that an electric field can be applied independently in the vertical direction of the substrate. It was deposited immediately above the waveguide to form a pip structure. Even if a metal-oxide-semiconductor (MOS) structure with an insulating film (SiO 2 or the like) interposed therebetween is used instead of the p-type cladding layer directly above the waveguide, for example, as shown in FIG. Therefore, the utility of the present invention is not lost. Crystal growth was performed by a metal organic chemical vapor deposition (MOVPE) method suitable for a crystal regrowth process, and a (100) plane-oriented semi-insulating (SI) substrate was used as a substrate crystal. For example, even when a substrate equivalent to the (011) plane orientation is used, if the respective voltages applied to the electrode R and the electrode P are reversed to those in the case of the (100) substrate, the usefulness of this embodiment is lost. I will not. The bulk core layer is a non-doped layer, and its band gap wavelength is determined so that the electro-optic effect is effective at the operating light wavelength and the light absorption is not a problem. For example, in the case of a polarization control device in the 1.55 μm band, the core layer is formed of an InGaAsP layer having an emission wavelength of 1.2 μm. Of course, no absorption occurs in the wavelength region, and the emission wavelength is 1. It is clear that there is no problem even if InGaAsP or InGaAlAs of 5 μm or less is used. It is obvious that the usefulness of the present invention is not lost even if the core layer is not a bulk type, for example, a multiple quantum well (MQW) type.

SI-InP基板7上にノンドープのInPクラッド層8を0.5μm堆積後、前記コア層9(0.5μm)、ノンドープのInPクラッド層10、及びp型InPクラッド層20(1.5μm)、p型InGaAs電極コンタクト層21(0.2μm)の順に結晶成長を行った。これらクラッド層のドーピング濃度は、コア層で効率良く電圧降下が生じるように5×1017cm−3以上とすることが望ましい。例えば、p型及InPクラッド層のドーピング濃度を5×1018cm−3とし、p型InGaAs電極コンタクト層のドーピング濃度をそれぞれ1×1019cm−3とする。なお、電極コンタクト用に積層される層は十分な伝導性が確保できれば問題ないため、p型不純物がドーピングされる半導体は上記InGaAsに限定されず例えば、InGaAsPなどを用いてもよい。続いて、偏波制御素子を光導波路として機能させるべく、[011]方向に導波路形状が模られた、例えばSiOマスクを用いてドライエッチングによりp型InPクラッド層が露出するまでエッチング加工し、続いて、塩酸、リン酸の混合液を用いたウェットエッチングによりノンドープのInGaAsPコア層を露出させ、メサ構造(例えばコア幅が1.6μm)を作製する。 After depositing a non-doped InP clad layer 8 on the SI-InP substrate 7 by 0.5 μm, the core layer 9 (0.5 μm), the non-doped InP clad layer 10 and the p-type InP clad layer 20 (1.5 μm), Crystal growth was performed in the order of the p-type InGaAs electrode contact layer 21 (0.2 μm). The doping concentration of these cladding layers is desirably 5 × 10 17 cm −3 or more so that a voltage drop is efficiently generated in the core layer. For example, the doping concentration of the p-type and InP cladding layers is 5 × 10 18 cm −3, and the doping concentration of the p-type InGaAs electrode contact layer is 1 × 10 19 cm −3 . Note that the layer laminated for the electrode contact is not a problem as long as sufficient conductivity can be ensured. Therefore, the semiconductor doped with the p-type impurity is not limited to InGaAs, and for example, InGaAsP may be used. Subsequently, in order to make the polarization control element function as an optical waveguide, etching is performed until the p-type InP cladding layer is exposed by dry etching using, for example, a SiO 2 mask whose waveguide shape is imitated in the [011] direction. Subsequently, the non-doped InGaAsP core layer is exposed by wet etching using a mixed solution of hydrochloric acid and phosphoric acid to produce a mesa structure (for example, the core width is 1.6 μm).

上記メサ構造を形成後、図7に示すpクラッド領域以外の領域をSiOマスクでカバーし、Znをイオン注入により、打ち込むことマスク窓の開いたノンドープInGaAsP領域をp型化させた。なお、p型化させる方法はイオン注入に限らず、例えばZn雰囲気中での熱拡散等でも問題ないことは明らかである。続いて同様に、図7に示すnクラッド領域以外の領域をSiOマスクでカバーし、Siをイオン注入により、打ち込むことマスク窓の開いたノンドープInGaAsP領域をn型化させた。十分な伝導性が確保されるように、p、n型層共に少なくても半導体表面から0、2μmの深さはドーピング濃度がそれぞれ5×1018cm−3以上となるようにした。 After forming the mesa structure, the region other than the p-clad region shown in FIG. 7 was covered with an SiO 2 mask, and Zn was ion-implanted to make the non-doped InGaAsP region with an open mask window p-type. It is obvious that the p-type method is not limited to ion implantation, and there is no problem even with thermal diffusion in a Zn atmosphere, for example. Subsequently, similarly, a region other than the n-clad region shown in FIG. 7 was covered with an SiO 2 mask, and Si was ion-implanted to make the non-doped InGaAsP region having an open mask window n-type. In order to ensure sufficient conductivity, at least both p and n-type layers have a doping concentration of 5 × 10 18 cm −3 or more at a depth of 0 to 2 μm from the semiconductor surface.

上記p−i−n層及びp−i−p層を含む直線光導波路を形成後、電極X形成を安定的に行うためにメサ脇をポリイミドで覆った。その後、n型InGaAs電極コンタクト層上に例えばAuGeNi合金を、p型InGaAsP層上に例えばAuZnNi合金をそれぞれ蒸着した後にシンター炉を用いて熱処理を行った。その後、接着性を向上させるTiを介してAuを1μm堆積させた。   After forming the linear optical waveguide including the p-i-n layer and the p-i-p layer, the side of the mesa was covered with polyimide in order to stably form the electrode X. Thereafter, for example, an AuGeNi alloy was deposited on the n-type InGaAs electrode contact layer, and an AuZnNi alloy, for example, was deposited on the p-type InGaAsP layer, and then heat treatment was performed using a sintering furnace. Thereafter, 1 μm of Au was deposited through Ti for improving adhesiveness.

作製した素子を図7に示すようにチッピングを行うことで、一段構成の偏波制御素子は完成する。当該偏波コントローラにおいて任意の回転軸角、リターデーションを実現するためには電極X、Y、Zに適切な電圧を印加する。印加電圧の大きさ、及び[100]、[011]方向の比率によって位相差、及び、回転角度が決まる。[100]方向の電界をE100、[011]方向の電界をE011とすると、結晶軸の回転角θは、
θ=(1/2)・Tan−1(E100/E011
となる。また、波長板の厚さは、(E100 +E011 1/2に比例する。2分の1 波長板の場合、[100]方向に電界を印加するために必要な電圧の最大値をV、[011]方向に電界を印加するために必要な電圧の最大値をVπ/2とすると、図に示す各電極に印加する電圧は、
(電極X)V=Vcos(2θ)+Vπ/2sin(2θ)+V
(電極Y)V=0
(電極Z)V=Vcos(2θ)−Vπ/2sin(2θ)−V
なお、逆バイアス電圧下素子を駆動させることからV<Vとする。ここで、Vはδβをゼロにするために必要なバイアス電圧である。本実施例における検討ではV=6V、Vπ/2=4V、V=10Vとなった。
The manufactured element is chipped as shown in FIG. 7 to complete a one-stage polarization control element. In order to realize an arbitrary rotation axis angle and retardation in the polarization controller, appropriate voltages are applied to the electrodes X, Y, and Z. The phase difference and the rotation angle are determined by the magnitude of the applied voltage and the ratio in the [100] and [011] directions. When the electric field in the [100] direction is E 100 and the electric field in the [011] direction is E 011 , the rotation angle θ of the crystal axis is
θ = (1/2) · Tan −1 (E 100 / E 011 )
It becomes. Further, the thickness of the wave plate is proportional to (E 100 2 + E 011 2 ) 1/2 . In the case of a half-wave plate, the maximum voltage required to apply an electric field in the [100] direction is V 0 , and the maximum voltage required to apply an electric field in the [011] direction is Vπ / Assuming 2, the voltage applied to each electrode shown in the figure is
(Electrode X) V X = V 0 cos (2θ) + Vπ / 2sin (2θ) + V b
(Electrode Y) V Y = 0
(Electrode Z) V Z = V 0 cos (2θ) −Vπ / 2sin (2θ) −V b
Note that V Z <V X is satisfied because the device is driven under a reverse bias voltage. Here, V b is a bias voltage necessary to make δβ zero. In the study in this example, V 0 = 6V, Vπ / 2 = 4V, and V b = 10V.

さらに、偏光状態のランダムな変動に対して偏光状態を固定させるためには、無限追従型の偏波コントローラが求められており、前記一段構成の偏波コントローラでは、低電圧駆動化での実現が困難であるため、前記偏波コントローラを直列多段に設置した構成が有効である(例えば、特許文献3)。図8上段は本実施例の偏波コントローラの少なくとも3つを直列多段に設けたものであり、隣り合う各段のドーピング層はノンドープ層を介してpnp・・・となるように形成されている。これにより、各導電層間での電気的分離が容易となる。なお、前記のように交互にドーピング層を入れ替えなくても、図8下段に示すように各段の間のノンドープ領域の全部又は一部をp型化又はn型化したとしても、問題はないことは明らかである。   Furthermore, in order to fix the polarization state against random fluctuations in the polarization state, an infinite follow-up type polarization controller is required, and the polarization controller of the one-stage configuration can be realized with low voltage drive. Since it is difficult, a configuration in which the polarization controllers are installed in multiple stages in series is effective (for example, Patent Document 3). In the upper part of FIG. 8, at least three of the polarization controllers of this embodiment are provided in series in multiple stages, and the adjacent doped layers are formed to be pnp... Via non-doped layers. . This facilitates electrical separation between the conductive layers. Even if the doping layers are not alternately replaced as described above, there is no problem even if all or part of the non-doped regions between the respective stages are made p-type or n-type as shown in the lower part of FIG. It is clear.

このように本発明によれば、pn接合による強い電界閉じ込め、光と電気の強い相互作用等の点で優位なInP系材料を用いて、電界制御型の偏波制御デバイスを作製することで、当該デバイスの小型且つ低駆動電圧動作が実現可能となる。   Thus, according to the present invention, by using an InP-based material that is superior in terms of strong electric field confinement by a pn junction, strong interaction between light and electricity, etc., an electric field control type polarization control device is manufactured, A small and low driving voltage operation of the device can be realized.

ここで基板材料はInP以外にも同結晶構造を有する、例えばGaAs、GaP、ZnS、ZnSeを用いた場合においてもその有用性は変わらないことは明らかである。   Here, it is obvious that the usefulness of the substrate material does not change even when the substrate material has the same crystal structure other than InP, for example, GaAs, GaP, ZnS, or ZnSe.

なお、本実施例においては、1.55μm波長帯に対応する光変調素子を用いたが1.3μm波長帯に対応するものを用いてもよい。   In the present embodiment, the light modulation element corresponding to the 1.55 μm wavelength band is used, but an element corresponding to the 1.3 μm wavelength band may be used.

また例えばGaAsを用いれば0.6〜1.3μm波長帯にも対応できる。   For example, if GaAs is used, it can respond to a wavelength range of 0.6 to 1.3 μm.

1 LN
2 Ti拡散導波路
3 バッファ層
4 電極R
5 電極P
6 接地電極
7 半絶縁性InP基板
8 i−クラッド層
9 i−コア層
10 i−クラッド層
11 p−クラッド層
12 n−クラッド層
13 n−コンタクト層
14 ポリイミド
15 X電極
16 Y電極
17 Z電極
18 SiOマスク
19 光導波路
20 p−クラッド層
21 p−コンタクト層
22 n−クラッド層
23 絶縁膜
1 LN
2 Ti diffusion waveguide 3 Buffer layer 4 Electrode R
5 Electrode P
6 Ground electrode 7 Semi-insulating InP substrate 8 i-clad layer 9 i-core layer 10 i-clad layer 11 p-clad layer 12 n-clad layer 13 n-contact layer 14 polyimide 15 X electrode 16 Y electrode 17 Z electrode 18 SiO 2 mask 19 Optical waveguide 20 p-cladding layer 21 p-contact layer 22 n-cladding layer 23 Insulating film

Claims (9)

閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、少なくとも一組の、第一のpクラッド層と、導波層と、第二のpクラッド層とを有し、前記第一のpクラッド層及び前記第二のpクラッド層が前記導波層を前記基板の水平方向に挟んだ構造を有し、且つ前記導波層の上に少なくとも1つの第一のnクラッド層を有していることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende type semiconductor crystal, on a semi-insulating substrate, at least one pair of a first p-cladding layer, a waveguide layer, and a second p-cladding layer, And the first p-cladding layer and the second p-cladding layer have a structure in which the waveguide layer is sandwiched in the horizontal direction of the substrate, and at least one first clad layer is disposed on the waveguide layer. A semiconductor polarization control element having one n-clad layer. 閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、少なくとも一組の、第一のpクラッド層と、導波層と、第一のnクラッド層とを有し、前記第一のpクラッド層及び前記第一のnクラッド層が前記導波層を前記基板の水平方向に挟んだ構造を有し、且つ前記導波層の上に少なくとも1つの第二のpクラッド層を有していることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende type semiconductor crystal, on a semi-insulating substrate, at least one pair of a first p-clad layer, a waveguide layer, and a first n-clad layer The first p-cladding layer and the first n-cladding layer have a structure in which the waveguide layer is sandwiched in the horizontal direction of the substrate, and at least one first clad layer is disposed on the waveguide layer. A semiconductor polarization control element comprising two p-cladding layers. 請求項1に記載の半導体偏波制御素子であって、前記第一のpクラッド層と前記第二のpクラッド層との間に前記基板の水平方向に電界が印加されるように電極X、Zが前記第一のpクラッド層と前記第二のpクラッド層の上にそれぞれ設けられ、且つ前記導波層へ前記基板の垂直方向に電界が印加されるように電極Yが前記第一のnクラッド層上に設けられていることを特徴とする半導体偏波制御素子。   2. The semiconductor polarization control element according to claim 1, wherein an electrode X is applied so that an electric field is applied in a horizontal direction of the substrate between the first p-cladding layer and the second p-cladding layer. Z is provided on each of the first p-cladding layer and the second p-cladding layer, and the electrode Y is disposed on the first p-cladding layer so that an electric field is applied to the waveguide layer in a direction perpendicular to the substrate. A semiconductor polarization control element provided on an n-cladding layer. 請求項2に記載の半導体偏波制御素子であって、前記第一のpクラッド層と前記第一のnクラッド層との間に前記基板の水平方向に電界が印加されるように電極X、Zが前記第一のpクラッド層と前記第一のnクラッド層上にそれぞれ設けられ、且つ前記導波層へ前記基板の垂直方向に電界が印加されるように電極Yが前記第二のpクラッド層上に設けられていることを特徴とする半導体偏波制御素子。   3. The semiconductor polarization control element according to claim 2, wherein an electrode X is applied so that an electric field is applied in a horizontal direction of the substrate between the first p-clad layer and the first n-clad layer. Z is provided on each of the first p-cladding layer and the first n-cladding layer, and the electrode Y is disposed on the second p so that an electric field is applied to the waveguide layer in a direction perpendicular to the substrate. A semiconductor polarization control element provided on a cladding layer. 閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、少なくとも一組の、第一のpクラッド層と、導波層と、第二のpクラッド層とを有し、前記第一のpクラッド層及び前記第二のpクラッド層が前記導波層を前記基板の水平方向に挟んだ構造を有し、且つ前記導波層の上に少なくとも1つの絶縁膜と、前記少なくとも1つの絶縁膜のそれぞれの上に電極Yとを有していることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende type semiconductor crystal, on a semi-insulating substrate, at least one pair of a first p-cladding layer, a waveguide layer, and a second p-cladding layer, And the first p-cladding layer and the second p-cladding layer have a structure in which the waveguide layer is sandwiched in the horizontal direction of the substrate, and at least one insulating layer is provided on the waveguide layer. A semiconductor polarization control element comprising a film and an electrode Y on each of the at least one insulating film. 閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、少なくとも一組の、第一のpクラッド層と、導波層と、第一のnクラッド層とを有し、前記第一のpクラッド層及び前記第一のnクラッド層が前記導波層を前記基板の水平方向に挟んだ構造を有し、且つ前記導波層の上に少なくとも1つの絶縁膜と、前記少なくとも1つの絶縁膜のそれぞれの上に電極Yとを有していることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende type semiconductor crystal, on a semi-insulating substrate, at least one pair of a first p-clad layer, a waveguide layer, and a first n-clad layer And the first p-cladding layer and the first n-cladding layer have a structure in which the waveguide layer is sandwiched in the horizontal direction of the substrate, and at least one insulating layer is provided on the waveguide layer. A semiconductor polarization control element comprising a film and an electrode Y on each of the at least one insulating film. 閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、請求項1または5または6に記載の半導体偏波制御素子のいずれかを少なくとも3つ有し、前記少なくとも3つの半導体偏波制御素子のそれぞれの導波層が互いに同一の導波路を形成するように前記少なくとも3つの半導体偏波制御素子は直列に配置されていることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende type semiconductor crystal, comprising at least three of the semiconductor polarization control elements according to claim 1 or 5 or 6 on a semi-insulating substrate, The semiconductor polarization, wherein the at least three semiconductor polarization control elements are arranged in series so that the respective waveguide layers of the at least three semiconductor polarization control elements form the same waveguide. Control element. 閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、請求項2に記載の半導体偏波制御素子を少なくとも3つ有し、前記少なくとも3つの半導体偏波制御素子のそれぞれの導波層が互いに同一の導波路を形成し、かつ前記少なくとも3つの半導体偏波制御素子のうちの隣り合う2つの半導体偏波制御素子の第一のpクラッド層と第一のnクラッド層とが互い違いに配置されるように前記少なくとも3つの半導体偏波制御素子は直列に配置されていることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende-type semiconductor crystal, comprising at least three semiconductor polarization control elements according to claim 2 on a semi-insulating substrate, wherein the at least three semiconductor polarization control elements are provided. Each of the waveguide layers of the control element forms the same waveguide, and the first p-clad layer and the first of the two adjacent semiconductor polarization control elements of the at least three semiconductor polarization control elements The semiconductor polarization control element is characterized in that the at least three semiconductor polarization control elements are arranged in series such that the n clad layers are alternately arranged. 閃亜鉛鉱形半導体結晶を用いた偏波制御素子であって、半絶縁性の基板上に、請求項2に記載の半導体偏波制御素子を少なくとも3つ有し、前記少なくとも3つの半導体偏波制御素子のそれぞれの導波層が互いに同一の導波路を形成し、かつ前記少なくとも3つの半導体偏波制御素子のうちの隣り合う2つの半導体偏波制御素子の第一のpクラッド層と第一のnクラッド層とが同方向に配置されるように前記少なくとも3つの半導体偏波制御素子は直列に配置されており、前記隣り合う2つの半導体偏波制御素子の第一のpクラッド層の間に第二のnクラッド層が、前記隣り合う2つの半導体偏波制御素子の第一のnクラッド層の間に第三のpクラッド層が配置されていることを特徴とする半導体偏波制御素子。   A polarization control element using a zinc blende-type semiconductor crystal, comprising at least three semiconductor polarization control elements according to claim 2 on a semi-insulating substrate, wherein the at least three semiconductor polarization control elements are provided. Each of the waveguide layers of the control element forms the same waveguide, and the first p-clad layer and the first of the two adjacent semiconductor polarization control elements of the at least three semiconductor polarization control elements The at least three semiconductor polarization control elements are arranged in series so that the n-cladding layers are arranged in the same direction, and between the first p-cladding layers of the two adjacent semiconductor polarization control elements. And a second p-clad layer is disposed between the first n-clad layers of the two adjacent semiconductor polarization control elements. .
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