JP2018041957A - Photoelectric conversion device and method of controlling operation wavelength of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion device capable of more easily controlling an operation wavelength, and a method of controlling an operation wavelength of the same.SOLUTION: The photoelectric conversion device includes: a semiconductor substrate 102 having at least a Si layer 105 on its surface; a light absorbing layer 114a made of a Ge layer selectively grown on the semiconductor substrate 102; and a stress applying layer 117A provided on an upper surface of the light absorbing layer 114a and applying compressive stress or tensile stress to the light absorbing layer 114a. The stress applying layer 117A includes a SiGe layer 116 that is lattice-matched to the base.SELECTED DRAWING: Figure 12

Description

  The present invention relates to a photoelectric conversion device and a method for controlling an operating wavelength of the photoelectric conversion device.

  A photodiode (hereinafter also referred to as PD) is known as a photoelectric conversion device that converts an optical signal into an electric signal. Germanium (Ge) can absorb near-infrared light in the optical communication wavelength band, and can be epitaxially grown on a silicon (Si) substrate to form a light absorption layer. For this reason, a PD PD having a pin structure is applied as a PD in the Si optoelectronic integrated circuit technology “Si photonics” (for example, Non-Patent Document 1).

  When the electric field strength applied to the pin diode structure is modulated (maximum value of 100 kV / cm order), the magnitude of light absorption in the light absorption layer can be controlled by the Franz-Keldysh effect. That is, the intensity of light transmitted through the light absorption layer can be controlled, and an electroabsorption optical modulator can be realized (for example, Non-Patent Document 2).

  In large-capacity wavelength division multiplexing optical communication, light of various wavelengths such as an O band with a wavelength of 1.260 to 1.360 μm, a C band of 1.530 to 1.565 μm, and an L band of 1.565 to 1.625 μm are transmitted. It's being used. The current light receiving device in which the light absorption layer made of Ge is provided on the Si substrate can receive light with high efficiency on the shorter wavelength side than the C band, but the light receiving efficiency decreases on the L band on the longer wavelength side. In order to increase the efficiency in the L band, it is necessary to reduce the direct transition band gap of Ge, which determines the light absorption edge wavelength.

  On the other hand, in the electroabsorption optical modulator, the operating wavelength is limited to the vicinity of the light absorption edge wavelength. In order to be able to operate over a wider range of wavelengths, the direct transition band gap needs to be reduced or increased. As a method for controlling the size of the direct transition band gap, there is a method using a mixed crystal semiconductor such as epitaxially grown SiGe or GeSn (for example, Non-Patent Document 3) or a heterojunction thereof (for example, Non-Patent Document 4). Further, there is a method (for example, Non-Patent Document 5) in which a dielectric film containing stress such as SiNx is deposited on the surface to induce lattice distortion in Ge.

G. Li et al., Opt. Express 20 (2012) 26345 J. Liu et al., Nature Photon. 2 (2008) 433 M. Oehme et al., Appl. Phys. Lett. 104 (2014) 161115 E. H. Edwards et al., Opt. Express 21 (2013) 867 R. Kuroyanagi et al., Opt. Express 21 (2013) 18553

  The operating wavelength of the photoelectric conversion device is determined by the composition of the mixed crystal determined by the epitaxial growth conditions. In the optical modulator described in Non-Patent Document 2, the mixed crystal composition must be controlled with an accuracy of 1% or less. In the method described in Non-Patent Document 5, a dielectric film having a large stress in the vicinity of 1 GPa or more is required.

  In order to be able to operate in a wider range of wavelengths, a photoelectric conversion device that can more easily control the operating wavelength has not yet been obtained.

  Therefore, an object of the present invention is to provide a photoelectric conversion device that can more easily control the operating wavelength, and a method for controlling the operating wavelength of the photoelectric conversion device.

  A photoelectric conversion device according to the present invention is provided on a semiconductor substrate having at least a Si layer on a surface thereof, a light absorption layer composed of a Ge layer selectively grown on the semiconductor substrate, and an upper surface of the light absorption layer, and the light absorption A stress applying layer for applying a compressive stress or a tensile stress to the layer, and the stress applying layer includes a SiGe layer lattice-matched to the base.

  The method for controlling the operating wavelength of a photoelectric conversion device according to the present invention includes an operation wavelength of a photoelectric conversion device including a semiconductor substrate having at least a Si layer on a surface and a light absorption layer made of a Ge layer selectively grown on the semiconductor substrate. A stress applying layer composed of a SiGe layer lattice-matched to the light absorbing layer is formed on the light absorbing layer, and compressive stress is applied from the stress applying layer to the light absorbing layer. The operating wavelength of the photoelectric conversion device is shortened by increasing the direct transition band gap of the light absorption layer.

  The method for controlling the operating wavelength of a photoelectric conversion device according to the present invention includes an operation wavelength of a photoelectric conversion device including a semiconductor substrate having at least a Si layer on a surface and a light absorption layer made of a Ge layer selectively grown on the semiconductor substrate. A stress applying layer including a Si layer and a SiGe layer lattice-matched to the Si layer is formed on the light absorbing layer, and tensile stress is applied from the stress applying layer to the light absorbing layer. Is applied to reduce the direct transition band gap of the light absorption layer, thereby extending the operating wavelength of the photoelectric conversion device.

  According to the present invention, the photoelectric conversion device includes the stress application layer that applies stress to the light absorption layer. In the light absorption layer, when a stress is applied from the stress application layer, the direct transition band gap is increased or decreased.

  When the direct transition band gap of the light absorption layer increases, the operating wavelength of the photoelectric conversion device can be shortened, and when the direct transition band gap of the light absorption layer decreases, the operation of the photoelectric conversion device The wavelength can be increased. As a result, the operating wavelength of the photoelectric conversion device can be easily controlled, and operation in a wider range of wavelengths is possible.

It is a schematic diagram for demonstrating the principle of the photoelectric conversion device of this invention, FIG. 1A is a schematic diagram of a 1st example, FIG. 1B is a 2nd example. FIG. 2A is a calculation result of the band edge energy of the conduction band and the valence band when uniaxial stress is applied to the (001) plane of the Ge layer. FIG. 2A shows the case where uniaxial stress is applied in the [100] direction. FIG. 2B shows the calculation result when uniaxial stress is applied in the [110] direction. FIG. 3A is a calculation result of a direct transition band gap when uniaxial stress is applied to the (001) plane of the Ge layer. FIG. 3A shows a case where uniaxial stress is applied in the [100] direction. 110] is a calculation result when uniaxial stress is applied in the direction. It is a graph which shows the relationship between the composition of a SiGe layer, and stress. FIG. 5A is a graph showing the relationship between the composition of the SiGe layer and the critical film thickness. FIG. 5A shows the calculation result for the SiGe layer on the Ge layer, and FIG. 5B shows the calculation result for the SiGe layer on the Si layer. It is sectional drawing which shows the photoelectric conversion device which concerns on 1st Embodiment. It is a microscope image of the photoelectric conversion device which concerns on 1st Embodiment, FIG. 7A is an optical microscope image of an upper surface, FIG. 7B is a scanning electron microscope image of a cross section. It is a photoluminescence emission spectrum of Ge. It is a graph which shows Ge layer width dependence of the photoluminescence emission peak of Ge. It is a photoluminescence emission spectrum of Ge provided with different layers on the upper surface. It is a photoluminescence emission spectrum of Ge. It is sectional drawing which shows the photoelectric conversion device which concerns on 2nd Embodiment. It is a figure which shows the manufacturing method of the photoelectric conversion device which concerns on 2nd Embodiment in steps, FIG. 13A is the step which formed the SiGe layer on the mesa type Ge layer, FIG. 13B shows the side surface of the mesa type Ge layer. It is sectional drawing which shows the step which removed. It is sectional drawing which shows the photoelectric conversion device of the modification of 2nd Embodiment. FIG. 15A is a view showing stepwise a method for manufacturing a photoelectric conversion device according to a modification of the second embodiment. FIG. 15A is a view showing a stage in which a SiGe layer is formed on a mesa-type Ge layer, and FIG. It is sectional drawing which shows the step which removed the side surface. It is sectional drawing which shows the photoelectric conversion device which concerns on 3rd Embodiment. It is a figure which shows the manufacturing method of the photoelectric conversion device which concerns on 3rd Embodiment in steps, FIG. 17A is the step which formed Si layer on the mesa type Ge layer, FIG. 17B formed the SiGe layer on Si layer It is sectional drawing which shows the step which carried out. It is sectional drawing which shows the photoelectric conversion device of the modification of 3rd Embodiment. It is a figure which shows the manufacturing method of the photoelectric conversion device of the modification of 3rd Embodiment in steps, FIG. 19A is the step which formed Si layer on the mesa type Ge layer, FIG. 19B is a SiGe layer on Si layer It is sectional drawing which shows the step which formed. It is sectional drawing which shows the photoelectric conversion device which concerns on 4th Embodiment. It is a figure which shows the manufacturing method of the photoelectric conversion device which concerns on 4th Embodiment in steps, FIG. 21A is the step which formed Si layer on one side of a mesa type Ge layer, FIG. 21B formed the SiGe layer FIG. 21C is a cross-sectional view showing the stage in which the side surface of the other Ge layer is removed. It is sectional drawing which shows the photoelectric conversion device of the modification of 4th Embodiment. It is a figure which shows the manufacturing method of the photoelectric conversion device of the modification of 4th step in steps, FIG. 23A is the step which formed Si layer on one side of a mesa type Ge layer, FIG. FIG. 23C is a cross-sectional view showing the stage where the other Ge layer has been removed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[Basic principle]
First, the basic principle of the photoelectric conversion device of the present invention will be described. 1A and 1B are schematic views of the photoelectric conversion device of the present invention. In the photoelectric conversion device 10 </ b> A shown in FIG. 1A, a light absorption layer 14 made of a thin Ge layer is formed on a semiconductor substrate 12. Here, the semiconductor substrate 12 is an SOI (Silicon on Insulator) substrate in which an insulating layer (SiO ₂ layer) 12b and an Si layer 12c are sequentially formed on the Si substrate 12a. The Si substrate 12a is used as the semiconductor substrate 12. You can also.

The light absorption layer 14 is formed by selectively growing a Ge layer in a region defined by an insulating layer (SiO ₂ layer) 20 on the surface of the semiconductor substrate 12. On the light absorption layer 14, a stress application layer 17A made of the SiGe layer 16 is provided. The SiGe layer 16 is obtained by directly growing on the light absorption layer 14 as a base, and lattice-matched with the light absorption layer 14. As will be described later, the thickness of the SiGe layer 16 as the stress application layer 17A is preferably equal to or less than the critical film thickness.

  The SiGe layer 16 directly grown on the light absorption layer 14 made of a Ge layer has a tensile stress in the direction opposite to the arrow TS. The stress applying layer 17 </ b> A made of the SiGe layer 16 undergoes elastic deformation that contracts to release the tensile stress, whereby a compressive stress represented by an arrow CS is applied to the light absorbing layer 14. When compressive stress is applied to the light absorption layer 14 made of the Ge layer, the direct transition band gap increases, and the operating wavelength of the photoelectric conversion device 10A is shortened.

  In the photoelectric conversion device 10 </ b> B shown in FIG. 1B, the stress application layer 17 </ b> B on the light absorption layer 14 is composed of the Si layer 18 and the SiGe layer 16. The SiGe layer 16 is grown directly in lattice matching with the underlying Si layer 18. The Si layer 18 is formed on the light absorption layer 14 without lattice matching. Except for this point, the photoelectric conversion device 10B has the same configuration as the photoelectric conversion device 10A.

  The SiGe layer 16 in the stress application layer 17B is lattice-matched to the lower Si layer 18. Since the Si layer 18 is not lattice-matched to the light absorption layer 14 made of a Ge layer, it functions as a lattice relaxation layer. The stress applying layer 17B including the Si layer 18 and the SiGe layer 16 has a compressive stress in the direction opposite to the arrow CS. A tensile stress represented by an arrow TS is applied to the light absorption layer 14 by causing elastic deformation such that the stress application layer 17B expands to release the compressive stress. When a tensile stress is applied to the light absorption layer 14 made of a Ge layer, the direct transition band gap decreases, and the operating wavelength of the photoelectric conversion device 10B becomes longer.

  In the Ge layer grown on the Si layer, tensile strain due to thermal stress may exist in advance. The Ge band gap when a stress is applied to the Ge layer from the outside will be described below.

  The graph of FIG. 2A shows the calculation results of the band edge energy of the conduction band and valence band when uniaxial stress is applied in the [100] direction in the (001) plane of the Ge layer. The graph of FIG. 2B shows the calculation results of the band edge energy of the conduction band and the valence band when uniaxial stress is applied in the [110] direction in the (001) plane of the Ge layer.

In the graphs of FIGS. 2A and 2B, E _C ^Γ and E _C ^L represent the energy at the Γ point and L point of the conduction band, respectively. E _V ^HH and E _V ^LH represent the energy of heavy holes and light holes in the valence band, respectively. E _V ^SO represents the energy of the split-off band of the valence band. From these graphs, it is understood that the band edge energy of the conduction band and the valence band of Ge changes depending on the lattice strain.

  FIG. 3A shows the calculation result of the direct transition band gap at the Γ point when uniaxial stress is applied in the [100] direction in the (001) plane of the Ge layer. FIG. 3B shows the calculation result of the direct transition band gap at the Γ point when uniaxial stress is applied in the [110] direction in the (001) plane of the Ge layer. In this calculation, the influence of thermal stress is not considered.

  In the graphs of FIGS. 3A and 3B, C-HH represents a direct transition band gap for a heavy hole, and C-LH represents a direct transition band gap for a light hole. From these graphs, it can be seen that the transition band gap changes directly by applying lattice strain to Ge.

  Stress is generated in the SiGe layer lattice-matched to the lower layer. As shown in FIG. 4, tensile stress is generated in the SiGe layer (SiGe on Ge) lattice-matched on the Ge layer. On the other hand, compressive stress is generated in the SiGe layer (SiGe on Si) lattice-matched on the Si layer. The stress generated in the SiGe layer is on the order of several GPa. In any case, as the Ge content in the SiGe layer increases, the stress changes in the negative direction. By changing the composition of SiGe, the magnitude of the stress of the SiGe layer can be controlled.

  The SiGe layer can be formed in lattice matching with the Ge layer or the Si layer as long as it has a critical film thickness or less.

  FIG. 5A shows the calculation result of the critical thickness of the SiGe layer on the Ge layer, and FIG. 5B shows the result of the critical thickness of the SiGe layer on the Si layer. As is known, the critical thickness of the SiGe layer depends on the growth temperature. At low temperatures, it agrees well with the results calculated by the People-Bean model. At high temperatures, it is in good agreement with the results calculated by the Matthews-Blakeslee model.

  The thickness of the SiGe layer can be appropriately selected according to the Ge content. The Ge content of the SiGe layer on the Ge layer is preferably about 30 to 90%, more preferably about 50 to 90%, and most preferably about 70 to 90%. The Ge content of the SiGe layer on the Si layer is preferably about 10 to 70%, more preferably about 10 to 50%, and most preferably about 10 to 30%.

  For example, when the Ge content is 80%, the thickness of the SiGe layer on the Ge layer is preferably about 5 to 200 nm, more preferably about 10 to 150 nm, and most preferably about 20 to 100 nm. When the Ge content is 80%, the thickness of the SiGe layer on the Si layer is preferably about 5 to 200 nm, more preferably about 10 to 150 nm, and most preferably about 20 to 100 nm.

[First Embodiment]
A photoelectric conversion device 10 </ b> A illustrated in FIG. 6 includes a light absorption layer 14 provided on the semiconductor substrate 12 and a stress application layer 17 </ b> A that covers the light absorption layer 14. In the semiconductor substrate 12, an insulating layer (SiO ₂ layer) 12b and a Si layer 12c are sequentially stacked on a Si substrate 12a. The light absorption layer 14 can be formed by selectively growing a Ge layer on the Si layer 12c by chemical vapor deposition (CVD).

  The stress application layer 17A is composed of a SiGe layer 16 grown directly on the light absorption layer 14 made of a Ge layer. In the present embodiment, the Ge composition in the SiGe layer 16 is about 80%.

  As shown in FIG. 7A, the width of the light absorption layer 14 is about 5 μm. As shown in FIG. 7B, the thickness of the light absorption layer 14 is about 500 nm, and the thickness of the stress application layer 17A made of the SiGe layer 16 is about 40 nm. The width of the light absorption layer 14 can be appropriately selected within the range of 0.5 to 20 μm. The thickness of the light absorption layer 14 can be appropriately selected within a range of 0.1 to 2.0 μm.

  FIG. 8 shows a photoluminescence emission spectrum of Ge having a SiGe layer on the upper surface. FIG. 8 shows emission spectra of five types of structures (100 μm, 10 μm, 5 μm, 3 μm, and 2 μm) having different widths of the bottom surface of the Ge layer, together with an emission spectrum of bulk Ge as a reference. FIG. 8 shows that light emission is caused by direct transition between bands. The wavelength of the emission peak (hereinafter referred to as “emission peak”) is the wavelength of light having energy corresponding to the band gap.

  The emission peak when the width of the Ge layer is 100 μm is on the longer wavelength side than the emission peak of bulk Ge. This is presumed to be due to the fact that the band gap was reduced due to thermal stress by setting the width of the Ge layer to 100 μm. FIG. 8 shows that the emission peak shifts to the short wavelength side when the width of the Ge layer is narrowed. The shift of the emission peak to the short wavelength side corresponds to the fact that the influence of the strain received from the SiGe layer increases and the direct transition band gap increases.

  FIG. 9 shows the Ge layer width dependence of Ge photoluminescence emission peak. The emission peak can be shifted by 10 nm or more by reducing the width of the Ge layer from 100 μm to 3 μm.

  FIG. 10 shows a comparison of the photoluminescence emission spectra of Ge having different layers on the top surface. “SiGe cap” is a case where the SiGe layer is directly grown on the Ge layer, and “Si cap” is a case where the Si layer is formed on the Ge layer. In all cases, the width of the Ge layer was 5 μm.

  The emission peak of “SiGe cap” is 10 nm or more shorter than the emission peak of “Si cap”. The Si layer basically cannot be lattice matched on the Ge layer, whereas the SiGe layer can be grown directly on the Ge layer. Since the SiGe layer grown directly on the Ge layer has lattice strain, the emission wavelength can be shortened by applying a compressive stress to the Ge layer.

(Modification)
FIG. 1B shows a method similar to that of the photoelectric conversion device 10A described above except that a Si layer 18 having a thickness of about 10 nm is provided between the light absorption layer 14 made of a Ge layer and the SiGe layer 16. A photoelectric conversion device 10B was produced. The Si layer 18 and the SiGe layer 16 constitute a stress application layer 17B. As already described, the SiGe layer 16 is obtained by directly growing on the Si layer 18 and lattice-matched with the Si layer 18. Since the Si layer 18 is not lattice-matched to the light absorption layer 14 made of a Ge layer, it functions as a lattice relaxation layer.

  The photoluminescence emission spectrum of Ge provided with the stress application layer 17B on the upper surface is shown as “compressive SiGe cap” in FIG. In FIG. 11, “relaxed Si cap” indicates the photoluminescence emission spectrum of Ge when only the Si layer having a thickness of about 50 nm is provided on the upper surface of the Ge layer. In FIG. 11, “tensile SiGe cap” is a photoluminescence emission spectrum of Ge in the photoelectric conversion device 10A shown in FIG. 1A, and “reference bulk Ge” is an emission spectrum of bulk Ge as a reference.

  As in the case of FIG. 8, FIG. 11 shows that light emission is caused by direct transition between bands. Therefore, the emission peak is the wavelength of light having energy corresponding to the band gap.

  In the case of “relaxed Si cap” in which only the Si layer is provided on the upper surface of the light absorption layer (Ge layer), the emission peak is on the longer wavelength side than in the case of bulk Ge. Stress (thermal stress) due to a difference in thermal expansion coefficient is generated between the Ge layer and the semiconductor substrate underlying the Ge layer. It is presumed that due to this thermal stress, a tensile strain is built in the Ge layer in advance, and the emission peak is shifted to the long wavelength side due to the influence.

  In a “compressive SiGe cap” provided with a stress application layer composed of a Si layer and a SiGe layer, the emission peak is shifted further to the longer wavelength side than in the case of only the Si layer. When the stress application layer having the Si layer (lattice relaxation layer) under the SiGe layer undergoes elastic deformation, a tensile stress is applied to the light absorption layer made of the Ge layer. As a result, the direct transition band gap decreased, and the emission peak further shifted to the longer wavelength side.

[Second Embodiment]
(overall structure)
A photoelectric conversion device 100A illustrated in FIG. 12 includes a semiconductor substrate 102 in which an insulating layer 104 and a Si layer 105 are sequentially provided on a Si substrate 103. The semiconductor substrate 102 is an SOI substrate. In the Si layer 105, a p-Si region 107 and an n-Si region 108 are formed with an i layer (intrinsic semiconductor layer) 110 interposed therebetween. The photoelectric conversion device 100 </ b> A has a pin diode structure in a direction parallel to the surface of the semiconductor substrate 102.

  On the semiconductor substrate 102, a light absorption layer 114a having a rectangular cross section made of a selectively grown Ge layer is disposed. The light absorption layer 114a has a thin line shape extending in a direction orthogonal to the paper surface. On the light absorption layer 114a, a stress application layer 117A made of the directly grown SiGe layer 116 is provided.

  An insulating layer 120 is provided so as to cover the light absorption layer 114a provided with the stress application layer 117A together with the Si layer 105. A pair of electrodes (a first electrode 119a and a second electrode 119b) are formed through the insulating layer 120 so as to be connected to the p-Si region 107 and the n-Si region 108 of the Si layer 105.

(Production method)
In manufacturing the photoelectric conversion device 100A, first, as shown in FIG. 13A, an SOI substrate in which an insulating layer (SiO ₂ layer) 104 and a Si layer 105 are sequentially formed on a Si substrate 103 is prepared. The p-Si region 107, the n-Si region 108, and the i layer 110 are formed in a predetermined region using a lithography technique and an ion implantation technique.

  Next, the Si layer 105 is etched using a resist film (resist pattern) formed in a predetermined pattern as a mask, and the resist pattern is removed. Thereafter, an insulating layer 120a is formed on the entire surface by CVD, and the entire surface is flattened by chemical mechanical polishing. A resist is applied again, and the insulating layer 120a is etched using the resist pattern as a mask to expose the Si layer 105 having a predetermined pattern.

  A Ge layer 114 is selectively grown on the exposed Si layer 105. At this time, since part of the Si layer 105 is covered with the insulating layer 120a, the Ge layer 114 is formed in a mesa shape on the Si layer 105 and has a slope on the side surface. As shown in FIG. 13A, the SiGe layer 116 is directly grown on the mesa-type Ge layer 114 selectively grown on the Si layer 105 to obtain the stress application layer 117A. The SiGe layer 116 is formed on the entire surface including the slopes on the side surfaces of the mesa-type Ge layer 114.

  Using the resist pattern as a mask, the side wall portion including the slope of the mesa-type Ge layer 114 on which the SiGe layer 116 is formed is etched to obtain a light absorption layer 114a having a rectangular cross section as shown in FIG. 13B.

  Next, an insulating layer is formed on the entire surface, covers the Si layer 105 together with the light absorption layer 114a provided with the stress applying layer 117A, is flattened by chemical mechanical polishing, and then penetrates the insulating layer using a lithography technique and an etching technique. Thus, a contact portion is formed. A metal layer is formed by sputtering and patterned to form first and second electrodes 119a and 119b connected to the Si layer 105. Through the above steps, the photoelectric conversion device 100A shown in FIG. 12 is obtained.

(Operation and effect)
The photoelectric conversion device 100A can be used as an optical modulator by providing optical waveguides for incidence and emission. The optical waveguide is connected to both end faces of the light absorption layer 114a in a direction perpendicular to the paper surface.

  Since Ge constituting the light absorption layer 114a has a high refractive index, when light is incident on the light absorption layer 114a from the optical waveguide, the light easily exists in the light absorption layer 114. The light absorption layer 114a mainly functions as the core of the optical waveguide.

  When the width of the light absorption layer 114a is about 0.2 to 0.8 μm, a single mode optical waveguide can be formed, so that light can propagate to the emission side with low loss.

  By applying a voltage between the first electrode 119a and the second electrode 119b to control the electric field intensity of the light absorption layer 114a, the intensity of light passing through the emission-side waveguide can be changed. For example, when no voltage is applied to the pin diode formed of the p-Si region 107 / i layer 110 / n-Si region 108, the electric field strength in the light absorption layer 114a is as low as about 10 kV / cm. At this time, light having energy smaller than the direct transition band gap of Ge passes through without being absorbed. Further, when a voltage is applied in the reverse direction of the pin diode and a large electric field exceeding several tens of kV / cm is applied to the light absorption layer 114a, light absorption increases due to the Franz-Keldysh effect. In this case, light is not transmitted. As described above, in this embodiment, the photoelectric conversion device 100A functions as an electroabsorption optical modulator.

  Further, as described above, in this embodiment, the photoelectric conversion device 100A is provided with the stress application layer 117A including the lattice-matched SiGe layer 116 on the light absorption layer 114a, so that the light absorption layer 114a has a compressive stress. Applied. As a result, the direct transition band gap of the light absorption layer 114a is increased, and the wavelength that operates as the electroabsorption optical modulator can be shortened.

(Modification)
The photoelectric conversion device 100A can change the direction of the pin diode structure. Specifically, a pin diode structure may be provided in a direction orthogonal to the surface of the semiconductor substrate 202 as in the photoelectric conversion device 100B illustrated in FIG.

The photoelectric conversion device 100B includes a semiconductor substrate 202 in which an insulating layer (SiO ₂ layer) 204 and an Si layer 205 are sequentially provided on an Si substrate 203. Here, “p (n) -Si” means “p-Si” or “n-Si”.

  On the light absorption layer 114a, a stress application layer 117A made of the SiGe layer 116 is provided. The SiGe layer 116 is made of n-SiGe when the Si layer 205 is p-Si, and is made of p-SiGe when the Si layer 205 is n-Si. That is, the photoelectric conversion device 100B has a pin diode structure composed of the Si layer 205, the Ge layer that constitutes the light absorption layer 114a, and the SiGe layer 116 that constitutes the stress application layer 117A. 202 in a direction perpendicular to the surface of 202.

  Two first electrodes 119a are connected to the Si layer 205, and the second electrode 119b is connected to a stress application layer 117A made of the SiGe layer 116. Two first electrodes 119a are not necessarily required, and a pair of electrodes of the first electrode 119a and the second electrode 119b may be present.

  The photoelectric conversion device 100B has the same configuration as the photoelectric conversion device 100A except that the direction of the pin diode structure and the connection of the electrodes are different. The photoelectric conversion device 100B can be basically manufactured by the same method as the photoelectric conversion device 100A.

In manufacturing the photoelectric conversion device 100B, first, as shown in FIG. 15A, an SOI substrate in which an insulating layer (SiO ₂ layer) 204 and a Si layer 205 are sequentially formed on a Si substrate 203 is prepared. A p-Si region is formed in a predetermined region using a lithography technique and an ion implantation technique.

  Next, the Si layer 205 is etched using the resist pattern as a mask, and the resist pattern is removed. Thereafter, an insulating layer 120a is formed on the entire surface by CVD, and the entire surface is flattened by chemical mechanical polishing. A resist is applied again, and the insulating layer 120a is etched using the resist pattern as a mask to expose the Si layer 205 having a predetermined pattern.

  A Ge layer 114 is selectively grown on the exposed Si layer 205. At this time, since part of the Si layer 205 is covered with the insulating layer 120a, the Ge layer 114 is formed in a mesa shape on the Si layer 205 and has a slope on the side surface. As shown in FIG. 15A, the SiGe layer 116 is directly grown on the mesa-type Ge layer 114 selectively grown on the Si layer 205 to obtain the stress application layer 117A. The SiGe layer 116 is formed on the entire surface including the slopes on the side surfaces of the mesa-type Ge layer 114.

  Using the resist pattern as a mask, the side wall portion including the slope of the mesa-type Ge layer 114 on which the SiGe layer 116 is formed is etched to obtain a light absorption layer 114a having a rectangular cross section as shown in FIG. 15B.

  Next, an insulating layer is formed on the entire surface, covers the Si layer 205 together with the light absorption layer 114a provided with the stress application layer 117A, and is flattened by chemical mechanical polishing, and then penetrates the insulating layer using a lithography technique and an etching technique. Thus, a contact portion is formed. A metal layer is formed by a sputtering method and patterned to form a first electrode 119a connected to the Si layer 205 and a second electrode 119b connected to the stress application layer 117A. Through the above steps, the photoelectric conversion device 100B shown in FIG. 14 is obtained.

  Similarly to the photoelectric conversion device 100A, the photoelectric conversion device 100B can be used as an optical modulator by providing incident and output optical waveguides. The optical waveguide is connected to both end faces of the light absorption layer 114a in a direction perpendicular to the paper surface.

  By applying a voltage between the first electrode 119a and the second electrode 119b to control the electric field intensity of the light absorption layer 114a, the intensity of light passing through the emission-side waveguide can be changed. For example, when no voltage is applied to the pin diode composed of the p-Si region 205 / Ge layer 114a / n-SiGe 116, the electric field strength in the light absorption layer 114a is as low as about 10 kV / cm. At this time, light having energy smaller than the direct transition band gap of Ge passes through without being absorbed. Further, when a voltage is applied in the reverse direction of the pin diode and a large electric field exceeding several tens of kV / cm is applied to the light absorption layer 114a, light absorption increases due to the Franz-Keldysh effect. In this case, light is not transmitted. As described above, in this embodiment, the photoelectric conversion device 100B functions as an electroabsorption optical modulator.

  In addition, as described above, in this example, the photoelectric conversion device 100B is provided with the stress application layer 117A including the lattice-matched SiGe layer 116 on the light absorption layer 114a. Therefore, the light absorption layer 114a has a compressive stress. Applied. As a result, the direct transition band gap of the light absorption layer 114a is increased, and the wavelength that operates as the electroabsorption optical modulator can be shortened.

  As described above, in the case of the photoelectric conversion device 100B, the same effect as that of the photoelectric conversion device 100A can be obtained. However, when the second electrode 119b is made of metal, the waveguide loss of light may increase. In order to avoid this, it is desirable to use low-resistance Si (such as impurity-doped poly-Si) to prevent the transmitted light from being absorbed by the metal.

[Third Embodiment]
(overall structure)
A photoelectric conversion device 200 </ b> A illustrated in FIG. 16 includes a semiconductor substrate 102 in which an insulating layer 104 and a Si layer 105 are sequentially provided on a Si substrate 103. The semiconductor substrate 102 is an SOI substrate. In the Si layer 105, the p-Si region 107 and the n-Si region 108 are formed with the i layer 110 interposed therebetween. The photoelectric conversion device 100 </ b> A has a pin diode structure in a direction parallel to the surface of the semiconductor substrate 102.

  On the semiconductor substrate 102, a light absorption layer 114 made of a selectively grown mesa-type Ge layer is disposed. The light absorption layer 114 has a thin line shape extending in a direction perpendicular to the paper surface. On the light absorption layer 114, a stress application layer 117B including a Si layer 118 and a SiGe layer 116 directly and selectively grown on the Si layer 118 is provided.

  The photoelectric conversion device 200A is the same as the photoelectric conversion device 100A except that the cross-sectional shape of the light absorption layer 114 and the configuration of the stress application layer 117B are different.

  Similar to the photoelectric conversion device 100A, the insulating layer 120 is provided so as to cover both the light absorption layer 114 provided with the stress application layer 117B and the Si layer 105. A pair of electrodes (a first electrode 119a and a second electrode 119b) are formed through the insulating layer 120 so as to be connected to the p-Si region 107 and the n-Si region 108 of the Si layer 105.

(Production method)
In manufacturing the photoelectric conversion device 200A, first, as shown in FIG. 17A, an SOI substrate in which an insulating layer (SiO ₂ layer) 104 and a Si layer 105 are sequentially formed on a Si substrate 103 is prepared. The p-Si region 107, the n-Si region 108, and the i layer 110 are formed in a predetermined region using a lithography technique and an ion implantation technique.

  Next, the Si layer 105 is etched using the resist pattern as a mask, and the resist pattern is removed. Thereafter, an insulating layer 120a is formed on the entire surface by CVD, and the entire surface is flattened by chemical mechanical polishing. A resist is applied again, and the insulating layer 120a is etched using the resist pattern as a mask to expose the Si layer 105 having a predetermined pattern.

  A Ge layer 114 is selectively grown on the exposed Si layer 105. At this time, since part of the Si layer 105 is covered with the insulating layer 120a, the Ge layer 114 is formed in a mesa shape on the Si layer 105 and has a slope on the side surface. As shown in FIG. 17A, a Si layer 118 is selectively grown on the Ge layer 114. The thickness of the Si layer 118 is preferably equal to or greater than the critical thickness, and can be about 2 to 100 nm. A SiGe layer 116 is directly grown on the Si layer 118 to obtain a stress applying layer 117B as shown in FIG. 17B. The SiGe layer 116 is formed on the entire surface including the slopes on the side surfaces of the mesa-type Ge layer 114.

  Next, an insulating layer is formed on the entire surface, covers the Si layer 105 together with the light absorption layer 114a provided with the stress applying layer 117B, is flattened by chemical mechanical polishing, and then penetrates the insulating layer using a lithography technique and an etching technique. Thus, a contact portion is formed. A metal layer is formed by sputtering and patterned to form first and second electrodes 119a and 119b connected to the Si layer 105. Through the above steps, the photoelectric conversion device 200A shown in FIG. 16 is obtained.

(Operation and effect)
The photoelectric conversion device 200A can be used as a light receiver by making light incident in a direction perpendicular to the paper surface. Specifically, optical waveguides are connected to both end surfaces of the light absorption layer 114 in a direction perpendicular to the paper surface. For example, light is absorbed by applying a voltage in the reverse direction of the pin diode composed of the p-Si region 107 / i layer 110 / n-Si region 108 via the first electrode 119a and the second electrode 119b. When light having a specific wavelength is incident from the optical waveguide while a voltage is applied to the layer 114, electrons and holes are generated in the light absorption layer 114, and current flows between the first electrode 119a and the second electrode 119b. Flows. As described above, in this embodiment, the photoelectric conversion device 200A functions as a pin light receiver.

  In the photoelectric conversion device 200 </ b> A configured as described above, the stress application layer 117 </ b> B including the Si layer 118 and the SiGe layer 116 is provided on the light absorption layer 114. Since the SiGe layer 116 is lattice-matched to the Si layer 118, a tensile stress is applied to the light absorption layer 114. As a result, the direct transition band gap of the light absorption layer 114 is reduced, and the operating wavelength can be increased.

  In the photoelectric conversion device 200A, light may enter from the top to the bottom toward the stress application layer 117B.

(Modification)
The photoelectric conversion device 200A can change the direction of the pin diode structure. Specifically, a pin diode structure may be provided in a direction orthogonal to the surface of the semiconductor substrate 202 as in a photoelectric conversion device 200B illustrated in FIG.

The photoelectric conversion device 200B includes a semiconductor substrate 202 in which an insulating layer (SiO ₂ layer) 204 and a Si layer 205 are sequentially provided on a Si substrate 203. Here, “p (n) -Si” means “p-Si” or “n-Si”.

  On the light absorption layer 114, the stress application layer 117B including the Si layer 118 and the SiGe layer 116 is provided. The SiGe layer 116 is made of n-SiGe when the Si layer 205 is p-Si, and is made of p-SiGe when the Si layer 205 is n-Si. That is, the photoelectric conversion device 200 </ b> B has a pin diode structure composed of the Si layer 205, the Ge layer constituting the light absorption layer 114, and the stress application layer 117 </ b> B in a direction orthogonal to the surface of the semiconductor substrate 202. Have.

  Similar to the photoelectric conversion device 100B, the photoelectric conversion device 200B includes two first electrodes 119a connected to the Si layer 205 and a second electrode 119b connected to the SiGe layer 116. Two first electrodes 119a are not necessarily required, and a pair of electrodes of the first electrode 119a and the second electrode 119b may be present.

  The photoelectric conversion device 200B has the same configuration as the photoelectric conversion device 200A except that the direction of the pin diode structure and the connection of the electrodes are different. The photoelectric conversion device 200B can be basically manufactured by the same method as the photoelectric conversion device 200A.

In manufacturing the photoelectric conversion device 200B, first, as shown in FIG. 19A, an SOI substrate in which an insulating layer (SiO ₂ layer) 204 and a Si layer 205 are sequentially formed on a Si substrate 203 is prepared. A p-Si region is formed in a predetermined region using a lithography technique and an ion implantation technique.

  Next, the Si layer 205 is etched using the resist pattern as a mask, and the resist pattern is removed. Thereafter, an insulating layer 120a is formed on the entire surface by CVD, and the entire surface is flattened by chemical mechanical polishing. A resist is applied again, and the insulating layer 120 is etched using the resist pattern as a mask to expose the Si layer 205 having a predetermined pattern.

  A Ge layer 114 is selectively grown on the exposed Si layer 205. At this time, since part of the Si layer 205 is covered with the insulating layer 120a, the Ge layer 114 is formed in a mesa shape on the Si layer 205 and has a slope on the side surface. As shown in FIG. 19A, a Si layer 118 is selectively grown on the Ge layer 114. The thickness of the Si layer 118 is preferably equal to or greater than the critical thickness, and can be about 2 to 100 nm. A SiGe layer 116 is directly grown on the Si layer 118 to obtain a stress applying layer 117B as shown in FIG. 19B. The SiGe layer 116 is formed on the entire surface including the slopes on the side surfaces of the mesa-type Ge layer 114.

  Next, an insulating layer is formed on the entire surface, covers the Si layer 205 together with the light absorption layer 114 provided with the stress applying layer 117B, and is flattened by chemical mechanical polishing, and then the insulating layer is formed using a lithography technique and an etching technique. A contact portion is formed through. A metal layer is formed by a sputtering method and patterned to form a first electrode 119a connected to the Si layer 205 and a second electrode 119b connected to the SiGe layer 116. Through the above steps, the photoelectric conversion device 200B shown in FIG. 18 is obtained.

  Similarly to the photoelectric conversion device 200A, the photoelectric conversion device 200B can be used as a light receiver by providing an optical waveguide. In the case of the photoelectric conversion device 200B, the same effect as that of the photoelectric conversion device 200A can be obtained. However, when light is incident on the stress application layer 117B from the top to the bottom, it is desired to suppress light reflection.

[Fourth Embodiment]
(overall structure)
A photoelectric conversion device 300 </ b> A illustrated in FIG. 20 includes a semiconductor substrate 102 in which an insulating layer 104 and a Si layer 105 are sequentially provided on a Si substrate 103. The photoelectric conversion device 300A has a pin diode structure in a direction parallel to the surface of the semiconductor substrate 102, and the above-described photoelectric conversion device 100A and the photoelectric conversion device 200A are integrally formed.

  As already described, in the photoelectric conversion device 100A, the stress application layer 117A including the SiGe layer 116 lattice-matched is provided on the light absorption layer 114a having a rectangular cross section. In the photoelectric conversion device 200 </ b> A, a stress application layer 117 </ b> B including a Si layer 118 and a SiGe 116 layer lattice-matched to the Si layer 118 is provided on a light absorption layer 114 made of a mesa-type Ge layer.

(Production method)
In manufacturing the photoelectric conversion device 300A, first, as shown in FIG. 21A, an SOI substrate in which an insulating layer (SiO ₂ layer) 104 and a Si layer 105 are sequentially formed on a Si substrate 103 is prepared. The p-Si region 107, the n-Si region 108, and the i layer 110 are formed in a predetermined region using a lithography technique and an ion implantation technique.

  Next, the Si layer 105 is etched using the resist pattern as a mask, and the resist pattern is removed. Thereafter, an insulating layer 120a is formed on the entire surface by CVD, and the entire surface is flattened by chemical mechanical polishing. A resist is applied again, and the insulating layer 120a is etched using the resist pattern as a mask to expose the Si layer 105 having a predetermined pattern.

  A Ge layer 114 is selectively grown on the exposed Si layer 105. At this time, since part of the Si layer 105 is covered with the insulating layer 120a, the Ge layer 114 is formed in a mesa shape on the Si layer 105 and has a slope on the side surface.

  Next, a Si layer 118 is selectively grown on the Ge layer 114. The thickness of the Si layer 118 is preferably equal to or greater than the critical film thickness, and can be, for example, about 2 to 100 nm. After the Si layer 118 formation region of the photoelectric conversion device 200A is masked with a resist pattern, the Si layer 118 in the region of the photoelectric conversion device 100A is etched to remove the resist (FIG. 21A). Thereafter, the SiGe layer 116 is directly grown on the Ge layer 114 in the region of the photoelectric conversion device 100A and on the Si layer 118 of the photoelectric conversion device 200A to obtain stress application layers 117A and 117B as shown in FIG. 21B.

  Note that the SiGe layers 116 in the stress application layer 117A and the stress application layer 117B may be formed separately to form SiGe layers having different Ge compositions. Since SiGe layers having different Ge compositions are more likely to be lattice-matched on both the Ge layer and the Si layer, optimization of device characteristics can be expected.

  Here, the stress application layer 117A is composed of the SiGe layer 116 lattice-matched to the light absorption layer 114, and the stress application layer 117B is composed of the Si layer 118 and the SiGe 116 layer lattice-matched to the Si layer 118. Using the resist pattern as a mask, the side wall portion including the inclined surface of the mesa-type Ge layer 114 in which the stress applying layer 117A is formed in the region of the photoelectric conversion device 100A is etched to form a rectangular cross section as shown in FIG. 21C. The light absorption layer 114a is obtained.

  Next, an insulating layer is formed on the entire surface, covers the Si layer 105 together with the light absorption layer 114 provided with the stress applying layers 117A and 117B, and is flattened by chemical mechanical polishing, and then the insulating layer is formed using a lithography technique and an etching technique. A contact portion is formed through the substrate. A metal layer is formed by a sputtering method and patterned to form a first electrode 119a connected to the Si layer 105 and a second electrode 119b connected to the SiGe layer 116. Through the above steps, the photoelectric conversion device 300A shown in FIG. 20 is obtained.

(Operation and effect)
In the photoelectric conversion device 300A configured as described above, a photoelectric conversion device 100A that functions as an optical modulator and a photoelectric conversion device 200A that functions as a light receiver are integrally provided.

  As a result, it is possible to enter light of the same wavelength, modulate it with one photoelectric conversion device, and receive light with the other photoelectric conversion device. Moreover, as described above, the optical modulator can cope with light having a shorter wavelength, and the light receiver can cope with light having a longer wavelength.

  Note that the SiGe layer 116 that is not lattice-matched with the base and is not completely relaxed may be formed. The stress in this case is smaller than the value shown in FIG. 4, but becomes the remaining SiGe layer.

(Modification)
The photoelectric conversion device 300A can change the direction of the pin diode structure. Specifically, a pin diode structure may be provided in a direction orthogonal to the surface of the semiconductor substrate 202 as in a photoelectric conversion device 300B illustrated in FIG.

  The photoelectric conversion device 300B includes a semiconductor substrate 202 in which an insulating layer 204 and an Si layer 205 are sequentially provided on an Si substrate 203. The photoelectric conversion device 300B has a pin diode structure in a direction orthogonal to the surface of the semiconductor substrate 202, and the photoelectric conversion device 100B and the photoelectric conversion device 200B described above are integrally formed.

  As already described, the photoelectric conversion device 100B is provided with the stress application layer 117A including the SiGe layer 116 lattice-matched on the light absorption layer 114a having a rectangular cross section. In the photoelectric conversion device 200 </ b> A, a stress application layer 117 </ b> B including a Si layer 118 and a SiGe layer 116 lattice-matched to the Si layer 118 is provided on a light absorption layer 114 made of a mesa-type Ge layer.

  The photoelectric conversion device 300B has the same configuration as the photoelectric conversion device 300A except that the direction of the pin diode structure and the connection of the electrodes are different. The photoelectric conversion device 300B can be basically manufactured by the same method as the photoelectric conversion device 300A.

In manufacturing the photoelectric conversion device 300B, first, as shown in FIG. 23A, an SOI substrate in which an insulating layer (SiO ₂ layer) 204 and a Si layer 205 are sequentially formed on a Si substrate 203 is prepared. A p-Si region is formed in a predetermined region using a lithography technique and an ion implantation technique.

  Next, the Si layer 205 is etched using the resist pattern as a mask, and the resist pattern is removed. Thereafter, an insulating layer 120a is formed on the entire surface by CVD, and the entire surface is flattened by chemical mechanical polishing. Further, a resist is applied again, and the insulating layer 120a is etched using the resist pattern as a mask to expose the Si layer 205 having a predetermined pattern.

  A Ge layer 114 is selectively grown on the exposed Si layer 205. At this time, since part of the Si layer 205 is covered with the insulating layer 120a, the Ge layer 114 is formed in a mesa shape on the Si layer 205 and has a slope on the side surface.

  Next, a Si layer 118 is selectively grown on the Ge layer 114. The thickness of the Si layer 118 is preferably equal to or greater than the critical film thickness, and can be, for example, about 2 to 100 nm. After the Si layer 118 formation region of the photoelectric conversion device 200B is masked with a resist pattern, the Si layer 118 in the region of the photoelectric conversion device 100B is etched to remove the resist (FIG. 23A). Thereafter, the SiGe layer 116 is directly grown on the Ge layer 114 in the region of the photoelectric conversion device 100B and the Si layer 118 of the photoelectric conversion device 200B to obtain stress application layers 117A and 117B as shown in FIG. 23B.

  Here, the stress application layer 117A is composed of the SiGe layer 116 lattice-matched to the light absorption layer 114, and the stress application layer 117B is composed of the Si layer 118 and the SiGe 116 layer lattice-matched to the Si layer 118. Using the resist pattern as a mask, the sidewall portion including the slope of the mesa-type Ge layer 114 on which the stress applying layer 117A is formed in the region of the photoelectric conversion device 100B is etched, and a rectangular cross section as shown in FIG. 23C is obtained. The light absorption layer 114a is obtained.

  Next, an insulating layer is formed on the entire surface, the Si layer 205 is covered together with the light absorption layer 114 provided with the stress applying layers 117A and 117B, and is flattened by chemical mechanical polishing, and then the insulating layer is formed using a lithography technique and an etching technique. A contact portion is formed through the substrate. A metal layer is formed by a sputtering method and patterned to form a first electrode 119a connected to the Si layer 205 and a second electrode 119b connected to the SiGe layer 116. The photoelectric conversion device 300B shown in FIG. 22 is obtained through the above steps.

  Similarly to the photoelectric conversion device 300A, the photoelectric conversion device 300B receives light of the same wavelength, modulates with one photoelectric conversion device, and receives light with the other photoelectric conversion device.

100A, 100B, 200A, 200B, 300A, 300B Photoelectric conversion device 102, 202 Semiconductor substrate 114, 114a Light absorption layer 116, SiGe layer 117A, 117B Stress application layer

Claims (12)

A semiconductor substrate having at least a Si layer on the surface;
A light absorption layer comprising a Ge layer selectively grown on the semiconductor substrate;
A stress applying layer that is provided on the upper surface of the light absorbing layer and applies compressive stress or tensile stress to the light absorbing layer;
The photoelectric conversion device, wherein the stress application layer includes a SiGe layer lattice-matched to a base.   The photoelectric conversion device according to claim 1, wherein the base is the light absorption layer, and the SiGe layer applies compressive stress to the light absorption layer.   The photoelectric conversion device according to claim 2, wherein the light absorption layer has a rectangular cross section.   The photoelectric conversion device according to claim 2, wherein the SiGe layer has a thickness equal to or less than a critical film thickness.   It is an optical modulator, The photoelectric conversion device of any one of Claims 1-4 characterized by the above-mentioned.   The photoelectric conversion according to claim 1, wherein the base is a Si layer formed on the light absorption layer without lattice matching, and the SiGe layer applies a tensile stress to the light absorption layer. device.   The photoelectric conversion device according to claim 6, wherein the light absorption layer has a mesa structure.   The photoelectric conversion device according to claim 6, wherein the Si layer has a thickness equal to or greater than a critical film thickness.   It is a light receiver, The photoelectric conversion device of any one of Claims 6-8 characterized by the above-mentioned.   The photoelectric conversion device according to claim 1, wherein the semiconductor substrate is a Si substrate or an SOI substrate. A method for controlling the operating wavelength of a photoelectric conversion device comprising a semiconductor substrate having at least a Si layer on the surface, and a light absorption layer comprising a Ge layer selectively grown on the semiconductor substrate,
A stress application layer composed of a SiGe layer lattice-matched to the light absorption layer is formed on the light absorption layer, and compressive stress is applied from the stress application layer to the light absorption layer to directly apply the light absorption layer. A control method characterized by shortening an operating wavelength of the photoelectric conversion device by increasing a transition band gap. A method for controlling the operating wavelength of a photoelectric conversion device comprising a semiconductor substrate having at least a Si layer on the surface, and a light absorption layer comprising a Ge layer selectively grown on the semiconductor substrate,
A stress application layer including a Si layer and a SiGe layer lattice-matched to the Si layer is formed on the light absorption layer, and a tensile stress is applied from the stress application layer to the light absorption layer, so that the light A control method characterized in that the operating wavelength of the photoelectric conversion device is lengthened by reducing the direct transition band gap of the absorption layer.

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