WO2014156480A1 - Optical modulator - Google Patents

Optical modulator Download PDF

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Publication number
WO2014156480A1
WO2014156480A1 PCT/JP2014/055206 JP2014055206W WO2014156480A1 WO 2014156480 A1 WO2014156480 A1 WO 2014156480A1 JP 2014055206 W JP2014055206 W JP 2014055206W WO 2014156480 A1 WO2014156480 A1 WO 2014156480A1
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WO
WIPO (PCT)
Prior art keywords
dielectric layer
region
optical modulator
layer
thickness
Prior art date
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PCT/JP2014/055206
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French (fr)
Japanese (ja)
Inventor
藤方 潤一
重樹 高橋
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日本電気株式会社
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Priority to JP2015508209A priority Critical patent/JPWO2014156480A1/en
Publication of WO2014156480A1 publication Critical patent/WO2014156480A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
    • G02F1/025Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction in an optical waveguide structure
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
    • G02F1/0151Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction modulating the refractive index
    • G02F1/0152Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction modulating the refractive index using free carrier effects, e.g. plasma effect
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/06Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 integrated waveguide
    • G02F2201/066Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 integrated waveguide channel; buried
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/10Materials and properties semiconductor
    • G02F2202/105Materials and properties semiconductor single crystal Si
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/42Materials having a particular dielectric constant

Definitions

  • the present invention relates to an optical modulator using a carrier plasma effect.
  • Silicon-based optical communication devices that operate in optical fiber communication wavelength bands of 1310 nm and 1550 nm are known as optical communication devices used in an optical communication system such as LAN (Local Area Network).
  • optical communication device is a very promising device in that an optical functional element and an electronic circuit can be integrated on a silicon substrate by using CMOS (Complementary Metal Oxide Semiconductor) technology. .
  • CMOS Complementary Metal Oxide Semiconductor
  • passive devices such as waveguides, optical couplers, and wavelength filters have been very widely studied as silicon-based optical communication devices.
  • active devices such as silicon-based optical modulators and optical switches have received much attention as important elements of means for manipulating optical signals for optical communication systems.
  • thermo-optic effect change the refractive index of silicon using the thermo-optic effect.
  • the optical modulator using the thermo-optic effect cannot be used for an apparatus that has a low operation speed and requires a modulation frequency exceeding 1 Mb / sec. Therefore, in order to realize a high modulation frequency required in more optical communication systems, an optical modulator using the electro-optic effect is required.
  • FIG. 1 and FIG. 2 are cross-sectional views schematically showing an optical modulator using a carrier plasma effect described in Non-Patent Document 1 and Patent Document 1, respectively.
  • the optical modulator 101 shown in FIG. 1 is made of intrinsic semiconductor silicon, and has a silicon layer 104 that constitutes an SOI (Silicon on Insulator) substrate together with a support substrate 102 and a buried oxide layer 103.
  • the silicon layer 104 has a rib-shaped portion.
  • a high concentration p-type region 105 and a high concentration n-type region 106 are formed on both sides of the rib-shaped portion.
  • the high-concentration p-type region 105 and the high-concentration n-type region 106 are regions in which the silicon layer (intrinsic semiconductor silicon) 104 is doped with p-type impurities and n-type impurities at high concentrations, respectively.
  • the upper surface of the silicon layer 104 is covered with an oxide cladding 107.
  • the optical modulator 201 shown in FIG. 2 is partially formed on the p-type silicon layer 204 via the p-type silicon layer 204 that constitutes the SOI substrate together with the support substrate 202 and the buried oxide layer 203 and the dielectric layer 205. And an n-type silicon layer 206 stacked so as to overlap each other.
  • a high-concentration p-type region 204a doped with a p-type impurity at a high concentration is formed.
  • n-type silicon layer 206 a high-concentration n-type region 206a doped with an n-type impurity at a high concentration is formed.
  • the impurity concentration is defined so that the change in carrier density is controlled by the external signal voltage.
  • the p-type silicon layer 204, the dielectric layer 205, and the n-type silicon layer 206 are covered with an oxide cladding 207.
  • optical modulator using the carrier plasma effect has a problem that it is impossible to achieve both high-speed operation, downsizing, and low power consumption as described below.
  • the light modulation operation speed of the light modulator shown in FIG. 1 is limited by the free carrier lifetime in the rib-shaped portion of the silicon layer 104 and carrier diffusion when the forward bias is removed.
  • Such an optical modulator having a PIN diode structure usually has an operation speed in the range of 10 to 50 Mb / sec during forward bias operation.
  • the switching speed can be increased by introducing impurities into the silicon layer 104 in order to shorten the carrier lifetime.
  • the introduced impurities reduce the light modulation efficiency, which hinders downsizing and low power consumption.
  • the biggest factor affecting the operation speed is due to the RC time constant.
  • the electric capacity (C) when a forward bias is applied becomes very large due to a decrease in the carrier depletion layer at the PN junction.
  • high speed operation of the PN junction can be achieved by applying a reverse bias.
  • the optical modulator shown in FIG. 2 ideally, it is desirable that the optical signal electric field and the region in which the carrier density is dynamically controlled are matched, but in practice, the carrier density changes dynamically.
  • the thickness of the area to be reduced is as thin as about several tens of nm. Therefore, in order to obtain a predetermined phase shift, the length along the light propagation direction of the optical modulator is required to be 1 mm or more, which increases the device size.
  • the optical modulation efficiency can be improved, and the device can be downsized and the power consumption can be reduced.
  • reducing the thickness of the dielectric layer 206 simultaneously increases the electric capacity and increases the RC time constant, leading to a decrease in operating speed. That is, there is a trade-off relationship between the operation speed and the light modulation efficiency.
  • an object of the present invention is to provide an optical modulator that achieves both high-speed operation, miniaturization, and low power consumption.
  • an optical modulator is formed on a first semiconductor layer having a first conductivity type, the first semiconductor layer, and the first semiconductor layer is formed on the first semiconductor layer.
  • a second semiconductor layer formed on the dielectric layer and having a second conductivity type different from the first conductivity type, the dielectric layer comprising: When viewed from the direction of the dielectric layer, located in the center of the dielectric layer in the width direction, the first region having a relatively large capacitance in the thickness direction of the dielectric layer, and the end in the width direction, And a second region having a relatively small electric capacity in the thickness direction.
  • optical modulator that achieves both high-speed operation, miniaturization, and low power consumption.
  • FIG. 1 is a schematic plan view showing a configuration in which Mach-Zehnder optical modulators of this embodiment are arranged in parallel.
  • 1 is a schematic plan view showing a configuration in which Mach-Zehnder optical modulators of this embodiment are arranged in series.
  • optical modulator uses the carrier plasma effect described below.
  • pure silicon shows no change in refractive index due to the Pockels effect, and the change in refractive index due to the Franz-Keldysh effect or the Kerr effect is very small. Therefore, in pure silicon, only the carrier plasma effect and the thermo-optic effect can be used for the light modulation operation.
  • an optical modulator that changes the refractive index using the thermo-optic effect has a low operating speed. Therefore, for desired high-speed operation (1 Gb / second or more), only carrier diffusion by the carrier plasma effect is effective. Carrier diffusion due to the carrier plasma effect is described by the following relational expression in the first-order approximation.
  • ⁇ n and ⁇ k represent the real part and the imaginary part of the refractive index change of the silicon layer, respectively.
  • e is elementary charge
  • lambda optical wavelength
  • epsilon 0 is the dielectric constant in vacuum
  • n is the refractive index of the intrinsic semiconductor silicon
  • m e is the effective mass of the electron carrier
  • m h is the effective mass of the hole carriers
  • mu e Is the electron carrier mobility
  • ⁇ h is the hole carrier mobility
  • ⁇ N e is the electron carrier concentration change
  • ⁇ N h is the hole carrier concentration change.
  • L is the length along the light propagation direction of the optical modulator.
  • the amount of phase change due to the carrier plasma effect is larger than the amount of phase change due to the electroabsorption effect, and the optical modulator described below can basically exhibit characteristics as a phase modulator.
  • FIG. 3A is a cross-sectional view schematically showing the optical modulator of the present embodiment, showing a cross section perpendicular to the light propagation direction.
  • FIG. 3B is a schematic cross-sectional view showing an enlarged part of the optical modulator shown in FIG. 3A.
  • the optical modulator 1 includes a support substrate 2, a buried oxide layer 3 formed on the support substrate 2, and a first semiconductor layer 4 formed on the buried oxide layer 3 and having the first conductivity type.
  • the first semiconductor layer 4 is formed of silicon doped with p-type impurities, that is, p-type silicon.
  • the first semiconductor layer 4 is referred to as a “p-type silicon layer”.
  • the support substrate 2, the buried oxide layer 3, and the p-type silicon layer 4 constitute an SOI substrate.
  • the optical modulator 1 is formed on the p-type silicon layer 4 and extends on the light propagation direction (perpendicular to the plane of the drawing).
  • the optical modulator 1 is formed on the dielectric layer 5 and has the first conductivity type.
  • a second semiconductor layer 6 having a different second conductivity type.
  • the second semiconductor layer 6 is formed of silicon doped with n-type impurities, that is, n-type silicon.
  • the second semiconductor layer 6 is referred to as an “n-type silicon layer”.
  • the p-type silicon layer 4, the dielectric layer 5, and the n-type silicon layer 6 form a SIS (Semiconductor-Insulator-Semiconductor) capacitor structure.
  • the optical modulator 1 of the present embodiment is an optical modulator having a SIS capacitor structure formed on an SOI substrate.
  • an electrode lead portion 7 having the same conductivity type as that of the n-type silicon layer 6 is formed. That is, the electrode lead portion 7 is made of n-type silicon.
  • Each of the p-type silicon layer 4 and the n-type silicon layer 6 is composed of at least one layer of polycrystalline silicon, amorphous silicon, strained silicon, single crystal silicon, and Si 1-x Ge x .
  • the dielectric layer 5 is one of silicon oxide, silicon nitride, hafnium oxide, zirconium oxide, and rare earth oxide, or an alloy made of at least two of these.
  • high-concentration p-type regions 4a doped with p-type impurities at a high concentration are formed on both sides of the p-type silicon layer 4 with the dielectric layer 5 interposed.
  • An electrode contact layer 4b is formed on the high concentration p-type region 4a.
  • An electrode wiring 4c is connected to the electrode contact layer 4b.
  • High-concentration n-type regions 7a doped with n-type impurities at high concentrations are formed on both sides of the electrode lead-out portion 7 with the dielectric layer 5 interposed therebetween.
  • An electrode contact layer 7b is formed on the high concentration n-type region 7a.
  • An electrode wiring 7c is connected to the electrode contact layer 7b.
  • the entire waveguide is covered with an oxide cladding 8.
  • the thickness of the dielectric layer 5 is reduced, the light modulation efficiency is improved, and the device is reduced in size and power consumption is reduced. However, it also leads to an increase in electrical capacity and hinders high speed operation.
  • the dielectric layer 5 is a central region located at the center in the width direction when viewed from the light propagation direction (first direction). (First region) 5a and an end region (second region) 5b located at the end.
  • the end region 5b is thicker than the central region 5a. That is, the electric capacity in the thickness direction of the dielectric layer 5 is relatively large in the central region 5a and relatively small in the end region 5b.
  • the optical electric field strength is large in the central region 5a and small in the end region 5b. Therefore, by making the dielectric constant of the central region 5a of the dielectric layer 5 larger than that of the end region 5b, it is possible to reduce the electric capacity while maintaining the light modulation efficiency. That is, high-speed operation can be realized while maintaining light modulation efficiency.
  • this effect will be described with reference to FIG. 4 and Table 1.
  • FIG. 4 is a graph showing the relationship between the electric capacity of the dielectric layer 5 of the present embodiment and the applied voltage.
  • the graph of FIG. 4 shows the applied voltage dependency of the capacitance in the dielectric layer 5 when the thickness of the end region 5b is 5 nm, 10 nm, and 15 nm, respectively.
  • the thickness of the central region 5a of the dielectric layer 5 is 5 nm.
  • a small modulation efficiency V ⁇ L means that the drive voltage and the waveguide length necessary for a predetermined phase shift are small, and therefore means that the light modulation efficiency is good.
  • the modulation efficiency V ⁇ L when the thickness of the end region 5b is 10 nm is approximately the same as that when the thickness of the end region 5b is 5 nm (the thickness of the dielectric layer 5 is uniform). That is, even if the thickness of the end region 5b is twice that of the central region 5a, the light modulation efficiency can be maintained at the same level.
  • the modulation efficiency V ⁇ L is increased by about 27% compared to the case where the thickness of the end region 5b is 5 nm, and the light modulation efficiency decreases. Is seen.
  • the thickness of the end region 5b is 15 nm, an effect of reducing the electric capacity that exceeds the decrease in the light modulation efficiency is obtained (see FIG. 4), and the thickness of the dielectric layer 5 is uniform. Even if compared, it turns out that an advantageous effect is acquired.
  • the p-type silicon layer 4, the dielectric layer 5, and the n-type silicon layer 6 form a rib-shaped or ridge-shaped waveguide. Further, regions doped with a high concentration (a high concentration p-type region 4a and a high concentration n-type region 7a) are formed at a distance from the rib waveguide. Thereby, the light absorption loss due to the overlap between the light field and the heavily doped region is reduced, and as a result, the light modulation efficiency can be improved.
  • the electrode contact layers 4b and 7b are preferably formed of silicide.
  • the thickness (maximum depletion layer thickness) W of this region is defined by the following equation in the thermal equilibrium state.
  • ⁇ s is the dielectric constant of the semiconductor layer
  • k is the Boltzmann constant
  • N c is the carrier density
  • ni is the intrinsic carrier concentration
  • e is the elementary charge.
  • the maximum depletion layer thickness W is about 0.1 ⁇ m
  • the depletion layer thickness that is, modulation of the carrier density occurs. The thickness of the region is reduced. In other words, the region where the carrier density is modulated becomes very small with respect to the spread of the optical signal electric field, resulting in a problem that the light modulation efficiency is deteriorated.
  • the optical modulator 1 of the present embodiment is designed so that the overlap between the region where the carrier density is modulated and the optical field is maximized.
  • the optical field size is ⁇ / n eff . Therefore, by setting the height of the region where the carrier density is modulated to about ⁇ / n eff , the overlap between the optical field and the region where the carrier density is modulated is maximized, and efficient phase modulation of light is realized.
  • the region where the optical signal electric field has the peak intensity is arranged in the region where the free carriers are accumulated, removed, or inverted on both sides of the dielectric layer 5, the highest light modulation efficiency is obtained.
  • 5 to 18 are cross-sectional views schematically showing the optical modulator in each step of the manufacturing method of the present embodiment, and each show a cross section perpendicular to the light propagation direction.
  • the manufacturing method of the present embodiment will be described by taking the case where the dielectric layer 5 is made of an oxide as an example, but the present invention is not limited to this.
  • an SOI substrate composed of a support substrate 2, a buried oxide layer 3, and a p-type silicon layer 4 is prepared.
  • the buried oxide layer 3 has a thickness of 1000 nm or more in order to reduce optical loss.
  • the surface layer is doped with phosphorus (P) or boron (B) by ion implantation.
  • the p-type silicon layer 4 is formed by heat-processing it. Note that an SOI substrate provided with a silicon layer doped p-type in advance may be used.
  • an oxide film mask 9 is formed on the p-type silicon layer 4.
  • SiN x silicon nitride (SiN x ) layer is formed on the oxide film mask 9. Then, the SiN x layer is patterned so as to have a width equal to the width of the rib waveguide (that is, the dielectric layer 5 and the n-type silicon layer 6), and the hard mask 10 is formed as shown in FIG.
  • thermal oxidation is performed to increase the thickness of the oxide film mask 9 as shown in FIG.
  • the oxide film mask 9 is formed with a relatively thick region and a thin region.
  • the surface of the oxide film mask 9 is removed by dilute hydrofluoric acid treatment or the like. Thereafter, a thermal oxidation process is performed again to improve the film quality of the oxide film mask 9, thereby forming the dielectric layer 5 as shown in FIG.
  • an n-type silicon layer 6 is formed on the dielectric layer 5. Specifically, first, a polycrystalline silicon layer is formed on the dielectric layer 5 by a CVD (Chemical Vapor Deposition) method or a sputtering method. Thereafter, the polycrystalline silicon layer is doped with P by ion implantation, whereby the n-type silicon layer 6 is formed.
  • CVD Chemical Vapor Deposition
  • a SiN x layer is formed on the n-type silicon layer 6 by a low pressure CVD method or the like. Then, by dry etching or the like, the SiN x layer is patterned so as to have a width equal to the width of the rib waveguide, and a hard mask 11 is formed as shown in FIG.
  • the n-type silicon layer 6 is patterned so that a portion to be a rib waveguide remains. Although the dielectric layer 5 is partially removed by the etching at this time, this etching stops at the dielectric layer 5 itself. Therefore, in practice, the dielectric layer 5 is present on the p-type silicon layer 4 in addition to the lower portion of the n-type silicon layer 6.
  • an oxide cladding 8 is formed by plasma CVD or the like as shown in FIG. Then, the surface of the oxide cladding 8 is planarized by CMP (Chemical-Mechanical-Polishing).
  • an electrode lead portion 7 of the n-type silicon layer 6 is formed on the oxide cladding 8.
  • a polycrystalline silicon layer is formed on the oxide cladding 8 by a CVD method or a sputtering method.
  • the polycrystalline silicon layer is doped with P by ion implantation, whereby the n-type electrode lead-out portion 7 is formed.
  • the electrode lead portion 7 can also be formed by performing a doping process during the formation of the polycrystalline silicon layer.
  • n-type regions 7a in which n-type impurities are highly doped are formed at both ends of the electrode lead-out portion 7 of the n-type silicon layer 6 by ion implantation.
  • an oxide clad 8 is further laminated so as to bury the electrode lead portion 7 of the n-type silicon layer 6 by plasma CVD or the like.
  • contact holes 12 are formed in the oxide cladding 8 by reactive etching.
  • a high-concentration p-type region 4a doped with a high concentration of p-type impurities is formed in the p-type silicon layer 4 by ion implantation, and the surface of the high-concentration p-type region 4a and the high-concentration n-type region 7a
  • the electrode contact layers 4b and 7b are formed respectively.
  • the electrode contact layers 4b and 7b may be silicide layers formed by stacking and annealing a metal such as Ni on the high concentration p-type region 4a and the high concentration n-type region 7a.
  • a metal layer such as Ti / TiN / Al (Cu) or Ti / TiN / W is formed by CVD or sputtering, and patterned by reactive etching to form electrode wirings 4c and 7c. Then, by connecting the electrode wirings 4c and 7c to the drive circuit, the optical modulator 1 is completed as shown in FIG.
  • FIG. 18 to 24 are cross-sectional views schematically showing modifications of the optical modulator of the present embodiment, showing a cross section perpendicular to the light propagation direction.
  • Each figure is an enlarged view of the vicinity of the dielectric layer, and corresponds to FIG. 3B.
  • the thickness of the dielectric layer 5 continuously increases from the central region 5a to the end region 5b.
  • the thickness of the dielectric layer 5 may increase stepwise from the central region 5a to the end region 5b.
  • the electric capacity in the thickness direction of the dielectric layer 5 is relatively large in the central region 5a.
  • the partial area 5b is relatively small.
  • the configuration for changing the electric capacity is not limited to this. According to another configuration, the electric capacity in the thickness direction of the dielectric layer 5 can be relatively large in the central region 5a and relatively small in the end region 5b.
  • the central region 5a and the end region 5b have different laminated structures, and in the modification shown in FIG. 23, the central region 5a and the end region 5b are formed with different compositions. ing.
  • regions having relatively small electric capacity compared to the surroundings are discretely provided along the light propagation direction in the center in the width direction of the dielectric layer 5. With such a configuration, the electric capacity in the thickness direction of the dielectric layer 5 is relatively large in the central region 5a and relatively small in the end region 5b.
  • FIG. 25 is a plan view schematically showing a Mach-Zehnder type optical modulator using the optical modulator of the present embodiment.
  • the Mach-Zehnder type optical modulator 20 has first and second arms 21 and 22 arranged in parallel to each other.
  • the above-described optical modulator of the present embodiment is incorporated in the Mach-Zehnder optical modulator 20 as the first and second arms 21 and 22.
  • Connected to the input sides of the first and second arms 21 and 22 is an optical branching structure 23 that branches an optical signal input from the outside into a first arm 21 and a second arm 22.
  • An optical coupling structure 24 that couples optical signals output from the first arm 21 and the second arm 22 is connected to the output sides of the first and second arms 21 and 22.
  • the Mach-Zehnder optical modulator 20 has an electrode pad 25 for applying a voltage to each of the first and second arms 21 and 22.
  • the optical signal input from the outside to the Mach-Zehnder optical modulator 20 is branched by the optical branching structure 23 and input to the first arm 21 and the second arm 22.
  • the input optical signal is phase-modulated by the first arm 21 and the second arm 22.
  • the phase-modulated optical signal is converted into a light intensity modulated signal by phase interference by the optical coupling structure 24.
  • an optical signal input from the outside is branched by the optical branching structure 23 into the first arm 21 and the second arm 22 with equal power.
  • carrier accumulation occurs on both sides of the dielectric layer of the first arm 21 (that is, the optical modulator of the present embodiment).
  • a negative voltage to the second arm 22 carriers on both sides of the dielectric layer of the second arm 22 (that is, the optical modulator of the present embodiment) are removed.
  • the refractive index felt by the optical signal electric field is small in the first arm 21 that is in the carrier accumulation mode, and the refractive index felt by the optical signal electric field is in the second arm 22 that is in the carrier removal (depletion) mode. growing. For this reason, the optical signal phase difference between the first arm 21 and the second arm 22 is maximized.
  • the optical signals transmitted through both arms are multiplexed by the optical coupling structure 24 on the output side, whereby optical intensity modulation occurs.
  • an optical signal of 40 Gbps or more can be transmitted.
  • the Mach-Zehnder type optical modulator 20 of the present embodiment is arranged in parallel or in series, so that the optical modulator or matrix optical switch having a higher transfer rate can be obtained. Application is also possible.
  • the present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
  • the first semiconductor layer having the first conductivity type may be an n-type silicon layer
  • the second semiconductor layer having the second conductivity type may be a p-type silicon layer.
  • optical modulator 2 support substrate 3 buried oxide layer 4 p-type silicon layer 4a high-concentration p-type region 4b electrode contact layer 4c electrode wiring 5 dielectric layer 6 n-type silicon layer 7 electrode lead-out portion 7a high-concentration n-type region 7b electrode Contact layer 7c Electrode wiring 8 Oxide cladding 9 Oxide mask 10, 11 Hard mask 12 Contact hole 20 Mach-Zehnder optical modulator 21 First arm 22 Second arm 23 Optical branching structure 24 Optical multiplexing structure 25 Electrode pad

Abstract

This optical modulator (1) is provided with: a first semiconductor layer (4) having a first conductivity type; a dielectric layer (5) which is formed upon the first semiconductor layer (4), and which extends along a top of the first semiconductor layer (4) in a first direction; and a second semiconductor layer (6) which is formed upon the dielectric layer (5), and which has a second conductivity type different to the first conductivity type. The dielectric layer (5) is provided with: a first region (5a) which, when viewed from the first direction, is positioned at a centre of the dielectric layer (5) in a width direction, and which has a relatively high electric capacitance in a thickness direction of the dielectric layer (5); and second regions (5b) which are positioned at ends of the dielectric layer (5) in the width direction, and which have a relatively low electric capacitance in a thickness direction.

Description

光変調器Light modulator
 本発明は、キャリアプラズマ効果を利用した光変調器に関する。 The present invention relates to an optical modulator using a carrier plasma effect.
 LAN(Local Area Network)などの光通信システムにおいて用いられる光通信デバイスとして、1310nmおよび1550nmの光ファイバ通信波長帯で動作するシリコン・ベースの光通信デバイスが知られている。このような光通信デバイスは、CMOS(Complementary Metal Oxide Semiconductor)技術を利用することで、光機能素子および電子回路のシリコン基板上への集積化が可能になる点で、非常に有望なデバイスである。 2. Description of the Related Art Silicon-based optical communication devices that operate in optical fiber communication wavelength bands of 1310 nm and 1550 nm are known as optical communication devices used in an optical communication system such as LAN (Local Area Network). Such an optical communication device is a very promising device in that an optical functional element and an electronic circuit can be integrated on a silicon substrate by using CMOS (Complementary Metal Oxide Semiconductor) technology. .
 これまで、シリコン・ベースの光通信デバイスとして、導波路、光結合器、および波長フィルタなどの受動デバイスが、非常に広く研究されている。一方で、近年では、光通信システム用の光信号を操作する手段の重要な要素として、シリコン・ベースの光変調器や光スイッチなどの能動デバイスが、非常に注目されている。 Up to now, passive devices such as waveguides, optical couplers, and wavelength filters have been very widely studied as silicon-based optical communication devices. On the other hand, in recent years, active devices such as silicon-based optical modulators and optical switches have received much attention as important elements of means for manipulating optical signals for optical communication systems.
 シリコン・ベースの光変調器には、熱光学効果を利用してシリコンの屈折率を変化させるものがある。しかしながら、熱光学効果を利用した光変調器は、動作速度が低速であり、1Mb/秒を超える変調周波数が要求される装置には使用することができない。したがって、より多くの光通信システムにおいて要求される高い変調周波数を実現するためには、電気光学効果を利用した光変調器が必要となる。 Some silicon-based optical modulators change the refractive index of silicon using the thermo-optic effect. However, the optical modulator using the thermo-optic effect cannot be used for an apparatus that has a low operation speed and requires a modulation frequency exceeding 1 Mb / sec. Therefore, in order to realize a high modulation frequency required in more optical communication systems, an optical modulator using the electro-optic effect is required.
 純シリコンは、線形電気光学効果(Pockels効果)による屈折率の変化を示さず、またFranz-Keldysh効果やKerr効果による屈折率の変化も非常に小さい。そのため、現在提案されている、電気光学効果を利用した光変調器の多くは、キャリアプラズマ効果を利用したものである(例えば、非特許文献1および特許文献1参照)。すなわち、自由キャリアの注入、蓄積、除去、または反転により、シリコン層中の自由キャリア密度を変化させることで、屈折率の実数部と虚数部を変化させ、光の位相や強度を変化させるものである。 Pure silicon shows no change in refractive index due to the linear electro-optic effect (Pockels effect), and the change in refractive index due to the Franz-Keldysh effect or the Kerr effect is very small. For this reason, many of the currently proposed optical modulators utilizing the electro-optic effect utilize the carrier plasma effect (see, for example, Non-Patent Document 1 and Patent Document 1). That is, by changing the free carrier density in the silicon layer by free carrier injection, accumulation, removal, or inversion, the real part and imaginary part of the refractive index are changed, and the phase and intensity of light are changed. is there.
 図1および図2は、それぞれ非特許文献1および特許文献1に記載の、キャリアプラズマ効果を利用した光変調器を概略的に示す断面図である。 FIG. 1 and FIG. 2 are cross-sectional views schematically showing an optical modulator using a carrier plasma effect described in Non-Patent Document 1 and Patent Document 1, respectively.
 図1に示す光変調器101は、真性半導体シリコンからなり、支持基板102および埋め込み酸化層103と共にSOI(Silicon on Insulator)基板を構成するシリコン層104を有している。シリコン層104は、リブ形状部分を有している。そのリブ形状部分を挟んだ両側には、高濃度p型領域105および高濃度n型領域106が形成されている。高濃度p型領域105および高濃度n型領域106は、シリコン層(真性半導体シリコン)104にそれぞれp型不純物およびn型不純物が高濃度にドープされた領域である。シリコン層104は上面を酸化物クラッド107で覆われている。 The optical modulator 101 shown in FIG. 1 is made of intrinsic semiconductor silicon, and has a silicon layer 104 that constitutes an SOI (Silicon on Insulator) substrate together with a support substrate 102 and a buried oxide layer 103. The silicon layer 104 has a rib-shaped portion. A high concentration p-type region 105 and a high concentration n-type region 106 are formed on both sides of the rib-shaped portion. The high-concentration p-type region 105 and the high-concentration n-type region 106 are regions in which the silicon layer (intrinsic semiconductor silicon) 104 is doped with p-type impurities and n-type impurities at high concentrations, respectively. The upper surface of the silicon layer 104 is covered with an oxide cladding 107.
 このようなPIN(p-intrinsic-n)ダイオード構造に対し、順方向および逆方向バイアスを印加すると、真性半導体シリコンからなるシリコン層104内の自由キャリア密度が変化する。その結果、シリコン層104の屈折率が変化し、導波路としてのシリコン層104を通じて伝達される光が位相変調されるようになっている。 When a forward and reverse bias is applied to such a PIN (p-intrinsic-n) diode structure, the free carrier density in the silicon layer 104 made of intrinsic semiconductor silicon changes. As a result, the refractive index of the silicon layer 104 changes, and light transmitted through the silicon layer 104 as a waveguide is phase-modulated.
 一方、図2に示す光変調器201は、支持基板202および埋め込み酸化層203と共にSOI基板を構成するp型シリコン層204と、誘電体層205を介して、p型シリコン層204に部分的に重なるように積層されたn型シリコン層206と、を有している。p型シリコン層204には、p型不純物が高濃度にドープされた高濃度p型領域204aが形成されている。n型シリコン層206には、n型不純物が高濃度にドープされた高濃度n型領域206aが形成されている。p型シリコン層204およびn型シリコン層206では、キャリア密度の変化が外部信号電圧により制御されるように、不純物濃度が規定されている。p型シリコン層204、誘電体層205、およびn型シリコン層206は周囲を酸化物クラッド207で覆われている。 On the other hand, the optical modulator 201 shown in FIG. 2 is partially formed on the p-type silicon layer 204 via the p-type silicon layer 204 that constitutes the SOI substrate together with the support substrate 202 and the buried oxide layer 203 and the dielectric layer 205. And an n-type silicon layer 206 stacked so as to overlap each other. In the p-type silicon layer 204, a high-concentration p-type region 204a doped with a p-type impurity at a high concentration is formed. In the n-type silicon layer 206, a high-concentration n-type region 206a doped with an n-type impurity at a high concentration is formed. In the p-type silicon layer 204 and the n-type silicon layer 206, the impurity concentration is defined so that the change in carrier density is controlled by the external signal voltage. The p-type silicon layer 204, the dielectric layer 205, and the n-type silicon layer 206 are covered with an oxide cladding 207.
 このようなSIS(Semiconductor-Insulator-Semiconductor)キャパシタ構造では、誘電体層205の両側のp型シリコン層204およびn型シリコン層206で、自由キャリアが蓄積、除去、または反転されることで、光位相変調が行われるようになっている。 In such a SIS (Semiconductor-Insulator-Semiconductor) capacitor structure, free carriers are accumulated, removed, or inverted in the p-type silicon layer 204 and the n-type silicon layer 206 on both sides of the dielectric layer 205, so that the light Phase modulation is performed.
特表2006-515082号公報Special table 2006-515082 gazette
 しかしながら、キャリアプラズマ効果を利用した上述の光変調器には、以下に示すように、高速動作と、小型化および低消費電力化とを両立できないという問題がある。 However, the above-described optical modulator using the carrier plasma effect has a problem that it is impossible to achieve both high-speed operation, downsizing, and low power consumption as described below.
 図1に示す光変調器の光変調動作速度は、シリコン層104のリブ形状部分内の自由キャリア寿命と、順方向バイアスが取り除かれた場合のキャリア拡散とによって制限される。このようなPINダイオード構造の光変調器は、通常、順方向バイアス動作時に10~50Mb/秒の範囲内の動作速度を有している。これに対し、キャリア寿命を短くするために、シリコン層104内に不純物を導入することで、切り換え速度を増加させることが可能である。しかしながら、導入された不純物は光変調効率を低下させ、それが小型化および低消費電力化の妨げになってしまう。 The light modulation operation speed of the light modulator shown in FIG. 1 is limited by the free carrier lifetime in the rib-shaped portion of the silicon layer 104 and carrier diffusion when the forward bias is removed. Such an optical modulator having a PIN diode structure usually has an operation speed in the range of 10 to 50 Mb / sec during forward bias operation. In contrast, the switching speed can be increased by introducing impurities into the silicon layer 104 in order to shorten the carrier lifetime. However, the introduced impurities reduce the light modulation efficiency, which hinders downsizing and low power consumption.
 また、動作速度に影響する最も大きな因子は、RC時定数によるものである。図1に示す光変調器では、順方向バイアス印加時の電気容量(C)が、PN接合部のキャリア空乏層の減少により非常に大きくなってしまう。理論的には、PN接合部の高速動作は、逆バイアスを印加することにより達成可能である。しかしながら、そのためには、駆動電圧を比較的に大きくするか、あるいはデバイスサイズを比較的大きくする必要がある。 Also, the biggest factor affecting the operation speed is due to the RC time constant. In the optical modulator shown in FIG. 1, the electric capacity (C) when a forward bias is applied becomes very large due to a decrease in the carrier depletion layer at the PN junction. Theoretically, high speed operation of the PN junction can be achieved by applying a reverse bias. However, for that purpose, it is necessary to make the driving voltage relatively large or to make the device size relatively large.
 一方、図2に示す光変調器では、理想的には、光信号電界とキャリア密度が動的に外部制御される領域は一致させることが望ましいが、実際には、キャリア密度が動的に変化する領域の厚さは数十nm程度と非常に薄くなってしまう。そのため、所定の位相シフトを得るためには、光変調器の光伝播方向に沿った長さが1mm以上必要となり、デバイスサイズが大きくなってしまう。 On the other hand, in the optical modulator shown in FIG. 2, ideally, it is desirable that the optical signal electric field and the region in which the carrier density is dynamically controlled are matched, but in practice, the carrier density changes dynamically. The thickness of the area to be reduced is as thin as about several tens of nm. Therefore, in order to obtain a predetermined phase shift, the length along the light propagation direction of the optical modulator is required to be 1 mm or more, which increases the device size.
 また、図2に示す光変調器では、誘電体層206の厚さを薄くした場合、光変調効率を向上させ、デバイスの小型化および低消費電力化を実現することができる。しかしながら、誘電体層206の厚さを薄くすることは、同時に、電気容量を大きくし、RC時定数を大きくするため、動作速度の低下につながる。すなわち、動作速度と光変調効率との間にはトレードオフの関係がある。 In the optical modulator shown in FIG. 2, when the thickness of the dielectric layer 206 is reduced, the optical modulation efficiency can be improved, and the device can be downsized and the power consumption can be reduced. However, reducing the thickness of the dielectric layer 206 simultaneously increases the electric capacity and increases the RC time constant, leading to a decrease in operating speed. That is, there is a trade-off relationship between the operation speed and the light modulation efficiency.
 そこで、本発明の目的は、高速動作と小型化および低消費電力化とを両立する光変調器を提供することである。 Therefore, an object of the present invention is to provide an optical modulator that achieves both high-speed operation, miniaturization, and low power consumption.
 上述した目的を達成するために、本発明の光変調器は、第1の導電型を有する第1の半導体層と、第1の半導体層上に形成され、第1の半導体層上を第1の方向に延びる誘電体層と、誘電体層上に形成され、第1の導電型とは異なる第2の導電型を有する第2の半導体層と、を有し、誘電体層が、第1の方向から見たときに、誘電体層の幅方向の中央に位置し、誘電体層の厚さ方向における電気容量が相対的に大きい第1の領域と、幅方向の端部に位置し、厚さ方向における電気容量が相対的に小さい第2の領域と、を有している。 In order to achieve the above-described object, an optical modulator according to the present invention is formed on a first semiconductor layer having a first conductivity type, the first semiconductor layer, and the first semiconductor layer is formed on the first semiconductor layer. And a second semiconductor layer formed on the dielectric layer and having a second conductivity type different from the first conductivity type, the dielectric layer comprising: When viewed from the direction of the dielectric layer, located in the center of the dielectric layer in the width direction, the first region having a relatively large capacitance in the thickness direction of the dielectric layer, and the end in the width direction, And a second region having a relatively small electric capacity in the thickness direction.
 以上、本発明によれば、高速動作と小型化および低消費電力化とを両立する光変調器を提供することができる。 As described above, according to the present invention, it is possible to provide an optical modulator that achieves both high-speed operation, miniaturization, and low power consumption.
関連技術の光変調器を概略的に示す断面図である。It is sectional drawing which shows the related optical modulator schematically. 関連技術の光変調器を概略的に示す断面図である。It is sectional drawing which shows the related optical modulator schematically. 本発明の一実施形態における光変調器を概略的に示す断面図である。It is sectional drawing which shows schematically the optical modulator in one Embodiment of this invention. 図3Aに示す光変調器の一部を拡大して示す概略断面図である。It is a schematic sectional drawing which expands and shows a part of optical modulator shown to FIG. 3A. 本実施形態における誘電体層の電気容量と印加電圧との関係を示すグラフである。It is a graph which shows the relationship between the electric capacity of the dielectric material layer in this embodiment, and an applied voltage. 本実施形態の光変調器の製造方法の一工程を示す概略断面図である。It is a schematic sectional drawing which shows 1 process of the manufacturing method of the optical modulator of this embodiment. 上記製造方法の、図5の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process of the said manufacturing method following the process of FIG. 上記製造方法の、図6の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process of the said manufacturing method following the process of FIG. 上記製造方法の、図7の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process following the process of FIG. 7 of the said manufacturing method. 上記製造方法の、図8の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process following the process of FIG. 8 of the said manufacturing method. 上記製造方法の、図9の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process of the said manufacturing method following the process of FIG. 上記製造方法の、図10の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process of the said manufacturing method following the process of FIG. 上記製造方法の、図11の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process following the process of FIG. 11 of the said manufacturing method. 上記製造方法の、図12の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process of the said manufacturing method following the process of FIG. 上記製造方法の、図13の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process of the said manufacturing method following the process of FIG. 上記製造方法の、図14の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process following the process of FIG. 14 of the said manufacturing method. 上記製造方法の、図15の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process following the process of FIG. 15 of the said manufacturing method. 上記製造方法の、図16の工程に続く工程を示す概略断面図である。It is a schematic sectional drawing which shows the process following the process of FIG. 16 of the said manufacturing method. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器の変形例を示す概略断面図である。It is a schematic sectional drawing which shows the modification of the optical modulator of this embodiment. 本実施形態の光変調器を用いたマッハ・ツェンダー型光変調器を概略的に示す平面図である。It is a top view which shows roughly the Mach-Zehnder type | mold optical modulator using the optical modulator of this embodiment. 本実施形態のマッハ・ツェンダー型光変調器を並列に配置した構成を示す概略平面図である。1 is a schematic plan view showing a configuration in which Mach-Zehnder optical modulators of this embodiment are arranged in parallel. 本実施形態のマッハ・ツェンダー型光変調器を直列に配置した構成を示す概略平面図である。1 is a schematic plan view showing a configuration in which Mach-Zehnder optical modulators of this embodiment are arranged in series.
 以下、図面を参照して、本発明の実施の形態について説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
 まず、本発明の一実施形態における光変調器の構成を説明する前に、本実施形態の光変調器の動作の基となる、シリコン層内のキャリア密度の変調メカニズムについて説明する。後述する変形例を含め、本実施形態の光変調器は、以下に説明するキャリアプラズマ効果を利用するものである。 First, before describing the configuration of an optical modulator according to an embodiment of the present invention, a mechanism for modulating the carrier density in the silicon layer, which is the basis of the operation of the optical modulator of the present embodiment, will be described. The optical modulator of the present embodiment, including the modifications described later, uses the carrier plasma effect described below.
 前述したように、純シリコンは、Pockels効果による屈折率の変化を示さず、またFranz-Keldysh効果やKerr効果による屈折率の変化も非常に小さい。そのため、純シリコンでは、キャリアプラズマ効果と熱光学効果だけを光変調動作に利用することができる。しかしながら、熱光学効果を利用して屈折率を変化させる光変調器は、動作速度が低速である。したがって、所望の高速動作(1Gb/秒以上)のためには、キャリアプラズマ効果によるキャリア拡散だけが効果的である。キャリアプラズマ効果によるキャリア拡散は、一次近似では、以下の関係式で説明される。 As described above, pure silicon shows no change in refractive index due to the Pockels effect, and the change in refractive index due to the Franz-Keldysh effect or the Kerr effect is very small. Therefore, in pure silicon, only the carrier plasma effect and the thermo-optic effect can be used for the light modulation operation. However, an optical modulator that changes the refractive index using the thermo-optic effect has a low operating speed. Therefore, for desired high-speed operation (1 Gb / second or more), only carrier diffusion by the carrier plasma effect is effective. Carrier diffusion due to the carrier plasma effect is described by the following relational expression in the first-order approximation.
Figure JPOXMLDOC01-appb-M000001
 
Figure JPOXMLDOC01-appb-M000001
 
Figure JPOXMLDOC01-appb-M000002
 
Figure JPOXMLDOC01-appb-M000002
 
 上記式(1)および式(2)において、ΔnおよびΔkはそれぞれ、シリコン層の屈折率変化の実部および虚部を表わしている。また、eは素電荷、λは光波長、εは真空中の誘電率、nは真性半導体シリコンの屈折率、mは電子キャリアの有効質量、mはホールキャリアの有効質量、μは電子キャリアの移動度、μはホールキャリアの移動度、ΔNは電子キャリアの濃度変化、ΔNはホールキャリアの濃度変化である。 In the above formulas (1) and (2), Δn and Δk represent the real part and the imaginary part of the refractive index change of the silicon layer, respectively. Moreover, e is elementary charge, lambda is optical wavelength, epsilon 0 is the dielectric constant in vacuum, n is the refractive index of the intrinsic semiconductor silicon, m e is the effective mass of the electron carrier, m h is the effective mass of the hole carriers, mu e Is the electron carrier mobility, μ h is the hole carrier mobility, ΔN e is the electron carrier concentration change, and ΔN h is the hole carrier concentration change.
 シリコン層内でのキャリアプラズマ効果の実験的な評価が行われている。それによると、光通信システムで使用する1310nmおよび1550nmの光ファイバ通信波長帯でのキャリア密度に対する屈折率変化は、上記式(1)および式(2)から求めた結果と良く一致することがわかっている。また、キャリアプラズマ効果を利用した光変調器では、位相変化量は以下の式で定義される。 An experimental evaluation of the carrier plasma effect in the silicon layer has been conducted. According to this, it is understood that the refractive index change with respect to the carrier density in the 1310 nm and 1550 nm optical fiber communication wavelength bands used in the optical communication system agrees well with the results obtained from the above formulas (1) and (2). ing. In the optical modulator using the carrier plasma effect, the amount of phase change is defined by the following equation.
Figure JPOXMLDOC01-appb-M000003
 
Figure JPOXMLDOC01-appb-M000003
 
 上記式(3)において、Lは光変調器の光伝播方向に沿った長さである。 In the above formula (3), L is the length along the light propagation direction of the optical modulator.
 キャリアプラズマ効果による位相変化量は電界吸収効果による位相変化量と比べて大きく、以下に述べる光変調器は、基本的に位相変調器としての特徴を示すことができる。 The amount of phase change due to the carrier plasma effect is larger than the amount of phase change due to the electroabsorption effect, and the optical modulator described below can basically exhibit characteristics as a phase modulator.
 次に、図3Aおよび図3Bを参照して、本実施形態の光変調器の構成について説明する。 Next, the configuration of the optical modulator of the present embodiment will be described with reference to FIGS. 3A and 3B.
 図3Aは、本実施形態の光変調器を概略的に示す断面図であり、光の伝播方向に垂直な断面を示している。図3Bは、図3Aに示す光変調器の一部を拡大して示す概略断面図である。 FIG. 3A is a cross-sectional view schematically showing the optical modulator of the present embodiment, showing a cross section perpendicular to the light propagation direction. FIG. 3B is a schematic cross-sectional view showing an enlarged part of the optical modulator shown in FIG. 3A.
 光変調器1は、支持基板2と、支持基板2上に形成された埋め込み酸化層3と、埋め込み酸化層3上に形成され、第1の導電型を有する第1の半導体層4と、を有している。本実施形態では、第1の半導体層4は、p型不純物がドープされたシリコン、すなわちp型シリコンから形成されている。以下、第1の半導体層4を「p型シリコン層」という。支持基板2と埋め込み酸化層3とp型シリコン層4とにより、SOI基板が構成されている。 The optical modulator 1 includes a support substrate 2, a buried oxide layer 3 formed on the support substrate 2, and a first semiconductor layer 4 formed on the buried oxide layer 3 and having the first conductivity type. Have. In the present embodiment, the first semiconductor layer 4 is formed of silicon doped with p-type impurities, that is, p-type silicon. Hereinafter, the first semiconductor layer 4 is referred to as a “p-type silicon layer”. The support substrate 2, the buried oxide layer 3, and the p-type silicon layer 4 constitute an SOI substrate.
 また、光変調器1は、p型シリコン層4上に形成され、光の伝播方向(紙面直交方向)に延びる誘電体層5と、誘電体層5上に形成され、第1の導電型とは異なる第2の導電型を有する第2の半導体層6と、を有している。本実施形態では、第2の半導体層6は、n型不純物がドープされたシリコン、すなわちn型シリコンから形成されている。以下、第2の半導体層6を「n型シリコン層」という。p型シリコン層4と誘電体層5とn型シリコン層6とにより、SIS(Semiconductor-Insulator-Semiconductor)キャパシタ構造が形成されている。したがって、本実施形態の光変調器1は、SOI基板上に形成された、SISキャパシタ構造を有する光変調器である。n型シリコン層6の上部には、n型シリコン層6と同様の導電型を有する電極引き出し部7が形成されている。すなわち、電極引き出し部7は、n型シリコンから形成されている。 The optical modulator 1 is formed on the p-type silicon layer 4 and extends on the light propagation direction (perpendicular to the plane of the drawing). The optical modulator 1 is formed on the dielectric layer 5 and has the first conductivity type. And a second semiconductor layer 6 having a different second conductivity type. In the present embodiment, the second semiconductor layer 6 is formed of silicon doped with n-type impurities, that is, n-type silicon. Hereinafter, the second semiconductor layer 6 is referred to as an “n-type silicon layer”. The p-type silicon layer 4, the dielectric layer 5, and the n-type silicon layer 6 form a SIS (Semiconductor-Insulator-Semiconductor) capacitor structure. Therefore, the optical modulator 1 of the present embodiment is an optical modulator having a SIS capacitor structure formed on an SOI substrate. Over the n-type silicon layer 6, an electrode lead portion 7 having the same conductivity type as that of the n-type silicon layer 6 is formed. That is, the electrode lead portion 7 is made of n-type silicon.
 p型シリコン層4およびn型シリコン層6のそれぞれは、多結晶シリコン、アモルファスシリコン、歪シリコン、単結晶シリコン、およびSi1-xGeの少なくとも1つの層から構成されている。また、誘電体層5は、シリコン酸化物、シリコン窒化物、ハフニウム酸化物、ジルコニウム酸化物、および希土類酸化物のいずれか1つ、またはこれらの少なくとも2つからなる合金である。 Each of the p-type silicon layer 4 and the n-type silicon layer 6 is composed of at least one layer of polycrystalline silicon, amorphous silicon, strained silicon, single crystal silicon, and Si 1-x Ge x . The dielectric layer 5 is one of silicon oxide, silicon nitride, hafnium oxide, zirconium oxide, and rare earth oxide, or an alloy made of at least two of these.
 p型シリコン層4の、誘電体層5を挟んだ両側には、p型不純物が高濃度にドープされた高濃度p型領域4aが形成されている。高濃度p型領域4a上には、電極コンタクト層4bが形成されている。電極コンタクト層4bには、電極配線4cが接続されている。また、電極引き出し部7の、誘電体層5を挟んだ両側には、n型不純物が高濃度にドープされた高濃度n型領域7aが形成されている。高濃度n型領域7a上には、電極コンタクト層7bが形成されている。電極コンタクト層7bには、電極配線7cが接続されている。これら導波路全体は酸化物クラッド8で覆われている。 On both sides of the p-type silicon layer 4 with the dielectric layer 5 interposed, high-concentration p-type regions 4a doped with p-type impurities at a high concentration are formed. An electrode contact layer 4b is formed on the high concentration p-type region 4a. An electrode wiring 4c is connected to the electrode contact layer 4b. High-concentration n-type regions 7a doped with n-type impurities at high concentrations are formed on both sides of the electrode lead-out portion 7 with the dielectric layer 5 interposed therebetween. An electrode contact layer 7b is formed on the high concentration n-type region 7a. An electrode wiring 7c is connected to the electrode contact layer 7b. The entire waveguide is covered with an oxide cladding 8.
 前述したように、誘電体層5の厚さを薄くすると、光変調効率が向上してデバイスの小型化および低消費電力化が実現される。しかしながら、それは同時に、電気容量の増大につながり、高速動作の妨げになる。 As described above, when the thickness of the dielectric layer 5 is reduced, the light modulation efficiency is improved, and the device is reduced in size and power consumption is reduced. However, it also leads to an increase in electrical capacity and hinders high speed operation.
 そこで、本実施形態の光変調器1では、図3Bに示すように、誘電体層5が、光の伝播方向(第1の方向)から見たときに、幅方向の中央に位置する中央領域(第1の領域)5aと、端部に位置する端部領域(第2の領域)5bと、を有している。そして、端部領域5bの厚さが、中央領域5aの厚さよりも厚くなっている。すなわち、誘電体層5の厚さ方向における電気容量が、中央領域5aで相対的に大きく、端部領域5bで相対的に小さくなっている。 Therefore, in the optical modulator 1 of the present embodiment, as shown in FIG. 3B, the dielectric layer 5 is a central region located at the center in the width direction when viewed from the light propagation direction (first direction). (First region) 5a and an end region (second region) 5b located at the end. The end region 5b is thicker than the central region 5a. That is, the electric capacity in the thickness direction of the dielectric layer 5 is relatively large in the central region 5a and relatively small in the end region 5b.
 上述のSISキャパシタ構造の接合界面を伝播する光フィールドにおいては、光電界強度が中央領域5aで大きく、端部領域5bで小さくなる。したがって、誘電体層5の中央領域5aの誘電率を端部領域5bよりも大きくすることで、光変調効率を維持しながら、電気容量を小さくすることができる。すなわち、光変調効率を維持しながら、高速動作を実現することができる。以下、この効果について、図4および表1を参照して説明する。 In the optical field propagating through the junction interface of the SIS capacitor structure described above, the optical electric field strength is large in the central region 5a and small in the end region 5b. Therefore, by making the dielectric constant of the central region 5a of the dielectric layer 5 larger than that of the end region 5b, it is possible to reduce the electric capacity while maintaining the light modulation efficiency. That is, high-speed operation can be realized while maintaining light modulation efficiency. Hereinafter, this effect will be described with reference to FIG. 4 and Table 1.
 図4は、本実施形態の誘電体層5の電気容量と印加電圧との関係を示すグラフである。図4のグラフには、端部領域5bの厚さが5nm、10nm、および15nmであるときの、誘電体層5における電気容量の印加電圧依存性がそれぞれ示されている。ここで、誘電体層5の中央領域5aの厚さは5nmである。 FIG. 4 is a graph showing the relationship between the electric capacity of the dielectric layer 5 of the present embodiment and the applied voltage. The graph of FIG. 4 shows the applied voltage dependency of the capacitance in the dielectric layer 5 when the thickness of the end region 5b is 5 nm, 10 nm, and 15 nm, respectively. Here, the thickness of the central region 5a of the dielectric layer 5 is 5 nm.
 図4からわかるように、端部領域5bの厚さを中央領域5aの厚さよりも厚くすると、誘電体層5の厚さが均一の場合に比べて、キャリア蓄積が生じる領域、すなわち印加電圧がマイナスの領域で、電気容量を20~40%程度低減することできる。また、このときの変調効率VπLを表1に示す。 As can be seen from FIG. 4, when the thickness of the end region 5b is made larger than the thickness of the central region 5a, the region where carrier accumulation occurs, that is, the applied voltage is smaller than the case where the thickness of the dielectric layer 5 is uniform. In the negative region, the electric capacity can be reduced by about 20 to 40%. Further, Table 1 shows the modulation efficiency V π L at this time.
Figure JPOXMLDOC01-appb-T000004
 
Figure JPOXMLDOC01-appb-T000004
 
 変調効率VπLが小さいことは、所定の位相シフトに必要な駆動電圧および導波路長が小さいことを意味しており、したがって、光変調効率が良好であることを意味している。 A small modulation efficiency V π L means that the drive voltage and the waveguide length necessary for a predetermined phase shift are small, and therefore means that the light modulation efficiency is good.
 端部領域5bの厚さが10nmの場合の変調効率VπLは、端部領域5bの厚さが5nm(誘電体層5の厚さが均一)の場合と同程度である。すなわち、端部領域5bの厚さを中央領域5aの厚さの2倍にしても、光変調効率を同程度に維持することができる。 The modulation efficiency V π L when the thickness of the end region 5b is 10 nm is approximately the same as that when the thickness of the end region 5b is 5 nm (the thickness of the dielectric layer 5 is uniform). That is, even if the thickness of the end region 5b is twice that of the central region 5a, the light modulation efficiency can be maintained at the same level.
 一方、端部領域5bの厚さが15nmの場合には、変調効率VπLは、端部領域5bの厚さが5nmの場合と比べて約27%増加しており、光変調効率の低下が見られている。しかしながら、端部領域5bの厚さが15nmの場合、この光変調効率の低下を上回る電気容量の低減効果が得られており(図4参照)、誘電体層5の厚さが均一な場合と比べても、有利な効果を得られることがわかる。 On the other hand, when the thickness of the end region 5b is 15 nm, the modulation efficiency V π L is increased by about 27% compared to the case where the thickness of the end region 5b is 5 nm, and the light modulation efficiency decreases. Is seen. However, when the thickness of the end region 5b is 15 nm, an effect of reducing the electric capacity that exceeds the decrease in the light modulation efficiency is obtained (see FIG. 4), and the thickness of the dielectric layer 5 is uniform. Even if compared, it turns out that an advantageous effect is acquired.
 ところで、本実施形態では、上述したように、p型シリコン層4と、誘電体層5と、n型シリコン層6とが、リブ形状あるいはリッジ形状の導波路を形成している。また、このリブ導波路から間隔をおいて、高濃度にドープされた領域(高濃度p型領域4aおよび高濃度n型領域7a)が形成されている。これにより、光フィールドと高濃度にドープされた領域とのオーバーラップによる光吸収損失が低減され、その結果、光変調効率を向上させることができる。 In the present embodiment, as described above, the p-type silicon layer 4, the dielectric layer 5, and the n-type silicon layer 6 form a rib-shaped or ridge-shaped waveguide. Further, regions doped with a high concentration (a high concentration p-type region 4a and a high concentration n-type region 7a) are formed at a distance from the rib waveguide. Thereby, the light absorption loss due to the overlap between the light field and the heavily doped region is reduced, and as a result, the light modulation efficiency can be improved.
 なお、高濃度にドープされた領域のドーピング密度をさらに上昇させると、SISキャパシタ構造における直列抵抗成分をより小さくし、RC時定数をさらに小さくすることができる。その結果、さらなる高速動作を実現することができる。この観点から、電極コンタクト層4b,7bは、シリサイドで形成されていることが好ましい。 Note that if the doping density of the heavily doped region is further increased, the series resistance component in the SIS capacitor structure can be further reduced, and the RC time constant can be further reduced. As a result, a further high speed operation can be realized. From this point of view, the electrode contact layers 4b and 7b are preferably formed of silicide.
 上述のSISキャパシタ構造の接合界面付近の領域、すなわち誘電体層5の両側には、キャリア密度が変調される領域が生じる。この領域の厚さ(最大空乏層厚)Wは、熱平衡状態では、以下の式で定義される。 In the region near the junction interface of the SIS capacitor structure described above, that is, on both sides of the dielectric layer 5, regions where the carrier density is modulated are generated. The thickness (maximum depletion layer thickness) W of this region is defined by the following equation in the thermal equilibrium state.
Figure JPOXMLDOC01-appb-M000005
 
Figure JPOXMLDOC01-appb-M000005
 
 上記式(4)において、εは半導体層の誘電率、kはボルツマン定数、Nはキャリア密度、nは真性キャリア濃度、eは素電荷である。例えば、キャリア密度Nが1017/cmの場合、最大空乏層厚Wは0.1μm程度であり、キャリア密度Nが上昇するのに伴い、空乏層厚、すなわちキャリア密度の変調が生じる領域の厚みは薄くなる。すなわち、光信号電界の広がりに対して、キャリア密度が変調される領域が非常に小さくなり、光変調効率が悪くなることが問題となる。 In the above equation (4), ε s is the dielectric constant of the semiconductor layer, k is the Boltzmann constant, N c is the carrier density, ni is the intrinsic carrier concentration, and e is the elementary charge. For example, when the carrier density N c is 10 17 / cm 3 , the maximum depletion layer thickness W is about 0.1 μm, and as the carrier density N c increases, the depletion layer thickness, that is, modulation of the carrier density occurs. The thickness of the region is reduced. In other words, the region where the carrier density is modulated becomes very small with respect to the spread of the optical signal electric field, resulting in a problem that the light modulation efficiency is deteriorated.
 そのため、本実施形態の光変調器1は、キャリア密度が変調される領域と光フィールドとのオーバーラップが最大となるように設計されている。 Therefore, the optical modulator 1 of the present embodiment is designed so that the overlap between the region where the carrier density is modulated and the optical field is maximized.
 光信号電界が感じる実効的な屈折率をneffとし、光信号波長をλとすると、光フィールドサイズはλ/neffとなる。したがって、キャリア密度が変調される領域の高さをλ/neff程度にすることで、光フィールドとキャリア密度が変調される領域との重なりが最大となり、効率的な光の位相変調が実現される。 When the effective refractive index felt by the optical signal electric field is n eff and the optical signal wavelength is λ, the optical field size is λ / n eff . Therefore, by setting the height of the region where the carrier density is modulated to about λ / n eff , the overlap between the optical field and the region where the carrier density is modulated is maximized, and efficient phase modulation of light is realized. The
 そのため、誘電体層5の両側で自由キャリアが蓄積、除去、または反転する領域内に、光信号電界がピーク強度を有する領域が配置されるとき、最も高い光変調効率が得られることになる。 Therefore, when the region where the optical signal electric field has the peak intensity is arranged in the region where the free carriers are accumulated, removed, or inverted on both sides of the dielectric layer 5, the highest light modulation efficiency is obtained.
 次に、図5から図18を参照して、本実施形態の光変調器の製造方法について説明する。図5から図18は、本実施形態の製造方法の各工程における光変調器を概略的に示す断面図であり、それぞれ光の伝播方向に垂直な断面を示している。なお、以下では、誘電体層5が酸化物から構成されている場合を例に挙げて、本実施形態の製造方法を説明するが、これに限定されるものではない。 Next, with reference to FIGS. 5 to 18, a method for manufacturing the optical modulator of the present embodiment will be described. 5 to 18 are cross-sectional views schematically showing the optical modulator in each step of the manufacturing method of the present embodiment, and each show a cross section perpendicular to the light propagation direction. In the following, the manufacturing method of the present embodiment will be described by taking the case where the dielectric layer 5 is made of an oxide as an example, but the present invention is not limited to this.
 まず、図5に示すように、支持基板2と埋め込み酸化層3とp型シリコン層4とから構成されたSOI基板を用意する。埋め込み酸化層3は、光損失を低減するために、1000nm以上の厚さを有している。その埋め込み酸化層3上に100nm~1000nm程度のシリコン層を積層した後、イオン注入法により、表面層にリン(P)あるいはホウ素(B)をドープする。そして、それを熱処理することにより、p型シリコン層4を形成する。なお、予めp型にドープされたシリコン層を備えたSOI基板を用いてもよい。 First, as shown in FIG. 5, an SOI substrate composed of a support substrate 2, a buried oxide layer 3, and a p-type silicon layer 4 is prepared. The buried oxide layer 3 has a thickness of 1000 nm or more in order to reduce optical loss. After laminating a silicon layer of about 100 nm to 1000 nm on the buried oxide layer 3, the surface layer is doped with phosphorus (P) or boron (B) by ion implantation. And the p-type silicon layer 4 is formed by heat-processing it. Note that an SOI substrate provided with a silicon layer doped p-type in advance may be used.
 次に、図6に示すように、p型シリコン層4上に、酸化膜マスク9を形成する。 Next, as shown in FIG. 6, an oxide film mask 9 is formed on the p-type silicon layer 4.
 さらに、酸化膜マスク9上に、窒化シリコン(SiN)層を形成する。そして、リブ導波路(すなわち誘電体層5およびn型シリコン層6)の幅と同等の幅になるように、SiN層をパターニングし、図7に示すように、ハードマスク10を形成する。 Further, a silicon nitride (SiN x ) layer is formed on the oxide film mask 9. Then, the SiN x layer is patterned so as to have a width equal to the width of the rib waveguide (that is, the dielectric layer 5 and the n-type silicon layer 6), and the hard mask 10 is formed as shown in FIG.
 次に、熱酸化処理を行い、図8に示すように、酸化膜マスク9の膜厚を厚くする。このとき、酸化膜マスク9のハードマスク10に覆われた部分は、端部だけが熱酸化処理される。そのため、酸化膜マスク9には、厚さが相対的に厚い領域と薄い領域とが形成される。 Next, thermal oxidation is performed to increase the thickness of the oxide film mask 9 as shown in FIG. At this time, only the end portion of the oxide film mask 9 covered with the hard mask 10 is thermally oxidized. Therefore, the oxide film mask 9 is formed with a relatively thick region and a thin region.
 次に、熱リン酸などの溶液を用いて、ハードマスク10を除去した後、希フッ酸処理などにより、酸化膜マスク9の表面を除去する。その後、再び熱酸化処理を行い、酸化膜マスク9の膜質を向上させることで、図9に示すように、誘電体層5が形成される。 Next, after removing the hard mask 10 using a solution such as hot phosphoric acid, the surface of the oxide film mask 9 is removed by dilute hydrofluoric acid treatment or the like. Thereafter, a thermal oxidation process is performed again to improve the film quality of the oxide film mask 9, thereby forming the dielectric layer 5 as shown in FIG.
 その後、図10に示すように、誘電体層5上に、n型シリコン層6を形成する。具体的には、まず、誘電体層5上に、CVD(Chemical Vapor Deposition)法またはスパッタ法により、多結晶シリコン層を成膜する。その後、イオン注入法により、多結晶シリコン層にPをドープすることで、n型シリコン層6が形成される。 Thereafter, as shown in FIG. 10, an n-type silicon layer 6 is formed on the dielectric layer 5. Specifically, first, a polycrystalline silicon layer is formed on the dielectric layer 5 by a CVD (Chemical Vapor Deposition) method or a sputtering method. Thereafter, the polycrystalline silicon layer is doped with P by ion implantation, whereby the n-type silicon layer 6 is formed.
 次に、n型シリコン層6上に、低圧CVD法などによりSiN層を形成する。そして、ドライエッチング法などにより、リブ導波路の幅と同等の幅になるように、SiN層をパターニングし、図11に示すように、ハードマスク11を形成する。 Next, a SiN x layer is formed on the n-type silicon layer 6 by a low pressure CVD method or the like. Then, by dry etching or the like, the SiN x layer is patterned so as to have a width equal to the width of the rib waveguide, and a hard mask 11 is formed as shown in FIG.
 その後、このハードマスク11を用いて、図12に示すように、リブ導波路となるべき部分が残るように、n型シリコン層6をパターニングする。このときのエッチングにより、誘電体層5も一部が除去されるが、このエッチングは、誘電体層5自体で停止する。そのため、実際には、n型シリコン層6の下側の部分以外にも、p型シリコン層4上には誘電体層5が存在するが、これ以降、その部分の図示は省略する。 Then, using this hard mask 11, as shown in FIG. 12, the n-type silicon layer 6 is patterned so that a portion to be a rib waveguide remains. Although the dielectric layer 5 is partially removed by the etching at this time, this etching stops at the dielectric layer 5 itself. Therefore, in practice, the dielectric layer 5 is present on the p-type silicon layer 4 in addition to the lower portion of the n-type silicon layer 6.
 次に、プラズマCVD法などにより、図13に示すように、酸化物クラッド8を成膜する。そして、CMP(Chemical-Mechanical-Polishing)により、酸化物クラッド8の表面を平坦化する。 Next, an oxide cladding 8 is formed by plasma CVD or the like as shown in FIG. Then, the surface of the oxide cladding 8 is planarized by CMP (Chemical-Mechanical-Polishing).
 次に、ハードマスク11を除去後、図14に示すように、酸化物クラッド8上に、n型シリコン層6の電極引き出し部7を形成する。具体的には、まず、酸化物クラッド8上に、CVD法またはスパッタ法により、多結晶シリコン層を成膜する。その後、イオン注入法により、多結晶シリコン層にPをドープすることで、n型の電極引き出し部7が形成される。なお、多結晶シリコン層の成膜中にドープ処理を行うことで、電極引き出し部7を形成することもできる。 Next, after removing the hard mask 11, as shown in FIG. 14, an electrode lead portion 7 of the n-type silicon layer 6 is formed on the oxide cladding 8. Specifically, first, a polycrystalline silicon layer is formed on the oxide cladding 8 by a CVD method or a sputtering method. Thereafter, the polycrystalline silicon layer is doped with P by ion implantation, whereby the n-type electrode lead-out portion 7 is formed. The electrode lead portion 7 can also be formed by performing a doping process during the formation of the polycrystalline silicon layer.
 次に、図15に示すように、イオン注入法により、n型シリコン層6の電極引き出し部7の両端部に、n型不純物が高濃度にドープされた高濃度n型領域7aを形成する。 Next, as shown in FIG. 15, high-concentration n-type regions 7a in which n-type impurities are highly doped are formed at both ends of the electrode lead-out portion 7 of the n-type silicon layer 6 by ion implantation.
 次に、プラズマCVD法などにより、n型シリコン層6の電極引き出し部7を埋め込むように、酸化物クラッド8をさらに積層する。そして、図16に示すように、反応性エッチングにより、酸化物クラッド8にコンタクトホール12を形成する。その後、イオン注入法により、p型シリコン層4に、p型不純物が高濃度にドープされた高濃度p型領域4aを形成し、高濃度p型領域4aおよび高濃度n型領域7aの表面に、電極コンタクト層4b,7bをそれぞれ形成する。電極コンタクト層4b,7bは、高濃度p型領域4aおよび高濃度n型領域7a上にNiなどの金属を積層してアニールすることで形成された、シリサイド層であってもよい。 Next, an oxide clad 8 is further laminated so as to bury the electrode lead portion 7 of the n-type silicon layer 6 by plasma CVD or the like. Then, as shown in FIG. 16, contact holes 12 are formed in the oxide cladding 8 by reactive etching. Thereafter, a high-concentration p-type region 4a doped with a high concentration of p-type impurities is formed in the p-type silicon layer 4 by ion implantation, and the surface of the high-concentration p-type region 4a and the high-concentration n-type region 7a The electrode contact layers 4b and 7b are formed respectively. The electrode contact layers 4b and 7b may be silicide layers formed by stacking and annealing a metal such as Ni on the high concentration p-type region 4a and the high concentration n-type region 7a.
 次に、CVD法またはスパッタ法により、Ti/TiN/Al(Cu)あるいはTi/TiN/Wなどの金属層を成膜し、反応性エッチングによりパターニングを行い、電極配線4c,7cを形成する。そして、電極配線4c,7cと駆動回路との接続を行うことで、図17に示すように、光変調器1が完成する。 Next, a metal layer such as Ti / TiN / Al (Cu) or Ti / TiN / W is formed by CVD or sputtering, and patterned by reactive etching to form electrode wirings 4c and 7c. Then, by connecting the electrode wirings 4c and 7c to the drive circuit, the optical modulator 1 is completed as shown in FIG.
 図18から図24は、本実施形態の光変調器の変形例を概略的に示す断面図であり、光の伝播方向に垂直な断面を示している。各図は、誘電体層付近の拡大図であり、図3Bに対応する図である。 18 to 24 are cross-sectional views schematically showing modifications of the optical modulator of the present embodiment, showing a cross section perpendicular to the light propagation direction. Each figure is an enlarged view of the vicinity of the dielectric layer, and corresponds to FIG. 3B.
 図18および図19に示す変形例では、誘電体層5の厚さが、中央領域5aから端部領域5bにかけて連続的に増加している。一方で、図20および図21に示すように、誘電体層5の厚さは、中央領域5aから端部領域5bにかけて段階的に増加していてもよい。 18 and FIG. 19, the thickness of the dielectric layer 5 continuously increases from the central region 5a to the end region 5b. On the other hand, as shown in FIGS. 20 and 21, the thickness of the dielectric layer 5 may increase stepwise from the central region 5a to the end region 5b.
 上述した変形例では、端部領域5bの厚さを、中央領域5aの厚さよりも厚くすることで、誘電体層5の厚さ方向における電気容量を、中央領域5aで相対的に大きく、端部領域5bで相対的に小さくしている。しかしながら、電気容量を変化させる構成は、これに限定されるものではない。他の構成により、誘電体層5の厚さ方向における電気容量を、中央領域5aで相対的に大きく、端部領域5bで相対的に小さくすることもできる。 In the above-described modification, by making the thickness of the end region 5b thicker than the thickness of the central region 5a, the electric capacity in the thickness direction of the dielectric layer 5 is relatively large in the central region 5a. The partial area 5b is relatively small. However, the configuration for changing the electric capacity is not limited to this. According to another configuration, the electric capacity in the thickness direction of the dielectric layer 5 can be relatively large in the central region 5a and relatively small in the end region 5b.
 図22に示す変形例では、中央領域5aと端部領域5bとが異なる積層構造を有しており、図23に示す変形例では、中央領域5aと端部領域5bとが異なる組成で形成されている。また、図24に示す変形例では、誘電体層5の幅方向の中央に、光の伝播方向に沿って、周囲と比べて電気容量が相対的に小さい領域が離散的に設けられている。このような構成により、誘電体層5の厚さ方向における電気容量が、中央領域5aで相対的に大きく、端部領域5bで相対的に小さくなっている。 In the modification shown in FIG. 22, the central region 5a and the end region 5b have different laminated structures, and in the modification shown in FIG. 23, the central region 5a and the end region 5b are formed with different compositions. ing. In the modification shown in FIG. 24, regions having relatively small electric capacity compared to the surroundings are discretely provided along the light propagation direction in the center in the width direction of the dielectric layer 5. With such a configuration, the electric capacity in the thickness direction of the dielectric layer 5 is relatively large in the central region 5a and relatively small in the end region 5b.
 最後に、本実施形態の光変調器を用いたマッハ・ツェンダー型光変調器の構成について説明する。 Finally, the configuration of a Mach-Zehnder optical modulator using the optical modulator of this embodiment will be described.
 図25は、本実施形態の光変調器を用いたマッハ・ツェンダー型光変調器を概略的に示す平面図である。 FIG. 25 is a plan view schematically showing a Mach-Zehnder type optical modulator using the optical modulator of the present embodiment.
 マッハ・ツェンダー型光変調器20は、互いに平行に配置された第1および第2のアーム21,22を有している。上述した本実施形態の光変調器は、第1および第2のアーム21,22として、マッハ・ツェンダー型光変調器20に組み込まれる。第1および第2のアーム21,22の入力側には、外部から入力される光信号を第1のアーム21と第2のアーム22とに分岐する光分岐構造23が接続されている。第1および第2のアーム21,22の出力側には、第1のアーム21と第2のアーム22とから出力される光信号を結合する光結合構造24が接続されている。また、マッハ・ツェンダー型光変調器20は、第1および第2のアーム21,22にそれぞれ電圧を印加するための電極パッド25を有している。 The Mach-Zehnder type optical modulator 20 has first and second arms 21 and 22 arranged in parallel to each other. The above-described optical modulator of the present embodiment is incorporated in the Mach-Zehnder optical modulator 20 as the first and second arms 21 and 22. Connected to the input sides of the first and second arms 21 and 22 is an optical branching structure 23 that branches an optical signal input from the outside into a first arm 21 and a second arm 22. An optical coupling structure 24 that couples optical signals output from the first arm 21 and the second arm 22 is connected to the output sides of the first and second arms 21 and 22. The Mach-Zehnder optical modulator 20 has an electrode pad 25 for applying a voltage to each of the first and second arms 21 and 22.
 外部からマッハ・ツェンダー型光変調器20に入力された光信号は、光分岐構造23により分岐され、第1のアーム21と第2のアーム22とに入力する。入力した光信号は、第1のアーム21と第2のアーム22とにより位相変調される。位相変調された光信号は、光結合構造24で位相干渉されることで、光強度変調信号に変換される。 The optical signal input from the outside to the Mach-Zehnder optical modulator 20 is branched by the optical branching structure 23 and input to the first arm 21 and the second arm 22. The input optical signal is phase-modulated by the first arm 21 and the second arm 22. The phase-modulated optical signal is converted into a light intensity modulated signal by phase interference by the optical coupling structure 24.
 本実施形態のマッハ・ツェンダー型光変調器20では、外部から入力された光信号は、光分岐構造23により、第1のアーム21と第2のアーム22とに等しいパワーで分岐される。ここで、第1のアーム21にプラスの電圧を印加することで、第1のアーム21(すなわち本実施形態の光変調器)の誘電体層の両側にキャリア蓄積が生じることになる。また、第2のアーム22にマイナスの電圧を印加することで、第2のアーム22(すなわち本実施形態の光変調器)の誘電体層の両側のキャリアが除去されることになる。これにより、キャリア蓄積モードとなる第1のアーム21では、光信号電界が感じる屈折率が小さくなり、キャリア除去(空乏化)モードとなる第2のアーム22では、光信号電界が感じる屈折率が大きくなる。このため、第1のアーム21と第2のアーム22との間の光信号位相差が最大となる。このようにして両アームを伝送する光信号を、出力側の光結合構造24により合波することで、光強度変調が生じることになる。本実施形態によれば、40Gbps以上の光信号を送信することが可能となる。 In the Mach-Zehnder optical modulator 20 of the present embodiment, an optical signal input from the outside is branched by the optical branching structure 23 into the first arm 21 and the second arm 22 with equal power. Here, by applying a positive voltage to the first arm 21, carrier accumulation occurs on both sides of the dielectric layer of the first arm 21 (that is, the optical modulator of the present embodiment). Further, by applying a negative voltage to the second arm 22, carriers on both sides of the dielectric layer of the second arm 22 (that is, the optical modulator of the present embodiment) are removed. As a result, the refractive index felt by the optical signal electric field is small in the first arm 21 that is in the carrier accumulation mode, and the refractive index felt by the optical signal electric field is in the second arm 22 that is in the carrier removal (depletion) mode. growing. For this reason, the optical signal phase difference between the first arm 21 and the second arm 22 is maximized. In this way, the optical signals transmitted through both arms are multiplexed by the optical coupling structure 24 on the output side, whereby optical intensity modulation occurs. According to this embodiment, an optical signal of 40 Gbps or more can be transmitted.
 なお、本実施形態のマッハ・ツェンダー型光変調器20は、図26および図27に示すように、並列または直列に配置することで、より高い転送レートを有する光変調器やマトリックス光スイッチなどへの応用も可能である。 As shown in FIGS. 26 and 27, the Mach-Zehnder type optical modulator 20 of the present embodiment is arranged in parallel or in series, so that the optical modulator or matrix optical switch having a higher transfer rate can be obtained. Application is also possible.
 以上、実施形態を参照して本発明を説明したが、本発明は上記実施形態に限定されものではない。本発明の構成や詳細には、本発明のスコープ内で当業者が理解し得る様々な変更をすることができる。例えば、上述した実施形態では、第1の導電型がp型であり、第2の導電型がn型である場合を例示したが、その逆であってもよい。すなわち、第1の導電型を有する第1の半導体層がn型シリコン層であり、第2の導電型を有する第2の半導体層がp型シリコン層であってもよい。 The present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention. For example, in the above-described embodiment, the case where the first conductivity type is p-type and the second conductivity type is n-type is illustrated, but the opposite may be possible. That is, the first semiconductor layer having the first conductivity type may be an n-type silicon layer, and the second semiconductor layer having the second conductivity type may be a p-type silicon layer.
 この出願は、2013年3月29曰に出願された日本出願特願2013-074179を基礎とする優先権を主張し、その開示の全てをここに取り込む。 This application claims priority based on Japanese Patent Application No. 2013-074179 filed on March 29, 2013, the entire disclosure of which is incorporated herein.
 1 光変調器
 2 支持基板
 3 埋め込み酸化層
 4 p型シリコン層
 4a 高濃度p型領域
 4b 電極コンタクト層
 4c 電極配線
 5 誘電体層
 6 n型シリコン層
 7 電極引き出し部
 7a 高濃度n型領域
 7b 電極コンタクト層
 7c 電極配線
 8 酸化物クラッド
 9 酸化膜マスク
 10,11 ハードマスク
 12 コンタクトホール
 20 マッハ・ツェンダー型光変調器
 21 第1のアーム
 22 第2のアーム
 23 光分岐構造
 24 光合波構造
 25 電極パッド
1 optical modulator 2 support substrate 3 buried oxide layer 4 p-type silicon layer 4a high-concentration p-type region 4b electrode contact layer 4c electrode wiring 5 dielectric layer 6 n-type silicon layer 7 electrode lead-out portion 7a high-concentration n-type region 7b electrode Contact layer 7c Electrode wiring 8 Oxide cladding 9 Oxide mask 10, 11 Hard mask 12 Contact hole 20 Mach-Zehnder optical modulator 21 First arm 22 Second arm 23 Optical branching structure 24 Optical multiplexing structure 25 Electrode pad

Claims (8)

  1.  第1の導電型を有する第1の半導体層と、
     前記第1の半導体層上に形成され、該第1の半導体層上を第1の方向に延びる誘電体層と、
     前記誘電体層上に形成され、前記第1の導電型とは異なる第2の導電型を有する第2の半導体層と、を有し、
     前記誘電体層が、前記第1の方向から見たときに、前記誘電体層の幅方向の中央に位置し、前記誘電体層の厚さ方向における電気容量が相対的に大きい第1の領域と、前記幅方向の端部に位置し、前記厚さ方向における電気容量が相対的に小さい第2の領域と、を有する、光変調器。
    A first semiconductor layer having a first conductivity type;
    A dielectric layer formed on the first semiconductor layer and extending in a first direction on the first semiconductor layer;
    A second semiconductor layer formed on the dielectric layer and having a second conductivity type different from the first conductivity type;
    When viewed from the first direction, the dielectric layer is located at the center in the width direction of the dielectric layer and has a relatively large electric capacity in the thickness direction of the dielectric layer. And a second region located at an end in the width direction and having a relatively small capacitance in the thickness direction.
  2.  前記誘電体層は、前記第2の領域の厚さが、前記第1の領域の厚さよりも厚い、請求項1に記載の光変調器。 The optical modulator according to claim 1, wherein the dielectric layer has a thickness of the second region larger than a thickness of the first region.
  3.  前記誘電体層の厚さは、前記第1の領域から前記第2の領域にかけて連続的に増加する、請求項2に記載の光変調器。 3. The optical modulator according to claim 2, wherein a thickness of the dielectric layer continuously increases from the first region to the second region.
  4.  前記誘電体層の厚さは、前記第1の領域から前記第2の領域にかけて段階的に増加する、請求項2に記載の光変調器。 The optical modulator according to claim 2, wherein the thickness of the dielectric layer increases stepwise from the first region to the second region.
  5.  前記誘電体層は、前記第1の領域と前記第2の領域とが異なる積層構造を有する、請求項1に記載の光変調器。 The optical modulator according to claim 1, wherein the dielectric layer has a stacked structure in which the first region and the second region are different.
  6.  前記誘電体層は、前記第1の領域と前記第2の領域とが異なる組成で形成されている、請求項1に記載の光変調器。 2. The optical modulator according to claim 1, wherein the first dielectric layer and the second region are formed with different compositions in the dielectric layer.
  7.  前記誘電体層の前記幅方向の中央に、前記第1の方向に沿って、周囲と比べて電気容量が相対的に大きい領域が離散的に設けられている、請求項1に記載の光変調器。 2. The light modulation according to claim 1, wherein regions having a relatively large capacitance compared to the surroundings are discretely provided along the first direction in the center in the width direction of the dielectric layer. vessel.
  8.  前記誘電体層が、シリコン酸化物、シリコン窒化物、ハフニウム酸化物、ジルコニウム酸化物、および希土類酸化物のいずれか1つ、または少なくとも2つからなる合金である、請求項1から7のいずれか1項に記載の光変調器。 The dielectric layer according to any one of claims 1 to 7, wherein the dielectric layer is any one of silicon oxide, silicon nitride, hafnium oxide, zirconium oxide, and rare earth oxide, or an alloy composed of at least two. The optical modulator according to item 1.
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