JP5944152B2 - Heat treatment method and heat treatment apparatus - Google Patents

Description

  The present invention relates to a heat treatment method and a heat treatment apparatus for heating a substrate by irradiating light onto a thin precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer or a glass substrate for a liquid crystal display device.

  In the semiconductor device manufacturing process, impurity introduction is an indispensable step for forming a pn junction in a semiconductor wafer. Currently, impurities are generally introduced by ion implantation and subsequent annealing. The ion implantation method is a technique in which impurity elements such as boron (B), arsenic (As), and phosphorus (P) are ionized and collided with a semiconductor wafer at a high acceleration voltage to physically perform impurity implantation. The implanted impurities are activated by annealing. At this time, if the annealing time is about several seconds or more, the implanted impurities are deeply diffused by heat, and as a result, the junction depth becomes deeper than required, and there is a possibility that good device formation may be hindered.

  Therefore, in recent years, flash lamp annealing (FLA) has attracted attention as an annealing technique for heating a semiconductor wafer in an extremely short time. Flash lamp annealing is a semiconductor wafer in which impurities are implanted by irradiating the surface of the semiconductor wafer with flash light using a xenon flash lamp (hereinafter, simply referred to as “flash lamp” means xenon flash lamp). Is a heat treatment technique for raising the temperature of only the surface of the material in a very short time (several milliseconds or less).

  The radiation spectral distribution of a xenon flash lamp ranges from the ultraviolet region to the near infrared region, has a shorter wavelength than the conventional halogen lamp, and almost coincides with the fundamental absorption band of a silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, the semiconductor wafer can be rapidly heated with little transmitted light. Further, it has been found that if the flash light irradiation is performed for a very short time of several milliseconds or less, only the vicinity of the surface of the semiconductor wafer can be selectively heated. For this reason, if the temperature is raised for a very short time by the xenon flash lamp, only the impurity activation can be performed without deeply diffusing the impurities.

  By the way, as a result of implanting high energy ions by the ion implantation method, many defects are introduced into the silicon crystal of the semiconductor wafer. Such a defect tends to be introduced at a position slightly deeper than the ion implantation layer. When performing the annealing process after ion implantation, it is desirable to perform the recovery of the introduced defects together with the activation of the impurities. In order to recover such defects, it is sufficient to increase the annealing time, but this causes a problem that the implanted impurities as described above diffuse deeper than required.

  Thus, Patent Document 1 discloses a flash lamp annealing technique in which additional light irradiation is performed with a relatively weak light emission output after the peak of the light emission output has passed. According to the technique disclosed in Patent Document 1, after the surface of the semiconductor wafer is heated to the processing temperature, the surface temperature is maintained at the processing temperature for several milliseconds or more by additional light irradiation. A slightly deeper position can be heated to some extent, and not only the activation of impurities but also the recovery of introduced crystal defects can be performed.

JP 2009-260018 A

  However, in flash lamp annealing, if the surface of the semiconductor wafer is heated to the processing temperature and then maintained at the processing temperature, the frequency of wafer cracking may increase. This is because in flash lamp annealing, in which heating is performed with extremely short surface irradiation, a temperature difference inevitably occurs on the front and back of the semiconductor wafer. However, if the wafer surface temperature is maintained at the processing temperature, there is a large difference between the front and back surfaces. The time during which the temperature difference occurs is also long, and it is considered that the stress due to the difference in thermal expansion between the front and back surfaces is concentrated on the back surface of the wafer.

  The present invention has been made in view of the above problems, and provides a heat treatment method and a heat treatment apparatus capable of both activating implanted impurities and recovering introduced defects while preventing cracking of the substrate. The purpose is to provide.

In order to solve the above problems, the invention of claim 1 is a heat treatment method for heating a substrate by irradiating the substrate with light, a preheating step for heating the substrate at a predetermined preheating temperature, One surface is irradiated with flash light from a flash lamp, and the temperature of the one surface is longer than the heat conduction time required for heat conduction from the one surface to the other surface, which is the surface opposite to the one surface. A temperature raising step for raising the temperature from the preheating temperature to a target temperature, and after the temperature raising step, the one surface of the substrate is irradiated with flash light whose light output is gradually reduced from the flash lamp. And a temperature maintaining step of maintaining the temperature of the one surface in a range within ± 25 ° C. from the target temperature for 5 milliseconds or more.

  According to a second aspect of the present invention, in the heat treatment method according to the first aspect of the present invention, a rate of temperature rise on the one surface in the temperature raising step is 1000 ° C./second or more.

  According to a third aspect of the present invention, in the heat treatment method according to the first or second aspect of the present invention, the substrate is a silicon semiconductor wafer.

  According to a fourth aspect of the present invention, in the heat treatment method according to any one of the first to third aspects, in the temperature raising step and the temperature maintaining step, supply of electric charge from a capacitor to the flash lamp is switched. The light emission output of the flash lamp is controlled by being intermittently connected by an element.

According to a fifth aspect of the present invention, in a heat treatment apparatus for heating a substrate by irradiating the substrate with light, a chamber for housing the substrate, a holding means for holding the substrate in the chamber, and a holding means Preheating means for heating the substrate held to a predetermined preheating temperature, a flash lamp for irradiating the substrate held by the holding means with flash light, and a light emission control means for controlling the light emission output of the flash lamp, The light emission control means irradiates flash light on one surface of the substrate held by the holding means, and is necessary for heat conduction from the one surface to the other surface that is opposite to the one surface. after the temperature of the one surface over a long period of time than the thermal conduction time and the temperature was raised from the preheating temperature to the target temperature, before gradually decreasing the light emission output of the flash lamp And controlling the light emission output of the flash lamp so as to maintain the temperature of one surface said to range within ± 25 ° C. from the target temperature 5 ms or more.

  The invention according to claim 6 is the heat treatment apparatus according to claim 5, wherein the light emission control means is configured to change the target temperature from the preheating temperature to the target at a temperature increase rate of 1000 ° C./second or more. The light emission output of the flash lamp is controlled so that the temperature is raised to a temperature.

  According to a seventh aspect of the present invention, in the heat treatment apparatus according to the fifth or sixth aspect, the substrate is a silicon semiconductor wafer.

  Further, the invention of claim 8 is the heat treatment apparatus according to any one of claims 5 to 7, wherein the light emission control means interrupts the supply of electric charge from a capacitor to the flash lamp. A switching element for controlling the light emission output of the lamp is included.

According to the first to fourth aspects of the present invention, one surface of the substrate is irradiated with flash light from the flash lamp, and heat required for heat conduction from the one surface to the other surface which is the surface opposite to the one surface. After increasing the temperature of one side from the preheating temperature to the target temperature over a longer time than the conduction time, one side of the substrate is irradiated with flash light whose emission output gradually decreases from the flash lamp. to maintain the temperature within a range of ± 25 ° C. from the target temperature 5 msec or more, it is possible to relatively small temperature difference between the front and back surfaces of the substrate, it is Rukoto to abolish anti cracking of the substrate. In addition, since the surface temperature of the substrate is maintained near the target temperature for a certain period of time, both the activation of the implanted impurities and the recovery of the introduced defects can be performed.

According to the invention of claims 5 to 8, the flash light is irradiated to one surface of the substrate held by the holding means, and the one surface is directed to the other surface which is the surface opposite to the one surface. After raising the temperature on one side from the preheating temperature to the target temperature over a longer time than the heat conduction time required for heat conduction, the light output of the flash lamp is gradually reduced to target the temperature on one side. to control the light emission output of the flash lamp so as to maintain within a range of ± 25 ° C. from the temperature of 5 msec or more, it is possible to relatively small temperature difference between the front and back surfaces of the substrate, abolish anti cracking of the substrate Can. In addition, since the surface temperature of the substrate is maintained near the target temperature for a certain period of time, both the activation of the implanted impurities and the recovery of the introduced defects can be performed.

It is a longitudinal cross-sectional view which shows the structure of the heat processing apparatus which concerns on this invention. It is a perspective view which shows the whole external appearance of a holding | maintenance part. It is the top view which looked at the holding | maintenance part from the upper surface. It is the side view which looked at the holding | maintenance part from the side. It is a top view of a transfer mechanism. It is a side view of a transfer mechanism. It is a top view which shows arrangement | positioning of a some halogen lamp. It is a figure which shows the drive circuit of a flash lamp. It is a figure which shows the structure of the element formed in the semiconductor wafer used as the process target with the heat processing apparatus of FIG. It is a flowchart which shows the process sequence of the semiconductor wafer in the heat processing apparatus of FIG. It is a figure which shows the change of the surface temperature of a semiconductor wafer. It is a figure which shows an example of the correlation with the waveform of a pulse signal, and the electric current which flows into a flash lamp. It is a figure which shows an example of the light emission output profile of a flash lamp. It is a figure which shows an example of the temperature profile of the surface of a semiconductor wafer, and a back surface.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a longitudinal sectional view showing a configuration of a heat treatment apparatus 1 according to the present invention. The heat treatment apparatus 1 of the present embodiment is a flash lamp annealing apparatus that heats a semiconductor wafer W by irradiating flash light onto a disk-shaped silicon semiconductor wafer W having a diameter of 300 mm as a substrate. Impurities are implanted into the semiconductor wafer W before being carried into the heat treatment apparatus 1, and an activation process of the impurities implanted by the heat treatment by the heat treatment apparatus 1 is executed.

  The heat treatment apparatus 1 includes a chamber 6 that accommodates a semiconductor wafer W, a flash heating unit 5 that houses a plurality of flash lamps FL, a halogen heating unit 4 that houses a plurality of halogen lamps HL, and a shutter mechanism 2. . A flash heating unit 5 is provided on the upper side of the chamber 6, and a halogen heating unit 4 is provided on the lower side. The heat treatment apparatus 1 includes a holding unit 7 that holds the semiconductor wafer W in a horizontal posture inside the chamber 6, and a transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the outside of the apparatus, Is provided. Further, the heat treatment apparatus 1 includes a control unit 3 that controls the operation mechanisms provided in the shutter mechanism 2, the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to perform the heat treatment of the semiconductor wafer W.

  The chamber 6 is configured by mounting quartz chamber windows above and below a cylindrical chamber side portion 61. The chamber side portion 61 has a substantially cylindrical shape with upper and lower openings. The upper opening is closed by an upper chamber window 63 and the lower opening is closed by a lower chamber window 64. ing. The upper chamber window 63 constituting the ceiling of the chamber 6 is a disk-shaped member made of quartz and functions as a quartz window that transmits the flash light emitted from the flash heating unit 5 into the chamber 6. The lower chamber window 64 constituting the floor portion of the chamber 6 is also a disk-shaped member made of quartz and functions as a quartz window that transmits light from the halogen heating unit 4 into the chamber 6.

  A reflection ring 68 is attached to the upper part of the inner wall surface of the chamber side part 61, and a reflection ring 69 is attached to the lower part. The reflection rings 68 and 69 are both formed in an annular shape. The upper reflecting ring 68 is attached by fitting from above the chamber side portion 61. On the other hand, the lower reflection ring 69 is mounted by being fitted from the lower side of the chamber side portion 61 and fastened with a screw (not shown). That is, the reflection rings 68 and 69 are both detachably attached to the chamber side portion 61. An inner space of the chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.

  By attaching the reflection rings 68 and 69 to the chamber side portion 61, a recess 62 is formed on the inner wall surface of the chamber 6. That is, a recess 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not mounted, a lower end surface of the reflection ring 68, and an upper end surface of the reflection ring 69 is formed. . The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6, and surrounds the holding portion 7 that holds the semiconductor wafer W.

  The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance. Further, the inner peripheral surfaces of the reflection rings 68 and 69 are mirrored by electrolytic nickel plating.

  The chamber side 61 is formed with a transfer opening (furnace port) 66 for carrying the semiconductor wafer W into and out of the chamber 6. The transfer opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes a sealed space.

Further, a gas supply hole 81 for supplying a processing gas (nitrogen gas (N ₂ ) in the present embodiment) to the heat treatment space 65 is formed in the upper portion of the inner wall of the chamber 6. The gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 through a buffer space 82 formed in an annular shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to a nitrogen gas supply source 85. A valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, nitrogen gas is supplied from the nitrogen gas supply source 85 to the buffer space 82. The nitrogen gas flowing into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81 and is supplied from the gas supply hole 81 into the heat treatment space 65.

  On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the chamber 6. The gas exhaust hole 86 is formed at a position lower than the recess 62 and may be provided in the reflection ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 through a buffer space 87 formed in an annular shape inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust unit 190. A valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87. A plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6 or may be slit-shaped. Further, the nitrogen gas supply source 85 and the exhaust unit 190 may be a mechanism provided in the heat treatment apparatus 1 or may be a utility of a factory where the heat treatment apparatus 1 is installed.

  A gas exhaust pipe 191 that exhausts the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.

  FIG. 2 is a perspective view showing the overall appearance of the holding unit 7. FIG. 3 is a plan view of the holding unit 7 as viewed from above, and FIG. 4 is a side view of the holding unit 7 as viewed from the side. The holding part 7 includes a base ring 71, a connecting part 72, and a susceptor 74. The base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the whole holding part 7 is made of quartz.

  The base ring 71 is an annular quartz member. The base ring 71 is supported on the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see FIG. 1). On the upper surface of the base ring 71 having an annular shape, a plurality of connecting portions 72 (four in this embodiment) are erected along the circumferential direction. The connecting portion 72 is also a quartz member, and is fixed to the base ring 71 by welding. The shape of the base ring 71 may be an arc shape in which a part is omitted from the annular shape.

  The flat susceptor 74 is supported by four connecting portions 72 provided on the base ring 71. The susceptor 74 is a substantially circular flat plate member made of quartz. The diameter of the susceptor 74 is larger than the diameter of the semiconductor wafer W. That is, the susceptor 74 has a larger planar size than the semiconductor wafer W. On the upper surface of the susceptor 74, a plurality (five in this embodiment) of guide pins 76 are erected. The five guide pins 76 are provided along a circumference that is concentric with the outer circumference of the susceptor 74. The diameter of the circle in which the five guide pins 76 are arranged is slightly larger than the diameter of the semiconductor wafer W. Each guide pin 76 is also formed of quartz. The guide pin 76 may be processed from a quartz ingot integrally with the susceptor 74, or a separately processed one may be attached to the susceptor 74 by welding or the like.

  The four connecting portions 72 erected on the base ring 71 and the lower surface of the peripheral portion of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72, and the holding portion 7 is an integrally formed member of quartz. When the base ring 71 of the holding unit 7 is supported on the wall surface of the chamber 6, the holding unit 7 is attached to the chamber 6. In a state in which the holding unit 7 is mounted on the chamber 6, the substantially disc-shaped susceptor 74 is in a horizontal posture (a posture in which the normal line matches the vertical direction). The semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the susceptor 74 of the holding unit 7 attached to the chamber 6. The semiconductor wafer W is placed inside a circle formed by the five guide pins 76, thereby preventing a horizontal displacement. Note that the number of guide pins 76 is not limited to five, and may be any number that can prevent misalignment of the semiconductor wafer W.

  As shown in FIGS. 2 and 3, the susceptor 74 has an opening 78 and a notch 77 penetrating vertically. The notch 77 is provided to pass the probe tip of the contact thermometer 130 using a thermocouple. On the other hand, the opening 78 is provided to receive radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 by the radiation thermometer 120. Further, the susceptor 74 is provided with four through holes 79 through which lift pins 12 of the transfer mechanism 10 to be described later penetrate for the delivery of the semiconductor wafer W.

  FIG. 5 is a plan view of the transfer mechanism 10. FIG. 6 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arc shape that follows the generally annular recess 62. Two lift pins 12 are erected on each transfer arm 11. Each transfer arm 11 can be rotated by a horizontal movement mechanism 13. The horizontal movement mechanism 13 includes a transfer operation position (a position indicated by a solid line in FIG. 5) for transferring the pair of transfer arms 11 to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is moved horizontally between the retracted positions (two-dot chain line positions in FIG. 5) that do not overlap in plan view. As the horizontal movement mechanism 13, each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be interlocked by a single motor using a link mechanism. It may be moved.

  The pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through through holes 79 (see FIGS. 2 and 3) formed in the susceptor 74, and the lift pins The upper end of 12 protrudes from the upper surface of the susceptor 74. On the other hand, when the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position, the lift pins 12 are extracted from the through holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open each of them. The transfer arm 11 moves to the retracted position. The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62. Note that an exhaust mechanism (not shown) is also provided in the vicinity of a portion where the drive unit (the horizontal movement mechanism 13 and the lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Is discharged to the outside of the chamber 6.

  Returning to FIG. 1, the flash heating unit 5 provided above the chamber 6 includes a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL inside the housing 51, and an upper part of the light source. And a reflector 52 provided so as to cover. A lamp light emission window 53 is mounted on the bottom of the casing 51 of the flash heating unit 5. The lamp light emission window 53 constituting the floor of the flash heating unit 5 is a plate-like quartz window made of quartz. By installing the flash heating unit 5 above the chamber 6, the lamp light emission window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the lamp light emission window 53 and the upper chamber window 63.

  Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction of each of the flash lamps FL is along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

  FIG. 8 is a diagram showing a driving circuit for the flash lamp FL. As shown in the figure, a capacitor 93, a coil 94, a flash lamp FL, and an IGBT (insulated gate bipolar transistor) 96 are connected in series. As shown in FIG. 8, the control unit 3 includes a pulse generator 31 and a waveform setting unit 32 and is connected to the input unit 33. As the input unit 33, various known input devices such as a keyboard, a mouse, and a touch panel can be employed. The waveform setting unit 32 sets the waveform of the pulse signal based on the input content from the input unit 33, and the pulse generator 31 generates the pulse signal according to the waveform.

  The flash lamp FL includes a rod-shaped glass tube (discharge tube) 92 in which xenon gas is sealed and an anode and a cathode are disposed at both ends thereof, and a trigger electrode provided on the outer peripheral surface of the glass tube 92. 91. A predetermined voltage is applied to the capacitor 93 by the power supply unit 95, and a charge corresponding to the applied voltage (charging voltage) is charged. A high voltage can be applied to the trigger electrode 91 from the trigger circuit 97. The timing at which the trigger circuit 97 applies a voltage to the trigger electrode 91 is controlled by the control unit 3.

  The IGBT 96 is a bipolar transistor in which a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is incorporated in a gate portion, and is a switching element suitable for handling high power. A pulse signal is applied from the pulse generator 31 of the control unit 3 to the gate of the IGBT 96. The IGBT 96 is turned on when a voltage higher than a predetermined value (High voltage) is applied to the gate of the IGBT 96, and the IGBT 96 is turned off when a voltage lower than the predetermined value (Low voltage) is applied. In this way, the drive circuit including the flash lamp FL is turned on / off by the IGBT 96. When the IGBT 96 is turned on / off, the connection between the flash lamp FL and the corresponding capacitor 93 is interrupted.

  Even if the IGBT 96 is turned on while the capacitor 93 is charged and a high voltage is applied to both end electrodes of the glass tube 92, the xenon gas is electrically an insulator, so that the glass is normal in the state. No electricity flows in the tube 92. However, when the trigger circuit 97 applies a high voltage to the trigger electrode 91 to break the insulation, an electric current instantaneously flows in the glass tube 92 due to the discharge between the both end electrodes, and excitation of the xenon atoms or molecules at that time Emits light.

  Further, the reflector 52 of FIG. 1 is provided above the plurality of flash lamps FL so as to cover all of them. The basic function of the reflector 52 is to reflect the light emitted from the plurality of flash lamps FL toward the holding unit 7. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting to exhibit a satin pattern.

  A plurality of halogen lamps HL (40 in this embodiment) are built in the halogen heating unit 4 provided below the chamber 6. The plurality of halogen lamps HL irradiate the heat treatment space 65 from below the chamber 6 through the lower chamber window 64. FIG. 7 is a plan view showing the arrangement of the plurality of halogen lamps HL. In the present embodiment, 20 halogen lamps HL are arranged in two upper and lower stages. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in both the upper and lower stages are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). Yes. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper stage and the lower stage is a horizontal plane.

  Further, as shown in FIG. 7, the arrangement density of the halogen lamps HL in the region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper stage and the lower stage. Yes. That is, in both the upper and lower stages, the arrangement pitch of the halogen lamps HL is shorter in the peripheral part than in the central part of the lamp array. For this reason, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W where the temperature is likely to decrease during heating by light irradiation from the halogen heating unit 4.

  Further, the lamp group composed of the upper halogen lamp HL and the lamp group composed of the lower halogen lamp HL are arranged so as to intersect in a lattice pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of the upper halogen lamps HL and the longitudinal direction of the lower halogen lamps HL are orthogonal to each other.

  The halogen lamp HL is a filament-type light source that emits light by making the filament incandescent by energizing the filament disposed inside the glass tube. Inside the glass tube, a gas obtained by introducing a trace amount of a halogen element (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is enclosed. By introducing a halogen element, it is possible to set the filament temperature to a high temperature while suppressing breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a longer life than a normal incandescent bulb and can continuously radiate strong light. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.

  As shown in FIG. 1, the heat treatment apparatus 1 includes a shutter mechanism 2 on the side of the halogen heating unit 4 and the chamber 6. The shutter mechanism 2 includes a shutter plate 21 and a slide drive mechanism 22. The shutter plate 21 is a plate that is opaque to the halogen light, and is formed of, for example, titanium (Ti). The slide drive mechanism 22 slides the shutter plate 21 along the horizontal direction, and inserts and removes the shutter plate 21 to and from the light shielding position between the halogen heating unit 4 and the holding unit 7. When the slide drive mechanism 22 advances the shutter plate 21, the shutter plate 21 is inserted into the light shielding position (the two-dot chain line position in FIG. 1) between the chamber 6 and the halogen heating unit 4, and the lower chamber window 64 and the plurality of lower chamber windows 64. The halogen lamp HL is cut off. Accordingly, light traveling from the plurality of halogen lamps HL toward the holding portion 7 of the heat treatment space 65 is shielded. Conversely, when the slide drive mechanism 22 retracts the shutter plate 21, the shutter plate 21 retracts from the light shielding position between the chamber 6 and the halogen heating unit 4 and the lower portion of the lower chamber window 64 is opened.

  Further, the control unit 3 controls the various operation mechanisms provided in the heat treatment apparatus 1. The configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 stores a CPU that performs various arithmetic processes, a ROM that is a read-only memory that stores basic programs, a RAM that is a readable and writable memory that stores various information, control software, data, and the like. It is configured with a magnetic disk. The processing in the heat treatment apparatus 1 proceeds as the CPU of the control unit 3 executes a predetermined processing program. Further, as shown in FIG. 8, the control unit 3 includes a pulse generator 31 and a waveform setting unit 32. As described above, the waveform setting unit 32 sets the waveform of the pulse signal based on the input content from the input unit 33, and the pulse generator 31 outputs the pulse signal to the gate of the IGBT 96 in accordance therewith. The controller 3 and the IGBT 96 constitute light emission control means for controlling the light emission output of the flash lamp FL.

  In addition to the above configuration, the heat treatment apparatus 1 prevents an excessive temperature rise in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to thermal energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided. For example, the wall of the chamber 6 is provided with a water-cooled tube (not shown). Further, the halogen heating unit 4 and the flash heating unit 5 have an air cooling structure in which a gas flow is formed inside to exhaust heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash heating unit 5 and the upper chamber window 63.

  Next, a processing procedure for the semiconductor wafer W in the heat treatment apparatus 1 will be described. The semiconductor wafer W to be processed here is a semiconductor substrate to which impurities (ions) are added by an ion implantation method. FIG. 9 is a diagram showing the structure of elements formed on the semiconductor wafer W to be processed in the heat treatment apparatus 1. A source / drain region 112 and an extension region 113 are formed in the silicon substrate 111, and a gate electrode 115 is provided on the upper surface thereof. The extension region 113 is an electrical connection between the source / drain region 112 and the channel. The metal gate electrode 115 is provided on the silicon substrate 111 via the gate insulating film 114, and a SiN sidewall 116 is formed for the measurement. Impurities are introduced into the source / drain regions 112 and the extension regions 113 by an ion implantation method, and the activation of the impurities is performed by light irradiation heat treatment (annealing) by the heat treatment apparatus 1. The processing procedure of the heat treatment apparatus 1 described below proceeds by the control unit 3 controlling each operation mechanism of the heat treatment apparatus 1.

  FIG. 10 is a flowchart showing a processing procedure for the semiconductor wafer W in the heat treatment apparatus 1. First, the air supply valve 84 is opened, and the exhaust valves 89 and 192 are opened to start supply / exhaust to the chamber 6 (step S1). When the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. When the valve 89 is opened, the gas in the chamber 6 is exhausted from the gas exhaust hole 86. Thereby, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65.

  Further, when the valve 192 is opened, the gas in the chamber 6 is also exhausted from the transfer opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). Note that nitrogen gas is continuously supplied to the heat treatment space 65 during the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1, and the supply amount is appropriately changed according to the processing steps of FIG. 10.

  Subsequently, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W after the impurity implantation is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the apparatus ( Step S2). The semiconductor wafer W carried in by the carrying robot advances to a position directly above the holding unit 7 and stops. Then, when the pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retracted position to the transfer operation position and rises, the lift pins 12 protrude from the upper surface of the susceptor 74 through the through holes 79 and the semiconductor wafer W. Receive.

  After the semiconductor wafer W is placed on the lift pins 12, the transfer robot leaves the heat treatment space 65 and the transfer opening 66 is closed by the gate valve 185. When the pair of transfer arms 11 are lowered, the semiconductor wafer W is transferred from the transfer mechanism 10 to the susceptor 74 of the holding unit 7 and held in a horizontal posture. The semiconductor wafer W is held by the susceptor 74 with the surface on which the pattern is formed and impurities are implanted as the upper surface. The semiconductor wafer W is held inside the five guide pins 76 on the upper surface of the susceptor 74. The pair of transfer arms 11 lowered to below the susceptor 74 is retracted to the retracted position, that is, inside the recess 62 by the horizontal movement mechanism 13.

  After the semiconductor wafer W is placed and held on the susceptor 74 of the holding unit 7, the 40 halogen lamps HL of the halogen heating unit 4 are turned on all at once and preheating (assist heating) is started (step S3). ). The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and is irradiated from the back surface (main surface opposite to the front surface) of the semiconductor wafer W. The temperature of the semiconductor wafer W rises by receiving light irradiation from the halogen lamp HL. In addition, since the transfer arm 11 of the transfer mechanism 10 is retracted to the inside of the recess 62, there is no obstacle to heating by the halogen lamp HL.

  FIG. 11 is a diagram showing changes in the surface temperature of the semiconductor wafer W. FIG. After the semiconductor wafer W is loaded and placed on the susceptor 74, the control unit 3 turns on the 40 halogen lamps HL at time t0 and raises the semiconductor wafer W to the preheating temperature T1 by halogen light irradiation. ing. The preheating temperature T1 is 300 ° C. or higher and 800 ° C. or lower, and is 500 ° C. in the present embodiment.

  When preheating with the halogen lamp HL is performed, the temperature of the semiconductor wafer W is measured by the contact thermometer 130. That is, a contact thermometer 130 incorporating a thermocouple contacts the lower surface of the semiconductor wafer W held by the susceptor 74 through the notch 77 to measure the temperature of the wafer being heated. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The controller 3 controls the output of the halogen lamp HL while monitoring whether or not the temperature of the semiconductor wafer W that is heated by light irradiation from the halogen lamp HL has reached a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL so that the temperature of the semiconductor wafer W becomes the preheating temperature T1 based on the value measured by the contact thermometer 130. Note that when the temperature of the semiconductor wafer W is increased by light irradiation from the halogen lamp HL, temperature measurement by the radiation thermometer 120 is not performed. This is because the halogen light irradiated from the halogen lamp HL enters the radiation thermometer 120 as disturbance light, and accurate temperature measurement cannot be performed.

  After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 maintains the semiconductor wafer W at the preheating temperature T1 for a while. Specifically, at time t1 when the temperature of the semiconductor wafer W measured by the contact thermometer 130 reaches the preheating temperature T1, the control unit 3 controls the output of the halogen lamp HL to control the temperature of the semiconductor wafer W. The preheating temperature T1 is maintained substantially.

  By performing such preheating by the halogen lamp HL, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. In the preliminary heating stage with the halogen lamp HL, the temperature of the peripheral edge of the semiconductor wafer W where heat dissipation is more likely to occur tends to be lower than that in the central area, but the arrangement density of the halogen lamps HL in the halogen heating section 4 is The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. For this reason, the light quantity irradiated to the peripheral part of the semiconductor wafer W which tends to generate heat increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform. Furthermore, since the inner peripheral surface of the reflection ring 69 attached to the chamber side portion 61 is a mirror surface, the amount of light reflected toward the peripheral edge of the semiconductor wafer W by the inner peripheral surface of the reflection ring 69 increases. The in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made more uniform.

  Next, a heat treatment is performed by irradiating flash light from the flash lamp FL at time t2 when a predetermined time has elapsed since the temperature of the semiconductor wafer W reached the preheating temperature T1. Note that the time until the temperature of the semiconductor wafer W reaches the preheating temperature T1 from room temperature (the time from the time t0 to the time t1) and the time until the flash lamp FL emits light after reaching the preheating temperature T1 ( The time from time t1 to time t2) is about several seconds. When the flash lamp FL irradiates flash light, the electric power is accumulated in the capacitor 93 by the power supply unit 95 in advance. Then, in a state where charges are accumulated in the capacitor 93, a pulse signal is output from the pulse generator 31 of the control unit 3 to the IGBT 96 to drive the IGBT 96 on and off.

  FIG. 12 is a diagram showing an example of the correlation between the waveform of the pulse signal and the current flowing through the flash lamp FL. Here, a pulse signal having a waveform as shown in FIG. The waveform of the pulse signal can be defined by inputting from the input unit 33 a recipe in which the pulse width time (on time) and the pulse interval time (off time) are sequentially set as parameters. When the operator inputs such a recipe from the input unit 33 to the control unit 3, the waveform setting unit 32 of the control unit 3 sets a pulse waveform that repeats ON / OFF as shown in FIG. In the pulse waveform shown in FIG. 12A, a plurality of pulses PA having a relatively long pulse width and a short interval are set in the preceding stage, and a plurality of pulses PB having a relatively short pulse width and a long interval are set in the subsequent stage. Has been. Then, the pulse generator 31 outputs a pulse signal according to the pulse waveform set by the waveform setting unit 32. As a result, a pulse signal having a waveform as shown in FIG. 12A is applied to the gate of the IGBT 96, and the on / off drive of the IGBT 96 is controlled. Specifically, the IGBT 96 is turned on when the pulse signal input to the gate of the IGBT 96 is on, and the IGBT 96 is turned off when the pulse signal is off.

  Further, in synchronization with the timing when the pulse signal output from the pulse generator 31 is turned on, the control unit 3 controls the trigger circuit 97 to apply a high voltage (trigger voltage) to the trigger electrode 91. A pulse signal is input to the gate of the IGBT 96 in a state where electric charges are accumulated in the capacitor 93 and a high voltage is applied to the trigger electrode 91 in synchronization with the timing when the pulse signal is turned on. When is turned on, a current always flows between both end electrodes in the glass tube 92, and light is emitted by the excitation of atoms or molecules of xenon at that time.

  The controller 3 outputs a pulse signal having the waveform shown in FIG. 12A to the gate of the IGBT 96, and applies a high voltage to the trigger electrode 91 in synchronization with the timing when the pulse signal is turned on, whereby the flash lamp FL A current having a waveform as shown in FIG. That is, the value of the current flowing in the glass tube 92 of the flash lamp FL increases when the pulse signal input to the gate of the IGBT 96 is on, and the current value decreases when the pulse signal is off. Each current waveform corresponding to each pulse is defined by a constant of the coil 94.

  A current having a waveform as shown in FIG. 12B flows, and the flash lamp FL emits light. The light emission output of the flash lamp FL is substantially proportional to the current flowing through the flash lamp FL. Therefore, the output waveform (profile) of the light emission output of the flash lamp FL has a pattern as shown in FIG. With the output waveform from the flash lamp FL as shown in FIG. 13, flash light irradiation is performed on the surface of the semiconductor wafer W held by the holding unit 7.

  When the flash lamp FL is caused to emit light without using the IGBT 96, the electric charge accumulated in the capacitor 93 is consumed by one light emission, and the output waveform from the flash lamp FL has a width of 0.1 millisecond or less. It becomes a single pulse of about 10 milliseconds. In contrast, in the present embodiment, an IGBT 96 as a switching element is connected in the circuit, and a pulse signal as shown in FIG. Is intermittently supplied by the IGBT 96 to control the current flowing through the flash lamp FL. As a result, the light emission of the flash lamp FL is chopper-controlled, and the electric charge accumulated in the capacitor 93 is divided and consumed, and the flash lamp FL repeats blinking in a very short time. As shown in FIG. 12, since the next pulse is applied to the gate of the IGBT 96 before the current value becomes completely “0” and the current value increases again, the flash lamp FL is repeatedly blinking. However, the light emission output is not completely “0”.

The output waveform of light shown in FIG. 13 can be regarded as performing two-stage light irradiation. That is composed a first irradiation from the time t22 to the flash lamp FL is a light emitting output is maximum from the time t21 to initiate the luminescence, and a second irradiation light output from the time t 22 to time t23 is reduced gradually, by Two-stage irradiation is performed.

  More specifically, first, the pulse generator 31 intermittently applies a plurality of pulses PA having a relatively long pulse width and a short interval to the gate of the IGBT 96 so that the IGBT 96 repeatedly turns on and off to include the flash lamp FL. Current flows in the circuit. At this stage, since a plurality of pulses PA having a long pulse width and a short interval are applied to the gate of the IGBT 96, the on time of the IGBT 96 becomes longer than the off time, and the current flowing through the flash lamp FL increases as a whole. A saw-tooth waveform is obtained (the front stage of FIG. 12B). The current having such a waveform flows, and the flash lamp FL performs the first irradiation in which the light emission output increases from the time t21 to the time t22.

  Next, the pulse generator 31 intermittently applies a plurality of pulses PB having a short pulse width and a long interval to the gate of the IGBT 96. At this stage, since a plurality of pulses PB having a short pulse width and a long interval are applied to the gate of the IGBT 96, on the contrary to the above, the on time of the IGBT 96 is shorter than the off time, and the current flowing through the flash lamp FL is The overall appearance is a sawtooth waveform that gradually decreases (after stage in FIG. 12B). The current having such a waveform flows, and the flash lamp FL performs the second irradiation such that the light emission output gradually decreases from time t22 to time t23.

  By performing two-stage light irradiation as shown in FIG. 13 on the semiconductor wafer W, the surface temperature of the semiconductor wafer W is raised from the preheating temperature T1 to the target temperature T2. FIG. 14 is a diagram illustrating an example of the temperature profile of the front surface and the back surface of the semiconductor wafer W. In the figure, the temperature profile of the front surface and the back surface is indicated by a solid line, and the profile of the temperature difference between the front and back surfaces is indicated by a dotted line.

  By the first irradiation from time t21 to time t22, the surface temperature of the semiconductor wafer W is raised from the preheating temperature T1 to the target temperature T2 (step S4). The target temperature T2 is not less than 1000 ° C. and not more than 1400 ° C. at which activation of the implanted impurities is achieved, and is set to 1100 ° C. in this embodiment.

  The time from the time t21 to the time t22 when the surface temperature of the semiconductor wafer W is raised from the preheating temperature T1 to the target temperature T2 by the first irradiation is longer than the heat conduction time from the front surface to the back surface of the semiconductor wafer W. It's time. Here, the “heat conduction time” is the time required for the heat generated on the front surface of the semiconductor wafer W by the flash light irradiation to be conducted to the back surface. The heat conduction time is defined by the material and outer dimensions of the semiconductor wafer W, and about 15 for a φ300 mm silicon wafer (thickness is standardized to 0.775 mm by the standard) as in this embodiment. Milliseconds. That is, the surface temperature of the semiconductor wafer W is increased from the preheating temperature T1 to the target temperature T2 over 15 milliseconds, which is longer than the heat conduction time required for heat conduction from the front surface to the back surface.

  Further, the temperature increase rate (surface temperature increase rate) when the surface temperature of the semiconductor wafer W is increased to the target temperature T2 by the first irradiation from the time t21 to the time t22 is 1000 ° C./second or more. In the IGBT 96, the temperature rise rate of the surface temperature of the semiconductor wafer W is 1000 ° C./second or more, and the surface temperature is raised from the preheating temperature T1 to the target temperature T2 over a longer time than the heat conduction time. The energization of the flash lamp FL is controlled so as to obtain a proper light output.

  On the other hand, the surface temperature of the semiconductor wafer W is maintained within the range of ± 25 ° C. from the target temperature T2 by the second irradiation from time t22 to time t23 (step S5). The time from time t22 to time t23 when the surface temperature of the semiconductor wafer W is maintained within the range of ± 25 ° C. from the target temperature T2 is 5 milliseconds or more. The IGBT 96 controls energization of the flash lamp FL so as to obtain a light emission output that maintains the surface temperature of the semiconductor wafer W within a range within ± 25 ° C. from the target temperature T2 for 5 milliseconds or more. Note that the time scale in FIG. 11 is seconds, whereas the time scale in FIG. 14 is milliseconds. Therefore, t21 to t23 in FIG. 14 are all displayed over t2 in FIG. .

  In the process of the first irradiation and the second irradiation, the heat generated on the surface of the semiconductor wafer W is transferred to the back surface, and the temperature of the back surface gradually increases. As shown by the dotted line in FIG. 14, the temperature difference between the front and back surfaces of the semiconductor wafer W is always the jump temperature at which the surface of the semiconductor wafer W is heated by the first irradiation (the temperature rising by the first irradiation, ie, the target temperature). This is the temperature difference between T2 and the preheating temperature T1, which is less than half of 600 ° C. in this embodiment.

  When the second irradiation by the flash lamp FL is completed, the IGBT 96 is turned off, the light emission of the flash lamp FL is stopped (step S6), and the surface temperature of the semiconductor wafer W is lowered from the target temperature T2. At this time, the surface temperature and the back surface temperature of the semiconductor wafer W become equal. Returning to FIG. 11, after the second irradiation is completed, the halogen lamp HL is turned off at a time t3 when a predetermined time has elapsed (step S7). Thereby, the semiconductor wafer W starts to fall from the preheating temperature T1. At the same time that the halogen lamp HL is extinguished, the shutter mechanism 2 inserts the shutter plate 21 into the light shielding position between the halogen heating unit 4 and the chamber 6 (step S8). Even if the halogen lamp HL is turned off, the temperature of the filament and the tube wall does not decrease immediately, but radiation heat continues to be radiated from the filament and tube wall that are hot for a while, which prevents the temperature of the semiconductor wafer W from falling. By inserting the shutter plate 21, the radiant heat radiated from the halogen lamp HL immediately after the light is turned off to the heat treatment space 65 is cut off, and the temperature drop rate of the semiconductor wafer W can be increased.

  Further, temperature measurement by the radiation thermometer 120 is started when the shutter plate 21 is inserted into the light shielding position. That is, the radiation thermometer 120 measures the intensity of infrared light radiated from the lower surface of the semiconductor wafer W held by the holding unit 7 through the opening 78 of the susceptor 74 to determine the temperature of the semiconductor wafer W during the temperature drop. taking measurement. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3.

  Although some radiation is continuously emitted from the high-temperature halogen lamp HL immediately after turning off, the radiation thermometer 120 measures the temperature of the semiconductor wafer W when the shutter plate 21 is inserted in the light shielding position. Radiant light traveling from the halogen lamp HL toward the heat treatment space 65 in the chamber 6 is shielded. Therefore, the radiation thermometer 120 can accurately measure the temperature of the semiconductor wafer W held by the susceptor 74 without being affected by ambient light.

  The controller 3 monitors whether or not the temperature of the semiconductor wafer W measured by the radiation thermometer 120 has dropped to a predetermined temperature. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 is moved horizontally from the retracted position to the transfer operation position again and lifted, whereby the lift pins 12 are moved to the susceptor. The semiconductor wafer W protruding from the upper surface of 74 and subjected to the heat treatment is received from the susceptor 74. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer robot outside the apparatus (step S9), and the semiconductor wafer in the heat treatment apparatus 1 is transferred. The W heat treatment is completed.

  In the present embodiment, the first irradiation for causing the light emission output of the flash lamp FL to reach the maximum value from zero by intermittently applying a plurality of pulses PA having a long pulse width and a short interval to the gate of the IGBT 96 is performed. Is going. The surface temperature of the semiconductor wafer W is raised from the preheating temperature T1 to the target temperature T2 by such first irradiation (in this embodiment, the jump temperature is raised by 600 ° C.). At this time, the surface temperature is raised from the preheating temperature T1 to the target temperature T2 over a longer time than the heat conduction time required for heat conduction from the front surface to the back surface of the semiconductor wafer W.

  Subsequently, after the surface of the semiconductor wafer W is heated from the preheating temperature T1 to the target temperature T2, a plurality of pulses PB having a short pulse width and a long interval are intermittently applied to the gate of the IGBT 96, thereby flashing. Second irradiation is performed to gradually reduce the light emission output of the lamp FL from the maximum value. The surface temperature of the semiconductor wafer W is maintained within a range of ± 25 ° C. from the target temperature T2 for 5 milliseconds or more by such second irradiation.

  The time required for activating the implanted impurity is extremely short, and the activation of the impurity is achieved by raising the surface temperature of the semiconductor wafer W to the target temperature T2 by the first irradiation. Further, by maintaining the surface temperature of the semiconductor wafer W in the vicinity of the target temperature T2 for 5 milliseconds or more, the point defects introduced into the semiconductor wafer W at the time of impurity implantation are recovered.

  Furthermore, in this embodiment, the surface temperature is raised from the preheating temperature T1 to the target temperature T2 over a longer time than the heat conduction time required for heat conduction from the front surface to the back surface of the semiconductor wafer W. The temperature difference between the front and back surfaces of the wafer W is always less than or equal to half the jump temperature (300 ° C. or less in this embodiment), and the stress concentration on the wafer back surface due to the thermal expansion difference between the front and back surfaces can be reduced. As a result, it is possible to prevent the semiconductor wafer W from cracking during flash heating.

  While the embodiments of the present invention have been described above, the present invention can be modified in various ways other than those described above without departing from the spirit of the present invention. For example, in the above embodiment, the front surface of the semiconductor wafer W is irradiated with flash light to perform the heat treatment, but the back surface of the semiconductor wafer W may be irradiated with flash light. Specifically, the same processing as in the above embodiment may be performed by inverting the front and back of the semiconductor wafer W and holding it on the holding unit 7 (that is, holding the surface as the lower surface). Further, the configuration of the heat treatment apparatus may be such that the halogen heating unit 4 is disposed on the upper side of the chamber 6 and the flash heating unit 5 is disposed on the lower side, and the flash heat treatment is performed by the heat treatment apparatus. Even when flash light irradiation is performed from the back surface of the semiconductor wafer W, the back surface temperature is changed from the preheating temperature T1 to the target temperature T2 over a longer time than the heat conduction time required for heat conduction from the back surface to the surface of the semiconductor wafer W. The temperature difference between the front and back surfaces is always less than half the jump temperature. As a result, stress concentration on the wafer surface due to the difference in thermal expansion between the front and back surfaces during flash heating can be alleviated, and cracking of the semiconductor wafer W can be prevented.

  In short, one side of the semiconductor wafer W is irradiated with flash light from the flash lamp FL, and the heat conduction time required for heat conduction from one side to the other side which is the main surface opposite to the one side is longer. The temperature on one side may be increased from the preheating temperature T1 to the target temperature T2. After the temperature rise, one surface of the semiconductor wafer W is irradiated with flash light, and the temperature on one surface is maintained within a range of ± 25 ° C. from the target temperature T2 for 5 milliseconds or more. In this way, the temperature difference between the front and back surfaces during flash heating is always less than half of the jump temperature, and stress concentration on one side (or the other side) of the wafer due to the difference in thermal expansion between the front and back surfaces can be alleviated. And cracking of the semiconductor wafer W can be prevented.

  The setting of the waveform of the pulse signal is not limited to inputting parameters such as the pulse width one by one from the input unit 33. For example, the operator directly inputs the waveform graphically from the input unit 33. Alternatively, the waveform previously set and stored in the storage unit such as a magnetic disk may be read, or may be downloaded from the outside of the heat treatment apparatus 1.

  In the above embodiment, the voltage is applied to the trigger electrode 91 in synchronization with the timing at which the pulse signal is turned on. However, the timing at which the trigger voltage is applied is not limited to this. You may make it apply at fixed intervals irrespective of the waveform of a signal. Further, if the interval between the pulse signals is short and the energization is started by the next pulse in a state where the current value of the current flowing through the flash lamp FL by a certain pulse remains at a predetermined value or more, the flash lamp is used as it is. Since a current continues to flow through the FL, it is not necessary to apply a trigger voltage for each pulse. As shown in FIG. 12A of the above embodiment, when all the pulse intervals of the pulse signal are shorter than a predetermined value, the trigger voltage may be applied only when the first pulse is applied, Thereafter, a current waveform as shown in FIG. 12B can be formed only by outputting the pulse signal of FIG. 12A to the gate of the IGBT 96 without applying a trigger voltage. That is, the application timing of the trigger voltage is arbitrary as long as the current flows through the flash lamp FL when the pulse signal is turned on.

  In the above embodiment, the IGBT 96 is used as the switching element. However, instead of this, another transistor that can turn on and off the circuit in accordance with the signal level input to the gate may be used. However, since a considerable amount of power is consumed for the light emission of the flash lamp FL, it is preferable to employ an IGBT or a GTO (Gate Turn Off) thyristor suitable for handling high power as the switching element.

  Further, a circuit configuration different from that shown in FIG. For example, a plurality of power supply circuits having different coil constants may be connected to one flash lamp FL. Furthermore, as long as multi-stage light irradiation can be performed, the light source is not limited to the flash lamp FL, and any light source capable of light irradiation with an irradiation time of 1 second or less may be used. Also good.

  In the above embodiment, the flash heating unit 5 is provided with 30 flash lamps FL. However, the present invention is not limited to this, and the number of flash lamps FL can be any number. . The flash lamp FL is not limited to a xenon flash lamp, and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen heating unit 4 is not limited to 40, and may be an arbitrary number.

  In the above embodiment, the semiconductor wafer W is preheated by irradiation with halogen light from the halogen lamp HL. However, the preheating method is not limited to this and is placed on a hot plate. Thus, the semiconductor wafer W may be preheated.

  Further, the substrate to be processed by the heat treatment apparatus according to the present invention is not limited to a φ300 mm silicon semiconductor wafer, and may be, for example, a φ200 mm or φ450 mm semiconductor wafer. Since the thickness based on the standard is different when the diameter of the semiconductor wafer is different, the heat conduction time required for heat conduction from one surface to the other surface is different. Even in this case, the temperature of the one surface is increased from the preheating temperature T1 to the target temperature T2 over a longer time than the heat conduction time required for heat conduction from the one surface to the other surface. The stress concentration on the one surface (or the other surface) of the wafer due to the difference in thermal expansion on the back surface can be alleviated to prevent the semiconductor wafer from cracking.

  Further, the substrate to be processed by the heat treatment apparatus according to the present invention may be a substrate in which a predetermined film is formed on the surface of a silicon semiconductor wafer. For example, when a resist film is formed on the surface of a semiconductor wafer, post-exposure baking (PEB) or post-application baking (PAB) can be performed by flash light irradiation. Since the target temperature required for these heat treatments is relatively low (100 ° C. to 200 ° C.), it is preferable to perform flash light irradiation on the semiconductor wafer on which the resist film is formed from the back surface.

  A nickel film may be formed on the surface of the semiconductor wafer and subjected to flash heat treatment by a heat treatment apparatus according to the present invention to form nickel silicide (silicidation). In addition, a high dielectric constant film (High-k film) containing hafnium or the like is formed on the surface of the semiconductor wafer, and flash heat treatment is performed by the heat treatment apparatus according to the present invention to promote crystallization of the high dielectric constant film. May be. These heat treatments require a longer time than the activation of impurities, and after raising the surface temperature of the semiconductor wafer to the target temperature, the surface temperature is within 5 mm within the range of ± 25 ° C. from the target temperature. Necessary processing can be performed by maintaining for at least two seconds.

  The substrate to be processed by the heat treatment apparatus according to the present invention may be a glass substrate or a solar cell substrate used for a flat panel display such as a liquid crystal display device. Further, the technique according to the present invention may be applied to bonding of metal and silicon or crystallization of polysilicon.

DESCRIPTION OF SYMBOLS 1 Heat processing apparatus 2 Shutter mechanism 3 Control part 4 Halogen heating part 5 Flash heating part 6 Chamber 7 Holding part 10 Transfer mechanism 21 Shutter plate 22 Slide drive mechanism 31 Pulse generator 32 Waveform setting part 33 Input part 61 Chamber side part 62 Recessed part 63 Upper chamber window 64 Lower chamber window 65 Heat treatment space 74 Susceptor 91 Trigger electrode 92 Glass tube 93 Capacitor 94 Coil 96 IGBT
97 Trigger circuit FL Flash lamp HL Halogen lamp W Semiconductor wafer

Claims (8)

A heat treatment method for heating a substrate by irradiating the substrate with light,
A preheating step of heating the substrate at a predetermined preheating temperature;
The one surface of the substrate is irradiated with flash light from a flash lamp, and the one surface is taken longer than the heat conduction time required for heat conduction from the one surface to the other surface, which is the surface opposite to the one surface. A temperature raising step for raising the temperature in the direction from the preheating temperature to a target temperature;
After the temperature raising step, the one surface of the substrate is irradiated with flash light whose light output gradually decreases from the flash lamp, so that the temperature of the one surface is within 5 mm within the range of ± 25 ° C. from the target temperature. A temperature maintaining step for maintaining at least 2
A heat treatment method comprising: The heat treatment method according to claim 1,
The method for heat treatment, wherein a rate of temperature rise on the one surface in the temperature raising step is 1000 ° C./second or more. In the heat processing method of Claim 1 or Claim 2,
A heat treatment method, wherein the substrate is a silicon semiconductor wafer. In the heat processing method in any one of Claims 1-3,
In the temperature raising step and the temperature maintaining step, the light emission output of the flash lamp is controlled by intermittently supplying a charge from a capacitor to the flash lamp by a switching element. A heat treatment apparatus for heating a substrate by irradiating the substrate with light,
A chamber for housing the substrate;
Holding means for holding the substrate in the chamber;
Preheating means for heating the substrate held by the holding means to a predetermined preheating temperature;
A flash lamp for irradiating flash light onto the substrate held by the holding means;
Light emission control means for controlling the light emission output of the flash lamp;
With
The light emission control unit irradiates one side of the substrate held by the holding unit with flash light, and a heat conduction time required for heat conduction from the one side to the other side opposite to the one side The temperature of the one surface is raised from the preheating temperature to the target temperature over a longer period of time, and then the light emission output of the flash lamp is gradually decreased so that the temperature of the one surface is ±± from the target temperature. A heat treatment apparatus, wherein the light emission output of the flash lamp is controlled to be maintained within a range of 25 ° C. for 5 milliseconds or more. The heat treatment apparatus according to claim 5, wherein
The light emission control means controls the light emission output of the flash lamp so that the temperature of the one surface is increased from the preheating temperature to the target temperature at a temperature increase rate of 1000 ° C./second or more. Heat treatment equipment. In the heat treatment apparatus according to claim 5 or 6,
The heat treatment apparatus, wherein the substrate is a silicon semiconductor wafer. In the heat treatment apparatus according to any one of claims 5 to 7,
The light emission control means includes a switching element that controls light emission output of the flash lamp by intermittently supplying a charge from a capacitor to the flash lamp.

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