JP2018101760A - Thermal treatment method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thermal treatment method by which the warp of a substrate can be suppressed without lowering the throughput.SOLUTION: A thermal treatment method comprises the steps of: heating a semiconductor wafer W loaded into a chamber to raise the temperature of the semiconductor wafer W to an intermediate temperature higher than that of a susceptor 74 by exposure to light from a halogen lamp HL, during which lift pins 12 keep the semiconductor wafer spaced apart from the susceptor 74 by a distance d (first preliminary heating); subsequently, bringing the lift pins 12 down to pass the semiconductor wafer W to the susceptor 74 from the lift pins 12 and to put the wafer on the susceptor 74 at the time when the temperature of the semiconductor wafer W rises to the intermediate temperature and in this state, keeping the semiconductor wafer W exposed to light from the halogen lamp HL to raise the temperature of the semiconductor wafer W to a preliminarily heating temperature (second preliminary heating); and then, applying flash light from a flash lamp FL to the surface of the semiconductor wafer W of which the temperature is raised to the preliminarily heating temperature.SELECTED DRAWING: Figure 10

Description

  The present invention relates to a heat treatment method for heating a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer by irradiating flash light.

  In the manufacturing process of a semiconductor device, flash lamp annealing (FLA) that heats a semiconductor wafer in a very short time has attracted attention. Flash lamp annealing uses a xenon flash lamp (hereinafter referred to simply as a “flash lamp” to mean a xenon flash lamp) to irradiate the surface of the semiconductor wafer with flash light so that only the surface of the semiconductor wafer is exposed. This is a heat treatment technique for raising the temperature in a short time (several milliseconds or less).

  The radiation spectral distribution of a xenon flash lamp ranges from the ultraviolet region to the near infrared region, has a shorter wavelength than the conventional halogen lamp, and almost coincides with the fundamental absorption band of a silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, the semiconductor wafer can be rapidly heated with little transmitted light. Further, it has been found that if the flash light irradiation is performed for a very short time of several milliseconds or less, only the vicinity of the surface of the semiconductor wafer can be selectively heated.

  Such flash lamp annealing is used for processes that require heating for a very short time, for example, activation of impurities typically implanted in a semiconductor wafer. By irradiating flash light from a flash lamp onto the surface of a semiconductor wafer into which impurities have been implanted by ion implantation, the surface of the semiconductor wafer can be raised to an activation temperature for a very short time, and impurities can be diffused deeply. Only the impurity activation can be carried out without causing them.

  In a typical flash lamp annealing apparatus, it is difficult to raise a semiconductor wafer to a target processing temperature only by flash light irradiation, so that after preheating to a predetermined temperature in advance, the flash light from the flash lamp is used. Irradiating. For example, in Patent Document 1, a semiconductor wafer carried into a chamber is placed on a quartz susceptor, preheated by light irradiation from a halogen lamp, and then flash light is applied from the flash lamp to the surface of the semiconductor wafer. Is disclosed.

JP 2013-162010 A

  By the way, depending on the purpose of the flash heat treatment, the inside of the chamber may be decompressed to less than atmospheric pressure (for example, heat treatment of a high dielectric constant gate insulating film). In a flash lamp annealing apparatus corresponding to a decompression process, in order to increase the pressure resistance of a chamber, a quartz chamber window that transmits flash light or halogen light is made thicker than that corresponding to normal pressure. As a result, the heat capacity of the entire chamber system is increased, and the structure in the chamber including the susceptor after the heat treatment of the semiconductor wafer is difficult to cool.

  When a new normal temperature semiconductor wafer is loaded into the chamber and placed on the susceptor with the susceptor, etc., hardly cooled after the heat treatment, the temperature difference between the semiconductor wafer and the susceptor is large. Wafer warpage sometimes occurred when it was placed on the susceptor. When preheating with a halogen lamp is performed in a state where the wafer is warped, there arises a problem that the in-plane temperature distribution of the semiconductor wafer is remarkably deteriorated. Further, if flash heating is performed with a flash lamp in the presence of wafer warpage, wafer cracking may occur.

  In order to solve such problems, after the heat treatment of the semiconductor wafer is completed, a long cooling time is provided so that the temperature of the susceptor is sufficiently lowered, and then a new semiconductor wafer is carried into the chamber and transferred to the susceptor. It can also be placed. However, if a long cooling time is provided, the above-described warping of the semiconductor wafer can be suppressed, but a long time is required for processing one semiconductor wafer, resulting in a problem that the throughput is greatly reduced. .

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment method capable of suppressing the warpage of the substrate without reducing the throughput.

  In order to solve the above-mentioned problem, the invention of claim 1 is a heat treatment method for heating a substrate by irradiating the substrate with flash light, a loading step for loading the substrate into a chamber, and the loaded substrate within the chamber. A first preheating step of heating the substrate to a first temperature by irradiating light from a halogen lamp in a state of being separated from a susceptor installed on the substrate; and the substrate heated to the first temperature A second preheating step of heating the substrate to a second temperature higher than the first temperature by irradiating light from the halogen lamp in a state of being placed on a susceptor; and raising the temperature to the second temperature. And a flash heating step of irradiating flash light on the surface of the heated substrate from a flash lamp.

  According to a second aspect of the present invention, in the heat treatment method according to the first aspect of the invention, the first preheating step is performed in a state where the lift pins that have received the substrate in the carrying-in step support the substrate. The substrate is transferred from the lift pin to the susceptor when the process proceeds from the first preheating step to the second preheating step.

  According to a third aspect of the present invention, in the heat treatment method according to the first or second aspect of the present invention, the first temperature is higher than the temperature of the susceptor.

  According to a fourth aspect of the present invention, in the heat treatment method according to the third aspect of the invention, the first temperature is 350 ° C. or higher and 500 ° C. or lower.

  The invention of claim 5 is characterized in that, in the heat treatment method according to any one of claims 1 to 4, the interior of the chamber is depressurized to less than atmospheric pressure after the carrying-in step.

  According to the first to fifth aspects of the present invention, the substrate is heated to the first temperature by irradiating light from the halogen lamp with the substrate separated from the susceptor, and the substrate is heated to the first temperature. Since the substrate is heated to the second temperature by irradiating light from the halogen lamp with the substrate placed on the susceptor, the temperature difference between the substrate and the susceptor at the time when the substrate contacts the susceptor is reduced, and throughput is increased. The warpage of the substrate can be suppressed without lowering.

It is a longitudinal cross-sectional view which shows the structure of the heat processing apparatus used for the heat processing method which concerns on this invention. It is a perspective view which shows the whole external appearance of a holding | maintenance part. It is a top view of a susceptor. It is sectional drawing of a susceptor. It is a top view of a transfer mechanism. It is a side view of a transfer mechanism. It is a top view which shows arrangement | positioning of a some halogen lamp. It is a figure which shows the drive circuit of a flash lamp. It is a figure which shows the change of the surface temperature of a semiconductor wafer. It is a figure which shows typically the state by which the semiconductor wafer was supported by the lift pin of the transfer mechanism. It is a figure which shows typically the state by which the semiconductor wafer was mounted in the susceptor.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  First, a heat treatment apparatus for carrying out the heat treatment method according to the present invention will be described. FIG. 1 is a longitudinal sectional view showing a configuration of a heat treatment apparatus 1 used in the heat treatment method according to the present invention. A heat treatment apparatus 1 in FIG. 1 is a flash lamp annealing apparatus that heats a semiconductor wafer W by irradiating a disk-shaped semiconductor wafer W as a substrate with flash light irradiation. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. In FIG. 1 and the subsequent drawings, the size and number of each part are exaggerated or simplified as necessary for easy understanding.

  The heat treatment apparatus 1 includes a chamber 6 that accommodates a semiconductor wafer W, a flash heating unit 5 that houses a plurality of flash lamps FL, and a halogen heating unit 4 that houses a plurality of halogen lamps HL. A flash heating unit 5 is provided on the upper side of the chamber 6, and a halogen heating unit 4 is provided on the lower side. The heat treatment apparatus 1 includes a holding unit 7 that holds the semiconductor wafer W in a horizontal posture inside the chamber 6, and a transfer mechanism 10 that transfers the semiconductor wafer W between the holding unit 7 and the outside of the apparatus, Is provided. Furthermore, the heat treatment apparatus 1 includes a control unit 3 that controls the operation mechanisms provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to perform the heat treatment of the semiconductor wafer W.

  The chamber 6 is configured by mounting quartz chamber windows above and below a cylindrical chamber side portion 61. The chamber side portion 61 has a substantially cylindrical shape with upper and lower openings. The upper opening is closed by an upper chamber window 63 and the lower opening is closed by a lower chamber window 64. ing. The upper chamber window 63 constituting the ceiling of the chamber 6 is a disk-shaped member made of quartz and functions as a quartz window that transmits the flash light emitted from the flash heating unit 5 into the chamber 6. The lower chamber window 64 constituting the floor portion of the chamber 6 is also a disk-shaped member made of quartz and functions as a quartz window that transmits light from the halogen heating unit 4 into the chamber 6.

  The chamber 6 according to the present embodiment is capable of reducing the pressure inside the chamber to less than atmospheric pressure. Therefore, in order to increase pressure resistance, the upper chamber window 63 and the lower chamber window 64 have a thickness corresponding to normal pressure. It is thicker than. For example, if it corresponds to normal pressure, the thickness of the chamber window is 8 mm, but the thickness of the upper chamber window 63 and the lower chamber window 64 of this embodiment is 28 mm.

  A reflection ring 68 is attached to the upper part of the inner wall surface of the chamber side part 61, and a reflection ring 69 is attached to the lower part. The reflection rings 68 and 69 are both formed in an annular shape. The upper reflecting ring 68 is attached by fitting from above the chamber side portion 61. On the other hand, the lower reflection ring 69 is mounted by being fitted from the lower side of the chamber side portion 61 and fastened with a screw (not shown). That is, the reflection rings 68 and 69 are both detachably attached to the chamber side portion 61. An inner space of the chamber 6, that is, a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the reflection rings 68 and 69 is defined as a heat treatment space 65.

  By attaching the reflection rings 68 and 69 to the chamber side portion 61, a recess 62 is formed on the inner wall surface of the chamber 6. That is, a recess 62 surrounded by a central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not mounted, a lower end surface of the reflection ring 68, and an upper end surface of the reflection ring 69 is formed. . The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6, and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.

  The chamber side 61 is formed with a transfer opening (furnace port) 66 for carrying the semiconductor wafer W into and out of the chamber 6. The transfer opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W is carried into the heat treatment space 65 through the recess 62 from the transfer opening 66 and the semiconductor wafer W is carried out from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes a sealed space.

A gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed in the upper portion of the inner wall of the chamber 6. The gas supply hole 81 is formed at a position above the recess 62 and may be provided in the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 through a buffer space 82 formed in an annular shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. A valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81 and is supplied from the gas supply hole 81 into the heat treatment space 65. As the processing gas, for example, an inert gas such as nitrogen (N ₂ ), a reactive gas such as hydrogen (H ₂ ) or ammonia (NH ₃ ), or a mixed gas obtained by mixing them can be used. In the embodiment, a mixed gas of nitrogen gas and ammonia).

  On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower portion of the inner wall of the chamber 6. The gas exhaust hole 86 is formed at a position lower than the recess 62 and may be provided in the reflection ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 through a buffer space 87 formed in an annular shape inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust unit 190. A valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 through the buffer space 87. A plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6 or may be slit-shaped.

  A gas exhaust pipe 191 that exhausts the gas in the heat treatment space 65 is also connected to the tip of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.

  As the exhaust unit 190, an exhaust utility of a factory where the vacuum pump or the heat treatment apparatus 1 is installed can be used. When a vacuum pump is adopted as the exhaust part 190 and the valve 84 is closed and the atmosphere of the heat treatment space 65 that is a sealed space is exhausted without supplying any gas from the gas supply hole 81, the inside of the chamber 6 is brought to a vacuum atmosphere. The pressure can be reduced. Further, even if a vacuum pump is not used as the exhaust unit 190, the inside of the chamber 6 can be decompressed to an atmospheric pressure lower than the atmospheric pressure by exhausting without supplying gas from the gas supply hole 81. .

  FIG. 2 is a perspective view showing the overall appearance of the holding unit 7. The holding part 7 includes a base ring 71, a connecting part 72, and a susceptor 74. The base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. That is, the whole holding part 7 is made of quartz.

  The base ring 71 is an arc-shaped quartz member that is partially missing from the annular shape. This missing portion is provided to prevent interference between a transfer arm 11 and a base ring 71 of the transfer mechanism 10 described later. The base ring 71 is supported on the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see FIG. 1). On the upper surface of the base ring 71, a plurality of connecting portions 72 (four in this embodiment) are erected along the annular circumferential direction. The connecting portion 72 is also a quartz member, and is fixed to the base ring 71 by welding.

  The susceptor 74 is supported by four connecting portions 72 provided on the base ring 71. FIG. 3 is a plan view of the susceptor 74. FIG. 4 is a cross-sectional view of the susceptor 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger planar size than the semiconductor wafer W.

  A guide ring 76 is installed on the peripheral edge of the upper surface of the holding plate 75. The guide ring 76 is an annular member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 has a tapered surface that widens upward from the holding plate 75. The guide ring 76 is formed of quartz similar to the holding plate 75. The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 with a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.

  A region inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75 a that holds the semiconductor wafer W. A plurality of substrate support pins 77 are provided upright on the holding surface 75 a of the holding plate 75. In the present embodiment, a total of twelve substrate support pins 77 are erected every 30 ° along a circumference concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between the substrate support pins 77 facing each other) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is 300 mm, then 270 mm to 280 mm (this embodiment) In the form, φ280 mm). Each substrate support pin 77 is made of quartz. The plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.

  Returning to FIG. 2, the four connecting portions 72 erected on the base ring 71 and the peripheral portion of the holding plate 75 of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72. When the base ring 71 of the holding unit 7 is supported on the wall surface of the chamber 6, the holding unit 7 is attached to the chamber 6. In a state where the holding unit 7 is mounted on the chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line matches the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane.

  The semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the susceptor 74 of the holding unit 7 attached to the chamber 6. At this time, the semiconductor wafer W is supported by twelve substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. More precisely, the upper ends of the twelve substrate support pins 77 are in contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the 12 substrate support pins 77 (the distance from the upper end of the substrate support pin 77 to the holding surface 75a of the holding plate 75) is uniform, the semiconductor wafer W is placed in a horizontal posture by the 12 substrate support pins 77. Can be supported.

  Further, the semiconductor wafer W is supported by a plurality of substrate support pins 77 at a predetermined interval from the holding surface 75 a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Accordingly, the horizontal displacement of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.

  As shown in FIGS. 2 and 3, the holding plate 75 of the susceptor 74 has an opening 78 penetrating vertically. The opening 78 is provided for the radiation thermometer 120 (see FIG. 1) to receive radiated light (infrared light) emitted from the lower surface of the semiconductor wafer W. That is, the radiation thermometer 120 receives light emitted from the lower surface of the semiconductor wafer W through the opening 78, and the temperature of the semiconductor wafer W is measured by a separate detector. Further, the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which lift pins 12 of the transfer mechanism 10 to be described later penetrate for the delivery of the semiconductor wafer W.

  FIG. 5 is a plan view of the transfer mechanism 10. FIG. 6 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arc shape that follows the generally annular recess 62. Two lift pins 12 are erected on each transfer arm 11. The transfer arm 11 and the lift pin 12 are made of quartz. Each transfer arm 11 can be rotated by a horizontal movement mechanism 13. The horizontal movement mechanism 13 includes a transfer operation position (a position indicated by a solid line in FIG. 5) for transferring the pair of transfer arms 11 to the holding unit 7 and the semiconductor wafer W held by the holding unit 7. It is moved horizontally between the retracted positions (two-dot chain line positions in FIG. 5) that do not overlap in plan view. As the horizontal movement mechanism 13, each transfer arm 11 may be rotated by an individual motor, or a pair of transfer arms 11 may be interlocked by a single motor using a link mechanism. It may be moved.

  The pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 2 and 3) formed in the susceptor 74, and the lift pins The upper end of 12 protrudes from the upper surface of the susceptor 74. On the other hand, when the elevating mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position, the lift pins 12 are extracted from the through holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open each of them. The transfer arm 11 moves to the retracted position. The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding unit 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62. Note that an exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive unit (the horizontal movement mechanism 13 and the lifting mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 Is discharged to the outside of the chamber 6.

  Returning to FIG. 1, the flash heating unit 5 provided above the chamber 6 includes a light source including a plurality of (30 in the present embodiment) xenon flash lamps FL inside the housing 51, and an upper part of the light source. And a reflector 52 provided so as to cover. A lamp light emission window 53 is mounted on the bottom of the casing 51 of the flash heating unit 5. The lamp light emission window 53 constituting the floor of the flash heating unit 5 is a plate-like quartz window made of quartz. By installing the flash heating unit 5 above the chamber 6, the lamp light emission window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the lamp light emission window 53 and the upper chamber window 63.

  Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction of each of the flash lamps FL is along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

  FIG. 8 is a diagram showing a driving circuit for the flash lamp FL. As shown in the figure, a capacitor 93, a coil 94, a flash lamp FL, and an IGBT (insulated gate bipolar transistor) 96 are connected in series. As shown in FIG. 8, the control unit 3 includes a pulse generator 31 and a waveform setting unit 32 and is connected to the input unit 33. As the input unit 33, various known input devices such as a keyboard, a mouse, and a touch panel can be employed. The waveform setting unit 32 sets the waveform of the pulse signal based on the input content from the input unit 33, and the pulse generator 31 generates the pulse signal according to the waveform.

  The flash lamp FL includes a rod-shaped glass tube (discharge tube) 92 in which xenon gas is sealed and an anode and a cathode are disposed at both ends thereof, and a trigger electrode provided on the outer peripheral surface of the glass tube 92. 91. A predetermined voltage is applied to the capacitor 93 by the power supply unit 95, and a charge corresponding to the applied voltage (charging voltage) is charged. A high voltage can be applied to the trigger electrode 91 from the trigger circuit 97. The timing at which the trigger circuit 97 applies a voltage to the trigger electrode 91 is controlled by the control unit 3.

  The IGBT 96 is a bipolar transistor in which a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is incorporated in a gate portion, and is a switching element suitable for handling high power. A pulse signal is applied from the pulse generator 31 of the control unit 3 to the gate of the IGBT 96. The IGBT 96 is turned on when a voltage higher than a predetermined value (High voltage) is applied to the gate of the IGBT 96, and the IGBT 96 is turned off when a voltage lower than the predetermined value (Low voltage) is applied. In this way, the drive circuit including the flash lamp FL is turned on / off by the IGBT 96. When the IGBT 96 is turned on / off, the connection between the flash lamp FL and the corresponding capacitor 93 is interrupted, and the current flowing through the flash lamp FL is on / off controlled.

  Even if the IGBT 96 is turned on while the capacitor 93 is charged and a high voltage is applied to both end electrodes of the glass tube 92, the xenon gas is electrically an insulator, so that the glass is normal in the state. No electricity flows in the tube 92. However, when the trigger circuit 97 applies a high voltage to the trigger electrode 91 to break the insulation, an electric current instantaneously flows in the glass tube 92 due to the discharge between the both end electrodes, and excitation of the xenon atoms or molecules at that time Emits light.

  The drive circuit as shown in FIG. 8 is individually provided for each of the plurality of flash lamps FL provided in the flash heating unit 5. In the present embodiment, since 30 flash lamps FL are arranged in a plane, 30 drive circuits as shown in FIG. 8 are provided correspondingly. Therefore, the current flowing through each of the 30 flash lamps FL is individually controlled to be turned on / off by the corresponding IGBT 96.

  In addition, the reflector 52 is provided above the plurality of flash lamps FL so as to cover all of them. The basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting.

  The halogen heating unit 4 provided below the chamber 6 incorporates a plurality (40 in this embodiment) of halogen lamps HL inside the housing 41. The halogen heating unit 4 is a light irradiation unit that heats the semiconductor wafer W by irradiating the heat treatment space 65 from below the chamber 6 through the lower chamber window 64 with a plurality of halogen lamps HL.

  FIG. 7 is a plan view showing the arrangement of the plurality of halogen lamps HL. Forty halogen lamps HL are arranged in two upper and lower stages. Twenty halogen lamps HL are arranged on the upper stage close to the holding unit 7, and twenty halogen lamps HL are arranged on the lower stage farther from the holding unit 7 than the upper stage. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in both the upper and lower stages are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). Yes. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper stage and the lower stage is a horizontal plane.

  Further, as shown in FIG. 7, the arrangement density of the halogen lamps HL in the region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper stage and the lower stage. Yes. That is, in both the upper and lower stages, the arrangement pitch of the halogen lamps HL is shorter in the peripheral part than in the central part of the lamp array. For this reason, it is possible to irradiate a larger amount of light to the peripheral portion of the semiconductor wafer W where the temperature is likely to decrease during heating by light irradiation from the halogen heating unit 4.

  Further, the lamp group composed of the upper halogen lamp HL and the lamp group composed of the lower halogen lamp HL are arranged so as to intersect in a lattice pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of the 20 halogen lamps HL arranged in the upper stage and the longitudinal direction of the 20 halogen lamps HL arranged in the lower stage are orthogonal to each other. Yes.

  The halogen lamp HL is a filament-type light source that emits light by making the filament incandescent by energizing the filament disposed inside the glass tube. Inside the glass tube, a gas obtained by introducing a trace amount of a halogen element (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is enclosed. By introducing a halogen element, it is possible to set the filament temperature to a high temperature while suppressing breakage of the filament. Therefore, the halogen lamp HL has a characteristic that it has a longer life than a normal incandescent bulb and can continuously radiate strong light. That is, the halogen lamp HL is a continuous lighting lamp that emits light continuously for at least one second. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.

  Further, a reflector 43 is also provided in the housing 41 of the halogen heating unit 4 below the two-stage halogen lamp HL (FIG. 1). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.

  The control unit 3 controls the various operation mechanisms provided in the heat treatment apparatus 1. The configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 includes a CPU that is a circuit that performs various arithmetic processes, a ROM that is a read-only memory that stores basic programs, a RAM that is a readable and writable memory that stores various information, control software, data, and the like. It has a magnetic disk to store. The processing in the heat treatment apparatus 1 proceeds as the CPU of the control unit 3 executes a predetermined processing program. Further, as shown in FIG. 8, the control unit 3 includes a pulse generator 31 and a waveform setting unit 32. As described above, the waveform setting unit 32 sets the waveform of the pulse signal based on the input content from the input unit 33, and the pulse generator 31 outputs the pulse signal to the gate of the IGBT 96 in accordance therewith.

  In addition to the above configuration, the heat treatment apparatus 1 prevents an excessive temperature rise in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to thermal energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, various cooling structures are provided. For example, the wall of the chamber 6 is provided with a water-cooled tube (not shown). Further, the halogen heating unit 4 and the flash heating unit 5 have an air cooling structure in which a gas flow is formed inside to exhaust heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash heating unit 5 and the upper chamber window 63.

  Next, the heat treatment method according to the present invention will be described. A semiconductor wafer W to be processed in this embodiment is a silicon semiconductor substrate on which a high dielectric constant film is formed as a gate insulating film. The heat treatment apparatus 1 irradiates the semiconductor wafer W with flash light to perform post-deposition annealing (PDA: Post Deposition Annealing) of the high dielectric constant film. The processing procedure of the heat treatment apparatus 1 described below proceeds by the control unit 3 controlling each operation mechanism of the heat treatment apparatus 1.

  First, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the apparatus. At this time, by continuously supplying nitrogen gas into the chamber 6, the nitrogen gas flow is caused to flow out from the transfer opening 66, so that the atmosphere outside the apparatus can be prevented from flowing into the chamber 6 to a minimum. good. The semiconductor wafer W carried in by the carrying robot advances to a position directly above the holding unit 7 and stops. Then, when the pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retracted position to the transfer operation position and rises, the lift pin 12 protrudes from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. The semiconductor wafer W is received. At this time, the lift pins 12 ascend above the upper ends of the substrate support pins 77.

  FIG. 10 is a view schematically showing a state in which the semiconductor wafer W is supported on the lift pins 12 of the transfer mechanism 10. A total of four lift pins 12 of the transfer mechanism 10 protrude from the upper surface of the susceptor 74 through the through holes 79 of the susceptor 74 and support the lower surface of the semiconductor wafer W. The semiconductor wafer W is supported in a horizontal posture by the lift pins 12 of the transfer mechanism 10 at a predetermined distance d from the upper surface of the susceptor 74. The distance d between the lower surface of the semiconductor wafer W and the upper surface of the susceptor 74 is, for example, 5 mm to 10 mm.

  After the semiconductor wafer W is supported by the lift pins 12, the transfer robot leaves the heat treatment space 65 and the transfer opening 66 is closed by the gate valve 185. In addition, after the transfer opening 66 is closed by the gate valve 185 and the heat treatment space 65 is closed, the atmosphere in the chamber 6 is adjusted. Specifically, first, without supplying the gas into the chamber 6 by closing the valve 84, the inside of the chamber 6 is decompressed to below atmospheric pressure by opening the valve 89 and exhausting the atmosphere in the chamber 6. . Thereafter, the valve 84 is opened, and a mixed gas of nitrogen gas and ammonia is supplied into the chamber 6 as a processing gas. Thereby, an ammonia atmosphere is formed in the heat treatment space 65 in the chamber 6. Even after the valve 84 is opened, the exhaust flow rate is larger than the processing gas supply flow rate, so that the inside of the chamber 6 is maintained in a reduced-pressure atmosphere less than atmospheric pressure.

  FIG. 9 is a diagram showing changes in the surface temperature of the semiconductor wafer W. As shown in FIG. After the semiconductor wafer W is supported by the lift pins 12 of the transfer mechanism 10 and the inside of the chamber 6 is replaced with an ammonia atmosphere, the semiconductor wafer W is supported by the lift pins 12 and at the time t1, 40 of the halogen heating units 4 are retained. The halogen lamps HL are turned on all at once, and preheating (first preheating) of the semiconductor wafer W is started. The halogen light emitted from the halogen lamp HL is irradiated from the lower surface of the semiconductor wafer W through the lower chamber window 64 and the susceptor 74 formed of quartz. By receiving light from the halogen lamp HL, the semiconductor wafer W is preheated and the temperature rises. At this time, since the transfer arm 11 and the lift pin 12 of the transfer mechanism 10 are made of quartz, there is no obstacle to light irradiation from the halogen lamp HL.

  When preheating is performed by the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the radiation thermometer 120. That is, the infrared thermometer 120 receives the infrared light emitted from the lower surface of the semiconductor wafer W supported by the lift pins 12 and passed through the opening 78 of the susceptor 74, and measures the temperature of the wafer being heated. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The controller 3 monitors the output of the halogen lamp HL while monitoring whether or not the temperature of the semiconductor wafer W that is heated by light irradiation from the halogen lamp HL has reached a predetermined intermediate temperature (first temperature) T1. Control. The intermediate temperature T1 is 350 ° C. or higher and 500 ° C. or lower, which is higher than the temperature of the susceptor 74. In the first preheating until the temperature of the semiconductor wafer W rises to the intermediate temperature T1, the semiconductor wafer W is supported by the lift pins 12 of the transfer mechanism 10, and the semiconductor wafer W is separated from the susceptor 74 by a distance d. In a state separated from each other (that is, the state shown in FIG. 10) by light irradiation from the halogen lamp HL.

  When the temperature of the semiconductor wafer W reaches the intermediate temperature T1 at time t2, the pair of transfer arms 11 of the transfer mechanism 10 is lowered by the control of the control unit 3, so that the semiconductor wafer W is moved to the transfer mechanism 10. The lift pin 12 passes the susceptor 74. FIG. 11 is a diagram schematically showing a state where the semiconductor wafer W is placed on the susceptor 74. The pair of transfer arms 11 are lowered and the upper ends of the lift pins 12 are lowered to the lower side of the susceptor 74 through the through holes 79, so that the semiconductor wafer W is transferred from the lift pins 12 to the susceptor 74 and on the susceptor 74. Mounted in a horizontal position. Specifically, the semiconductor wafer W is supported in a horizontal posture by a plurality of substrate support pins 77 erected on the holding plate 75 and placed on the susceptor 74. The pair of transfer arms 11 lowered to below the susceptor 74 is retracted to the retracted position by the horizontal movement mechanism 13. As shown in FIG. 9, when the semiconductor wafer W heated to the intermediate temperature T1 by the halogen lamp HL comes into contact with the susceptor 74 having a temperature lower than that at time t2, the temperature of the semiconductor wafer W slightly decreases. .

  Subsequently, preheating (second preheating) by the halogen lamp HL is continuously performed on the semiconductor wafer W placed on the susceptor 74. The halogen light emitted from the halogen lamp HL is irradiated from the lower surface of the semiconductor wafer W through the lower chamber window 64 and the susceptor 74 formed of quartz. The temperature of the semiconductor wafer W is further increased by light irradiation from the halogen lamp HL. Even when the second preheating is performed, the radiation thermometer 120 receives infrared light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78, and the temperature of the wafer being heated is increased. Measure. The control unit 3 feedback-controls the output of the halogen lamp HL so that the temperature of the semiconductor wafer W becomes a predetermined preheating temperature (second temperature) T2 based on the measurement value by the radiation thermometer 120. The preheating temperature T2 is higher than the intermediate temperature T1. In the second preheating until the temperature of the semiconductor wafer W rises from the intermediate temperature T1 to the preheating temperature T2, the halogen lamp is placed in a state where the semiconductor wafer W is placed on the susceptor 74 (that is, the state of FIG. 11). Heated by light irradiation from HL.

  After the temperature of the semiconductor wafer W reaches the preheating temperature T2 at time t3, the control unit 3 maintains the semiconductor wafer W at the preheating temperature T2 for a while. Specifically, when the temperature of the semiconductor wafer W measured by the radiation thermometer 120 reaches the preheating temperature T2, the control unit 3 adjusts the output of the halogen lamp HL, so that the temperature of the semiconductor wafer W is almost preliminarily set. The heating temperature is maintained at T2.

  By performing the preliminary heating with such a halogen lamp HL, the entire semiconductor wafer W is uniformly heated to the preliminary heating temperature T2. In the preliminary heating stage with the halogen lamp HL, the temperature of the peripheral edge of the semiconductor wafer W where heat dissipation is more likely to occur tends to be lower than that in the central area, but the arrangement density of the halogen lamps HL in the halogen heating section 4 is The region facing the peripheral portion is higher than the region facing the central portion of the semiconductor wafer W. For this reason, the light quantity irradiated to the peripheral part of the semiconductor wafer W which tends to generate heat increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform.

  Flash light irradiation is performed on the surface of the semiconductor wafer W from the flash lamp FL of the flash heating unit 5 at a time t4 when a predetermined time has elapsed after the temperature of the semiconductor wafer W reaches the preheating temperature T2. At this time, a part of the flash light emitted from the flash lamp FL goes directly into the chamber 6, and the other part is once reflected by the reflector 52 and then goes into the chamber 6. Flash heating of the semiconductor wafer W is performed by irradiation.

  When the flash lamp FL irradiates flash light, the electric power is accumulated in the capacitor 93 by the power supply unit 95 in advance. Then, in a state where charges are accumulated in the capacitor 93, a pulse signal is output from the pulse generator 31 of the control unit 3 to the IGBT 96 to drive the IGBT 96 on and off.

  The waveform of the pulse signal can be defined by inputting from the input unit 33 a recipe in which the pulse width time (on time) and the pulse interval time (off time) are sequentially set as parameters. When the operator inputs such a recipe from the input unit 33 to the control unit 3, the waveform setting unit 32 of the control unit 3 sets a pulse waveform that repeats ON / OFF accordingly. Then, the pulse generator 31 outputs a pulse signal according to the pulse waveform set by the waveform setting unit 32. As a result, a pulse signal having a set waveform is applied to the gate of the IGBT 96, and the on / off driving of the IGBT 96 is controlled. Specifically, the IGBT 96 is turned on when the pulse signal input to the gate of the IGBT 96 is on, and the IGBT 96 is turned off when the pulse signal is off.

  Further, in synchronization with the timing when the pulse signal output from the pulse generator 31 is turned on, the control unit 3 controls the trigger circuit 97 to apply a high voltage (trigger voltage) to the trigger electrode 91. A pulse signal is input to the gate of the IGBT 96 in a state where electric charges are accumulated in the capacitor 93 and a high voltage is applied to the trigger electrode 91 in synchronization with the timing when the pulse signal is turned on. When is turned on, a current always flows between both end electrodes in the glass tube 92, and light is emitted by the excitation of atoms or molecules of xenon at that time.

  In this way, the 30 flash lamps FL of the flash heating unit 5 emit light, and the flash light is irradiated onto the surface of the semiconductor wafer W placed on the susceptor 74. Here, when the flash lamp FL is caused to emit light without using the IGBT 96, the electric charge accumulated in the capacitor 93 is consumed by one light emission, and the output waveform from the flash lamp FL has a width of 0.1. It becomes a simple single pulse of about milliseconds to 10 milliseconds. On the other hand, in this embodiment, the IGBT 96 as a switching element is connected in the circuit and a pulse signal is output to the gate thereof, whereby the supply of charge from the capacitor 93 to the flash lamp FL is interrupted by the IGBT 96. On / off control of the current flowing through the flash lamp FL is performed. As a result, the light emission of the flash lamp FL is chopper-controlled, and the electric charge accumulated in the capacitor 93 is divided and consumed, and the flash lamp FL repeats blinking in a very short time. Since the next pulse is applied to the gate of the IGBT 96 and the current value increases again before the current value flowing through the circuit becomes completely “0”, the light emission output is generated even while the flash lamp FL is repeatedly blinking. It is not completely “0”.

  By controlling on / off of the current flowing through the flash lamp FL by the IGBT 96, the light emission pattern (light emission output time waveform) of the flash lamp FL can be freely defined, and the light emission time and light emission intensity can be freely adjusted. . The on / off drive pattern of the IGBT 96 is defined by the pulse width time and the pulse interval time input from the input unit 33. In other words, by incorporating the IGBT 96 in the drive circuit of the flash lamp FL, the light emission pattern of the flash lamp FL can be freely defined simply by appropriately setting the time of the pulse width and the time of the pulse interval input from the input unit 33. It can be done.

  Specifically, for example, when the ratio of the pulse width time to the pulse interval time input from the input unit 33 is increased, the current flowing through the flash lamp FL increases and the light emission intensity increases. Conversely, if the ratio of the pulse width time to the pulse interval time input from the input unit 33 is reduced, the current flowing through the flash lamp FL decreases and the emission intensity becomes weak. Further, if the ratio of the pulse interval time and the pulse width time input from the input unit 33 is appropriately adjusted, the light emission intensity of the flash lamp FL is kept constant. Further, by increasing the total time of the combination of the pulse width time and the pulse interval time input from the input unit 33, the current continues to flow through the flash lamp FL for a relatively long time, and the flash lamp FL emits light. The time will be longer. In the present embodiment, the light emission time of the flash lamp FL is set between 0.1 milliseconds and 100 milliseconds.

  In this way, the flash light is irradiated from the flash lamp FL to the surface of the semiconductor wafer W in an irradiation time of 0.1 milliseconds to 100 milliseconds, and the semiconductor wafer W is flash-heated. The surface of the semiconductor wafer W including the high dielectric constant film is instantaneously heated to the processing temperature T3 by being irradiated with an extremely short flash light having an irradiation time of 0.1 milliseconds to 100 milliseconds, A heat treatment is performed after the dielectric film is formed. The flash heating process is also performed with the semiconductor wafer W placed on the susceptor 74. The processing temperature T3 is higher than the preheating temperature T2.

  After the end of the flash heat treatment, the halogen lamp HL is turned off after a predetermined time has elapsed. Thereby, the temperature of the semiconductor wafer W is rapidly lowered from the preheating temperature T1. The temperature of the semiconductor wafer W during the temperature drop is measured by the radiation thermometer 120, and the measurement result is transmitted to the control unit 3. The controller 3 monitors whether or not the temperature of the semiconductor wafer W has dropped to a predetermined temperature from the measurement result of the radiation thermometer 120. Then, after the temperature of the semiconductor wafer W is lowered to a predetermined temperature or lower, the pair of transfer arms 11 of the transfer mechanism 10 is again moved horizontally from the retracted position to the transfer operation position and lifted, whereby the lift pins 12 are moved to the susceptor. The semiconductor wafer W protruding from the upper surface of 74 and subjected to the heat treatment is received from the susceptor 74. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the lift pins 12 is unloaded by the transfer robot outside the apparatus, and the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1 is performed. Is completed.

  By the way, in a semiconductor device manufacturing process, processing is often performed in units of lots composed of a plurality of (for example, 25) semiconductor wafers W that are processed under the same processing conditions and processing procedures. The heat treatment apparatus 1 also performs heat treatment in units of lots. At the stage where the first semiconductor wafer W of the next lot is processed a short time after the processing of the previous lot is completed, the temperature of the structure in the chamber 6 including the susceptor 74 is near room temperature. Therefore, even if the first semiconductor wafer W of the lot is loaded into the chamber 6 and immediately placed on the susceptor 74, there is almost no temperature difference between the semiconductor wafer W and the susceptor 74, and thus wafer warping may occur. Absent.

  However, by performing preliminary heating and flash heating of the first semiconductor wafer W, the temperature of the susceptor 74 also increases from the semiconductor wafer W due to heat conduction. For this reason, with respect to the second and subsequent semiconductor wafers W of the lot, the susceptor 74 is hotter than the normal temperature semiconductor wafer W when it is loaded into the chamber 6. In particular, in the case of the decompression-compatible chamber 6 as in this embodiment, the upper chamber window 63 and the lower chamber window 64 are thicker than those corresponding to normal pressure, and the heat capacity of the entire chamber 6 is increased. doing. For this reason, the temperature lowering rate of the structure of the chamber 6 including the susceptor 74 is slow, and a new normal temperature semiconductor wafer W remains in the chamber while the temperature of the susceptor 74 is hardly lowered after the heat treatment of the preceding semiconductor wafer W is completed. 6 will be carried in. As described above, when a new normal-temperature semiconductor wafer W is placed directly on the high-temperature susceptor 74, the temperature difference between the semiconductor wafer W and the susceptor 74 is large, so the semiconductor wafer W is placed on the susceptor 74. There was a case where the wafer was warped only by this.

  Therefore, in the present embodiment, the semiconductor wafer W carried into the chamber 6 is irradiated with light from the halogen lamp HL in a state where the semiconductor wafer W is separated from the susceptor 74 by the lift pin 12 of the transfer mechanism 10 at a distance d. The temperature of the wafer W is heated to an intermediate temperature T1 higher than that of the susceptor 74 (first preheating). Then, when the semiconductor wafer W is heated to the intermediate temperature T1, the lift pins 12 are lowered and the semiconductor wafer W is transferred from the lift pins 12 to the susceptor 74 and placed on the susceptor 74. In this state, from the halogen lamp HL. The temperature of the semiconductor wafer W is heated to the preheating temperature T2 by continuing the light irradiation (second preheating). Thereafter, flash light is irradiated from the flash lamp FL onto the surface of the semiconductor wafer W heated to the preheating temperature T2.

  Since the normal temperature semiconductor wafer W carried into the chamber 6 is heated to the intermediate temperature T1 while being separated from the susceptor 74 without directly contacting the high temperature susceptor 74, this first preheating stage. This prevents the wafer warpage from occurring. The semiconductor wafer W heated to the intermediate temperature T1 is placed on the susceptor 74 and heated to the preheating temperature T2, and the semiconductor wafer W heated to the intermediate temperature T1 and the susceptor 74 are heated. The temperature difference is small, and even if the semiconductor wafer W is placed on and brought into contact with the susceptor 74, the occurrence of wafer warpage is suppressed. That is, the wafer warpage at the stage of the second preheating is also prevented.

  As a result, the wafer warpage of the semiconductor wafer W is prevented in all steps of the preheating by the halogen lamp HL including the first preheating and the second preheating, and the decrease in the in-plane temperature distribution of the semiconductor wafer W is suppressed. be able to. Further, by preventing wafer warpage of the semiconductor wafer W during preheating, it is possible to prevent wafer cracking during flash heating by the flash lamp FL.

  Further, since the normal temperature semiconductor wafer W is separated from the susceptor 74 and first preheated to the intermediate temperature T1 and then placed on the susceptor 74 and the second preheating is continued, the susceptor 74 is sufficient. As compared with the case where the preheating of the semiconductor wafer W is waited until the temperature is lowered, the process time can be shortened by about 40 seconds, and a decrease in throughput can be suppressed. That is, according to the above embodiment, the warp of the semiconductor wafer W can be suppressed without reducing the throughput.

  Here, when the first preheating is performed over 500 ° C. while the semiconductor wafer W is separated from the susceptor 74 by the lift pins 12 (that is, when the intermediate temperature T1 is higher than 500 ° C.), the surface of the semiconductor wafer W Internal temperature distribution gets worse. That is, the entire preheating process using the halogen lamp HL cannot be performed in a state where the semiconductor wafer W is separated from the susceptor 74, and the temperature of the semiconductor wafer W is set to the intermediate temperature T1 in order to make the in-plane temperature distribution uniform. The second preheating with the semiconductor wafer W placed on the susceptor 74 after reaching has been required. In order to prevent the in-plane temperature distribution of the semiconductor wafer W from deteriorating, the intermediate temperature T1 is limited to 500 ° C. or lower.

  On the other hand, if the intermediate temperature T1 is lower than 350 ° C., the temperature difference between the semiconductor wafer W and the susceptor 74 when the semiconductor wafer W is placed on the susceptor 74 becomes large, and there is a possibility that the wafer warps. Therefore, the intermediate temperature T1 is limited to 350 ° C. or higher.

  While the embodiments of the present invention have been described above, the present invention can be modified in various ways other than those described above without departing from the spirit of the present invention. For example, in each of the above-described embodiments, the upper chamber window 63 and the lower chamber window 64 have the thick decompression-compatible chamber 6. However, the present invention is not limited thereto, and the chamber 6 may be capable of normal pressure. . Even if the chamber 6 supports normal pressure, the semiconductor wafer W is heated to the intermediate temperature T1 while being separated from the susceptor 74, and then placed on the susceptor 74, thereby reliably preventing wafer warpage. Can do. However, if the chamber 6 is capable of reducing pressure and has a large heat capacity, the temperature drop rate of the susceptor 74 is slow, so that the temperature difference between the semiconductor wafer W and the susceptor 74 at room temperature tends to increase, and the present invention can be applied more suitably.

  Further, the intermediate temperature T1 is not limited to a higher temperature than the susceptor 74, and may be a lower temperature than the susceptor 74. In short, if the temperature difference between the semiconductor wafer W and the susceptor 74 is small when the semiconductor wafer W heated to the intermediate temperature T1 is placed on the susceptor 74, the wafer warpage can be prevented.

  Further, in the above embodiment, the first preheating is performed with the distance d between the semiconductor wafer W and the susceptor 74 when the lift pins 12 receive the semiconductor wafer W being separated. Alternatively, the distance d may be changed by raising and lowering the lift pins 12 slightly.

  In the above embodiment, the flash heating unit 5 is provided with 30 flash lamps FL. However, the present invention is not limited to this, and the number of flash lamps FL can be any number. . The flash lamp FL is not limited to a xenon flash lamp, and may be a krypton flash lamp. Further, the number of halogen lamps HL provided in the halogen heating unit 4 is not limited to 40, and may be an arbitrary number.

  In the above embodiment, the semiconductor wafer W on which the high dielectric constant film is formed is flash-heated to perform the post-deposition heat treatment, but the present invention is not limited to this. Alternatively, dopant activation and silicide formation may be performed by flash heating.

DESCRIPTION OF SYMBOLS 1 Heat processing apparatus 3 Control part 4 Halogen heating part 5 Flash heating part 6 Chamber 7 Holding part 10 Transfer mechanism 11 Transfer arm 12 Lift pin 65 Heat processing space 74 Susceptor 75 Holding plate 77 Substrate support pin 93 Capacitor 95 Power supply unit 96 IGBT
120 Radiation thermometer FL Flash lamp HL Halogen lamp W Semiconductor wafer

Claims (5)

A heat treatment method for heating a substrate by irradiating the substrate with flash light,
A loading step of loading the substrate into the chamber;
A first preheating step of heating the substrate to a first temperature by irradiating light from a halogen lamp in a state where the loaded substrate is separated from a susceptor installed in the chamber;
The substrate heated to the first temperature is irradiated with light from the halogen lamp with the substrate placed on the susceptor to heat the substrate to a second temperature higher than the first temperature. Two preheating steps;
A flash heating step of irradiating flash light from a flash lamp onto the surface of the substrate that has been heated to the second temperature;
A heat treatment method comprising: The heat treatment method according to claim 1,
When the lift pin that has received the substrate in the carry-in step performs the first preheating step with the substrate supported, and when the first preheating step shifts to the second preheating step, A heat treatment method, wherein the substrate is passed from a lift pin to the susceptor. In the heat processing method of Claim 1 or Claim 2,
The heat treatment method, wherein the first temperature is higher than the temperature of the susceptor. In the heat processing method of Claim 3,
The heat treatment method, wherein the first temperature is 350 ° C. or higher and 500 ° C. or lower. In the heat treatment method according to any one of claims 1 to 4,
A heat treatment method, wherein the chamber is depressurized to less than atmospheric pressure after the carrying-in step.

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