JP5925848B2 - Indium phosphide substrate and semiconductor epitaxial wafer - Google Patents

Description

  The present invention relates to an indium phosphide substrate and a semiconductor epitaxial wafer used for manufacturing a semiconductor device such as a high electron mobility transistor (HEMT), particularly when a III-V compound semiconductor is used as the substrate. It relates to a suitable technique.

Conventionally, a HEMT structure is known in which an InAlAs buffer layer, an InGaAs channel layer, an InAlAs spacer layer, and an InP electron supply layer are epitaxially grown on a III-V group compound semiconductor substrate such as an InP substrate. In the present specification, a semiconductor epitaxial wafer obtained by epitaxially growing a semiconductor thin film on a semiconductor substrate is referred to as a semiconductor epitaxial wafer. In addition, an epitaxially grown semiconductor thin film may be referred to as an epitaxial film.
When producing a semiconductor epitaxial wafer having such a HEMT structure, generally, an InP substrate having a mirror finish is subjected to an etching treatment with an etching solution such as sulfuric acid / hydrogen peroxide solution, and silicon (Si ) And the like are removed. Then, an epitaxial film is formed on the InP substrate after the etching process by molecular beam epitaxy (MBE) or metal organic chemical vapor deposition (MOCVD).
In addition, a technique for improving the gate breakdown voltage of a semiconductor device by providing a carbon (C) atom accumulation layer at the interface between the semiconductor substrate and the epitaxial film has been proposed (for example, Patent Document 1).

JP 2000-182960 A

However, as described above, even if the InP substrate is etched to remove impurities on the surface of the substrate, the leakage current is effectively reduced if impurities adhere to the substrate when the substrate is transferred to the epitaxial growth apparatus. It will be difficult.
Further, Patent Document 1 defines the accumulation amount of impurities other than C and C in the carbon atom accumulation layer, but does not clarify the relative relationship between C and Si.

  An object of the present invention is to provide an epitaxial growth substrate and an epitaxial wafer suitable for manufacturing a semiconductor device such as HEMT.

The invention according to claim 1 is an indium phosphide substrate for epitaxially growing a semiconductor thin film, which is made in order to achieve the above object, and a silicon sheet concentration present on the surface of the indium phosphide substrate. D _s is 1.7 × 10 ¹² cm ⁻² or more and 2.3 × 10 ¹² cm ⁻² or less, and the ratio D _{c of} the carbon sheet concentration D _c existing on the surface and the silicon sheet concentration D _s / _{D s} is characterized in that 25 or more.

The invention according to claim 2 is a semiconductor epitaxial wafer obtained by epitaxially growing a semiconductor thin film on an indium phosphide substrate, wherein the silicon sheet concentration D _s existing at the interface between the indium phosphide substrate and the semiconductor thin film is 1.7 × ¹⁰ 12 ^{cm -2} or more 2.3 × ¹⁰ 12 ^{cm -2} or less, the ratio _D c / _{D s} of the sheet density _{D s} of the silicon sheet density _{D c} of carbon present in the interface Is 25 or more.

  According to the present invention, Si present at the interface between the substrate and the semiconductor thin film (epitaxial film) in the semiconductor epitaxial wafer is effectively inactivated, so that device characteristics can be improved by using this semiconductor epitaxial wafer. Can do. Specifically, in the HEMT using this semiconductor epitaxial wafer, the leakage current is remarkably reduced.

It is a figure which shows the HEMT structure of the semiconductor epitaxial wafer which concerns on embodiment. It is a figure which shows the simple device structure used for the measurement of leak current.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a diagram illustrating an example of a HEMT structure according to the embodiment. As shown in FIG. 1, a semiconductor epitaxial wafer 1 includes an InP substrate 11, an InAlAs layer (buffer layer) 12, an InGaAs layer (channel layer) 13, an InAlAs layer (spacer layer) 14, and an InP layer (electron supply layer) 15. Has an InP-based HEMT structure obtained by epitaxially growing the layers.
In the semiconductor epitaxial wafer 1, if the sheet concentrations by SIMS of C and Si at the interface between the InP substrate 11 and the InAlAs layer 12 are D _c and D _s , respectively, the D _c / D _s ratio is 20 or more. Further, the Si sheet concentration D _{s at} the interface between the InP substrate 11 and the InAlAs layer 12 is 2.3 × 10 ¹² cm ⁻² or less.

This semiconductor epitaxial wafer 1 is manufactured by the following steps. That is, Si is removed from the surface of the mirror-polished InP substrate 11 and C is intentionally attached to the surface of the InP substrate 11 to obtain an epitaxial growth substrate. Then, the InAlAs layer 12, the InGaAs layer 13, the InAlAs layer 14, and the InP layer 15 are sequentially epitaxially grown on the InP substrate (epitaxial growth substrate) 11, whereby the semiconductor epitaxial wafer 1 is manufactured.
At this time, by maintaining the InP substrate 11 after Si removal in the atmosphere at 100 to 120 ° C. for 1 hour or longer, the C of the extent that the D _c / D _s ratio after epitaxial growth becomes 20 or more is changed to It can be easily attached to the surface.

[Example]
In the example, the mirror-finished InP substrate 11 was washed with a chemical solution such as hydrogen fluoride (HF) or phosphoric acid / hydrogen peroxide solution to remove Si on the surface. The InP substrate 11 after the removal of Si is housed one by one in a polypropylene single-wafer storage type sealed container and allowed to pass for 3 days at 100 ° C., and the InP substrate 11 is placed in a volatile gas atmosphere from the polypropylene container. As a result, a desired concentration of C was deposited on the surface.
An InAlAs layer 12 having a thickness of 400 nm was epitaxially grown on the InP substrate 11 by MBE. Similarly, an InGaAs layer 13 having a thickness of 15 nm, an InAlAs layer 14 having a thickness of 8.5 nm, and an InP layer 15 having a thickness of 5 nm were sequentially epitaxially grown by the MBE method, thereby producing the semiconductor epitaxial wafer 1 according to the example.

[Comparative example]
In the comparative example, the mirror-finished InP substrate was etched with sulfuric acid / hydrogen peroxide solution, which is a conventional general processing method. A semiconductor thin film having a HEMT structure was epitaxially grown on the InP substrate after the etching process in the same manner as in the example, and a semiconductor epitaxial wafer according to a comparative example was manufactured.

  About the semiconductor epitaxial wafer which concerns on the Example and comparative example which were mentioned above, the sheet | seat density | concentration of C and Si which exists in the interface of an InP board | substrate and an epitaxial film was measured by SIMS. Moreover, the simple HEMT device structure shown in FIG. 2 was produced using the semiconductor epitaxial wafer which concerns on an Example and a comparative example, and the leak current when a voltage of 10V was applied was measured. In addition, about the semiconductor epitaxial wafer which concerns on an Example, three samples were prepared and measured.

The measurement results are shown in Table 1. As shown in Table 1, in the semiconductor epitaxial wafer of the example, the _C / _Si sheet concentration ratio D _C / D _Si is 20 or more and the Si sheet concentration is 2.3 × 10 ¹² cm ⁻² or less. It was. Further, the leakage current was 10 nA or less.
In contrast, in the semiconductor epitaxial wafer of the comparative example, the _C / _Si sheet concentration ratio D _C / D _Si was smaller than 20, and the Si sheet concentration was larger than 2.3 × 10 ¹² cm ⁻² . . Moreover, the leak current was 60 nA.
Thereby, it was confirmed that the leakage current in the HEMT structure can be effectively reduced in the semiconductor epitaxial wafer of the example.

  Thus, according to the InP substrate (epitaxial growth substrate) 11 and the semiconductor epitaxial wafer 1 according to the present embodiment, Si, which is an n-type impurity at the interface between the InP substrate and the epitaxial film, is reduced and C is intentionally added. Since it is adhered, Si is effectively inactivated. As a result, in the HEMT using this semiconductor epitaxial wafer 1, the leakage current is remarkably reduced and the device characteristics are improved.

As mentioned above, although the invention made by this inventor was concretely demonstrated based on embodiment, this invention is not limited to the said embodiment, It can change in the range which does not deviate from the summary.
For example, in the above embodiment, a semiconductor epitaxial wafer having a HEMT structure using an InP substrate has been described. However, the present invention is applicable to the case where another III-V group compound semiconductor such as GaAs or GaN is used as a substrate. .

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

Claims (2)

An indium phosphide substrate for epitaxially growing a semiconductor thin film,
The sheet concentration D _{s of} silicon present on the surface of the indium phosphide substrate is 1.7 × 10 ¹² cm ⁻² or more and 2.3 × 10 ¹² cm ⁻² or less,
The indium phosphide substrate, wherein a ratio D _c / D _s of a sheet concentration D _{c of} carbon existing on the surface and a sheet concentration D _{s of} silicon is 25 or more. A semiconductor epitaxial wafer obtained by epitaxially growing a semiconductor thin film on an indium phosphide substrate,
The silicon sheet concentration D _s present at the interface between the indium phosphide substrate and the semiconductor thin film is 1.7 × 10 ¹² cm ⁻² or more and 2.3 × 10 ¹² cm ⁻² or less,
A semiconductor epitaxial wafer, wherein a ratio D _c / D _s of a sheet concentration D _{c of} carbon existing at the interface and a sheet concentration D _{s of} silicon is 25 or more.

Images