JP5921219B2 - 半導体素子の製造方法 - Google Patents
半導体素子の製造方法 Download PDFInfo
- Publication number
- JP5921219B2 JP5921219B2 JP2012016007A JP2012016007A JP5921219B2 JP 5921219 B2 JP5921219 B2 JP 5921219B2 JP 2012016007 A JP2012016007 A JP 2012016007A JP 2012016007 A JP2012016007 A JP 2012016007A JP 5921219 B2 JP5921219 B2 JP 5921219B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- rewiring
- substrate
- heat dissipation
- high heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
9…スタッドバンプ、 10…高放熱材料、
10a…金属薄板、 10b…塗料、
11…半導体用接着剤、 13…再配線用基板、
14a…配線、 14b…電極、
15…有機基板、 16…ACF(異方性導電フィルム)。
Claims (1)
- 複数のICチップを高放熱基材の所定の位置へボンディングする工程と、
再配線のための配線及び電極が形成され、個片化された再配線用基板を、ICチップ上に搭載する工程と、
上記再配線用基板を搭載した複数のICチップに対し樹脂封止する工程と、
個々の半導体素子に個片化する工程と、を有する半導体素子の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012016007A JP5921219B2 (ja) | 2012-01-28 | 2012-01-28 | 半導体素子の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012016007A JP5921219B2 (ja) | 2012-01-28 | 2012-01-28 | 半導体素子の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013157410A JP2013157410A (ja) | 2013-08-15 |
JP5921219B2 true JP5921219B2 (ja) | 2016-05-24 |
Family
ID=49052323
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012016007A Active JP5921219B2 (ja) | 2012-01-28 | 2012-01-28 | 半導体素子の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5921219B2 (ja) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001358172A (ja) * | 2000-06-15 | 2001-12-26 | Seiko Epson Corp | 半導体パッケージ |
JP3745705B2 (ja) * | 2002-06-03 | 2006-02-15 | 富士通株式会社 | 半導体装置及びその製造方法 |
TWI324378B (en) * | 2005-10-21 | 2010-05-01 | Freescale Semiconductor Inc | Method of making semiconductor package with reduced moisture sensitivity |
-
2012
- 2012-01-28 JP JP2012016007A patent/JP5921219B2/ja active Active
Also Published As
Publication number | Publication date |
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JP2013157410A (ja) | 2013-08-15 |
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