JP5910055B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device, and more particularly to a technique for rectifying an AC voltage to obtain a DC voltage once and then converting it to another AC voltage.

  The technology can be applied to, for example, a power conversion device that drives an AC rotating machine to accelerate and decelerate. This is suitable when the capacitor for holding the DC voltage is small and the DC voltage pulsates depending on the power supply frequency.

  2. Description of the Related Art Conventionally, a technique is known in which input AC power is rectified to obtain DC power once, and then AC power having a variable voltage and variable frequency is obtained by switching and then output. The output AC power is used for variable speed control of an AC rotating machine, for example.

  An example of a power conversion device employed in such a technology is a rectifier circuit that converts a three-phase AC voltage supplied from a commercial power source into a DC voltage by full-wave rectification, and a three-phase circuit that switches the DC voltage. It is comprised with the power converter which converts into an alternating voltage and supplies it to the three-phase alternating current rotary machine which is a load. A power converter controls each switching element which comprises a power converter, and outputs the three-phase alternating current voltage of the designated frequency to an alternating current rotary machine.

  In this power converter, a capacitor that holds the DC voltage output from the rectifier circuit is employed. In order to improve the drive performance of the AC rotating machine, a large capacitance is required to sufficiently smooth the DC voltage in the capacitor. This is to increase the ripple current resistance.

  An electrolytic capacitor is used as a capacitor having a large capacitance. However, electrolytic capacitors are larger in size and more expensive than other types of capacitors. Thus, there are problems that the power conversion device becomes large and the manufacturing cost increases.

  As an example of measures against such a problem, an electrolytic capacitor-less inverter device has been developed (for example, Patent Document 1 and Non-Patent Document 1 listed below). For example, in the electrolytic capacitor-less inverter device of Patent Document 1, a three-phase AC voltage is used as a power source, and a small-capacity film capacitor is used as a capacitor.

  When the capacitance of the capacitor is small, the DC voltage supplied to the main circuit of the inverter includes pulsation. When a DC voltage is switched by an inverter based on the average value without considering this pulsation, for example, an AC voltage including pulsation is applied to the AC rotating machine. Driving with an AC voltage including pulsation causes the AC rotating machine to output a pulsating torque, and a current flowing through the AC rotating machine pulsates.

  In response to such a problem, a technique has been proposed in which a timing signal for pulse width modulation to be given to a switching element constituting an inverter (power converter) is corrected based on the value of a DC voltage including pulsation ( For example, Patent Document 2). By such correction, a three-phase AC voltage having a constant amplitude that does not affect the AC rotating machine is output.

JP 2009-17673 A Japanese Examined Patent Publication No. 61-048356

Isao Takahashi, Yoichi Ito, “Control Method of Capacitorless Inverter”, National Conference of the Institute of Electrical Engineers of Japan in 1988, No. 527, pp624-626

  In order to use a pulsating DC voltage for pulse width modulation, it is necessary to accurately sample the pulsating component. In general, a DC voltage is sampled at the top and / or bottom of a carrier used for pulse width modulation, so that the carrier frequency is increased to accurately sample the pulsating component of the DC voltage.

  Also, it is desirable to increase the carrier frequency in order to keep the control response high because the stability of the system is secured against the pulsation of the DC voltage. Therefore, in the configuration shown in Patent Document 2, there is a problem that the carrier frequency must be set high. However, in Patent Document 2, there is no clear examination on the pulsation component of the DC voltage and the sampling frequency.

  As described above, in the electrolytic capacitorless inverter device, the problems of DC voltage pulsation, improvement of DC voltage sampling accuracy for correcting the pulsation, and increase of carrier frequency for improvement of the accuracy are linked. The problems of increasing the loss of the power conversion device due to the rise of the temperature and increasing the size of the cooling device for reducing the loss occur in a chain.

  Accordingly, an object of the present invention is to provide a technology that contributes to suppressing the switching loss depending on the carrier frequency and further reducing the size of the power conversion device while ensuring the followability of the control with respect to the pulsation of the DC voltage. .

  A power converter according to the present invention includes a rectifier circuit (5) that rectifies a single-phase or multi-phase AC voltage and outputs a DC voltage (Vdc), a capacitor (3) that receives the DC voltage at both ends, A power converter (2) that converts a DC voltage into another AC voltage by switching, and a controller (4, 14, 4A, 14A) that controls the power converter based on the DC voltage are provided.

In the first aspect, the control unit generates the signal (G) for controlling the switching based on the switching carrier (C0) and the command value (V *) of the other AC voltage, and A modulation signal generation unit (13, 13A) to be supplied to the power converter and a voltage pulsation detection unit (8) for detecting the pulsation components (Vrp, Vrp1) of the DC voltage are included. The main carrier (C1) when the pulsation component is under Shu閾Ne以, the ripple component has a lower frequency (Fc2, Fc3) than the frequency (Fc1) of said main carrier when the larger main threshold At least one subcarrier (C2, C3) is employed as the switching carrier.

Preferably, the control unit (4, 14) generates frequency (Fc1, Fc1) of the main carrier (C1) and frequency (Fc2, Fc3) of the subcarriers (C2, C3). and 10, 15), the pulsation component (Vrp, Vrp1) is the main frequency of the main carrier in the case of under threshold Ne以, the frequency of the pulsation component is the sub-carrier if the larger main threshold (Fc2 , Fc3) is further provided with switching means (11, 16) for outputting the frequency (Fc0) of the switching carrier (C0). The modulation signal generator (13) employs the switching carrier (C0) having the frequency output from the switching means to generate the signal (G).

Alternatively, preferably, the control unit (4A, 14A) includes carrier generation means (9A, 10A, 15A) for generating the main carrier (C1) and the subcarriers (C2, C3), and the pulsation components (Vrp, Vrp1). ) is the main the main carrier in the case of under threshold Ne以, switching means and the pulsating component to output the sub-carrier, as each of the switching carrier (C0) when the larger main threshold (11, 16) It has further. Then, the modulation signal generator (13A) employs the switching carrier (C0) output from the switching means to generate the signal (G).

  A second mode of the power conversion device according to the present invention is the first mode, wherein the voltage pulsation detector (8) samples and discretizes the DC voltage (Vdc) by the main carrier. A discrete DC voltage (Vdc1) having a value is obtained, a low-pass filtering process is performed on the discrete DC voltage to obtain an average value (Vav1) of the discrete DC voltage, and the discretization The pulsating component (Vrp1) is detected by subtracting the average value from the DC voltage (Vdc1).

  A third aspect of the power conversion device according to the present invention is the first aspect or the second aspect thereof, wherein the modulation signal generation unit (13) is configured to supply the DC voltage ( The signal (G) is generated based also on a value (Vdc0) obtained by sampling Vdc).

  A fourth aspect of the power conversion device according to the present invention is any one of the first to third aspects, wherein the pulsation component is at a timing when the switching carrier (C0) takes a vicinity of a maximum value. And the main carrier and the subcarrier are switched based on a comparison result between the main carrier and the main threshold. The maximum value of the main carrier (C1) is equal to the maximum value of all the subcarriers (C2, C3), and the minimum value of the main carrier is equal to the minimum value of all the subcarriers. The frequencies (Fc2, Fc3) of all the subcarriers are an integral fraction of the frequency (Fc1) of the main carrier (the integer is 2 or more). At the timing when the lowest frequency (C2) of all the subcarriers takes the maximum value, all of the other subcarriers (C3) and the main carrier synchronize with the maximum value.

  A fifth aspect of the power conversion device according to the present invention is any one of the first to third aspects, wherein the pulsating component is at a timing when the switching carrier (C0) takes a vicinity of a minimum value. The main carrier and the subcarrier are switched based on the comparison result between the main carrier and the main threshold. The maximum value of the main carrier (C1) is equal to the maximum value of all the subcarriers (C2, C3), and the minimum value of the main carrier is equal to the minimum value of all the subcarriers. The frequencies (Fc2, Fc3) of all the subcarriers are an integral fraction of the frequency (Fc1) of the main carrier (the integer is 2 or more). At the timing when the lowest frequency (C2) of all the subcarriers takes the minimum value, all the other subcarriers (C3) and the main carrier take the minimum value and synchronize.

  A sixth aspect of the power conversion device according to the present invention is any one of the first to fifth aspects, wherein the frequency (Fc2, Fc3) of the subcarrier (C2, C3) is the main frequency. It is an odd number of the frequency (Fc1) of the carrier (C1) (the odd number is 3 or more).

A seventh aspect of the power conversion device according to the present invention is any one of the first to sixth aspects, wherein the subcarriers (C2, C3) are plural, and the pulsating component is the main component. first wherein when under a small Fuku閾Ne以 Ri by threshold values sub carrier (C3), a second of said sub-carrier if the pulsation component is greater than said secondary threshold value below said main threshold (C2) These are employed as the switching carriers. The frequency (Fc3) of the first subcarrier is higher than the frequency (Fc3) of the second subcarrier.

  An eighth aspect of the power conversion device according to the present invention is the sixth aspect or the seventh aspect thereof, wherein the frequency (Fc3) of the first subcarrier (C3) is the second subcarrier. It is an integer (the integer is 2 or more) times the frequency (Fc2) of (C2).

  The DC voltage having a rectified waveform changes more as the value is smaller. According to the first aspect of the power conversion device of the present invention, while keeping the control followability of the DC voltage pulsation by reducing the frequency of the switching carrier in the region where the pulsation component of the DC voltage is large, The average value of the frequency of the switching carrier can be lowered. Therefore, switching loss depending on the carrier frequency of the power converter can be reduced. This simplifies the cooling device for the switching element and contributes to downsizing the power conversion device.

  According to the second aspect of the power conversion device of the present invention, the DC voltage is sampled by adopting the main carrier having a frequency higher than that of the subcarrier. Therefore, when the main carrier is employed as the switching carrier, the DC voltage The follow-up of the control with respect to the pulsation is high.

  According to the 3rd aspect of the power converter device concerning this invention, the average value of the frequency of the carrier for switching can be lowered | hung, ensuring the tracking capability of the control with respect to the pulsation of DC voltage.

  According to the fourth aspect of the power conversion device of the present invention, when the main carrier and the subcarrier employed as the switching carrier are switched, it is the time when both take the vicinity of the maximum value. One period between the maximum values is not impaired. Usually, since the command value is maintained in one cycle between the maximum values of the switching carriers, the other AC voltage obtained by switching depends on the command value.

  According to the fifth aspect of the power conversion device of the present invention, when the main carrier and the subcarrier employed as the switching carrier are switched, it is the time when both take the vicinity of the minimum value. One period between the minimum values is not impaired. Usually, since the command value is maintained in one cycle between the minimum values of the switching carriers, the other AC voltage obtained by switching is in accordance with the command value.

  The sixth aspect of the power conversion device according to the present invention can be applied both when the frequency is switched at the timing when the switching carrier takes the maximum value and when the frequency is switched at the timing when the minimum value is taken.

  According to the 7th aspect of the power converter device concerning this invention, the average value of the frequency of a switching carrier can be further lowered | hung by switching a some subcarrier and employ | adopting a switching carrier.

  According to the 8th aspect of the power converter device concerning this invention, also when switching a some subcarrier and employ | adopting the carrier for switching, the other alternating voltage obtained by switching becomes a thing according to command value. .

It is a graph explaining the operation | movement of the 1st Embodiment of this invention. It is a graph which shows a mode that the carrier for switching switches. It is a circuit diagram which illustrates the composition of the power converter concerning a 1st embodiment. 3 is a block diagram illustrating the configuration of voltage pulsation detecting means 8. FIG. 3 is a block diagram illustrating the configuration of switching means 11. FIG. 4 is a graph for explaining the operation of a switching controller 113. It is a graph which shows DC voltage Vdc1 discretized. It is a graph which shows deviation Er1. It is a graph which shows DC voltage Vdc2 discretized. It is a graph which shows deviation Er2. It is a graph which shows discretized DC voltage Vdc3. It is a graph which shows deviation Er3. It is a graph which shows DC voltage Vdc4 discretized. It is a graph which shows deviation Er4. It is a graph which shows DC voltage Vdc0 discretized. It is a graph which shows deviation Er0. It is a graph explaining the operation | movement of the 2nd Embodiment of this invention. It is a circuit diagram which illustrates the composition of the power converter concerning a 2nd embodiment. 3 is a block diagram illustrating a configuration of a switching unit 16. FIG. It is a circuit diagram which illustrates the composition of control part 4A concerning modification of a 1st embodiment. It is a block diagram which illustrates the composition of switching means 11 in modification of a 1st embodiment. It is a circuit diagram which illustrates the composition of control part 14A concerning modification of a 2nd embodiment. It is a block diagram which illustrates the composition of switching means 11 in modification of a 2nd embodiment. It is a graph which illustrates carrier C1, C2, C3. It is a graph which illustrates carrier C1, C2, C3.

First embodiment.
FIG. 1 is a graph for explaining the operation of the first embodiment of the present invention. FIG. 1 illustrates a case where a DC voltage Vdc is obtained by full-wave rectification of a three-phase voltage. The DC voltage Vdc pulsates at 6 times the power supply frequency. Full-wave rectification is realized by a diode bridge, for example.

  The average value Vav is taken by averaging the DC voltage Vdc. The average value Vav is obtained, for example, by performing low-pass filtering and performing filtering using, for example, a low-pass filter.

  By subtracting the average value Vav from the DC voltage Vdc, a pulsating component Vrp of the DC voltage Vdc is obtained.

  The DC voltage Vdc and the average value Vav are shown in FIG. 1 (a), and the pulsation component Vrp is shown in FIG. 1 (b).

  Since the waveform of the DC voltage Vdc is based on a sine wave, the smaller the value, the larger the change. In general, a signal for controlling switching (hereinafter also referred to as “switching control signal”) is determined for each cycle of the switching carrier. Accordingly, by reducing the frequency of the switching carrier in a region where the pulsation component Vrp is large, it is possible to ensure control followability with respect to the pulsation of the DC voltage Vdc.

  Here, as shown in FIG. 1C, the time domain is divided into a period T1 where the pulsation component Vrp is less than 0 (or less than 0) and a period T2 where the pulsation component Vrp is greater than or equal to 0 (or greater than 0). Divide into two.

  In view of how to obtain the pulsation component Vrp, the period T1 is a period in which the DC voltage Vdc is less than the average value Vav (or less than the average value Vav), and the period T2 is the period in which the DC voltage Vdc is greater than or equal to the average value Vav It is also possible to grasp that the period is greater than.

  The waveform of the DC voltage Vdc is slower in the period T2 than in the period T1, and its change is small. Therefore, even if the frequency Fc2 of the switching carrier employed in the period T2 is made smaller than the frequency Fc1 of the switching carrier employed in the period T1, the tracking control followability is not significantly impaired.

  Therefore, by controlling the frequency of the switching carrier as described above, the average value Fcab can be made lower than the frequency Fc1. Thereby, the switching loss depending on the carrier frequency of the power converter can be reduced. This simplifies the cooling device for the switching element and contributes to downsizing the power conversion device.

  The sampling signal necessary for obtaining the average value Vav is sampled in a situation where it is not determined which part of the waveform of the DC voltage Vdc is to be sampled. It must be able to cope with steep fluctuations. Therefore, in order to improve the followability of control with respect to the pulsation of the DC voltage Vdc, it is desirable to employ the frequency Fc1 employed for the switching carrier in the period T1 as the sampling frequency.

  In this case, the average value Vav of the DC voltage Vdc is adopted for dividing the periods T1 and T2. However, in principle, the above advantages can be obtained if the value is between the maximum value and the minimum value of the DC voltage Vdc. It is done. This is because the absolute value of the rate of change of the DC voltage Vdc theoretically decreases as the absolute value of the DC voltage Vdc increases.

  Note that switching carriers of different frequencies are temporally adjacent at the boundaries in the periods T1 and T2, but the maximum values (or the vicinity thereof) of the waveforms of the respective switching carriers are adjacent to each other, or the minimum values (or It is desirable that their neighbors) be adjacent in time.

  By switching the switching carrier in this way, one cycle between the maximum values (or the minimum values) of the respective switching carriers is not impaired. Usually, the command value to be compared with the switching carrier is maintained in one cycle between the maximum values (or the minimum values) of the switching carrier, so that the AC voltage output by switching depends on the command value. It will be.

  Of course, since the command value is set in accordance with the amplitude of the switching carrier, it is desirable that the plurality of switching carriers to be switched have the same maximum value and the same minimum value.

  FIG. 2 is a graph showing how switching carriers are switched. Here, switching from the period T2 to the period T1 is illustrated. Here, switching from the switching carrier C2 having the frequency Fc2 to the switching carrier C1 having the frequency Fc1 is illustrated, and the switching is performed at the time when the respective maximum values coincide.

  If the frequency Fc2 is an integral fraction of the frequency Fc1 (the integer is 2 or more), the switching between the switching carriers C1 and C2 can make the maximum values or the minimum values coincide with each other.

  However, it is not always easy to precisely match the switching timing of the switching carrier with the boundary between the periods T1 and T2. For example, when the DC voltage Vdc is sampled at the frequency Fc1 as described above, the boundary between the two, especially when the period T2 is shifted to the period T1, does not always coincide with the minimum value or the maximum value of the switching carrier C2. Because. In view of this point, switching of the switching carrier will be described later.

  FIG. 3 is a circuit diagram illustrating the configuration of the power conversion device according to the first embodiment. The power conversion device includes a rectifier circuit 5, a capacitor 3, a power converter 2, and a control unit 4.

  The rectifier circuit 5 is configured by a diode bridge, for example, and rectifies a single-phase or multi-phase AC voltage to output a DC voltage Vdc. In FIG. 1, the case of full-wave rectification of a three-phase alternating current is taken as an example, but the present embodiment can be applied to the case of full-wave rectification of a single-phase alternating current or the case of half-wave rectifying a single-phase alternating current. In any case, as described above, the absolute value of the rate of change of the DC voltage Vdc theoretically decreases as the absolute value of the DC voltage Vdc increases. In the case of full-wave rectification of single-phase alternating current, the direct-current voltage Vdc pulsates at twice the power supply frequency. Here, a case where the three-phase voltage supplied from the three-phase power supply 6 is full-wave rectified is shown as an example, and the DC voltage Vdc pulsates at 6 times the power supply frequency as illustrated in FIG.

  Although the capacitor 3 receives the DC voltage Vdc at both ends, the smoothing function is not necessarily required here. According to the present embodiment, even if the smoothing function is small and the pulsation of the DC voltage Vdc is large, control that follows this can be performed.

  The power converter 2 converts the DC voltage Vdc into another three-phase AC voltage by switching, and outputs it. Of course, the output AC voltage may be a single phase. Here, the power converter 2 outputs a three-phase AC voltage for driving the three-phase AC rotating machine 1.

  In the power converter 2, more specifically, the switching is controlled by the control unit 4.

  The control unit 4 includes a voltage pulsation detection unit 8, a first carrier frequency generation unit 9, a second carrier frequency generation unit 10, a switching unit 11, an output voltage command calculation unit 12, and a PWM unit 13.

  The first carrier frequency generation means 9 and the second carrier frequency generation means 10 output frequencies Fc1 and Fc2, respectively. Here, there is a relationship of Fc1 = k × Fc2 (k = 2, 3, 4,...).

  The voltage pulsation detection means 8 detects the pulsation component Vrp1 of the DC voltage Vdc. The pulsation component Vrp shown in FIG. 1 and the pulsation component Vrp1 detected by the voltage pulsation detecting means 8 are values that are grasped in a temporally continuous region, whereas the latter is temporally related. It is different because it is a discrete value.

  FIG. 4 is a block diagram illustrating the configuration of the voltage pulsation detecting means 8. The voltage pulsation detection unit 8 includes a detection unit 83, a first-order lag unit 82, and a subtractor 81. The detection means 83 inputs the frequency Fc1, and samples the DC voltage Vdc using the frequency as a sampling frequency. As a result, a DC voltage Vdc1 sampled discretely at a period (1 / Fc1) is obtained.

  The sampling is performed, for example, at the timing when the waveform of the carrier C1 takes the top, the timing when the bottom is taken, or both. When sampling is performed both at the timing when the waveform of the carrier C1 takes the top and when the waveform takes the bottom, the sampling frequency is substantially 2 · Fc1.

  The DC voltage Vdc is obtained, for example, by DC voltage detection means 7 that measures the voltage across the capacitor 3. The DC voltage Vdc may be obtained using other known methods.

  The DC voltage Vdc1 is subjected to low-pass filtering by the first-order lag means 82, and an average value Vav1 is obtained. The average value Vav shown in FIG. 1 and the average value Vav1 obtained by the first-order lag means 82 are values grasped in a temporally continuous region, whereas the latter is discrete in time. It differs by being a value.

  The subtractor 81 subtracts the average value Vav1 from the DC voltage Vdc1 to detect a pulsating component Vrp1.

  FIG. 5 is a block diagram illustrating the configuration of the switching unit 11. The switching unit 11 includes a selection unit 111, a size determination unit 112, and a switching controller 113.

  The magnitude determination unit 112 receives the pulsation component Vrp1 and the threshold “0” and outputs a comparison result signal D. Since the threshold value is “0”, the comparison result signal D is activated when the pulsation component Vrp1 is positive, and deactivated when the pulsation component Vrp1 is zero or negative.

  The selection unit 111 selects either the first carrier frequency Fc1 (input here to the terminal A) or the second carrier frequency Fc2 (here input to the terminal B) and selects it as the switching carrier frequency Fc. (In this case, output from the terminal C).

  Roughly, if the comparison result signal D is active (since the fluctuation of the DC voltage Vdc is gentle), the terminal B is connected to the terminal C and the frequency Fc2 is adopted as the frequency Fc. If the comparison result signal D is inactive, the terminal A is connected to the terminal C. However, more specifically, the switching controller 113 determines the selection operation in the selection unit 111.

  As described above, switching of the switching carrier is desirably performed at a timing at which the maximum value of the carrier matches or a timing at which the minimum value matches. Therefore, it is not desirable to control the operation of the selection unit 111 only by the activation / inactivation of the comparison result signal D corresponding to the periods T1 and T2.

  Therefore, the switching controller 113 causes the selection unit 111 to switch the selection based on the carrier C2 after the activation / inactivation of the comparison result signal D is switched. As will be described later, the carrier C2 is obtained from the PWM means 13.

  FIG. 6 is a graph for explaining the operation of the switching controller 113. However, three types of carriers C2-1, C2-2, and C2-3 are illustrated here as the carrier C2.

  The carriers C2-1 and C2-2 have a frequency Fc2 that is an even fraction of the frequency Fc1 of the carrier C1, and here, the case where Fc2 = Fc1 / 2 is illustrated. The carrier C2-1 is synchronized such that the timing at which the maximum value is taken is selected from the timing at which the carrier C1 takes the maximum value. The carrier C2-2 is synchronized so that the timing at which the minimum value is taken is selected from the timing at which the carrier C1 takes the minimum value.

  The carrier C2-3 has a frequency Fc2 that is an odd number of the frequency Fc1 of the carrier C1 (the odd number is 3 or more). Here, a case where Fc2 = Fc1 / 3 is illustrated. When the carrier C2-3 takes the maximum value, the carrier C1 also takes the maximum value, and when the carrier C2-3 takes the minimum value, the carrier C1 also takes the minimum value.

  As described above, it is desirable to detect the maximum value / minimum value of the carrier C2 having the lower frequency and to cause the selection unit 111 to switch the selection at the timing.

  Specifically, when the carrier C2-1 is adopted as the carrier C2, by causing the selection unit 111 to switch the selection at a timing when C2-1 takes the maximum value, the carrier C1 at the switching timing. , C2 take the maximum value.

  When the carrier C2-2 is adopted as the carrier C2, by causing the selection unit 111 to perform selection switching at the timing when C2-2 takes the minimum value, the carriers C1 and C2 are both at the switching timing. Take the minimum value.

  When the carrier C2-3 is adopted as the carrier C2, by causing the selection unit 111 to perform selection switching at the timing when C2-3 takes the maximum value, the carriers C1 and C2 are both at the switching timing. Take the maximum value. In addition, by causing the selection unit 111 to perform selection switching at the timing when C2-3 takes the minimum value, the carriers C1 and C2 both take the minimum value at the switching timing.

  From the viewpoint of such switching, the frequency Fc2 is desirably an odd number of the frequency Fc1. This is because the present invention can be applied both when the frequency is switched at the timing when the carrier takes the maximum value and when the frequency is switched at the timing when the carrier takes the minimum value.

  The output voltage command calculation means 12 generates a voltage command V * which is a command value for the AC voltage (“other”) output from the power converter 2. As a method for obtaining the voltage command V *, general V / f control, vector control which is a control method of an AC rotating machine, or the like can be employed. Since this technique is publicly known, detailed description thereof is omitted.

  The PWM means 13 functions as a modulation signal generating unit that gives the switching control signal G to the power converter 2 based on pulse width modulation. Specifically, the PWM means 13 generates the carrier C1 having the frequency Fc1 and the carrier C2 having the frequency Fc2 in synchronization. Then, corresponding to whether the frequency Fc output from the switching means 11 is the frequency Fc1 or Fc2, the carriers C1 and C2 are respectively employed as switching carriers, and the switching control signal G is generated. A switching element (not shown) included in the power converter 2 performs switching based on the switching control signal G and outputs a three-phase AC voltage to the AC rotating machine 1. Since the structure of the power converter 2 is well known, a detailed description thereof is omitted.

  The switching control signal G is generated by comparing the switching carrier with the voltage command V * obtained from the output voltage command calculation means 12 and further considering the DC voltage Vdc. Since the generation itself is a known technique, a detailed description thereof is omitted. However, the PWM means 13 samples the DC voltage Vdc in order to consider the pulsation of the DC voltage Vdc. Since this sampling is specific to the present embodiment, it will be described below.

  7 to 16 are graphs showing sampling of the DC voltage Vdc when full-wave rectification is performed on a three-phase AC having a power supply frequency of 50 Hz and a voltage effective value of 200V.

  FIG. 7 is a graph showing the DC voltage Vdc and the DC voltage Vdc1 obtained by sampling the DC voltage Vdc at a sampling frequency of 10 kHz and discretizing it. FIG. 8 is a graph showing the deviation Er1 (= Vdc−Vdc1) when the above sampling is performed. The DC voltage Vdc1 (discretized) closely follows the DC voltage Vdc, and it can be seen that the absolute value of the deviation Er1 is less than 5 V even when the fluctuation of the DC voltage Vdc is large. Therefore, it is desirable to employ 10 kHz as the sampling frequency employed in the detection means 83.

  FIG. 9 is a graph showing the DC voltage Vdc and the DC voltage Vdc2 obtained by sampling the DC voltage Vdc with a sampling frequency of 5 kHz. FIG. 10 is a graph showing the deviation Er2 (= Vdc−Vdc2) when the above sampling is performed. It can be seen that the absolute value of the deviation Er2 is less than 10 V even at the timing when the fluctuation of the DC voltage Vdc is large.

  FIG. 11 is a graph showing a DC voltage Vdc and a DC voltage Vdc3 obtained by sampling the DC voltage Vdc with a sampling frequency of 2.5 kHz. FIG. 12 is a graph showing the deviation Er3 (= Vdc−Vdc3) when the above sampling is performed. The DC voltage Vdc3 (discretized) does not sufficiently reflect the pulsation component when the DC voltage Vdc decreases from 270V to 245V and from 245V to 270V.

  FIG. 13 is a graph showing a DC voltage Vdc and a DC voltage Vdc4 obtained by sampling the DC voltage Vdc with a sampling frequency of 1 kHz. FIG. 14 is a graph showing the deviation Er4 (= Vdc−Vdc4) when the above sampling is performed. The DC voltage Vdc4 (discretized) does not sufficiently reflect the pulsation component even when the fluctuation of the DC voltage Vdc decreases from 283V to 270V, or when it increases from 270V to 283V.

  From the above, it is considered that a sampling frequency of about 10 kHz is required near the minimum voltage of the DC voltage Vdc, and a sampling frequency of about 2.5 kHz is sufficient near the maximum voltage of the DC voltage Vdc. Therefore, when the power supply frequency is 50 Hz and full-wave rectification of the three-phase alternating current is performed, 10 kHz and 2.5 kHz can be employed as the frequencies Fc1 and Fc2, respectively. Of course, appropriate values for the frequencies Fc1 and Fc2 are proportional to the power supply frequency.

  When full-wave rectification is performed on a single-phase alternating current, the direct-current voltage Vdc varies at twice the power supply frequency. Therefore, an appropriate value for the frequencies Fc1 and Fc2 is 1/3 compared to the case of full-wave rectification of a three-phase alternating current if the power supply frequency is the same.

  FIG. 15 shows the DC voltage Vdc and the DC voltage Vdc with a sampling frequency of 10 kHz between the average value and the minimum voltage of the DC voltage Vdc and a sampling frequency of 2.5 kHz between the average value of the DC voltage Vdc and the maximum voltage. Is a graph showing a DC voltage Vdc0 that is discretized by sampling.

  In FIG. 15, black triangles are timings when the sampling frequency is switched from the frequency Fc2 to the frequency Fc1, and white triangles are timings when the sampling frequency is switched from the frequency Fc1 to the frequency Fc2.

  The sampling of the DC voltage Vdc is performed at the timing when the switching carrier takes the top and / or the bottom. Therefore, it is desirable that the switching of the sampling frequency of the DC voltage Vdc is synchronized with the switching of the switching carrier. When the switching carrier is switched as described above, it is desirable that the maximum values or the minimum values of the waveforms match each other. Therefore, switching of the sampling frequency of the DC voltage Vdc does not necessarily occur at the timing when the DC voltage Vdc takes its average value, similarly to switching of the switching carrier.

  The DC voltage Vdc0 (discretized) is a value obtained by sampling the DC voltage Vdc with a switching carrier (hereinafter also referred to as “carrier C0”). The carrier C0 includes a carrier C1 having a frequency Fc1, a frequency It can be understood that the carrier C2 having Fc2 is obtained by switching between the black triangle and the white triangle.

  FIG. 16 is a graph showing the deviation Er0 (= Vdc−Vdc0) when the above sampling is performed. The absolute value of the deviation Er0 is less than 10 V, and it can be seen that the DC voltage Vdc0 (discretized) has good follow-up characteristics regardless of whether the change in the DC voltage Vdc is large or small.

  In this way, by switching the frequency of the switching carrier that is also used for sampling of the DC voltage Vdc, the switching loss of the power converter 2 depending on the carrier frequency is suppressed while ensuring controllability. Can do.

  The PWM means 13 generates the switching carrier C1, and as described with reference to FIGS. 7 and 8, it is desirable that the sampling frequency employed in the detection means 83 is 10 kHz. Therefore, the voltage pulsation detecting means 8 may receive the switching carrier C1 from the PWM means 13 instead of receiving the frequency Fc1 from the first carrier frequency generating means 9.

Second embodiment.
The frequency of the switching carrier employed in the PWM means 13 is not an alternative as in the first embodiment, but may be selected by switching three or more frequencies.

  FIG. 17 is a graph for explaining the operation of the second exemplary embodiment of the present invention. As in the first embodiment, the DC voltage Vdc and its pulsating component Vrp are shown in FIGS. 17 (a) and 17 (b), respectively.

  Similarly to the first embodiment, a period T2 in which the pulsation component Vrp is 0 or more (or greater than 0) is set. Unlike the first embodiment, a period in which the pulsation component Vrp is less than 0 (or 0 or less) is divided into periods T1 and T3. That is, among the periods where the pulsation component Vrp is less than 0 (or less than 0), the period T1 where the pulsation component Vrp is less than −10 (or less than −10), and the pulsation component Vrp is less than 0 (or less than 0) and −10 or more. A period T3 (or greater than −10) is set.

  The change in the DC voltage Vdc is larger in the period T3 than in the period T2 and in the period T1 than in the period T3. Therefore, switching carrier frequencies Fc1, Fc2, and Fc3 are employed in periods T1, T2, and T3, respectively, and Fc1> Fc3> Fc2.

  In this way, the average value of the carrier frequency when the pulsation component Vrp is less than 0 (or less than 0) is made smaller than the frequency Fc1 employed in the first embodiment, and thus covers the periods T1, T2, and T3. The average value of the carrier frequency can be further reduced.

  Hereinafter, the carrier C1 having the highest frequency Fc1 is also referred to as a main carrier of the switching carrier, and the carriers C2 and C3 having lower frequencies Fc2 and Fc3 are also referred to as subcarriers of the switching carrier.

  When there is one subcarrier, in the first embodiment, the main carrier corresponds to the carrier C1, and the subcarrier corresponds to the carrier C2.

  When there is one subcarrier, one threshold value (the value “0” in the example of the first embodiment) is sufficient for the pulsation component Vrp. If the threshold for switching between the main carrier and the subcarrier is grasped as the main threshold, the threshold for switching the subcarrier when there are a plurality of subcarriers can be grasped as the subthreshold. In the above example, the sub-threshold value is “−10”, which is a reference for the pulsation component Vrp for switching the sub-carrier frequencies Fc2 and Fc3.

  FIG. 18 is a circuit diagram illustrating the configuration of the power conversion device according to the second embodiment. The said structure has the structure which substituted the control part 4 of the power converter device shown in 1st Embodiment by the control part 14. FIG. However, the PWM means 13 also generates the switching carrier C3 having the frequency Fc3 in synchronization with the switching carriers C1 and C2.

  The control unit 14 has a configuration in which the switching unit 11 is replaced with the switching unit 16 with respect to the control unit 4 and a third carrier frequency generation unit 15 is added. The third carrier frequency generation means 15 outputs the frequency Fc3. Here, there is a relationship of Fc3 = m × Fc1, Fc2 = n × Fc3 (m, n = 2, 3, 4,...). This is because the maximum values or the minimum values of the switching carriers are made to coincide with each other when switching carriers are switched as in the first embodiment described with reference to FIGS. 2 and 6. The difference between the operation of the first embodiment and the operation of the second embodiment can be grasped as a difference whether the coefficient m is 1 or 2 or more.

  FIG. 19 is a block diagram illustrating the configuration of the switching unit 16. The switching unit 16 includes a selection unit 161 and a size determination unit 162 in addition to the selection unit 111, the size determination unit 112, and the switching controller 113 included in the switching unit 11.

  The magnitude determination unit 162 receives the pulsation component Vrp1 and the threshold “−10”, and outputs a comparison result signal E. The comparison result signal E is activated when the pulsation component Vrp1 is −10 or more, and deactivated when it is less than −10.

  The selection unit 116 selects either the first carrier frequency Fc1 (here, input to the terminal A) or the third carrier frequency Fc3 (here, input to the terminal B) and outputs it from the terminal C.

  Unlike the first embodiment, the terminal A of the selection unit 111 is connected to the terminal C of the selection unit 111. Therefore, roughly, if the comparison result signal D is active (since the fluctuation of the DC voltage Vdc is moderate), the terminal B is connected to the terminal C and the frequency Fc2 is adopted as the frequency Fc. If the comparison result signal D is inactive, the terminal A is connected to the terminal C. Even if the comparison result signal D is inactive, that is, even if the pulsation component Vrp1 is zero or negative, one of the frequencies Fc1 and Fc3 is adopted as the frequency Fc depending on the function of the selection unit 161.

  As described with reference to FIG. 6 in the first embodiment, the timing for switching the frequency Fc is preferably synchronized with the switching carrier having the lower frequency. Therefore, the switching carrier C2 is input to the switching controller 113 also in the second embodiment.

  In the first embodiment, when three-phase alternating current is full-wave rectified, the frequency Fc1 is 200 times the power supply frequency (= 10 kHz / 50 Hz), and the frequency Fc2 is 50 times the power supply frequency (= 10 kHz / 50 Hz). Each was selected. That is, the case where Fc2 = Fc1 / 4 is illustrated. Also in the second embodiment, Fc3 = Fc1 / 2 can be set while Fc2 = Fc1 / 4. This corresponds to the above-described coefficients m and n both taking the value 2.

  Of course, as described in the first embodiment, when the single-phase alternating current is full-wave rectified, the appropriate frequencies Fc1, Fc2, and Fc3 are 1/3 of the case where the three-phase alternating current is full-wave rectified. And is proportional to the power supply frequency.

  The PWM means 13 employs the carriers C1, C2 and C3 as switching carriers in accordance with which of the frequencies Fc1, Fc2 and Fc3 the frequency Fc output from the switching means 16 is, so that switching control is performed. A signal G is generated. The DC voltage Vdc is sampled using the switching carrier.

  As described with reference to FIG. 17, the frequency of the switching carrier is switched according to the change in the waveform of the DC voltage Vdc, so that it is possible to reduce the average value of the frequency while ensuring controllability. Switching loss can be suppressed.

Deformation.
The PWM means 13 generates the switching carrier C1, and as described with reference to FIGS. 7 and 8, it is desirable that the sampling frequency employed in the detection means 83 is 10 kHz. Therefore, in the first and second embodiments, the voltage pulsation detecting means 8 receives the switching carrier C1 from the PWM means 13 instead of receiving the frequency Fc1 from the first carrier frequency generating means 9. Also good.

  20 and 21 are block diagrams showing modifications of the first embodiment, and FIGS. 22 and 23 are block diagrams showing modifications of the second embodiment, respectively.

  20 shows a configuration of the control unit 4A that is a modification of the control unit 4, and FIG. 22 shows a configuration of the control unit 14A that is a modification of the control unit 14, respectively. In these configurations, the first carrier frequency generation unit 9, the second carrier frequency generation unit 10, and the third carrier frequency generation unit 15 respectively change the first carrier generation unit 9A and the carrier C2 that generate the carrier C1. The second carrier generation means 10A to be generated and the third carrier generation means 15A to generate the carrier C3 are replaced. It is desirable that the means 9A, 10A, 15A for generating these carriers operate in synchronism so that the timings for taking the maximum value and the minimum value of the carriers coincide (see FIG. 6).

  In this case, since the PWM means 13 receives any of these carriers as the carrier C0 instead of the frequency Fc, it is not necessary to generate a carrier therein. Therefore, in FIGS. 20 and 22, the PWM means 13A (see FIGS. 3 and 18) in the control units 4 and 14 is replaced with the PWM means 13A that does not need to generate a carrier.

  In this case, as shown in FIG. 21, the switching means 11 replaces the frequencies Fc1 and Fc with the carriers C1 and C2, and as shown in FIG. 23, the switching means 16 replaces the frequencies Fc1, Fc2 and Fc3 with the carriers C1 and C2. C1, C2 and C3 are given respectively. In the switching means 11 and 16, the switching controller 113 receives the carrier C2 from the second carrier generating means 10A, not from the PWM means 13. Further, the carrier C1 is input to the voltage pulsation detecting means 8 instead of the frequency Fc1. The voltage pulsation detecting means 8 may perform sampling based on the carrier C1, or may detect the frequency Fc1 from the carrier C1 and perform sampling using the frequency Fc1 as a sampling frequency.

  In the second embodiment, the case where three types of switching carrier frequencies are employed has been described. However, more types may be employed to finely switch the frequencies.

  In order for switching of switching carriers to be performed at a timing at which the maximum values or the minimum values coincide with each other, it is desirable that the following relationship be satisfied in order to maintain one cycle of each carrier.

  (i) Referring to FIG. 2, the maximum value of main carrier C1 is equal to the maximum value of all subcarriers C2, C3,..., and the minimum value of main carrier C1 and all subcarriers C2, C3,. It is equal to the minimum value.

  (ii) Referring to FIG. 6, the frequencies Fc2, Fc3,... of all the subcarriers are an integral fraction of the main carrier frequency Fc1 (the integer is 2 or more).

  (iii-a) All subcarriers having the lowest frequency (in accordance with the second embodiment, the carrier C2) take the maximum value, and all other subcarriers (second embodiment) According to the form, the carrier C3) and the main carrier C1 are synchronized with the maximum value. In this case, switching of the carrier for switching is performed at the timing when they take the vicinity of the maximum value.

  FIG. 24 is a graph illustrating carriers C1, C2, and C3 that satisfy the conditions (i), (ii), and (iii-a). Here, the frequency Fc3 of the subcarrier C3 is 1/2 of the main carrier C1, and the frequency Fc2 of the subcarrier C2 is 1/2 of the subcarrier C3, that is, 1/4 of the main carrier C1. As for the above-described coefficients m and n, the case where m = n = 2 is illustrated. Switching of the switching carrier is performed at a timing indicated by an arrow in the figure.

  The following condition (iii-b) may be satisfied instead of the above condition (iii-a).

  (iii-b) At the timing when the lowest frequency among all the subcarriers takes the minimum value, all the other subcarriers and the main carrier C1 take the minimum value and synchronize. In this case, switching of the carrier for switching is performed at the timing when they take the vicinity of the minimum value.

  FIG. 25 is a graph illustrating carriers C1, C2, and C3 that satisfy the conditions (i), (ii), and (iii-b). Here, as in the case illustrated in FIG. 24, the case of Fc2 = Fc3 / 2 = Fc1 / 4 (m = n = 2) is illustrated. Switching of the switching carrier is performed at a timing indicated by an arrow in the figure.

  Thus, when there are two subcarriers, it is desirable that the frequency Fc3 of one subcarrier C3 is an integral multiple of the frequency Fc2 of the other subcarrier C2. Of course, even when three or more subcarriers are set, it is desirable that subcarriers satisfy such conditions exist. Thereby, also when employ | adopting the carrier for switching by switching several subcarriers, the alternating voltage obtained from the power converter 2 by switching becomes a thing according to voltage command V *.

4, 14, 4A, 14A Control unit 5 Rectifier circuit 13, 13A PWM means (modulation signal generation unit)
8 Voltage pulsation detection means (Voltage pulsation detector)
DESCRIPTION OF SYMBOLS 9 1st carrier frequency generation means 9A 1st carrier generation means 10 2nd carrier frequency generation means 10A 2nd carrier generation means 15 3rd carrier frequency generation means 15A 3rd carrier generation means 11, 16 switching means

Claims (10)

A rectifier circuit (5) for rectifying a single-phase or multi-phase AC voltage and outputting a DC voltage (Vdc);
A capacitor (3) receiving the DC voltage at both ends;
A power converter (2) that converts the DC voltage into another AC voltage by switching;
Control unit (4, 14, 4A, 14A) for controlling the power converter based on the DC voltage
And
The controller is
A modulation signal generator (13, 13A) that generates a signal (G) for controlling the switching based on the switching carrier (C0) and the command value (V *) of the other AC voltage and supplies the signal to the power converter. )When,
A voltage pulsation detector (8) for detecting a pulsation component (Vrp, Vrp1) of the DC voltage;
The main carrier (C1) when the pulsation component is under Shu閾Ne以, at least the pulsating component having a low frequency (Fc2, Fc3) than the frequency (Fc1) of said main carrier when the larger main threshold One subcarrier (C2, C3) is employ | adopted as said switching carrier, respectively, The power converter device characterized by the above-mentioned. The control unit (4, 14)
Frequency generating means (9, 10, 15) for generating the frequency (Fc1) of the main carrier (C1) and the frequency (Fc2, Fc3) of the subcarriers (C2, C3);
Wherein the frequency of the main carrier when the pulsating component (Vrp, Vrp1) is under the main threshold Ne以, the frequency (Fc2, Fc3) of the pulsation component is the sub-carrier if the larger main threshold, respectively Switching means (11, 16) for outputting as the frequency (Fc0) of the switching carrier (C0),
The power conversion device according to claim 1, wherein the modulation signal generation unit (13) employs a switching carrier (C0) having a frequency output from the switching unit to generate the signal (G). The control unit (4A, 14A)
Carrier generating means (9A, 10A, 15A) for generating the main carrier (C1) and the subcarriers (C2, C3);
Outputting the ripple component (Vrp, Vrp1) is the main carrier in the case under the main threshold Ne以, the pulsating component is the sub-carrier if the larger main threshold, as each of the switching carrier (C0) Switching means (11, 16),
The power conversion device according to claim 1, wherein the modulation signal generation unit (13A) employs the switching carrier (C0) output from the switching unit to generate the signal (G). The voltage pulsation detector (8)
Obtaining a discretized DC voltage (Vdc1) having a value obtained by sampling the DC voltage (Vdc) by the main carrier;
The low-pass filtering process is performed on the discretized DC voltage to obtain an average value (Vav1) of the discretized DC voltage,
The power converter according to any one of claims 1 to 3, wherein the pulsating component (Vrp1) is detected by subtracting the average value from the discretized DC voltage (Vdc1).   The modulation signal generation unit (13) generates the signal (G) based on a value (Vdc0) obtained by sampling the DC voltage (Vdc) with the switching carrier (C0). Item 5. The power conversion device according to any one of Items 4. At the timing when the switching carrier (C0) takes the vicinity of the maximum value, the main carrier and the subcarrier are switched based on the comparison result between the pulsation component and the main threshold,
The maximum value of the main carrier (C1) and the maximum value of all the subcarriers (C2, C3) are equal,
The minimum value of the main carrier and the minimum value of all the subcarriers are equal,
The frequency (Fc2, Fc3) of all the subcarriers is an integral fraction of the frequency (Fc1) of the main carrier (the integer is 2 or more),
The all of the subcarriers (C3) and the main carrier are synchronized with the maximum value at a timing when the lowest frequency (C2) of all the subcarriers takes the maximum value. The power converter according to any one of claims 1 to 5. At the timing when the switching carrier (C0) takes near the minimum value, the main carrier and the subcarrier are switched based on the comparison result between the pulsation component and the main threshold,
The maximum value of the main carrier (C1) and the maximum value of all the subcarriers (C2, C3) are equal,
The minimum value of the main carrier and the minimum value of all the subcarriers are equal,
The frequency (Fc2, Fc3) of all the subcarriers is an integral fraction of the frequency (Fc1) of the main carrier (the integer is 2 or more),
The all the subcarriers (C3) and the main carrier are synchronized by taking the minimum value at the timing when the lowest frequency (C2) of all the subcarriers takes the minimum value. The power converter according to any one of claims 1 to 5.   The frequency (Fc2, Fc3) of the subcarrier (C2, C3) is an odd number of the frequency (Fc1) of the main carrier (C1) (the odd number is 3 or more). The power conversion device according to any one of 7. The subcarriers (C2, C3) are plural,
A first of said sub-carrier (C3) when the pulsation component is small Fuku閾Ne以 under Ri by Shu閾value, the second the secondary when the pulsation component is greater than said secondary threshold value below said main threshold Each of the carriers (C2) is employed as the switching carrier,
The power converter according to any one of claims 1 to 8, wherein the frequency (Fc3) of the first subcarrier is higher than the frequency (Fc3) of the second subcarrier.   The frequency (Fc3) of the first subcarrier (C3) is an integer (the integer is 2 or more) times the frequency (Fc2) of the second subcarrier (C2). 9. The power conversion device according to 9.

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