JP6291996B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device, and more particularly to a technique for rectifying an AC voltage to obtain a DC voltage once and then converting it to another AC voltage.

  The technology can be applied to, for example, a power conversion device that drives an AC rotating machine to accelerate and decelerate. This is suitable when the capacitor for holding the DC voltage is small and the DC voltage pulsates depending on the power supply frequency.

  2. Description of the Related Art Conventionally, a technique is known in which input AC power is rectified to obtain DC power once, and then AC power having a variable voltage and variable frequency is obtained by switching and then output. The output AC power is used for variable speed control of an AC rotating machine, for example.

  An example of a power conversion device employed in such a technology is a diode bridge that performs full-wave rectification on an AC voltage supplied from a commercial power source and converts it to a DC voltage, and switches the DC voltage to another AC voltage. And a power converter that is supplied to an AC rotating machine as a load. A power converter controls each switching element which comprises a power converter, and outputs the alternating voltage of the designated frequency to an alternating current rotary machine.

  In this power converter, a capacitor that holds a DC voltage output from the diode bridge is employed. In order to improve the drive performance of the AC rotating machine, a large capacitance is required to sufficiently smooth the DC voltage in the capacitor. This is to increase the ripple current resistance.

  An electrolytic capacitor is used as a capacitor having a large capacitance. However, electrolytic capacitors are larger in size and more expensive than other types of capacitors. Thus, there are problems that the power conversion device becomes large and the manufacturing cost increases.

  As an example of measures against such a problem, an electrolytic capacitor-less inverter device has been developed (for example, Patent Document 1 and Non-Patent Document 1 listed below). For example, in the electrolytic capacitor-less inverter device of Patent Document 1, a three-phase AC voltage is used as a power source, and a small-capacity film capacitor is used as a capacitor.

  When the capacitance of the capacitor is small, the DC voltage supplied to the main circuit of the inverter includes pulsation. When a DC voltage is switched by an inverter based on the average value without considering this pulsation, for example, an AC voltage including pulsation is applied to the AC rotating machine. Driving with an AC voltage including pulsation causes the AC rotating machine to output a pulsating torque, and a current flowing through the AC rotating machine pulsates.

  For such a problem, a technique for correcting a timing signal for pulse width modulation to be given to a switching element constituting an inverter (power converter) based on a voltage value of a DC voltage including pulsation has been proposed. (For example, patent document 2). By such correction, a three-phase AC voltage having a constant amplitude that does not affect the AC rotating machine is output.

  For example, as in Patent Document 3, a technique for rectifying an AC voltage using a converter that operates in a PWM (pulse width modulation) system instead of a diode bridge is also proposed. In such a technique, unlike the technique of rectifying by a diode bridge, it is considered to perform switching of the converter so that pulsation does not occur in the DC voltage in the first place.

JP 2009-17673 A Japanese Examined Patent Publication No. 61-048356 JP-A-9-56162 JP 2013-126257 A

Isao Takahashi, Yoichi Ito, “Control Method of Capacitorless Inverter”, National Conference of the Institute of Electrical Engineers of Japan in 1988, No. 527, pp624-626

  On the other hand, the DC voltage obtained from the diode bridge, unlike the DC voltage obtained from the converter, pulsates if the capacitance of the capacitor is small. In order to use such a DC voltage for pulse width modulation, it is necessary to accurately sample the pulsation component. In general, a DC voltage is sampled at the top and / or bottom of a carrier used for pulse width modulation, so that the carrier frequency is increased to accurately sample the pulsating component of the DC voltage.

  Also, it is desirable to increase the carrier frequency in order to keep the control response high because the stability of the system is secured against the pulsation of the DC voltage. Therefore, in the configuration shown in Patent Document 2, there is a problem that the carrier frequency must be set high. However, in Patent Document 2, there is no clear examination on the pulsation component of the DC voltage and the sampling frequency.

  As described above, in the electrolytic capacitorless inverter device, the problems of DC voltage pulsation, improvement of DC voltage sampling accuracy for correcting the pulsation, and increase of carrier frequency for improvement of the accuracy are linked. The problems of increasing the loss of the power conversion device due to the rise of the temperature and increasing the size of the cooling device for reducing the loss occur in a chain.

  One means for solving this problem is introduced in Patent Document 4. Patent Document 4 describes a technique that contributes to reducing the switching loss depending on the carrier frequency and, in turn, downsizing the power converter, while ensuring the followability of control of the power converter with respect to the pulsation of the DC voltage. .

  However, in patent document 4, the consideration about the case where a reactor is included in the structure of the main circuit of a power converter is abbreviate | omitted. In particular, in a power converter employed in an air conditioner, a carrier filter that removes a frequency component derived from switching is often attached so that the switching does not affect the power supply side.

  A circuit including a reactor may be adopted as the carrier filter. In this case, resonance may occur between the reactor and the capacitor that supports the DC voltage obtained by rectification of the diode bridge.

  Such resonance may lead to a resonance phenomenon in which the DC voltage across the capacitor suddenly rises or falls. In the technique described in Patent Document 4, the carrier frequency is changed depending on the DC voltage. Therefore, in this technology, even when a reactor is included in the configuration of the main circuit, there is a possibility that it does not operate normally.

  The present invention has been made in order to solve the above-described problem. Even when a reactor is included in the configuration of the main circuit, the power converter against the pulsation of the DC voltage without being affected by the resonance derived therefrom. It is an object of the present invention to provide a technique that contributes to reducing the switching loss depending on the carrier frequency and further reducing the size of the power converter while ensuring the followability of the control.

  The power converter according to the present invention includes a rectifier circuit (5) for rectifying an AC voltage (Vr, Vs, Vt) by a diode bridge and outputting a DC voltage (Vdc), and a capacitor (3 ), A power converter (2) that converts the DC voltage into another AC voltage by switching, and a control unit (4) that controls the power converter.

  The control unit generates a signal (G) for controlling switching of the power converter based on a switching carrier (C1, C2, C13) and a command value (V *) of the other AC voltage, and A modulation signal generation unit (13) to be supplied to the power converter is included.

  The frequency (Fc) of the switching carrier is variable according to the phase region divided by the voltage value of the AC voltage.

  The DC voltage rectified from the AC voltage by the diode bridge pulsates in synchronization with the AC voltage. By changing the frequency of the switching carrier according to the voltage value of the AC voltage, even if there is a reactor that generates resonance with the capacitor, it is not affected by the resonance, and varies according to the magnitude of the DC voltage. The power converter is switched by a signal corresponding to the frequency corresponding to the torque to be performed. Thus, the switching loss depending on the carrier frequency is suppressed while ensuring the followability of the control of the power converter with respect to the pulsation of DC voltage and the fluctuation of torque, which contributes to downsizing of the power converter.

It is a circuit diagram which illustrates the composition of the power converter concerning a 1st embodiment and a 2nd embodiment. It is a graph which shows a phase area | region. It is a graph which shows a phase area | region. It is a graph explaining the operation | movement of the 1st Embodiment of this invention. It is a graph which shows a mode that the carrier for switching switches. It is a block diagram which illustrates the composition of voltage Vg generating means. 3 is a block diagram illustrating the configuration of switching means 11. FIG. 4 is a graph for explaining the operation of a switching controller 113. It is a graph which shows DC voltage Vdc1 discretized. It is a graph which shows deviation Er1. It is a graph which shows DC voltage Vdc2 discretized. It is a graph which shows deviation Er2. It is a graph which shows discretized DC voltage Vdc3. It is a graph which shows deviation Er3. It is a graph which shows DC voltage Vdc4 discretized. It is a graph which shows deviation Er4. It is a graph which shows DC voltage Vdc0 discretized. It is a graph which shows deviation Er0. It is a graph explaining the operation | movement of the 2nd Embodiment of this invention. It is a circuit diagram which illustrates the composition of the power converter concerning a 2nd embodiment. 3 is a block diagram illustrating a configuration of a switching unit 16. FIG. It is a circuit diagram which illustrates the composition of control part 4A concerning modification of a 1st embodiment. It is a block diagram which illustrates the composition of switching means 11 in modification of a 1st embodiment. It is a circuit diagram which illustrates the composition of control part 14A concerning modification of a 2nd embodiment. It is a block diagram which illustrates the composition of switching means 11 in modification of a 2nd embodiment. It is a graph which illustrates carrier C1, C2, C3. It is a graph which illustrates carrier C1, C2, C3.

First embodiment.
FIG. 1 is a circuit diagram illustrating the configuration of the power conversion apparatus according to the first embodiment. The power conversion device includes a rectifier circuit 5, a capacitor 3, a power converter 2, and a control unit 4.

  The rectifier circuit 5 is composed of a diode bridge, and full-wave rectifies the three-phase AC voltages Vr, Vs, Vt supplied from the three-phase power source 6 and outputs a DC voltage Vdc.

  Although the capacitor 3 receives the DC voltage Vdc at both ends, the smoothing function is not necessarily required here. According to the first embodiment, even if the smoothing function is small and the pulsation of the DC voltage Vdc is large, control following this can be performed.

  The power converter 2 converts the DC voltage Vdc into another AC voltage by switching, and outputs it. In the power converter 2, more specifically, the switching is controlled by the control unit 4. Here, the case where the power converter 2 outputs a three-phase AC voltage for driving the three-phase AC rotating machine 1 is illustrated. Of course, the output AC voltage may be a single phase.

  In the switching of the power converter 2, a signal for controlling the switching (hereinafter also referred to as “switching control signal”) is usually determined for each cycle of the switching carrier. Therefore, the switching loss depends on the frequency of the switching carrier (carrier frequency). More specifically, the switching loss is reduced as the carrier frequency is lower.

  On the other hand, the higher the carrier frequency, the higher the followability of control for the pulsation of the DC voltage Vdc and the control performance for torque.

  FIG. 2 is a graph showing a phase region in the first embodiment. Specifically, the waveforms of three-phase AC voltages Vr, Vs, Vt and the waveform of voltage Vg are shown. The voltage Vg takes the maximum value among the absolute values | Vr |, | Vs |, | Vt | of the three-phase AC voltages Vr, Vs, Vt.

  The waveform of the voltage Vg is based on a sine wave, and substantially matches the waveform of the DC voltage Vdc. Therefore, the voltage Vg changes more as the voltage value is smaller. Specifically, when the power supply phase θ of the voltage Vg is adopted as a reference (0 degree) with the phase having the largest change rate of the AC voltage Vs, the phase region can be grasped as follows. However, regarding the phase, 360 degrees and 0 degrees are handled in the same manner.

Phase region T01 including a phase (θ is an even multiple of 30 degrees) having the largest absolute value of the change rate of the voltage Vg:
A phase region T02 including a phase (θ is an odd multiple of 30 degrees) having the smallest absolute value of the change rate of the voltage Vg.

  When the phase region is divided as described above, it can be said that the waveform of the voltage Vg and the pulsation of the DC voltage Vdc in the phase region T01 are more prominent than the waveform of the voltage Vg and the pulsation of the DC voltage Vdc in the phase region T02.

  Therefore, in phase region T02, even if the sampling period of DC voltage Vdc is made longer than in phase region T01, it can be said that the followability of control of power converter 2 with respect to pulsation of DC voltage Vdc is less likely to be impaired. Moreover, since the voltage supplied to the power converter 2 is large when the voltage value of the DC voltage Vdc is large, reducing the frequency of controlling the power converter 2 in the phase region T02 also reduces switching loss. Invite you.

  As described above, the waveform of the DC voltage Vdc is sampled at the top and / or bottom of the switching carrier used for pulse width modulation. Therefore, increasing the sampling period of the waveform of the DC voltage Vdc corresponds to reducing the carrier frequency.

  That is, by introducing the switching carrier frequency Fc2 in the phase region T02 and the switching carrier frequency Fc1 in the phase region T01, the relationship of Fc1> Fc2 is established, thereby reducing the switching loss.

  If the main circuit does not include a reactor, the waveform of the voltage Vg substantially matches the waveform of the DC voltage Vdc as described above. In other words, even if a reactor is included in the main circuit and this causes resonance by cooperating with the capacitor 3, the disturbance of the DC voltage Vdc due to the resonance causes the waveform of the voltage Vg to exclude such disturbance. It almost coincides with the waveform of the DC voltage Vdc.

  Therefore, by changing the carrier frequency in accordance with the phase of the voltage Vg to ensure the followability of the control of the power converter 2 with respect to the pulsation of the DC voltage Vdc, the influence of resonance is removed and the dependence on the carrier frequency of the power converter. Switching loss can be reduced. This simplifies the cooling device for the switching element and contributes to downsizing the power conversion device.

  As described above, since the voltage Vg is the maximum value among the absolute values | Vr |, | Vs |, | Vt | of the three-phase AC voltages Vr, Vs, Vt, the phase regions T01, T02 It can be determined from the voltage value of Vg.

  FIG. 3 is a graph for explaining the operation of the first embodiment. When the power supply phase θ is 0 to 60 degrees, the waveform of the ideal DC voltage Vdc (this matches the waveform of the voltage Vg). The waveform of the carrier frequency fc is shown. From the symmetry of the DC voltage Vdc with respect to the power supply phase θ, the waveform of the DC voltage Vdc when the power supply phase θ takes 30 × 2k to 30 × 2 (k + 1) degrees (where k is an integer) is as shown in FIG. Appears as in FIG.

  In FIG. 3, the phase region T01 is grasped as a range where the power supply phase θ is 0 degree to a value θ1 (approximately 10 degrees in FIG. 3) and a value θ2 (approximately 50 degrees in FIG. 3) to 60 degrees. As described above, since the waveform of the DC voltage Vdc is repeated with a period of 60 °, the arrow indicating the phase region T01 has no arrowhead at the position where the power supply phase θ is 0 ° and 60 °.

  In the phase region T02, the power supply phase θ is grasped as a range of values θ1 to θ2. When the power supply phase θ takes either the value θ1 or the value θ2, the power supply phase θ is at the boundary between the phase regions T01 and T02, so that it may be understood that it is in any of the phase regions T01 and T02.

  In FIG. 3, the carrier frequency fc is 6 kHz and 3 kHz in the phase regions T01 and T02, respectively. That is, FIG. 3 illustrates the case where Fc1 = 6 kHz and Fc2 = 3 kHz.

  FIG. 4 is a graph for explaining the operation of the first exemplary embodiment of the present invention. FIG. 4 shows the relationship between (a) voltage Vg and (b) carrier frequency fc. Since the voltage Vg takes the above voltage value, it pulsates at 6 times the power supply frequency.

  Periods T1 and T2 correspond to the above-described phase regions T01 and T02, respectively. However, different symbols are used in order to clarify that they can be classified by a phase different from the above-described θ1, θ2.

  Switching carriers having different frequencies are temporally adjacent at the boundary between the periods T1 and T2. It is desirable that the maximum values (or the vicinity thereof) of the waveforms of the respective switching carriers are adjacent to each other, or the minimum values (or the vicinity thereof) are adjacent to each other in terms of time.

  By switching the switching carrier in this way, one cycle between the maximum values (or the minimum values) of the respective switching carriers is not impaired. Usually, the command value to be compared with the switching carrier is maintained in one cycle between the maximum values (or the minimum values) of the switching carrier, so that the AC voltage output by switching depends on the command value. It will be.

  Of course, since the command value is set in accordance with the amplitude of the switching carrier, it is desirable that the plurality of switching carriers to be switched have the same maximum value and the same minimum value.

  FIG. 5 is a graph showing how switching carriers are switched. Here, switching from the period T2 to the period T1 is illustrated. Here, switching from the switching carrier C2 having the frequency Fc2 to the switching carrier C1 having the frequency Fc1 is illustrated, and the switching is performed at the time when the respective maximum values coincide.

  If the frequency Fc2 is an integral fraction of the frequency Fc1 (the integer is 2 or more), the switching between the switching carriers C1 and C2 can make the maximum values or the minimum values coincide with each other.

  However, it is not always easy to precisely match the switching timing of the switching carrier with the boundary between the periods T1 and T2. For example, when the DC voltage Vdc is sampled at the frequency Fc1 as described above, the boundary between the two, especially when the period T2 is shifted to the period T1, does not always coincide with the minimum value or the maximum value of the switching carrier C2. Because. In view of this point, switching of the switching carrier will be described later.

  Returning to FIG. 1, the control unit 4 includes a voltage Vg generation unit 8, a first carrier frequency generation unit 9, a second carrier frequency generation unit 10, a switching unit 11, an output voltage command calculation unit 12, and a PWM unit 13. doing.

  The first carrier frequency generation means 9 and the second carrier frequency generation means 10 output frequencies Fc1 and Fc2, respectively. Here, there is a relationship of Fc1 = k × Fc2 (k = 2, 3, 4,...).

  FIG. 6 is a block diagram illustrating the configuration of the voltage Vg generation unit 8. The voltage Vg generation unit 8 includes a detection unit 83, an absolute value acquisition unit 82, and a maximum value acquisition unit 81.

  The detection means 83 receives the frequency Fc1, and samples the voltages Vs, Vr, and Vt using the frequency as a sampling frequency. As a result, values obtained by discretely sampling (in time) the voltages Vs, Vr, and Vt in the cycle (1 / Fc1) are obtained.

  The sampling is performed, for example, at the timing when the waveform of the carrier C1 takes the top, the timing when the bottom is taken, or both. When sampling is performed both at the timing when the waveform of the carrier C1 takes the top and when the waveform takes the bottom, the sampling frequency is substantially 2 · Fc1.

  The absolute value acquisition unit 82 obtains absolute values of the sampled voltages Vs, Vr, and Vt. In other words, the absolute value acquisition means 82 can grasp that the absolute values | Vs |, | Vr |, | Vt | are output as temporally discrete values sampled based on the carrier C1.

  The maximum value obtaining unit 81 obtains the maximum value of the sampled absolute values | Vs |, | Vr |, | Vt | as the voltage Vg1. It can be understood that the voltage Vg1 is a temporally discrete value obtained by sampling the voltage Vg based on the carrier C1.

  The voltage Vg1 differs from the voltage Vg depending on whether or not sampling is performed, but for the sake of simplicity, the voltage Vg1 is expressed as the voltage Vg generating means 8 as a name of a component for obtaining the voltage Vg1.

  FIG. 7 is a block diagram illustrating the configuration of the switching unit 11. The switching unit 11 includes a selection unit 111, a size determination unit 112, and a switching controller 113.

  The magnitude determiner 112 receives the voltage Vg1 and the threshold voltage Vth and outputs a comparison result signal D. The comparison result signal D is activated when the voltage Vg1 is larger than the threshold voltage Vth, and deactivated when the voltage Vg1 is equal to or lower than the threshold voltage Vth.

  The selection unit 111 selects either the first carrier frequency Fc1 (input here to the terminal A) or the second carrier frequency Fc2 (here input to the terminal B) and selects it as the switching carrier frequency Fc. (In this case, output from the terminal C).

  Roughly, if the comparison result signal D is active, it is assumed that the fluctuation of the voltage Vg1 is gentle and the fluctuation of the DC voltage Vdc excluding the influence of the resonance described above is also gentle. Therefore, the terminal B is connected to the terminal C, and the frequency Fc2 lower than the frequency Fc1 is adopted as the frequency Fc. If the comparison result signal D is inactive, the terminal A is connected to the terminal C. However, more specifically, the switching controller 113 determines the selection operation in the selection unit 111.

  As described above, switching of the switching carrier is desirably performed at a timing at which the maximum value of the carrier matches or a timing at which the minimum value matches. Therefore, it is not desirable to control the operation of the selection unit 111 only by the activation / inactivation of the comparison result signal D corresponding to the periods T1 and T2.

  Therefore, the switching controller 113 causes the selection unit 111 to switch the selection based on the carrier C2 after the activation / inactivation of the comparison result signal D is switched. As will be described later, the carrier C2 is obtained from the PWM means 13.

  FIG. 8 is a graph for explaining the operation of the switching controller 113. However, three types of carriers C2-1, C2-2, and C2-3 are illustrated here as the carrier C2.

  The carriers C2-1 and C2-2 have a frequency Fc2 that is an even fraction of the frequency Fc1 of the carrier C1, and here, the case where Fc2 = Fc1 / 2 is illustrated. The carrier C2-1 is synchronized such that the timing at which the maximum value is taken is selected from the timing at which the carrier C1 takes the maximum value. The carrier C2-2 is synchronized so that the timing at which the minimum value is taken is selected from the timing at which the carrier C1 takes the minimum value.

  The carrier C2-3 has a frequency Fc2 that is an odd number of the frequency Fc1 of the carrier C1 (the odd number is 3 or more). Here, a case where Fc2 = Fc1 / 3 is illustrated. When the carrier C2-3 takes the maximum value, the carrier C1 also takes the maximum value, and when the carrier C2-3 takes the minimum value, the carrier C1 also takes the minimum value.

  As described above, it is desirable to detect the maximum value / minimum value of the carrier C2 having the lower frequency and to cause the selection unit 111 to switch the selection at the timing.

  Specifically, when the carrier C2-1 is adopted as the carrier C2, by causing the selection unit 111 to switch the selection at a timing when C2-1 takes the maximum value, the carrier C1 at the switching timing. , C2 take the maximum value.

  When the carrier C2-2 is adopted as the carrier C2, by causing the selection unit 111 to perform selection switching at the timing when C2-2 takes the minimum value, the carriers C1 and C2 are both at the switching timing. Take the minimum value.

  When the carrier C2-3 is adopted as the carrier C2, by causing the selection unit 111 to perform selection switching at the timing when C2-3 takes the maximum value, the carriers C1 and C2 are both at the switching timing. Take the maximum value. In addition, by causing the selection unit 111 to perform selection switching at the timing when C2-3 takes the minimum value, the carriers C1 and C2 both take the minimum value at the switching timing.

  From the viewpoint of such switching, the frequency Fc2 is desirably an odd number of the frequency Fc1. This is because the present invention can be applied both when the frequency is switched at the timing when the carrier takes the maximum value and when the frequency is switched at the timing when the carrier takes the minimum value.

  Returning to FIG. 1, the output voltage command calculation means 12 generates a voltage command V * which is a command value for the AC voltage (“other”) output from the power converter 2. As a method for obtaining the voltage command V *, general V / f control, vector control which is a control method of an AC rotating machine, or the like can be employed. Since this technique is publicly known, detailed description thereof is omitted.

  The PWM means 13 functions as a modulation signal generation unit that gives the switching control signal G to the power converter 2 based on pulse width modulation. Specifically, the PWM means 13 generates the carrier C1 having the frequency Fc1 and the carrier C2 having the frequency Fc2 in synchronization. Then, corresponding to whether the frequency Fc output from the switching means 11 is the frequency Fc1 or Fc2, the carriers C1 and C2 are respectively employed as switching carriers, and the switching control signal G is generated.

  A switching element (not shown) included in the power converter 2 performs switching based on the switching control signal G and outputs a three-phase AC voltage to the AC rotating machine 1. Since the structure of the power converter 2 is well known, a detailed description thereof is omitted.

  The switching control signal G is generated by comparing the switching carrier with the voltage command V * obtained from the output voltage command calculation means 12 and further considering the DC voltage Vdc. Since the generation itself is a known technique, a detailed description thereof is omitted.

  The switching unit 11 can be understood as a frequency setting unit that sets the frequency value of the switching carrier based on the voltage values of the AC voltages Vs, Vr, and Vt.

  The DC voltage Vdc is obtained, for example, by DC voltage detection means 7 that measures the voltage across the capacitor 3. The DC voltage Vdc may be obtained using other known methods.

  However, the PWM means 13 samples the DC voltage Vdc in order to consider the pulsation of the DC voltage Vdc. Since this sampling is specific to the present embodiment, it will be described below. However, for simplicity, in the following, the influence of resonance derived from the reactor is omitted from the waveform of the DC voltage Vdc. In the present invention, the sampling of the DC voltage Vdc taking into account the pulsation itself due to the resonance is not performed, but one of the objects is to prevent the phase of sampling the DC voltage Vdc from being affected by the resonance. It is.

  9 to 18 are graphs showing sampling of the DC voltage Vdc when full-wave rectification is performed on a three-phase AC having a power supply frequency of 50 Hz and an effective voltage value of 200V.

  FIG. 9 is a graph showing the DC voltage Vdc and the DC voltage Vdc1 obtained by sampling the DC voltage Vdc with a sampling frequency of 10 kHz. FIG. 10 is a graph showing the deviation Er1 (= Vdc−Vdc1) when the above sampling is performed. The DC voltage Vdc1 (discretized) closely follows the DC voltage Vdc, and it can be seen that the absolute value of the deviation Er1 is less than 5 V even when the fluctuation of the DC voltage Vdc is large. Therefore, it is desirable to employ 10 kHz as the sampling frequency employed in the detection means 83.

  FIG. 11 is a graph showing the DC voltage Vdc and the DC voltage Vdc2 obtained by sampling the DC voltage Vdc at a sampling frequency of 5 kHz and discretizing it. FIG. 12 is a graph showing the deviation Er2 (= Vdc−Vdc2) when the above sampling is performed. It can be seen that the absolute value of the deviation Er2 is less than 10 V even at the timing when the fluctuation of the DC voltage Vdc is large.

  FIG. 13 is a graph showing the DC voltage Vdc and the DC voltage Vdc3 obtained by sampling the DC voltage Vdc with a sampling frequency of 2.5 kHz. FIG. 14 is a graph showing the deviation Er3 (= Vdc−Vdc3) when the above sampling is performed. The DC voltage Vdc3 (discretized) does not sufficiently reflect the pulsation component when the DC voltage Vdc decreases from 270V to 245V and from 245V to 270V.

  FIG. 15 is a graph showing a DC voltage Vdc and a DC voltage Vdc4 obtained by sampling the DC voltage Vdc with a sampling frequency of 1 kHz. FIG. 16 is a graph showing the deviation Er4 (= Vdc−Vdc4) when the above sampling is performed. The DC voltage Vdc4 (discretized) does not sufficiently reflect the pulsation component even when the fluctuation of the DC voltage Vdc decreases from 283V to 270V, or when it increases from 270V to 283V.

  From the above, it is considered that a sampling frequency of about 10 kHz is required near the minimum voltage of the DC voltage Vdc, and a sampling frequency of about 2.5 kHz is sufficient near the maximum voltage of the DC voltage Vdc. Therefore, when the power supply frequency is 50 Hz and full-wave rectification of the three-phase alternating current is performed, 10 kHz and 2.5 kHz can be employed as the frequencies Fc1 and Fc2, respectively. Of course, appropriate values for the frequencies Fc1 and Fc2 are proportional to the power supply frequency.

  FIG. 17 shows that the sampling frequency is 10 kHz between the average value of the DC voltage Vdc and the DC voltage Vdc (when not affected by resonance) and the minimum voltage, and the sampling is performed between the average value of the DC voltage Vdc and the maximum voltage. It is a graph which shows DC voltage Vdc0 which sampled and discretized DC voltage Vdc with a frequency of 2.5 kHz. That is, here, the average value of the DC voltage Vdc (when not affected by resonance) is employed as the threshold voltage Vth (see FIG. 7).

  In FIG. 17, black triangles are timings when the sampling frequency is switched from the frequency Fc2 to the frequency Fc1, and white triangles are timings when the sampling frequency is switched from the frequency Fc1 to the frequency Fc2.

  The sampling of the DC voltage Vdc is performed at the timing when the switching carrier takes the top and / or the bottom. Therefore, it is desirable that the switching of the sampling frequency of the DC voltage Vdc is synchronized with the switching of the switching carrier. When the switching carrier is switched as described above, it is desirable that the maximum values or the minimum values of the waveforms match each other. Therefore, switching of the sampling frequency of the DC voltage Vdc does not necessarily occur at the timing when the DC voltage Vdc takes its threshold voltage Vth (here, the average value of the DC voltage Vdc), similarly to switching of the switching carrier.

  The DC voltage Vdc0 (discretized) is a value obtained by sampling the DC voltage Vdc with a switching carrier (hereinafter also referred to as “carrier C0”). The carrier C0 includes a carrier C1 having a frequency Fc1, a frequency It can be understood that the carrier C2 having Fc2 is obtained by switching between the black triangle and the white triangle.

  FIG. 18 is a graph showing the deviation Er0 (= Vdc−Vdc0) when the above sampling is performed. The absolute value of the deviation Er0 is less than 10 V, and it can be seen that the DC voltage Vdc0 (discretized) has good follow-up characteristics regardless of whether the change in the DC voltage Vdc is large or small.

  In this way, by switching and sampling the frequency of the switching carrier that is also used for sampling the DC voltage Vdc, the switching loss of the power converter 2 depending on the carrier frequency is suppressed while ensuring controllability. be able to.

  In addition, since the switching of the carrier frequency is based on the voltage Vg derived from the three-phase AC voltages Vr, Vs, and Vt, not based on the DC voltage Vdc that may be affected by the resonance derived from the reactor, the influence of the resonance is affected. I do not receive it. Rectification circuit 5 Three-phase AC voltages Vr, Vs, Vt supplied from three-phase power supply 6 are full-wave rectified to output DC voltage Vdc.

  Note that the PWM means 13 generates the switching carrier C1, and as described with reference to FIGS. 9 and 10, it is desirable that the sampling frequency employed in the detection means 83 is 10 kHz. Therefore, the voltage Vg generation means 8 may receive the switching carrier C1 from the PWM means 13 instead of receiving the frequency Fc1 from the first carrier frequency generation means 9.

Second embodiment.
The frequency of the switching carrier employed in the PWM means 13 is not an alternative as in the first embodiment, but may be selected by switching three or more frequencies.

  FIG. 19 is a graph for explaining the operation of the second exemplary embodiment of the present invention. Similarly to the first embodiment, the voltage Vg and the sampling frequency Fc are shown in FIGS. 19 (a) and 19 (b), respectively.

  Similar to the first embodiment, a period T2 in which the voltage Vg is equal to or higher than the voltage threshold Vth1 (or larger than the voltage threshold Vth1) is set. In addition, a period T3 in which the voltage Vg is less than the voltage threshold Vth1 (or less than the voltage threshold Vth1) and more than or equal to the voltage threshold Vth2 (or greater than the voltage threshold Vth2) is set. A period T3 in which the voltage Vg is less than the voltage threshold Vth2 (or less than or equal to the voltage threshold Vth2) is set. However, Vth1> Vth2.

  The change in the DC voltage Vdc is larger in the period T3 than in the period T2 and in the period T1 than in the period T3. Therefore, switching carrier frequencies Fc1, Fc2, and Fc3 are employed in periods T1, T2, and T3, respectively, and Fc1> Fc3> Fc2.

  For example, if Vth1 = Vth, the average value of the carrier frequency when the voltage Vg is less than the voltage threshold Vth1 (or less than or equal to the voltage threshold Vth1) is made smaller than the frequency Fc1 employed in the first embodiment. The average value of the carrier frequency over T2 and T3 can be further reduced.

  Hereinafter, the carrier C1 having the highest frequency Fc1 is also referred to as a main carrier of the switching carrier, and the carriers C2 and C3 having lower frequencies Fc2 and Fc3 are also referred to as subcarriers of the switching carrier.

  When there is one subcarrier, in the first embodiment, the main carrier corresponds to the carrier C1, and the subcarrier corresponds to the carrier C2.

  When there is one subcarrier, only one threshold value of the voltage Vg (the voltage threshold value Vth in the example of the first embodiment) is sufficient. If the threshold for switching between the main carrier and the subcarrier is grasped as the main threshold, the threshold for switching the subcarrier when there are a plurality of subcarriers can be grasped as the subthreshold. In the above example, the sub-threshold is the voltage threshold Vth2, which is a reference for the voltage Vg for switching the sub-carrier frequencies Fc2 and Fc3.

  FIG. 20 is a circuit diagram illustrating the configuration of the power conversion device according to the second embodiment. The said structure has the structure which substituted the control part 4 of the power converter device shown in 1st Embodiment by the control part 14. FIG. However, the PWM means 13 also generates the switching carrier C3 having the frequency Fc3 in synchronization with the switching carriers C1 and C2.

  The control unit 14 has a configuration in which the switching unit 11 is replaced with the switching unit 16 with respect to the control unit 4 and a third carrier frequency generation unit 15 is added. The third carrier frequency generation means 15 outputs the frequency Fc3. Here, there is a relationship of Fc3 = m × Fc1, Fc2 = n × Fc3 (m, n = 2, 3, 4,...). This is because the maximum values or the minimum values of the switching carriers are made to coincide with each other in the switching between the switching carriers, as described with reference to FIGS. 5 and 8 in the first embodiment. The difference between the operation of the first embodiment and the operation of the second embodiment can be grasped as a difference whether the coefficient m is 1 or 2 or more.

  FIG. 21 is a block diagram illustrating the configuration of the switching unit 16. The switching unit 16 includes a selection unit 161 and a size determination unit 162 in addition to the selection unit 111, the size determination unit 112, and the switching controller 113 included in the switching unit 11.

  The magnitude determiner 162 receives the voltage Vg1 and the voltage threshold Vth, and outputs a comparison result signal E. The comparison result signal E is activated when the voltage Vg1 is equal to or higher than the voltage threshold Vth, and deactivated when the voltage Vg1 is lower than the voltage threshold Vth.

  The selection unit 161 selects either the first carrier frequency Fc1 (here, input to the terminal A) or the third carrier frequency Fc3 (here, input to the terminal B) and outputs it from the terminal C.

  Unlike the first embodiment, the terminal A of the selection unit 161 is connected to the terminal C of the selection unit 161. Therefore, roughly, if the comparison result signal D is active (since the fluctuation of the DC voltage Vdc is moderate), the terminal B is connected to the terminal C and the frequency Fc2 is adopted as the frequency Fc. If the comparison result signal D is inactive, the terminal A is connected to the terminal C. Even if the comparison result signal D is inactive, that is, even if the voltage Vg1 is equal to or lower than the voltage threshold Vth2, one of the frequencies Fc1 and Fc3 is adopted as the frequency Fc depending on the function of the selection unit 161.

  As described with reference to FIG. 6 in the first embodiment, the timing for switching the frequency Fc is preferably synchronized with the switching carrier having the lower frequency. Therefore, the switching carrier C2 is input to the switching controller 113 also in the second embodiment.

  In the first embodiment, when three-phase alternating current is full-wave rectified, the frequency Fc1 is 200 times the power supply frequency (= 10 kHz / 50 Hz), and the frequency Fc2 is 50 times the power supply frequency (= 10 kHz / 50 Hz). Each was selected. That is, the case where Fc2 = Fc1 / 4 is illustrated. Also in the second embodiment, Fc3 = Fc1 / 2 can be set while Fc2 = Fc1 / 4. This corresponds to the above-described coefficients m and n both taking the value 2.

  The PWM means 13 employs the carriers C1, C2 and C3 as switching carriers corresponding to which of the frequencies Fc1, Fc2 and Fc3 the frequency Fc output from the switching means 16 is, and the switching control signal. G is generated. The DC voltage Vdc is sampled using the switching carrier.

  As described with reference to FIG. 19, since the switching carrier frequency is switched according to the change in the waveform of the voltage Vg, it is not affected by the resonance derived from the reactor, and the control followability is ensured. The average value of the frequency can be reduced, and the switching loss can be suppressed.

Deformation.
The PWM means 13 generates the switching carrier C1, and as described with reference to FIGS. 9 and 10, it is desirable that the sampling frequency adopted in the detection means 83 is 10 kHz. Therefore, in the first and second embodiments, the voltage Vg generation unit 8 receives the switching carrier C1 from the PWM unit 13 instead of receiving the frequency Fc1 from the first carrier frequency generation unit 9. Also good.

  22 and 23 are block diagrams showing modifications of the first embodiment, and FIGS. 24 and 25 are block diagrams showing modifications of the second embodiment, respectively.

  FIG. 22 shows a configuration of a control unit 4A that is a modification of the control unit 4, and FIG. 24 shows a configuration of a control unit 14A that is a modification of the control unit 14, respectively. In these configurations, the first carrier frequency generation unit 9, the second carrier frequency generation unit 10, and the third carrier frequency generation unit 15 respectively change the first carrier generation unit 9A and the carrier C2 that generate the carrier C1. The second carrier generating means 10A to be generated and the third carrier generating means 15A to generate the carrier C3 are replaced. The means 9A, 10A, and 15A for generating these carriers preferably operate in synchronism so that the timings for taking the maximum value and the minimum value of the carriers coincide with each other (see FIG. 8).

  In this case, since the PWM means 13 receives any of these carriers as the carrier C0 instead of the frequency Fc, it is not necessary to generate a carrier therein. Therefore, in FIGS. 22 and 24, the PWM means 13A (see FIGS. 1 and 20) in the control units 4 and 14 is replaced with the PWM means 13A that does not need to generate a carrier.

  In this case, as shown in FIG. 23, the switching means 11 replaces the frequencies Fc1 and Fc with the carriers C1 and C2, and as shown in FIG. 25, the switching means 16 replaces the frequencies Fc1, Fc2 and Fc3 with the carriers C1 and C2. C1, C2 and C3 are given respectively. Based on the voltage Vg1, any one selected from the carriers C1 and C2 is output from the switching unit 11 as the carrier C0. Alternatively, one of the carriers C1, C2, and C3 selected based on the voltage Vg1 is output from the switching unit 16 as the carrier C0.

  In the switching means 11 and 16, the switching controller 113 receives the carrier C2 from the second carrier generating means 10A, not from the PWM means 13. Further, the carrier C1 is input to the voltage Vg generating means 8 instead of the frequency Fc1. The voltage Vg generation means 8 may perform sampling based on the carrier C1, or may detect the frequency Fc1 from the carrier C1 and perform sampling using the frequency Fc1 as a sampling frequency.

  In the second embodiment, the case where three types of switching carrier frequencies are employed has been described. However, more types may be employed to finely switch the frequencies.

  In order for switching of switching carriers to be performed at a timing at which the maximum values or the minimum values coincide with each other, it is desirable that the following relationship be satisfied in order to maintain one cycle of each carrier.

  (i) Referring to FIG. 5, the maximum value of main carrier C1 is equal to the maximum value of all subcarriers C2, C3,..., and the minimum value of main carrier C1 and all subcarriers C2, C3,. It is equal to the minimum value.

  (ii) Referring to FIG. 8, the frequencies Fc2, Fc3,... of all the subcarriers are an integral fraction of the frequency Fc1 of the main carrier (the integer is 2 or more).

  (iii-a) All subcarriers having the lowest frequency (in accordance with the second embodiment, the carrier C2) take the maximum value, and all other subcarriers (second embodiment) According to the form, the carrier C3) and the main carrier C1 are synchronized with the maximum value. In this case, switching of the carrier for switching is performed at the timing when they take the vicinity of the maximum value.

  FIG. 26 is a graph illustrating carriers C1, C2, and C3 that satisfy the conditions (i), (ii), and (iii-a). Here, the frequency Fc3 of the subcarrier C3 is 1/2 of the main carrier C1, and the frequency Fc2 of the subcarrier C2 is 1/2 of the subcarrier C3, that is, 1/4 of the main carrier C1. As for the above-described coefficients m and n, the case where m = n = 2 is illustrated. Switching of the switching carrier is performed at a timing indicated by an arrow in the figure.

  The following condition (iii-b) may be satisfied instead of the above condition (iii-a).

  (iii-b) At the timing when the lowest frequency among all the subcarriers takes the minimum value, all the other subcarriers and the main carrier C1 take the minimum value and synchronize. In this case, switching of the carrier for switching is performed at the timing when they take the vicinity of the minimum value.

  FIG. 27 is a graph illustrating carriers C1, C2, and C3 that satisfy the conditions (i), (ii), and (iii-b). Here, as in the case illustrated in FIG. 24, the case of Fc2 = Fc3 / 2 = Fc1 / 4 (m = n = 2) is illustrated. Switching of the switching carrier is performed at a timing indicated by an arrow in the figure.

  Thus, when there are two subcarriers, it is desirable that the frequency Fc3 of one subcarrier C3 is an integral multiple of the frequency Fc2 of the other subcarrier C2. Of course, even when three or more subcarriers are set, it is desirable that subcarriers satisfy such conditions exist. Thereby, also when employ | adopting the carrier for switching by switching several subcarriers, the alternating voltage obtained from the power converter 2 by switching becomes a thing according to voltage command V *.

  In the above embodiment, the case where the rectifier circuit 5 performs full-wave rectification on the three-phase AC voltages Vr, Vs, and Vt supplied from the three-phase power source 6 and outputs the DC voltage Vdc has been described. However. The present invention can also be applied when the rectifying circuit 5 outputs a DC voltage Vdc by full-wave rectifying a single-phase AC voltage.

  In the case of full-wave rectification of a single-phase alternating current, the direct-current voltage Vdc varies at twice the power supply frequency. Therefore, an appropriate value for the frequencies Fc1 and Fc2 is 1/3 compared to the case of full-wave rectification of a three-phase AC if the power supply frequency is the same.

  Of course, as described in the first embodiment, when the single-phase alternating current is full-wave rectified, the appropriate frequencies Fc1, Fc2, and Fc3 are 1/3 of the case where the three-phase alternating current is full-wave rectified. And is proportional to the power supply frequency.

2 Power converter 3 Capacitor 4 Control unit 5 Rectifier circuit 11, 16 Switching unit 13 PWM unit (Modulation signal generation unit)

Claims (3)

A rectifier circuit (5) for rectifying an AC voltage (Vr, Vs, Vt) with a diode bridge and outputting a DC voltage (Vdc);
A capacitor (3) receiving the DC voltage at both ends;
A power converter (2) that converts the DC voltage into another AC voltage by switching;
Control unit (4) for controlling the power converter
And
The controller is
A modulation signal that generates a signal (G) for controlling switching of the power converter based on the switching carriers (C1, C2) and the command value (V *) of the other AC voltage and gives the signal to the power converter Generation unit (13)
Have
The power conversion device according to claim 1, wherein the frequency (Fc) of the switching carrier is variable according to a phase region divided by a voltage value of the AC voltage. Frequency setting unit (11, 16) for setting the frequency value based on the voltage value of the AC voltage
Further comprising
The power conversion device according to claim 1, wherein the switching carriers (C1, C2, C3) employed in the modulation signal generation unit have the frequency set by the frequency setting unit. Carrier generation means (9A, 10A, 15A) for generating a plurality of the switching carriers (C1, C2, C3) employed in the modulation signal generation unit;
A selection unit (11, 16) that selects one of the plurality of switching carriers and outputs one based on the voltage value of the AC voltage
The power converter according to claim 1, further comprising:

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