JP5891437B2 - Manufacturing method of vertical structure light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a light emitting device, and more particularly to a method for manufacturing a vertical structure light emitting device.

  In recent years, vertical type light emitting devices, so-called vertical light emitting devices, have been developed. A vertical light-emitting element has a p-type electrode and an n-type electrode arranged above and below a light-emitting layer that emits light when a current is passed, and emits light from the light-emitting layer by passing a current in the vertical direction (vertical direction) between both electrodes It is the light emitting element made to make it. Such vertical light-emitting elements are expected to achieve higher brightness than conventional light-emitting elements. For applications that require higher brightness and higher current, such as tunnel lights and car lights. Promising.

  As a method for manufacturing a vertical light-emitting element, for example, there is a method disclosed in Patent Document 1. According to the method of Patent Document 1, a dicing process (dividing into individual pieces) for separating the substrate into dies by dividing the substrate is performed. As a general process for dividing into individual pieces, there is cutting with a blade that rotates at high speed, but there are laser dicing and stealth dicing as alternative techniques. Laser dicing is an individualization method in which a substrate is separated into dies by irradiating the surface of the substrate with a laser. Stealth dicing is a process in which a substrate is irradiated with a laser to form a modified layer at an arbitrary position, and external stress is applied with tape expand etc. to grow cracks on the substrate surface and separate into dies. It is a tidy method.

Special table 2010-534943 gazette

  However, according to laser dicing and stealth dicing, the heat of the laser is transmitted to GaN (gallium nitride) and the substrate constituting the electrode, and thus the electrode and the substrate are deteriorated due to thermal damage. As described above, when the electrodes and the substrate constituting the light emitting element are deteriorated, the quality of the light emitting element is lowered, and as a result, the luminance of the light emitting element is lowered.

  Accordingly, an object of the present invention is to solve the above-described problems, and to provide a method for manufacturing a vertical structure light emitting device with less thermal damage by using plasma etching in the step of dividing the light emitting device. is there.

  In order to achieve the above object, the present invention is configured as follows.

  According to the first aspect of the present invention, there is provided a method of manufacturing a plurality of vertical structure light emitting devices by dividing a stack including a light emitting layer formed on a sapphire substrate, the stack on the sapphire substrate Layer dividing step for dividing the element along the individual element formation region, a separation step for disposing the divided layer part on the surface of the silicon substrate and separating it from the sapphire substrate, and individual elements on the back surface of the silicon substrate A mask placement step of placing a mask in a region corresponding to the formation region, and a plasma etching process is performed on the back surface of the silicon substrate to divide the silicon substrate on which each of the stacked portions is placed into pieces. There is provided a method for manufacturing a vertical light-emitting element, including a light-emitting element forming step of forming a plurality of vertical structure light-emitting elements.

  According to a second aspect of the present invention, there is provided a method of manufacturing a plurality of vertical structure light emitting devices by separating a stacked portion including a light emitting layer formed on a sapphire substrate, the stacked portion being formed on a silicon substrate. Separation process that is arranged on the surface and separated from the sapphire substrate, a mask arrangement process that arranges a mask in a region corresponding to each element formation region on the back surface of the silicon substrate, and a plasma etching process on the back surface of the silicon substrate The silicon substrate dividing step of dividing the silicon substrate along the individual element forming regions, and then performing plasma etching on the stacked portions to divide the stacked portions along the individual element forming regions. And a light emitting element forming step of forming a plurality of separated vertical structure light emitting elements.

  According to the third aspect of the present invention, in the first or second aspect, the method further includes a mask removing step of removing the mask arranged on the back surface of the silicon substrate by the mask arranging step by ashing after the light emitting element forming step. A method for manufacturing a vertical light emitting device is provided.

  By using plasma etching in the individualization step of the light emitting element, a manufacturing method of the vertical structure light emitting element with less thermal damage can be provided.

Sectional drawing of the 1st board | substrate handled with the manufacturing method of the vertical structure light emitting element of Embodiment 1 of this invention Sectional drawing of the 2nd board | substrate handled with the manufacturing method of the vertical structure light emitting element of Embodiment 1 of this invention Flowchart of the procedure of the manufacturing method of the vertical structure light emitting device of the first embodiment Sectional drawing of the 1st board | substrate which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 1. FIG. Sectional drawing of the 2nd board | substrate which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 1. FIG. Sectional drawing of the 2nd board | substrate which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 1. FIG. Sectional drawing of the vertical structure light emitting element which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 1 The flowchart of the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 2 of this invention Sectional drawing of the 1st board | substrate and 2nd board | substrate which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 2. FIG. Sectional drawing of the 2nd board | substrate which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 2. FIG. Sectional drawing of the 2nd board | substrate and vertical structure light emitting element which show the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 2 Sectional drawing of the vertical structure light emitting element which shows the procedure of the manufacturing method of the vertical structure light emitting element of Embodiment 2

  Embodiments according to the present invention will be described below in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a cross-sectional view (part) of the first substrate 1 in FIG. 1 regarding the configuration of the first substrate 1 and the second substrate 8 handled by the method for manufacturing a vertical structure light emitting element according to the first embodiment of the present invention. 2 and a cross-sectional view (part) of the second substrate 8 in FIG.

  As shown in FIG. 1, the first substrate 1 includes a sapphire substrate 2 and a stacked portion 3 disposed on the sapphire substrate 2. In the following description, the surface on the laminated portion 3 side of the first substrate 1 on the upper surface side in the drawing is the front surface 1A, and the lower surface side in the drawing is the back surface 1B.

The sapphire substrate 2 is a substrate formed of aluminum oxide (Al ₂ O ₃ ), and is configured in a plate shape having a thickness of 0.4 mm to 1.3 mm in the first embodiment.

  The stacked unit 3 includes a p layer 4, a light emitting layer 5, an n layer 6, and a buffer layer 7 in order from the top. The stacked unit 3 is disposed so as to be in contact with the upper surface of the sapphire substrate 2 at the buffer layer 7 disposed in the lowermost layer (see FIG. 1). In the first embodiment, the thickness of the laminated portion 3 is 5 μm to 10 μm.

  The p layer 4 and the n layer 6 are both layers formed of GaN (gallium nitride), and each function as a p-type electrode and an n-type electrode of the vertical structure light emitting element. As shown in FIG. 1, the p layer 4 disposed in the uppermost layer of the stacked unit 3 is disposed over the entire surface 1 </ b> A of the first substrate 1.

  The light emitting layer 5 is disposed between the p layer 4 and the n layer 6 and is an active layer that emits light when a current flows. When a current flows between the p layer 4 and the n layer 6, a current also flows through the light emitting layer 5 disposed therebetween, and the light emitting layer 5 emits light.

  FIG. 2 shows a second substrate 8 that is produced based on the first substrate 1 of FIG. 1 by using a method for manufacturing a vertical structure light emitting element described later. The second substrate 8 includes a silicon substrate 9, a metal layer 10, and a stacked portion 13. In the following description, the surface on the laminated portion 13 side of the second substrate 8 on the upper surface side in the drawing is the front surface 8A, and the lower surface side in the drawing is the back surface 8B.

  The silicon substrate 9 has a plate shape and is a substrate (Si substrate) formed of silicon (Si), and a boron-doped P-type silicon substrate is used.

  The metal layer 10 is a plate-like layer disposed on the silicon substrate 9 and is made of metal. In addition, the name “silicon substrate” in the present specification may be used not only as a name of a silicon substrate alone but also as a name of a silicon substrate including a metal layer.

  The laminated portion 13 is configured such that the laminated portion 3 shown in FIG. 1 is separated from the sapphire substrate 2 and arranged on the metal layer 10 (and the silicon substrate 9) in the upside down direction. The stacked portion 13 includes a buffer layer 7, an n layer 6, a light emitting layer 5, and a p layer 4 in order from the top, and the p layer 4 in the lowest layer (see FIG. 2) Has been placed. Moreover, the lamination | stacking part 13 is arrange | positioned in the state separated into pieces. In addition, the method of isolate | separating the lamination | stacking part 13 from the sapphire substrate 2, and the method of separating into pieces are demonstrated in description of the manufacturing method of the vertical structure light emitting element mentioned later.

  Next, a specific procedure of the method for manufacturing the vertical structure light emitting element according to the first embodiment will be described. In this description, FIG. 3 shows a flowchart showing the procedure of the manufacturing method of the vertical structure light emitting device, and the first substrate 1, the second substrate 8, and the vertical substrate for explaining each procedure shown in the flowchart of FIG. Sectional views (parts) of the mold structure light emitting device are shown in FIGS.

(Sapphire substrate preparation process)
First, in step S1 of the flowchart of FIG. 3, the first substrate 1 having the sapphire substrate 2 is prepared so as to perform the singulation process. As shown in FIG. 4A, the first substrate 1 includes a sapphire substrate 2 and a stacked portion 3 formed on the sapphire substrate 2 and including the light emitting layer 5.

(First mask placement step)
Next, a mask is disposed on the surface 1A side of the first substrate 1 (step S2). Specifically, after applying a resist 11 which is a photosensitive organic material to the surface 1A of the first substrate 1 by photolithography, the resist 11 is baked into a desired pattern using an exposure apparatus. Thereby, as shown in FIG. 4B, the resist 11 is arranged as a mask at a predetermined position on the surface 1A (on the p layer 4) of the first substrate 1. The resist 11 is disposed so as to correspond to the element formation region 17.

(First Plasma Etching Step (Laminate Part Separation Step))
Next, plasma etching is performed on the first substrate 1 on which the resist 11 is formed from the surface 1A side (step S3). Specifically, the etching process is performed on the stacked portion 3 that is partially protected by the resist 11 by generating plasma by switching the pressure conditions and gas conditions in the apparatus. In this laminated part singulation process, for example, an etching process is performed using a mixed gas containing chlorine as a main component, such as a mixed gas of Cl ₂ and Ar, and the laminated part 3 using the resist 11 on the surface of the laminated part 3 as a mask. The etching process is performed. As shown in FIG. 4C, the plasma is obtained until the stacked portion 3 is partially dug down along the individual element formation regions 17 by the plasma and is divided into individual pieces (individualized state). Continue processing. When the singulation of the stacked portion 3 is finished, the generation of plasma is stopped and the plasma etching is finished. Note that not only the laminated portion 3 but also the resist 11 is etched to some extent by plasma.

(First mask removal step)
Next, the mask (resist 11) remaining on each laminated part 3 separated into pieces is removed (step S4). Specifically, by using a predetermined removing liquid that reacts with the resist 11 and immersing the first substrate 1 in the removing liquid, the resist 11 is removed from the first substrate 1 as shown in FIG. Remove and peel. By removing the resist 11, the p layer 4 arranged as a layer immediately below the resist 11 is exposed on the surface 1 </ b> A of the first substrate 1.

(Placement process on silicon substrate)
Next, the laminated portion 3 from which the resist 11 has been peeled is disposed on the silicon substrate 9 (step S5). Specifically, first, a silicon substrate 9 on which a metal layer 10 is formed is prepared. With respect to the metal layer 10 on the silicon substrate 9, the first substrate 1 is disposed in a state of being reversed in the vertical direction. Thus, as shown in FIG. 5E, the first substrate 1 is disposed on the metal layer 10 (and the silicon substrate 9) so as to be in contact with the p layer 4 exposed on the surface 1A. .

(Separation process)
Next, in step S5, the first substrate 1 is turned upside down, and the sapphire substrate 2, which has been disposed on the uppermost side in the figure, is separated (lifted off) from the stacked portion 3 and the silicon substrate 9 ( Step S6). Specifically, separation is performed by melting the bonding surface of the buffer layer 7 to be bonded to the sapphire substrate 2 using laser lift-off using an excimer laser or the like. When the bonding surface of the buffer layer 7 is melted, as shown in FIG. 5F, the silicon substrate 9 and the silicon substrate 9 (and the metal layer 10) are divided along the individual element formation regions 17 as shown in FIG. The second substrate 8 including the stacked portions 13 arranged in the above manner is formed. The laminated portion 13 of the second substrate 8 is arranged such that the laminated portion 3 of the first substrate 1 is turned upside down (that is, the surface 1A of the laminated portion 3 faces the silicon substrate 9 side). The buffer layer 7 of the stacked portion 13 is exposed on the surface 8A of the second substrate 8.

(Buffer layer removal process)
Next, removal of the buffer layer 7 of the laminated part 13 arrange | positioned at the surface 8A side is performed (step S7). Specifically, the buffer layer 7 is removed from the second substrate 8 by dry etching or wet etching. As a result, as shown in FIG. 5G, the n layer 6 formed as a layer immediately below the buffer layer 7 is exposed on the surface 8A of the second substrate 8.

(BG tape application process)
Next, the BG tape 14 (back grind tape 14), which is a protective tape, is attached to the surface 8A of the second substrate 8 (step S8). Specifically, as shown in FIG. 6 (H), the second substrate 8 is turned upside down, and each laminated portion 13 on the surface 8A of the second substrate 8 is protected by the BG tape 14. It is assumed that it was done.

(Back grinding process)
Next, as shown in FIG. 6I, a grinding process is performed on the back surface 8B of the second substrate 8 (step S9). This grinding process is a process of thinning the silicon substrate 9. In the first embodiment, the process is performed until the thickness of the silicon substrate 9 becomes 50 μm to 200 μm, for example. In this grinding process, the surface 8A side (laminated portion 13) of the second substrate 8 is protected by the BG tape 14 attached.
(Second mask placement step)
Next, a mask is arranged on the back surface 8B side of the second substrate 8 (step S10). The specific mask arrangement method in step S10 is basically the same as that in step S2 (first mask arrangement step), and thus detailed description thereof is omitted. By performing step S <b> 10, as shown in FIG. 6J, a plurality of resists 12 are arranged in regions corresponding to the individual element formation regions 17.

(Second plasma etching process)
Next, a plasma etching process is performed on the second substrate 8 on which the resist 12 is formed from the back surface 8B side (step S11). Specifically, the plasma substrate is generated by switching the pressure condition and gas condition in the apparatus with an etching apparatus, so that the silicon substrate 9 exposed from between the resists 12 and the metal layer 10 disposed thereunder are exposed. An etching process is performed on. In this step S 11, for example, an etching process is performed using a mixed gas mainly composed of a fluorine-based gas such as SF ₆ , and the silicon substrate 9 and the metal layer 10 are etched using the resist 12 on the surface of the silicon substrate 9 as a mask ( Drilling down).

Of the singulation process of the second substrate 8, the etching of the silicon substrate 9 uses a mixed gas mainly composed of a fluorine-based gas such as SF ₆ , whereas the etching of the metal layer 10 is used. The etching gas is appropriately selected depending on the metal material. For example, when the metal layer 10 is formed of a nonvolatile material such as Au, a mixed gas of Cl ₂ and Ar is used. Au can be removed by sputtering due to collision of Ar in the mixed gas. When the metal layer 10 is formed of a material that can be removed by reactive etching, a mixed gas containing a component that reacts with the metal material being used and gasifies is used. When the metal layer 10 is made of, for example, Al, a mixed gas of Cl ₂ and BCl ₃ is used.

While the etching is in progress, a reaction product is generated and may adhere to the side wall of the resist 12 or the side wall of the groove of the silicon substrate 9 formed by etching. By using a mixed gas containing Cl ₂ , , The reaction product is removed and the etching surface is smoothed.

  By the etching process in step S11, the metal layer 10 and the silicon substrate 9 are etched using the resist 12 on the surface of the laminated portion 13 as a mask. At this time, the resist 12 is also gradually etched and retracted.

  As shown in FIG. 7K, when the silicon substrate 9 is dug down to a state where it is divided along the individual element formation regions 17 by plasma, the generation of plasma is stopped and the plasma etching is terminated. By dividing the silicon substrate 9 in the second substrate 8 in this way, a plurality of separated vertical structure light emitting elements 15 each including the laminated portion 13 and the silicon substrate 9 are formed. .

  In the second plasma etching step, the silicon substrate 9 is dug and divided by plasma etching instead of laser or stealth, so that thermal damage to the vertical structure light emitting element 15 can be reduced.

(Second mask removal step)
Next, the mask (resist 12) remaining on the back surface 15B of each vertical structure light emitting element 15 is removed (step S12). Specifically, by performing ashing using oxygen plasma, the resist 12 is removed and peeled from the back surface 15B of the vertical structure light emitting element 15 as shown in FIG. By peeling off the resist 12, the silicon substrate 9 is exposed on the back surface 15B of the vertical structure light emitting element 15. In step S <b> 12, the surface 15 </ b> A of the vertical structure light emitting element 15 is protected by the pasted BG tape 14. In the first embodiment, the mask removal method by ashing has been described. However, the present invention is not limited to such a case. For example, a predetermined removal liquid is used as in the first mask removal step, and a vertical type is used for the removal liquid. The resist may be peeled off by immersing the structured light emitting element (WET type).

(Transfer process)
Next, the vertical structure light emitting element 15 is transferred to the adhesive tape (step S13). Specifically, as shown in FIG. 7M, the back surface 15B of the vertical structure light emitting element 15 is attached to the adhesive tape 16, and the BG tape 14 attached to the front surface 15A is removed. Thereby, it will be in the state by which the some vertical structure light emitting element 15 separated into pieces on the adhesive tape 16 was affixed. The vertical structure light emitting elements 15 affixed to the adhesive tape 16 are then individually picked up and used. As the adhesive tape, a dicing tape for fixing a semiconductor wafer can be used.

  According to the first embodiment, since the plasma etching is used in the singulation process for manufacturing the vertical structure light emitting element 15, the vertical structure light emitting element 15 with less thermal damage to the vertical structure light emitting element 15. This manufacturing method can be realized.

  Further, according to the first embodiment, in the second mask removing step, the resist 12 can be removed in a state where both the p-layer 4 and the n-layer 6 are protected on the surfaces other than the side surfaces. A mask removal method can be employed. For example, if the resist 12 is removed by ashing using oxygen plasma as in the first embodiment, the process can be simplified as compared with the case where the WET method is used.

(Embodiment 2)
In addition, this invention is not limited to the said Embodiment 1, It can implement in another various aspect. For example, the manufacturing method of the vertical structure light emitting element concerning Embodiment 2 of this invention is demonstrated. In the first embodiment, the lamination part is separated before the separation step (step S6), whereas in the second embodiment, the lamination part is separated after the separation step. A method for manufacturing a structured light emitting device is employed. Hereinafter, this difference will be mainly described. Note that the same reference numerals are assigned to the same components as those used in Embodiment 1, and the description thereof is omitted.

  FIG. 8 is a flowchart showing the procedure of the method for manufacturing the vertical structure light emitting element of the second embodiment, and FIGS. 9 to 12 are cross-sectional views of the first substrate and the second substrate for explaining each procedure. Shown in

(Sapphire substrate preparation process)
In step S31 of the flowchart of FIG. 8, as in the first embodiment, the first substrate 1 having the sapphire substrate 2 is prepared to perform the singulation process. As shown in FIG. 9A, the first substrate 1 includes a sapphire substrate 2 and a stacked portion 3 formed on the sapphire substrate 2 and including the light emitting layer 5.

(Placement process on silicon substrate)
Next, the laminated portion 3 of the first substrate 1 is disposed on the silicon substrate 9 (step S32). Specifically, after preparing the silicon substrate 9 having the metal layer 10 formed on the upper surface, the first substrate 1 is turned upside down with respect to the metal layer 10 on the silicon substrate 9. Deploy. Thus, as shown in FIG. 9B, the first substrate 1 is arranged on the metal layer 10 (on the silicon substrate 9) so as to be in contact with the p layer 4 exposed on the surface 1A.

(Separation process)
Next, the sapphire substrate 2 arranged on the uppermost side in the drawing is separated from the stacked portion 3 and the silicon substrate 9 (step S33). The bonding surface of the buffer layer 7 to be bonded to the sapphire substrate 2 is melted by using laser lift-off or the like. Thereby, as shown in FIG. 9C, the second substrate 21 including the silicon substrate 9 and the stacked portion 13 arranged on the silicon substrate 9 (and the metal layer 10) is formed.
(Buffer layer removal process)
Next, the buffer layer 7 in the stacked portion 13 disposed on the surface 21A side is removed (step S34). Specifically, the buffer layer 7 is removed from the second substrate 21 by dry etching or wet etching. As a result, as shown in FIG. 10D, the n layer 6 formed as a layer immediately below the buffer layer 7 is exposed on the surface 21 </ b> A of the second substrate 21.

(BG tape application process)
Next, the BG tape 22 (back grind tape 22), which is a protective tape, is attached to the surface 21A of the second substrate 21 (step S35). Specifically, as shown in FIG. 10E, the laminated portion 13 on the surface 21A of the second substrate 21 is protected by the BG tape 22 after the second substrate 21 is turned upside down. It is assumed that

(Back grinding process)
Next, as shown in FIG. 10F, a grinding process is performed on the back surface 21B of the second substrate 21 (step S36). This grinding process is a process for thinning the silicon substrate 9. In this grinding process, the surface 21A side (laminated portion 13) of the second substrate 21 is protected by the BG tape 22 attached.

(Mask placement process)
Next, on the back surface 21B side of the second substrate 21, photolithography is performed to form a mask (resist 23) (step S37). Specifically, as shown in FIG. 11G, a resist is formed at a predetermined position on the back surface 21B of the second substrate 21 (a region corresponding to each element formation region 17 in the second embodiment). 23 is arranged.

(First plasma etching process (silicon substrate dividing process))
Next, a plasma etching process is performed on the second substrate 21 on which the resist 23 is formed from the back surface 21B side (step S38). Specifically, the etching process is performed on the silicon substrate 9 and the metal layer 10 using the resist 23 on the surface of the silicon substrate 9 as a mask by generating plasma with an etching apparatus and performing an etching process using a predetermined gas. Is called. As shown in FIG. 11H, the silicon substrate 9 (and the metal layer 10) is dug down by plasma, and is divided along the individual element formation regions 17 so as to partially expose the stacked portion 13 ( The plasma treatment is continued until the individual state is obtained. When the division of the silicon substrate 9 is finished, the generation of plasma is stopped and the plasma etching is finished.

(Second plasma etching process (light emitting element forming process))
Next, a plasma etching process is performed from the back surface 21B side on the laminated portion 13 partially exposed by the execution of step S38 (step S39). Specifically, as in step S38, plasma is generated by the etching apparatus and, for example, silicon is etched by using a mixed gas containing chlorine as a main component, such as a mixed gas of Cl ₂ and Ar. Etching of the laminated portion 13 is performed using the resist 23 on the surface of the substrate 9 as a mask. As shown in FIG. 11 (I), the laminated portion 13 is dug down by plasma, and is divided along the individual element formation regions 17 so as to partially expose the BG tape 22 (individual state). The plasma treatment is continued until When the division of the stacked portion 13 is finished, the generation of plasma is stopped and the plasma etching is finished. By dividing the laminated portion 13, a plurality of separated vertical structure light emitting elements 24 each including the divided laminated portion 13 and the silicon substrate 9 are formed.

(Mask removal process)
Next, the mask (resist 23) remaining on each vertical structure light emitting element 24 that has been separated into pieces is removed (step S40). Specifically, by performing ashing using oxygen plasma, the resist 23 is removed and peeled from the vertical structure light emitting element 24 as shown in FIG.

(Transfer process)
Next, the separated vertical structure light emitting element 24 is transferred to the adhesive tape 16 (step S41).

  According to the second embodiment, even when the layered portion 13 is separated after the separation step, plasma etching is used in the separation step for manufacturing the vertical structure light emitting element 24. A manufacturing method of a vertical structure light emitting element with little thermal damage can be realized.

  In the above-described embodiment, the case where the metal layer 10 is patterned by plasma etching together with the silicon substrate 9 in the plasma etching step has been described. By patterning the metal layer 10 before plasma etching, only the silicon substrate 9 may be plasma etched without plasma etching the metal layer 10 in the plasma etching step.

  Moreover, in the said embodiment, although the back surface grinding process which grinds the back surface 8B of the 1st board | substrate 8 is implemented, it is not restricted to such a case, For example, the thickness of the 1st board | substrate 8 is made small beforehand. This back surface grinding step may be omitted.

  It is to be noted that, by appropriately combining any of the above-described various embodiments, the effects possessed by them can be produced.

  INDUSTRIAL APPLICABILITY The present invention is useful for a method for manufacturing a plurality of vertical structure light emitting elements that are separated by dividing a silicon substrate on which a laminated portion including a light emitting layer is formed.

DESCRIPTION OF SYMBOLS 1 1st board | substrate 2 Sapphire board | substrate 3 Laminated | stacking part 4 p layer 5 active layer 6 n layer 7 buffer layer 8 2nd board | substrate 9 silicon substrate 10 metal layer 11 resist 12 resist 13 laminated part 14 BG tape 15 vertical structure light emitting element 16 Ring frame 17 Element formation region 21 Second substrate 22 BG tape 23 Resist 24 Vertical structure light emitting element

Claims (3)

A method of manufacturing a plurality of vertical structure light emitting devices by separating a stacked portion including a light emitting layer formed on a sapphire substrate,
A laminated part dividing step of dividing the laminated part on the sapphire substrate along each element formation region;
A separation step of placing the divided laminated portion on the surface of the silicon substrate and separating it from the sapphire substrate;
A mask placement step of placing a mask in a region corresponding to each element formation region on the back surface of the silicon substrate;
Silicon with the backgrinding tape applied to the surface of the silicon substrate, with each laminated part protected by the backgrinding tape , plasma etching is performed on the back surface of the silicon substrate, and each laminated part is disposed. A method of manufacturing a vertical structure light emitting element, comprising: a light emitting element forming step of dividing a substrate to form a plurality of individual vertical structure light emitting elements. A method of manufacturing a plurality of vertical structure light emitting devices by separating a stacked portion including a light emitting layer formed on a sapphire substrate,
A separation step of disposing the laminated portion on the surface of the silicon substrate and separating it from the sapphire substrate;
A mask placement process in which a back grind tape is applied to the surface of the silicon substrate, and a mask is placed in a region corresponding to each element formation region on the back surface of the silicon substrate in a state where each laminated portion is protected by the back grind tape. When,
A silicon substrate dividing step of performing plasma etching on the back surface of the silicon substrate to divide the silicon substrate along each element formation region;
Thereafter, a plasma etching process is performed on the stacked portion, the stacked portion is divided along each element forming region, and a plurality of vertical structure light emitting elements separated into individual pieces are formed. The manufacturing method of a vertical structure light emitting element.   The manufacturing method of the vertical structure light emitting element of Claim 1 or 2 further including the mask removal process of removing the mask arrange | positioned by the mask arrangement | positioning process by the ashing after the light emitting element formation process.

Images