JP5885112B2 - Substrates for electrical circuits and methods for forming substrates - Google Patents

Description

      The present invention relates generally to a non-ferrous metal substrate for electrical circuits and to a process for preparing a non-ferrous metal substrate for plating.

      Anodization is an electrolytic passivation process that increases the thickness of the native oxide coating or layer on the surface of the aluminum substrate. Anodization improves the corrosion resistance and wear resistance and results in an electrically non-conductive surface.

      Anodizing changes the microtexture of the metal part or surface of the substrate and changes the crystal structure of the metal near the surface. As is well known in the prior art, the anodized layer is inherently porous and a sealing process is often used to minimize porosity. Anodized aluminum surfaces are harder than aluminum; in general, the thicker the anodized layer, the harder the surface and the less porous.

      It is common and well known to anodize an aluminum substrate to form a porous anodized layer as a surface pretreatment. Anodized aluminum has been investigated as a dielectric material used in electronic packaging. Thick anodized layers are prone to cracking because the deposited aluminum substrate has high thermal expansion properties while the anodized layers have very low thermal expansion values. Different expansion rates cause stress in the brittle anodized layer leading to cracks, and the thicker the anodized layer, the greater the risk of cracking.

      Plating over aluminum and aluminum alloys in the untreated oxidized and anodized state is generally a very poor adhesion of the plated layer or between the plated layer and the base aluminum substrate. It leads to either or both of the current leakage. This leakage of current between the plated layer and the aluminum substrate through the anodized layer is due to the electronic circuitry formed by the plated layer and the electrons electrically connected to the plated layer. Reduce the operating efficiency of components.

      A method of preparing a non-ferrous metal substrate for plating, a method of plating an electrical circuit on an anodized layer formed on the surface of the non-ferrous metal substrate, and the resulting integrated substrate circuit heat sink are disclosed.

      A method of preparing an anodized layer for plating within a non-ferrous metal substrate having an anodized layer thereon is an anodized layer from a non-ferrous metal substrate in a solution of an electrically non-conductive microfiller. Electrically insulating. Electrically isolating the anodized layer from the non-ferrous metal substrate in the solution of electrically non-conductive microfiller, soaking the anodized layer in the solution for at least approximately 5-10 minutes, from the solution Removing the anodized layer and drying the anodized layer. Soaking the anodized layer in the solution preferably includes immersing the non-ferrous metal substrate in the solution. This method can still be used to remove the excess solution from the anodized layer between the removal step and the drying step by wiping the excess solution from the anodized layer, such as with a clean, dry quality, non-sticky towel or squeegee. The method further includes the step of removing. In order to form a substrate for an electrical circuit, the method then includes activating the anodized layer and plating the anodized layer.

      In accordance with the principles of the present invention, a method for preparing a non-ferrous metal substrate for plating is the step of providing an anodized layer on a non-ferrous metal substrate, the anodized layer facing the outer surface and the non-ferrous metal substrate. A step having an inner surface, applying an electrically non-conductive microfiller to the anodized layer, and filling the anodized layer between the outer surface and the inner surface of the anodized layer Forming in the anodized layer, and leaving an unfilled area of the anodized layer between the outer surface of the anodized layer and the filled area, and the filled area Electrically isolating regions not filled from the aluminum substrate. Applying the electrically non-conductive microfiller to the anodized layer preferably includes providing a solution of the electrically non-conductive microfiller and applying the solution to the anodized layer. Applying the solution to the anodized layer includes immersing the anodized layer in the solution. Preferably, immersing the anodized layer in the solution comprises immersing the anodized layer in the solution for at least approximately 5-10 minutes. To form a substrate for an electrical circuit, the method then includes activating the unfilled area and then plating.

An integrated substrate circuit heat sink constructed and arranged according to the principles of the present invention includes a non-ferrous metal substrate having a base surface and an anodized layer applied to or otherwise formed on the base surface. . The anodized layer has an outer surface to be plated and an opposing inner surface that is applied to the base surface of the non-ferrous metal substrate. The anodized layer has a thickness from its outer surface to its inner surface. The anodized layer has a filled area and an unfilled area. The filled region is formed between the outer surface of the anodized layer on the base surface of the non-ferrous metal substrate and the inner surface of the anodized layer. An unfilled region is formed between the outer surface of the anodized layer and the filled region. Thus, an unfilled region of the anodized layer is formed over the filled region of the anodized layer. The filled and unfilled regions each have a thickness that is less than the thickness of the anodized layer. The thickness of the filled area is less than the thickness of the unfilled area in certain embodiments of the invention. The filled region contains an electrically nonconductive microfiller in that it is filled with an electrically nonconductive microfiller that characterizes it as a filled region. The unfilled area is not filled with an electrically non-conductive microfiller and thus characterizes it as an unfilled area. The unfilled areas are activated or metallized and then plated with conductive traces to form an integrated substrate circuit heat sink, which exhibits excellent heat-dissipating properties and is robust and heat resistant And delamination resistance. The provision of a filled region that electrically insulates the unfilled region from the non-ferrous metal substrate prevents electrical leakage between the unfilled region and the non-ferrous metal substrate, and thus on the unfilled region. Ensure maximum operational efficiency of the circuitry and electronic components to be deposited.
Refer to the drawing:

FIG. 2 is a highly generalized schematic cross-sectional view of an integrated substrate circuit heat sink constructed and arranged in accordance with the principles of the present invention; FIG. 2 is an enlarged, highly generalized vertical cross-sectional view of an activated filled region of an anodized layer formed on the surface of a non-ferrous metal substrate in accordance with the principles of the present invention.

      A method of plating an electrical circuit on an anodized layer formed on the surface of a non-ferrous metal substrate is disclosed. The non-ferrous metal substrate is preferably aluminum and may further comprise other non-ferrous metals such as magnesium, titanium or other selected non-ferrous metals. The anodized layer is conventionally formed on the non-ferrous metal substrate using a conventional anodizing process well known in the prior art. The anodized layer has an inner surface facing the outer surface and the surface that is the base surface of the non-ferrous metal substrate. The anodized layer is porous in nature and is anodized in the region filled between the outer and inner surfaces of the anodized layer filled with electrically non-conductive microfillers Leaving an unfilled area between the outer surface of the anodized layer and the filled area, thereby filling the anodized layer with the filled area, In addition, the unfilled region of the anodized layer from the non-ferrous metal substrate is electrically insulated to prevent electrical leakage therebetween. An anodized layer is filled with an electrically non-conductive microfiller by filling the pores inherent in the anodized layer with an electrically non-conductive microfiller to fill the region filled in the anodized layer. Form. The step of filling the anodized layer with an electrically non-conductive microfiller is filled into the anodized layer in preparation for plating the unfilled area placed over the filled area. Forming a region. The unfilled region is electrically filled from the base non-ferrous metal substrate by the filled region that is not filled by the electrically non-conductive microfiller and prevents electrical leakage between the unfilled region and the base non-ferrous metal substrate. Insulated. The surface or base surface of the base non-ferrous metal substrate that functions as a heat sink is below the filled area. The unfilled area is activated or metallized, and this activated unfilled area is then plated with conductive traces to form a substrate for an electrical circuit.

      In accordance with the principles of the present invention, a method for preparing a non-ferrous metal substrate for plating is the step of providing an anodized layer on a base surface of a non-ferrous metal substrate, the anodized layer comprising an outer surface and a non-ferrous substrate. A step having an opposed inner surface directed to the base surface of the metal substrate, and applying an electrically non-conductive microfiller to the anodized layer, between the outer surface and the inner surface of the anodized layer Forming a filled region within the anodized layer, and leaving an unfilled region of the anodized layer between the outer surface of the anodized layer and the filled region. . The filled area is the area of the anodized layer that is filled with non-conductive microfiller, and the unfilled area is the area of the anodized layer that is not filled with non-conductive microfiller. The anodized layer is porous in nature and the filled layer is characterized in that the pores in the filled region are filled with electrically non-conductive microfillers. The unfilled layer is characterized in that the pores in the unfilled area are not filled with the electrically nonconductive microfiller. The filled region of the anodized layer electrically seals the anodized layer against the base surface of the non-ferrous metal substrate and the non-filled region of the anodized layer Insulate from the substrate and prevent leakage of current between the unfilled region of the anodized layer and the non-ferrous metal substrate. The anodized layer is initially formed by conventional and well-known techniques and has a preferred thickness of approximately 40-80 microns. Also, applying an electrically non-conductive microfiller to the anodized layer fills the pores inherent in the anodized layer, which forms a filled region in the anodized layer To do. The base of a non-ferrous metal substrate that functions as a heat sink is below the filled area, and the unfilled area is available for plating to form the substrate for the electrical circuit.

      Applying the electrically non-conductive microfiller to the anodized layer comprises preparing a solution of the electrically non-conductive microfiller; and in accordance with the principles of the present invention, the non-conductive microfiller is applied to the anodized layer. Apply the solution to form a filled region to electrically insulate the anodized layer from the non-ferrous metal substrate in preparation for activation or metallize the anodized layer in preparation for plating Including the steps of: The solution of the electrically nonconductive microfiller is a filler solution. Preferred filler solutions are lacquers such as 2 parts by volume 2K P190-625 Nexa brand lacquer, 1 part by volume curing agent such as 2K P210-926 Nexa brand hardener, and 0.5 parts by volume 2K P850-1493 Nexa brand. It consists of a thinner like a thinner. The step of electrically insulating the anodized layer from the non-ferrous metal substrate is performed in a filler solution. Preferably, applying the filler solution to the anodized layer to form a filled region comprises immersing the anodized layer in the filler solution, which in a preferred embodiment is a non-ferrous metal substrate. Is carried out by immersing in a filler solution. The anodized layer is immersed in the filler solution for a duration of impregnation sufficient to allow the filler solution to impregnate the anodized layer and the non-ferrous metal substrate is filled with an electrically non-conductive microfiller. The outer and inner surfaces of the anodized layer, filling part of the thickness of the anodized layer between the outer surface of the anodized layer at the base surface and the inner surface of the anodized layer A region filled with and leaving an unfilled region of the anodized layer between the outer surface of the anodized layer and the filled region, thereby filling the region Seals the anodized layer to electrically insulate the unfilled region of the anodized layer from the aluminum substrate and prevent electrical leakage therebetween. In this embodiment, the impregnation duration is at least approximately 5-10 minutes. This preferred impregnation duration or impregnation time is that of the layer anodized at the base surface of the non-ferrous metal substrate by the electrically non-conductive microfiller with sufficient time for the filler solution to impregnate the anodized layer. Fill part of the thickness of the anodized layer between the outer surface and the inner surface of the anodized layer, and fill the area between the outer surface and the inner surface of the anodized layer While making sure to leave an unfilled region of the anodized layer between the outer surface of the further anodized layer and the filled region. The term “at least about 5-10 minutes” means 5-10 minutes +/− 30-45 seconds.

      The anodized layer into the filler solution for a duration of impregnation sufficient to fill the anodized layer with an electrically non-conductive microfiller to form a filled region within the anodized layer. After leaving the unfilled area of the layer anodized according to the invention above the soaked and filled area, the method then removes the non-ferrous metal substrate from the filler solution by simply removing the non-ferrous metal substrate from the filler solution. Removing the anodized layer, and preferably leaving the filled region of the non-ferrous metal substrate to dry at room temperature for approximately 30-90 minutes to anodize the electrically non-conductive microfiller The non-ferrous metal substrate and the anodized layer are dried by leaving them adhered within the layer that has been anodized according to the principles of the present invention Comprising the steps of forming a filled area. Between the step of removing the anodized layer from the filler solution in the preferred embodiment and the drying step, the method is still subject to an excess filler solution, such as by a clean, dry quality, non-sticky towel or squeegee. The method further includes removing excess filler solution from the filled region by wiping from the anodized layer. To form a substrate for an electrical circuit, the method then activates the unfilled area of the anodized layer over the filled area of the anodized layer in preparation for plating / metal And then plating the anodized layer in the unfilled area, which is considered plating of the unfilled area.

      The unfilled areas are conventionally activated or metallized and then plated with a known and readily available solution of palladium activator. After activation of the unfilled area, the unfilled area is the activated unfilled area. Prior to activating the unfilled region, it can be masked with a selected or predetermined circuit pattern. The step of plating the unfilled areas activated to form the conductive traces is performed after masking and after the unfilled areas are activated. According to a preferred embodiment, the unfilled areas were first plated by nickel plating, and the plated nickel was then plated with copper, and the plated copper was then plated with nickel and plated Nickel plated on copper is then plated with gold. Rather than gold, the plated copper layer over the plated nickel layer is free of additional plated metal or, if necessary, by silver, tin or other suitable metal instead of gold Can be plated. The plating process is performed in conventional and well-known metal baths according to conventional and well-known plating techniques well known to those skilled in the art, and can be performed alone or in a combination of plated layers.

      As an example, FIG. 1 is a highly generalized schematic cross-sectional view of an integrated substrate circuit heat sink 10 constructed and arranged according to the method described above, facing the outer surface 13A and the base surface 12 of the substrate 11. A non-ferrous metal substrate 11 having a base surface 12 formed by an anodized layer 13 having an inner surface 13B. A non-conductive microfiller is applied to the anodized layer 13 at the outer surface 13A, and the anodized layer 13 filled region 40 and the anodized layer 13 filled on the filled region 40 are filled. An unfinished region 41 is formed in the anodized layer. Surface 13A is formed by masking 19 applied to define regions 19A, 19B, and 19C to be traced by the conductive traces. A filled region 40 and an unfilled region 41 are formed in each trace region 19A, 19B, and 19C.

      The anodized layer 13 is essentially porous in that it has pores. FIG. 2 shows a highly enlarged and highly of unfilled region 41 and filled region 40, respectively, of anodized layer 13 formed on base surface 12 of substrate 11 in accordance with the principles of the present invention. It is a generalized vertical sectional view. The vertical columns represented in the anodized layer 13 generally represent the pores inherent in the anodized layer 13 and are shown for purposes of illustration and reference.

      Referring to FIG. 2, the anodized layer 13 has a thickness T1 at the base surface 12 of the substrate 11 from the outer surface 13A to the inner surface 13B. The thickness T1 of the anodized layer 13 in FIG. 1 is exaggerated for convenience of explanation. A filled region 40 is formed on the base surface 12. A filled region 40 is formed between the outer surface 13A of the layer 13 anodized at the base surface 12 of the substrate 11 and the inner surface 13B of the anodized layer 13 and is outside the anodized layer 13. An unfilled region 41 is left on the filled region 40 between the surface 13A and the filled region 40. A filled region 40 is formed at the bottom of the anodized layer 13 along the base surface 12 of the substrate 11. The filled region 40 is formed between the inner surface 13B of the anodized layer 13 and the unfilled region 41, and the unfilled region 41 is filled with the filled region 40 and the anodized layer 13. Between the outer surface 13A and the outer surface 13A. The filled region 40 has a thickness T2 that is approximately 30 percent of the thickness T1 of the anodized layer 13, and the unfilled region 41 is approximately 70 of the thickness T1 of the anodized layer 13. It has a percent thickness T3. The thickness T2 of the filled layer 40 and the thickness T3 of the unfilled layer 41 can be varied as required. Thickness T2 is the bottom thickness of thickness T1 of anodized layer 13, and thickness T3 is the top thickness of thickness T1 of anodized layer 13. The filled region 40 seals the anodized layer 13 and electrically insulates the unfilled region 41 of the anodized layer 13 from the base surface 12 of the substrate 11 to provide electrical insulation therebetween. Prevent leaks. Region 41 not filled with each trace region 19A, 19B, and 19C is activated, ie, it has been metallized with palladium activator and activated in each trace region 19A, 19B, and 19C or The metallized unfilled region 41 is then plated with conductive traces 50. Conductive trace 50 forms part of the substrate circuit.

      In accordance with the method described above, the traces 50 are applied to the nickel plated layer 60, the nickel plated layer 60, each applied to the metallized unfilled region 41. A copper plated layer 61; a nickel plated layer 62 applied to the copper plated layer 61; and a gold plated applied to the nickel plated layer 62. Layer 63. Electrical component 70 is mounted on trace 50 plated layer 63 in trace region 19B, and trace 50 plated layer 63 in trace regions 19A and 19C is associated with electrical component 70 by corresponding lead 71. Is electrically connected. The resulting integrated substrate circuit heat sink 10 formed in accordance with the principles of the present invention exhibits excellent heat-dissipating properties, and the preparation of the filled region 40 is an unfilled region 41 and an anodized layer. The outer surface 13A of the layer 13 anodized in the unfilled region 41 of 13 is electrically insulated from the substrate 11 and thereby the outer surface 13A of the unfilled region 41 of the anodized layer 13 and the substrate 11, thus ensuring the maximum operating efficiency of the circuits and electronic components deposited on the unfilled region 41.

      The resulting integrated substrate circuit heat sink 10 formed in accordance with the principles of the present invention not only exhibits excellent heat-dissipating properties, but is also sturdy, resists delamination and is resistant to high operating temperatures. In a drop test, a 3 × 3 × 0.125 inch integrated substrate circuit heat sink constructed and arranged according to the principles of the present invention is dropped 10 times onto a cement floor from a height of 7 feet and the integrated substrate circuit The performance of the heat sink was not affected. In the delamination test, an adhesive tape is applied over the plated surface of an integrated circuit board heat sink constructed and arranged according to the principles of the present invention and pulled apart at a 45 degree angle, and delamination occurs. There wasn't. In a temperature test, an integrated substrate circuit heat sink constructed and arranged according to the principles of the present invention is fired in an oven at 260 degrees Celsius for 20-40 seconds, subjected to the drop test described above, and then as described above. The delamination test was performed and the performance of the integrated substrate circuit heat sink was not affected.

      The method described within this specification provides a low cost integrated circuit packaging alternative and has multiple sides having opposite sides of the non-ferrous metal substrate and more than two sides on one side of the non-ferrous metal substrate. It can be implemented on multiple sides of a non-ferrous metal substrate.

      The present invention has been described above with reference to preferred embodiments. However, one of ordinary skill in the art appreciates that modifications and changes can be made within the described embodiments without departing from the spirit and scope of the invention. Various modifications and changes to the embodiments selected herein for purposes of illustration will readily occur to those skilled in the art. Unless such changes and modifications depart from the spirit of the invention, they are intended to be included within their scope.

      The claimed invention is as follows, fully describing the invention in clear and concise terms to enable those skilled in the art to understand and practice it:

10 Integrated substrate circuit heat sink 11 Non-ferrous metal substrate 12 Base surface 13 Anodized layer 13A Outer surface 13B Inner surface 19 Masking 19A, 19B, 19C Trace region 40 Filled region 41 Unfilled region 50 Conductive trace 60 Nickel Plated layer 61 Copper plated layer 62 Nickel plated layer 63 Gold plated layer 70 Electrical components 71 Leads T1, T2, T3 Thickness

Claims (5)

  A method of forming a substrate for an electrical circuit comprising:
  Forming an anodized layer on a non-ferrous metal substrate;
  Filling a hole existing in the anodized layer with an electrically non-conductive microfiller to form a filling region, the outer surface side of the anodized layer on the hole being electrically connected to the hole; A step in which an unfilled area is left unfilled with non-conductive microfillers;
  Activating a portion corresponding to the trace region of the unfilled region;
  Plating a portion corresponding to the trace region of the unfilled region,
  The filled region of the anodized layer electrically insulates the unfilled region from the non-ferrous metal substrate; and
  A method wherein the trace region is part of a substrate circuit. The step of filling the electrically nonconductive microfiller includes:
The electrical nonconductor solution step of preparing a micro filler, and the include anodized step of applying the solution to the layer, the method described in claim 1. The method of claim 2 , wherein the step of applying the solution to the anodized layer comprises immersing the anodized layer in the solution. The method according to claim 3, characterized in that immersing the anodized layer between 5-10 minutes the solution.   A substrate for an electrical circuit comprising a non-ferrous metal substrate, an anodized layer on the non-ferrous metal substrate, and a plated layer on the anodized layer,
  The anodized layer comprises an outer surface, an opposite inner surface facing the non-ferrous metal, a filled region, and an unfilled region;
  The filling region is located between an inner surface of the anodized layer on the non-ferrous metal substrate side and the non-filled region of the anodized layer;
  The unfilled region is located between the filled region of the anodized layer and the outer surface of the anodized layer;
  The pores of the filling region are filled with electrically non-conductive microfillers;
  The pores in the unfilled region are not filled with the electrically nonconductive microfiller,
  The portion corresponding to the trace region of the unfilled region is activated and plated,
  The unfilled region is electrically isolated from the non-ferrous metal substrate by the filled region of the anodized layer; and
  The substrate, wherein the trace region is a part of a substrate circuit.

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