JP5875249B2 - Semiconductor substrate, semiconductor device and manufacturing method thereof - Google Patents

Description

The present invention relates to a semiconductor substrate, a semiconductor device, and manufacturing methods thereof. In particular, the present invention relates to a lift-off method of a gallium nitride layer from a sapphire substrate, and relates to a semiconductor substrate, a semiconductor device, and a manufacturing method thereof to which the lift-off method is applied.

Light emitting diodes (hereinafter referred to as LEDs) using gallium nitride (GaN) semiconductors are used in various devices such as traffic lights and backlights of liquid crystal panels.

Since manufacture of a gallium nitride (GaN) substrate is very difficult and expensive, semiconductor devices such as LEDs and laser diodes are often manufactured by growing a GaN layer on a dissimilar substrate such as sapphire. In Non-Patent Document 1, GaN is crystallized on each of a quartz substrate, a refractory metal substrate of W, Mo, Ta, and Nb, and a Si substrate using plasma assisted molecular beam epitaxy. An example of growth is shown.

However, lattice mismatch and thermal expansion coefficient mismatch between the GaN layer and the substrate occur, resulting in high dislocation density and increased defects, which hinder the improvement of the light emitting performance of the LED. Mechanical polishing, laser peeling, etc. are used to peel the GaN bulk crystal grown for the GaN substrate as the GaN substrate, but it was very difficult to obtain a practical size GaN substrate with good reproducibility. . Furthermore, the sapphire substrate has a lower thermal conductivity than the GaN substrate, and reduces the heat dissipation of the device. Furthermore, when a thin GaN layer is formed on a sapphire substrate, it is extremely difficult to peel the GaN layer from the sapphire substrate.

“Polycrystalline GaN for light emitter and field electron emitter applications” S. Hasegawa, S. Nishida, T. Yamashita, H. Asahi, Thin Solid Films 487 (2005) 260-267.

The present invention solves the above-described problem, and provides a semiconductor substrate, a semiconductor device, and a method of manufacturing the same, which are flat and thin semiconductor substrates formed on a substrate of a different material, and can be easily separated from the substrate of the different material. The issue is to provide.

According to one embodiment of the present invention, a substrate having a plurality of hemispherical protrusions arranged on the first surface at a predetermined interval, and a first semiconductor layer formed on the first surface of the substrate, A semiconductor substrate is provided.

In the semiconductor substrate, a ratio of a total surface area of the plurality of hemispherical protrusions to the first surface may be 1 or more.

In the semiconductor substrate, a width of a bottom surface of the hemispherical convex portion may be 5 μm or less.

In the semiconductor substrate, the substrate may be a sapphire substrate, and the first semiconductor layer may be a gallium nitride layer.

In the semiconductor substrate, a second semiconductor layer formed on a second surface opposite to the first surface of the first semiconductor layer, the first semiconductor layer, and the second semiconductor layer And a cavity having a pattern of a predetermined shape formed in part.

In the semiconductor substrate, the pattern of the predetermined shape has a width of the predetermined interval, and the cavity is formed at a position of the second surface of the first semiconductor layer corresponding to the interval of the plurality of hemispherical protrusions. A part may be arranged.

In the semiconductor substrate, the pattern having the predetermined shape has a rectangular shape having a long side in the first direction, and a plurality of patterns are arranged in a second direction orthogonal to the first direction to form the metal material layer. May be.

According to one embodiment of the present invention, a substrate having a plurality of curved concave portions disposed on the first surface at predetermined intervals, a first semiconductor layer formed on the first surface of the substrate, A semiconductor substrate is provided.

In the semiconductor substrate, the width of the bottom surface of the curved concave portion may be 5 μm or less.

In the semiconductor substrate, the substrate may be a sapphire substrate, and the first semiconductor layer may be a gallium nitride layer.

According to an embodiment of the present invention, the plurality of hemispherical protrusions are formed on the first surface of the substrate at a predetermined interval, and the first semiconductor layer is formed on the first surface of the substrate. A method for manufacturing a semiconductor substrate is provided.

In the method for manufacturing the semiconductor substrate, the plurality of hemispherical protrusions may be formed by etching the first surface of the substrate.

In the method for manufacturing the semiconductor substrate, the hemispherical protrusions on the first surface of the substrate so that a ratio of a total surface area of the plurality of hemispherical protrusions to the first surface is 1 or more. A part may be formed.

In the method for manufacturing a semiconductor substrate, the hemispherical protrusions may be formed on the first surface of the substrate such that the width of the bottom surface of the hemispherical protrusions is 5 μm or less.

In the method for manufacturing a semiconductor substrate, the first semiconductor layer may be formed using a metal organic chemical vapor deposition method.

In the method for manufacturing a semiconductor substrate, the substrate may be a sapphire substrate, and the first semiconductor layer may be a gallium nitride layer.

In the method for manufacturing a semiconductor substrate, the formed first semiconductor layer may be peeled from the substrate.

In the method for manufacturing a semiconductor substrate, a metal material layer having a predetermined pattern is formed on a second surface of the first semiconductor layer opposite to the first surface, and a metal organic vapor phase epitaxy method is formed. May be used to form a second semiconductor layer on the second surface and form a cavity in the first semiconductor layer in contact with the metal material layer.

In the semiconductor substrate manufacturing method, the metal material layer may be formed of tantalum, titanium, or chromium.

In the method for manufacturing a semiconductor substrate, the pattern of the predetermined shape having a width of the predetermined interval at a position of the second surface of the first semiconductor layer corresponding to the interval between the plurality of hemispherical protrusions. The metal material layer may be formed.

In the method for manufacturing a semiconductor substrate, the pattern of the predetermined shape has a rectangular shape having a first side as a long side, and a plurality of the patterns are arranged in a second direction orthogonal to the first direction, and the metal material layer May be formed.

In the method for manufacturing a semiconductor substrate, a semiconductor formed from the first semiconductor layer and the second semiconductor layer by peeling the substrate using the cavity formed in the first semiconductor layer. A substrate may be manufactured.

According to one embodiment of the present invention, a plurality of curved concave portions are formed at a predetermined interval on the first surface of the substrate, and the first semiconductor layer is formed on the first surface of the substrate. A method for manufacturing a semiconductor substrate is provided.

In the method for manufacturing a semiconductor substrate, the curved concave portion may be formed on the first surface of the substrate such that a width of a bottom surface of the concave concave portion is 5 μm or less.

In the method for manufacturing a semiconductor substrate, the substrate may be a sapphire substrate, and the first semiconductor layer may be a gallium nitride layer.

In the method for manufacturing a semiconductor substrate, the formed first semiconductor layer may be peeled from the substrate.

In the method for manufacturing the semiconductor substrate, the first semiconductor layer may be peeled off from the substrate by using a laser lift-off method.

In the method for manufacturing the semiconductor substrate, the first semiconductor layer may be peeled from the substrate using a mechanical peeling method.

According to one embodiment of the present invention, the first semiconductor layer peeled from any one of the semiconductor substrates, the first compound semiconductor layer formed on the first semiconductor layer, and the first semiconductor layer A semiconductor device comprising an active layer formed on one compound semiconductor layer and a second compound semiconductor layer formed on the first active layer is provided.

According to one embodiment of the present invention, the second semiconductor layer peeled off from any one of the semiconductor substrates, the first compound semiconductor layer formed on the second semiconductor layer, and the first A semiconductor device comprising an active layer formed on one compound semiconductor layer and a second compound semiconductor layer formed on the first active layer is provided.

Further, according to one embodiment of the present invention, the substrate is peeled from the first semiconductor layer of any one of the semiconductor substrates, a first compound semiconductor layer is formed on the first semiconductor layer, There is provided a method for manufacturing a semiconductor device, wherein an active layer is formed on the first compound semiconductor layer, and a second compound semiconductor layer is formed on the first active layer.

According to an embodiment of the present invention, the substrate is peeled from the second semiconductor layer of a semiconductor substrate, a first compound semiconductor layer is formed on the second semiconductor layer, and the first compound is formed. An active layer is formed on a semiconductor layer, and a second compound semiconductor layer is formed on the first active layer. A method for manufacturing a semiconductor device is provided.

  According to the present invention, there are provided a semiconductor substrate and a semiconductor device which are flat and thin semiconductor substrates formed on a substrate made of a different material and which can be easily separated from the substrate of the different material, and methods for manufacturing the same.

BRIEF DESCRIPTION OF THE DRAWINGS It is a schematic diagram which shows the laminated substrate 100 which concerns on one Embodiment of this invention, (a) is a top view of the laminated substrate 100, (b) is sectional drawing of the part enclosed with the circle of (a). It is a schematic diagram explaining the arrangement pattern of the hemispherical convex part 11 which concerns on one Embodiment of this invention. It is a mimetic diagram showing a manufacturing process of semiconductor substrate 100 concerning one embodiment of the present invention. It is a mimetic diagram showing a manufacturing process of semiconductor substrate 100 concerning one embodiment of the present invention. 1A is a schematic view of a semiconductor substrate 200 according to an embodiment of the present invention, FIG. 2A is a top view of the semiconductor substrate 200, and FIG. 2B is a cross-sectional view of the semiconductor substrate 200 at a broken line portion of FIG. It is a mimetic diagram showing a manufacturing process of semiconductor substrate 200 concerning one embodiment of the present invention. It is a mimetic diagram showing a manufacturing process of semiconductor substrate 200 concerning one embodiment of the present invention. 1A and 1B are schematic views of a semiconductor substrate 300 according to an embodiment of the present invention, in which FIG. 1A is a top view of the semiconductor substrate 300, and FIG. It is a schematic diagram which shows the manufacturing process of the semiconductor substrate 300 which concerns on one Embodiment of this invention. It is a schematic diagram which shows the manufacturing process of the semiconductor substrate 300 which concerns on one Embodiment of this invention. 1A and 1B are schematic views of a semiconductor substrate 400 according to an embodiment of the present invention, in which FIG. 1A is a top view of the semiconductor substrate 400, and FIG. It is a schematic diagram which shows the manufacturing process of the semiconductor substrate 400 which concerns on one Embodiment of this invention. It is a schematic diagram which shows the manufacturing process of the semiconductor substrate 400 which concerns on one Embodiment of this invention. 1A is a schematic view of a semiconductor substrate 500 according to an embodiment of the present invention, FIG. 2A is a top view of the semiconductor substrate 500, and FIG. 2B is a cross-sectional view of the semiconductor substrate 500 taken along a broken line in FIG. is there. It is a schematic diagram which shows the manufacturing process of the semiconductor substrate 500 which concerns on one Embodiment of this invention. It is a schematic diagram which shows the manufacturing process of the semiconductor substrate 500 which concerns on one Embodiment of this invention. It is a fragmentary sectional view of semiconductor device 1000 concerning one embodiment of the present invention.

Hereinafter, a semiconductor substrate, a semiconductor device, and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings. The semiconductor substrate, the semiconductor device, and the manufacturing method thereof according to the present invention are not construed as being limited to the description of the following embodiments and examples. Note that in the drawings referred to in this embodiment mode and examples to be described later, the same portions or portions having similar functions are denoted by the same reference numerals, and description thereof is not repeated.

As described above, conventionally, it has been difficult to peel a thin semiconductor substrate formed on a substrate made of a different material from the substrate. For example, when a GaN layer of about 10 μm is formed on a sapphire substrate, it is difficult to peel the GaN layer from the sapphire substrate only by stress, and it has been necessary to form a GaN layer of about 100 μm conventionally. The present inventors have formed a GaN layer by metal organic vapor phase epitaxy (hereinafter referred to as MOCVD) using a PSS (Processed Sapphire Substrate) substrate which is a sapphire substrate having a specific pattern. It has been found that isolation from the substrate is possible even when a GaN layer is formed.

(Embodiment 1)
FIG. 1 is a schematic view of a semiconductor substrate 100 according to an embodiment of the present invention. FIG. 1A is a top view of the semiconductor substrate 100, and FIG. 1B is a cross-sectional view of the semiconductor substrate 100 taken along a broken line in FIG. The semiconductor substrate 100 includes a PSS substrate 110 (hereinafter referred to as the substrate 110) and a first semiconductor layer 20. In the present embodiment, the composition of the substrate 110 and the first semiconductor layer 20 is different, and GaN is used as the first semiconductor layer 20, but the present invention is not limited to this, and any composition that can be applied to an LED is used. Either may be sufficient. A plurality of hemispherical protrusions 11 having a bottom surface width w are arranged at a predetermined interval i on the c-plane which is the first surface 10a of the substrate 110 for forming the first semiconductor layer 20. Here, the interval i means the shortest distance between the two hemispherical convex portions 11.

FIG. 2 is a schematic diagram for explaining an arrangement pattern of the hemispherical convex portions 11 according to the present embodiment. When the bottom surface of the hemispherical convex portion 11 has a circular shape with a radius of w / 2, the center of the hemispherical convex portion 11 is arranged at the apex of an equilateral triangle having a side length of w + i. That is, the arrangement pattern of the hemispherical projections 11 according to the present embodiment includes the arrangement of the three hemispherical projections 11 in the first direction of the first surface 10a of the substrate 110 and the first direction. It is configured by repeating in a second direction orthogonal to each other.

On the c-plane of the substrate 110, the substrate 110 and the first semiconductor layer 20 have a high bonding force and are difficult to peel off. On the other hand, on the curved surface of the hemispherical convex portion 11, the first semiconductor layer 20 is merely on the substrate 110, and the bonding force between the substrate 110 and the first semiconductor layer 20 is extremely small and easily peeled off. . Therefore, in the present embodiment, the first semiconductor layer 20 is easily separated from the substrate 110 by arranging the hemispherical protrusions 11 on the c-plane 10a of the substrate 110 at a predetermined interval i. Here, paying attention to the surface area of the hemispherical convex portion 11 and the area of the c-plane of the substrate 110, the substrate 110 according to the present embodiment is the sum of the surface area of the hemispherical convex portion 11 with respect to the area of the c-plane of the substrate 110. The ratio is preferably 1 or more. The substrate 110 having such a ratio of the total surface area of the hemispherical protrusions 11 to the c-plane of the substrate 110 can easily peel the formed first semiconductor layer 20.

In the present embodiment, the area of the c-plane of the substrate 110, the width w of the bottom surface of the hemispherical convex portion 11, and the interval i can be arbitrarily set so as to have the above-described ratio. Here, the width of the bottom surface of the hemispherical convex portion 11 according to the present embodiment is preferably 5 μm or less. When the width of the bottom surface of the hemispherical convex portion 11 is 5 μm or less, the first semiconductor layer 20 is easily peeled from the substrate 110. Such a pattern of the hemispherical projections 11 can be formed by etching the substrate, and for example, photolithography can be applied. Photolithography is a technique widely used for pattern formation, but the limit of pattern formation with high accuracy is generally 1 μm. Therefore, when forming the pattern of the hemispherical convex part 11 which concerns on this embodiment in the board | substrate 110, it is preferable that the space | interval i shall be 1 micrometer or more. For example, in the substrate 110 shown in FIG. 1, when the distance i between the two hemispherical convex portions 11 is 1 μm, the width w of the bottom surface of the hemispherical convex portion 11 is set to 3 μm. The pattern can be formed.

Below, the manufacturing method of the semiconductor substrate 100 which concerns on this embodiment is demonstrated. 3A and 3B are schematic views showing the manufacturing process of the semiconductor substrate 100. FIG. The base material 10 is prepared (FIG. 3A (a)), the base material 10 is etched, and the pattern of the hemispherical convex part 11 mentioned above is formed in the c surface of the board | substrate 110 (FIG. A3 (b)). As described above, photolithography can be used for pattern formation of the substrate 110 according to the present embodiment. The substrate 110 according to the present embodiment has a hemispherical protrusion on the c-plane 10a of the substrate 110 such that the ratio of the total surface area of the hemispherical protrusion 11 to the area of the c-plane of the substrate 110 is 1 or more. The parts 11 are arranged at a predetermined interval i. By disposing such a pattern, the first semiconductor layer 20 can be easily peeled from the substrate 110 in a peeling step described later.

The first semiconductor layer 20 is formed on the upper surface (c surface) of the substrate 110 on which the pattern of the hemispherical protrusions 11 is formed by etching (FIG. 3A (c)). For the formation of the first semiconductor layer 20, metal organic chemical vapor deposition (hereinafter referred to as MOCVD) can be applied. The conditions for forming the first semiconductor layer 20 can be arbitrarily set depending on the material used and the thickness of the layer to be formed. The formation of the first semiconductor layer 20 is performed until the upper surface of the first semiconductor layer 20 (the second surface opposite to the c-plane of the substrate 110 which is the first surface) becomes flat. For example, when the pattern of the hemispherical protrusion 11 is formed on the substrate 110 with the interval i as exemplified above being 1 μm and the width w of the bottom surface of the hemispherical protrusion 11 being 3 μm, the first semiconductor layer 20 is If the thickness is about 10 μm, it can be flattened. In this way, the semiconductor substrate 100 according to this embodiment can be manufactured.

The obtained semiconductor substrate 100 can easily peel off the substrate 110. A second substrate 170 is bonded to the upper surface of the first semiconductor layer 20 of the semiconductor substrate 100 via an adhesive layer 180 (FIG. 3B (d)). Examples of the second substrate 170 include a silicon (Si) substrate, a silicon carbide (SiC) substrate, and a metal. Examples of the adhesive layer 180 include gallium (Ga), indium (In), aluminum (Al), gold (Au), an alloy of gold and tin (Sn), and an adhesive known in the semiconductor manufacturing field. Can be mentioned.

The substrate 110 is peeled from the semiconductor substrate 100 to which the second substrate 170 is bonded (FIG. 3B (e)). As a method of peeling the first semiconductor layer 20 from the substrate 110, for example, a laser lift-off method can be used. In the semiconductor substrate 101 manufactured in this way, the first semiconductor layer 20 has a recess at a portion in contact with the hemispherical protrusion 11. When a semiconductor device such as an LED is manufactured using the semiconductor substrate 101 having such a recess in the first semiconductor layer 20, an excellent semiconductor device in which the light extraction efficiency is approximately doubled can be obtained.

The semiconductor substrate 101 can also planarize the first semiconductor layer 20 by using a polishing method (FIG. 3B (f)). In the present embodiment, the first semiconductor layer 20 may be peeled from the substrate 110 using a mechanical peeling method without using the laser lift-off method. In this way, a flat and thin semiconductor substrate 105 can be obtained.

As described above, according to the present embodiment, a flat and thin semiconductor can be obtained by forming the first semiconductor layer on the substrate having a plurality of hemispherical protrusions arranged on the first surface at predetermined intervals. Although it is a substrate, a semiconductor substrate that can be easily separated from the substrate can be provided.

(Embodiment 2)
In the first embodiment, the example in which the first semiconductor layer is formed on the substrate having the hemispherical protrusion has been described. However, in the present embodiment, the upper surface of the first semiconductor layer (the substrate which is the first surface) 110) (a second surface opposite to the c-plane of 110) is formed with a metal material layer having a pattern of a predetermined shape, and the second semiconductor layer is formed using MOCVD, whereby a cavity is formed in the first semiconductor layer. An example of forming the part will be described. In the semiconductor substrate described in this embodiment, when the first semiconductor layer is formed to be thinner than 10 μm, the first semiconductor layer can be easily separated from the substrate.

FIG. 4 is a schematic view of a semiconductor substrate 200 according to an embodiment of the present invention. 4A is a top view of the semiconductor substrate 200, and FIG. 4B is a cross-sectional view of the semiconductor substrate 200 taken along a broken line in FIG. 4A. The semiconductor substrate 200 includes a substrate 210, a first semiconductor layer 220, a second semiconductor layer 240, and a cavity 250. In this embodiment, the substrate 210 and the first semiconductor layer 220 have different compositions, and GaN is used as the first semiconductor layer 220. However, the present invention is not limited to this, and any composition that can be applied to an LED is used. Either may be sufficient. The second semiconductor layer 240 has the same composition as the first semiconductor layer 220, but may have a different composition. As described in the semiconductor substrate 100, also in the semiconductor substrate 200, the c-plane which is the first surface of the substrate 210 for forming the first semiconductor layer 220 has a plurality of hemispheres having a bottom surface width w. Convex portions 21 are arranged at a predetermined interval i.

A cavity portion 250 is formed at a position surrounding the hemispherical convex portion 21 of the first semiconductor layer 220 and the second semiconductor layer 240. In the present embodiment, the hollow portion 250 is formed at a position corresponding to the interval i between the two hemispherical convex portions 21. As shown in FIG. 4A, the cavity 250 according to the present embodiment has the center coincident with the center of the hemispherical convex portion 21, and the first surface of the substrate 210 is the same as the cross section of the honeycomb structure. A pattern arranged at the apex of a hexagonal pattern arranged so as to fill the c-plane. Since other configurations are the same as those of the semiconductor substrate 100, detailed description thereof is omitted.

Below, the manufacturing method of the semiconductor substrate 200 which concerns on this embodiment is demonstrated. 5A and 5B are schematic views showing the manufacturing process of the semiconductor substrate 200. FIG. 5A (a) to 5A (c) are the same as those of the semiconductor substrate 100, and detailed description thereof is omitted. A metal material layer 230 having a pattern of a predetermined shape is formed on the upper surface of the formed first semiconductor layer 220 (FIG. 5A (d)). In the metal material layer 230, the columnar metal material has a width (bottom surface width) equal to the predetermined interval i. A metal that reacts with an element included in the first semiconductor layer 220 is used for the metal material layer 230. For example, when the first semiconductor layer 220 is GaN, tantalum, titanium, or chromium can be suitably used as the metal material layer 230. For the formation of the metal material layer 230, electron beam evaporation (hereinafter referred to as EB evaporation) and a lift-off method can be preferably used. In the present embodiment, the cylindrical metal material layer 230 having a width equal to the interval i (the width of the bottom surface) is placed at a position corresponding to the interval between the hemispherical projections 21 so as to surround the hemispherical projections 21. Deploy. Further, in the metal material layer 230, the metal material is arranged so as to form a pattern in which the center of the bottom circle is arranged at the apex of the hexagon.

Next, the second semiconductor layer 240 is formed. MOCVD is used to form the second semiconductor layer 240. The conditions for forming the second semiconductor layer 240 can be arbitrarily set depending on the material used and the thickness of the layer to be formed. When forming the second semiconductor layer 240, an element constituting the first semiconductor layer 220 reacts with the metal material layer 230, and a part of the first semiconductor layer 220 in contact with the bottom surface of the metal material layer 230 is formed. By decomposing, the cavity 250 is formed (FIG. 5A (e)). For example, when the first semiconductor layer 220 is GaN and the metal material layer 230 is tantalum, nitrogen constituting the first semiconductor layer 220 reacts with tantalum to become tantalum nitride (TaN), thereby decomposing GaN. Thus, the cavity 250 is formed in a part of the first semiconductor layer 220 in contact with the bottom surface of the metal material layer 230. At this time, the second semiconductor layer 240 is formed on the upper surface of the first semiconductor layer 220 and the side surfaces of the metal material layer 230.

After the cavity 250 is formed, the metal material layer 230 is removed. For example, when the metal material layer 230 is made of Ta, it can be removed by etching using hydrogen fluoride (hereinafter referred to as HF). Etching with HF can be performed, for example, by immersing the semiconductor substrate in which the cavity 250 is formed in a 50% HF aqueous solution. The time for immersing the semiconductor substrate is, for example, about 24 hours. In this embodiment, etching using HF has been described as an example. However, a solution in which the metal material layer 230 is etched and the first semiconductor layer 220 and the second semiconductor layer 240 are not dissolved can be used. After removing the metal material layer 230, the second semiconductor layer 240 is further grown to manufacture the semiconductor substrate 200 according to the present embodiment (FIG. 5B (f)).

The obtained semiconductor substrate 200 can easily peel off the substrate 210. The second substrate 170 is bonded to the upper surface of the first semiconductor layer 220 of the semiconductor substrate 200 via the adhesive layer 180 (FIG. 5B (g)). Since the second substrate 170 and the adhesive layer 180 are the same as those in the first embodiment, detailed description thereof is omitted. The semiconductor substrate 200 can be easily detached from the hemispherical convex portion 21, and can be torn near the bottom of the cavity portion 250 to easily peel off the substrate 210 (FIG. 5B (h)). As a method for peeling the first semiconductor layer 220 and the second semiconductor layer 240 from the substrate 210, for example, a laser lift-off method can be used. The semiconductor substrate 201 manufactured as described above is a portion in contact with the hemispherical convex portion 21, and the first semiconductor layer 220 has a concave portion. When a semiconductor device such as an LED is manufactured using the semiconductor substrate 201 having such a recess in the first semiconductor layer 220, an excellent semiconductor device in which light extraction efficiency is approximately doubled can be obtained.

The semiconductor substrate 201 can also planarize the first semiconductor layer 220 by using a polishing method (FIG. 5B (i)). In the present embodiment, the first semiconductor layer 220 may be peeled from the substrate 210 using a mechanical peeling method without using the laser lift-off method. In this way, a flat and thin semiconductor substrate 205 can be obtained.

In the present embodiment, when the first semiconductor layer is formed thinner than 10 μm, for example, in the substrate 210 shown in FIG. 4, the hemispherical convex portion 21 having a bottom surface width of 1 μm is formed on the substrate 210. That's fine. After the first semiconductor layer 220 is grown by 2 μm, a metal material layer 230 in which a metal material having a width of 1 μm is formed, and the second semiconductor layer 240 is grown in total by 3 μm, so that the surface is flat. The semiconductor substrate 200 can be formed.

As described above, according to the present embodiment, the first semiconductor layer is formed on the substrate having a plurality of hemispherical protrusions arranged on the first surface at a predetermined interval, and the first semiconductor layer Forming a metal material layer having a pattern of a predetermined shape disposed on the second surface and forming a second semiconductor layer on the second surface, whereby a cavity is formed in the first semiconductor layer in contact with the metal material layer. It is formed. To provide a semiconductor substrate that can be easily peeled off from a substrate while being a flat and thin semiconductor substrate by using a hemispherical convex portion formed on the substrate and a cavity formed in the first semiconductor layer. Can do. Even when the first semiconductor layer is formed thinner than 10 μm, the first semiconductor layer can be easily peeled from the substrate.

(Embodiment 3)
In the second embodiment, the example in which the hollow portion is formed by arranging the cylindrical metal material at a position corresponding to the interval between the hemispherical convex portions so as to surround the hemispherical convex portions has been described. In the embodiment, an example is described in which a pattern having a predetermined shape has a rectangular shape having a long side in the first direction, and a plurality of layers are arranged in a second direction orthogonal to the first direction to form a metal material layer. To do. In the semiconductor substrate described in this embodiment, when the first semiconductor layer is formed to be thinner than 10 μm, the first semiconductor layer can be easily separated from the substrate.

FIG. 6 is a schematic diagram of a semiconductor substrate 300 according to an embodiment of the present invention. 6A is a top view of the semiconductor substrate 300, and FIG. 6B is a cross-sectional view of the semiconductor substrate 300 taken along a broken line in FIG. 6A. The semiconductor substrate 300 includes a substrate 210, a first semiconductor layer 320, a second semiconductor layer 340, and a cavity 350. In this embodiment, the substrate 210 and the first semiconductor layer 320 have different compositions, and GaN is used as the first semiconductor layer 320. However, the present invention is not limited to this, and any composition that can be applied to an LED is used. Either may be sufficient. The second semiconductor layer 340 has the same composition as the first semiconductor layer 320, but may have a different composition. As described in the semiconductor substrate 100, also in the semiconductor substrate 300, the c-plane which is the first surface of the substrate 210 for forming the first semiconductor layer 320 has a plurality of hemispheres having a bottom surface width w. Convex portions 21 are arranged at a predetermined interval i.

The first semiconductor layer 320 and the second semiconductor layer 340 each have a rectangular shape having a long side in the first direction, and a plurality of cavities arranged in a second direction orthogonal to the first direction 350 is formed. Since the other configuration of the semiconductor substrate 300 is the same as that of the semiconductor substrate 100 or the semiconductor substrate 200, detailed description thereof is omitted.

Next, the second semiconductor layer 340 is formed using MOCVD. The conditions for forming the second semiconductor layer 340 can be arbitrarily set depending on the material used and the thickness of the layer to be formed. When the second semiconductor layer 340 is formed, an element included in the first semiconductor layer 320 reacts with the metal material layer 330 so that a part of the first semiconductor layer 320 in contact with the bottom surface of the metal material layer 330 is formed. By decomposing, a cavity 350 is formed (FIG. 7A (e)).

After the cavity 350 is formed, the metal material layer 330 is removed. Since the metal material layer 330 can be removed in the same manner as the metal material layer 230 described in Embodiment 2, detailed description thereof is omitted. After removing the metal material layer 330, the second semiconductor layer 340 can be further grown to manufacture the semiconductor substrate 300 according to this embodiment (FIG. 7B (f)).

The obtained semiconductor substrate 300 can easily peel off the substrate 210. The second substrate 170 is bonded to the upper surface of the second semiconductor layer 340 of the semiconductor substrate 300 through the adhesive layer 180 (FIG. 7B (g)). Since the second substrate 170 and the adhesive layer 180 are the same as those in the first embodiment, detailed description thereof is omitted. The semiconductor substrate 300 can be easily detached from the hemispherical convex portion 21, and can be torn near the bottom of the cavity portion 350 to easily peel off the substrate 210 (FIG. 7B (h)). As a method for peeling the first semiconductor layer 320 and the second semiconductor layer 340 from the substrate 210, for example, a laser lift-off method can be used. The semiconductor substrate 301 manufactured in this way is a portion in contact with the hemispherical convex portion 21, and the first semiconductor layer 320 has a concave portion. When a semiconductor device such as an LED is manufactured using the semiconductor substrate 301 having such a recess in the first semiconductor layer 320, an excellent semiconductor device in which the light extraction efficiency is approximately doubled can be obtained.

In addition, the semiconductor substrate 301 can planarize the first semiconductor layer 320 by a mechanical peeling method (FIG. 7B (i)). In the present embodiment, the first semiconductor layer 320 may be peeled from the substrate 210 by using a polishing method without using the laser lift-off method. In this way, a flat and thin semiconductor substrate 305 can be obtained.

In the present embodiment, when the first semiconductor layer is formed to be thinner than 10 μm, for example, in the substrate 210 shown in FIG. 6, the hemispherical convex portion 21 having a bottom width of 1 μm is formed on the substrate 210. That's fine. After the first semiconductor layer 320 is grown by 2 μm, a metal material layer 330 on which a metal material having a width of 1 μm is formed is formed, and the second semiconductor layer 340 is grown by 3 μm, so that the semiconductor substrate having a flat surface is formed. 300 can be formed.

(Embodiment 4)
In the first to third embodiments described above, the example in which the first semiconductor layer is formed on the substrate having the hemispherical convex portion has been described. However, in the present embodiment, the first semiconductor layer is disposed on the first surface at a predetermined interval. An example in which the first semiconductor layer is formed over a substrate having a plurality of curved concave portions will be described.

FIG. 8 is a schematic view of a semiconductor substrate 400 according to an embodiment of the present invention. 8A is a top view of the semiconductor substrate 400, and FIG. 8B is a cross-sectional view of the semiconductor substrate 400 taken along a broken line in FIG. 8A. The semiconductor substrate 400 includes a PSS substrate 410 (hereinafter referred to as a substrate 410) and a first semiconductor layer 420. In this embodiment, the substrate 410 and the first semiconductor layer 420 have different compositions, and GaN is used as the first semiconductor layer 420. However, the present invention is not limited to this, and any composition that can be applied to an LED is used. Either may be sufficient. A plurality of curved concave portions 460 are arranged at a predetermined interval i on the c-plane which is the first surface 10a of the substrate 410 for forming the first semiconductor layer 420. Here, the interval i means the shortest distance between two concave portions 460 having a curved surface shape. In the present embodiment, the first semiconductor layer 420 can be easily peeled from the substrate 410 by forming the arrangement pattern of the curved concave portions 460 on the c-plane of the substrate 410 at predetermined intervals on the first surface of the substrate. To do.

On the c-plane of the substrate 410, the substrate 410 and the first semiconductor layer 420 have a high bonding force and are difficult to peel off. On the other hand, in the curved surface of the curved concave portion 460, the first semiconductor layer 420 is merely on the substrate 410, and the bonding force between the substrate 410 and the first semiconductor layer 420 is extremely small and easily peeled off. Therefore, in the present embodiment, the first semiconductor layer 420 can be easily separated from the substrate 410 by disposing the curved concave portions 460 at the predetermined interval i on the c-plane 10a of the substrate 410. In FIG. 8, the curved concave portion 460 is shown as a hemispherical concave portion, but the curved concave portion 460 according to the present embodiment does not have to have a flat bottom surface, and any shape can be applied. For example, a mortar shape or a cone shape may be used.

For example, as shown in FIG. 8, when the curved concave portion 460 is a hemispherical concave portion, the substrate 410 according to this embodiment has a total surface area of the curved concave portion 460 with respect to the area of the c-plane of the substrate 410. The ratio is preferably 1 or more. The substrate 410 having the ratio of the total surface area of the curved concave portions 460 to the c-plane of the substrate 410 can easily peel the formed first semiconductor layer 420. When the radius of the bottom surface of the concave portion 460 having a curved surface is w / 2, the center of the concave portion 460 having a curved surface shape is arranged at the apex of an equilateral triangle having a side length of w + i. That is, in the arrangement pattern of the curved concave portions 460 according to the present embodiment, the arrangement of the three curved concave portions 460 is orthogonal to the first direction of the first surface 10a of the substrate 410 and the first direction. It consists of repeating in the second direction. In the present embodiment, the area of the c-plane of the substrate 410, the width w of the bottom surface of the curved recess 460, and the interval i can be arbitrarily set so as to achieve the above-described ratio.

Here, the width of the bottom surface of the curved concave portion 460 according to the present embodiment is preferably 5 μm or less. When the width of the bottom surface of the curved concave portion 460 is 5 μm or less, the first semiconductor layer 420 is easily peeled from the substrate 410. Such a curved pattern of the concave portion 460 can be formed by etching the base material 10, and for example, photolithography can be applied. Photolithography is a technique widely used for pattern formation, but the limit of pattern formation with high accuracy is generally 1 μm. Therefore, when the curved concave portion 460 pattern according to this embodiment is formed on the substrate 410, the interval i is preferably 1 μm or more. For example, in the substrate 410 shown in FIG. 8, when the interval i is 1 μm, the width w of the bottom surface of the curved concave portion 460 can be set to 3 μm, whereby the pattern having the above ratio can be formed.

Below, the manufacturing method of the semiconductor substrate 400 which concerns on this embodiment is demonstrated. FIG. 9A and FIG. 9B are schematic views showing the manufacturing process of the semiconductor substrate 400. The base material 10 is prepared (FIG. 9A (a)), the base material 10 is etched, and the pattern of the curved-surface-shaped recessed part 460 mentioned above is formed in the c surface of the board | substrate 410 (FIG. 9A (b)). As described above, photolithography can be used for pattern formation of the substrate 410 according to this embodiment. In the substrate 410 according to this embodiment, the curved concave portion 460 is formed on the c surface 10a of the substrate 410 so that the total ratio of the surface area of the curved concave portion 460 to the area of the c surface of the substrate 410 is 1 or more. Are arranged at a predetermined interval i. By arranging such a pattern, the first semiconductor layer 420 can be easily peeled from the substrate 410 in a peeling step described later.

A first semiconductor layer 420 is formed on the upper surface (c surface) of the substrate 410 on which the pattern of the concave portion 460 having a curved shape is formed by etching (FIG. 9A (c)). MOCVD can be applied to the formation of the first semiconductor layer 420. The conditions for forming the first semiconductor layer 420 can be arbitrarily set depending on the material used and the thickness of the layer to be formed. The formation of the first semiconductor layer 420 is performed until the upper surface of the first semiconductor layer 420 (the second surface opposite to the c-plane of the substrate 410 which is the first surface) becomes flat. For example, when the pattern i of the curved concave portion 460 is formed on the substrate 410 with the interval i as exemplified above being 1 μm and the width w of the bottom surface of the curved concave portion 460 being 3 μm, the first semiconductor layer 420 is about 10 μm. The thickness can be flattened. In this way, the semiconductor substrate 400 according to this embodiment can be manufactured.

The obtained semiconductor substrate 400 can easily peel off the substrate 410. The second substrate 170 is bonded to the upper surface of the first semiconductor layer 420 of the semiconductor substrate 400 with the adhesive layer 180 interposed therebetween (FIG. 9B (d)). Since the second substrate 170 and the adhesive layer 180 are the same as those in the first embodiment, detailed description thereof is omitted. The semiconductor substrate 400 thus prepared can easily peel the substrate 410 (FIG. 9B (e)). As a method of peeling the first semiconductor layer 420 from the substrate 410, for example, a laser lift-off method can be used. In the semiconductor substrate 401 manufactured in this manner, the first semiconductor layer 420 has a convex portion at a portion in contact with the curved concave portion 460. When a semiconductor device such as an LED is manufactured using the semiconductor substrate 401 having such a convex portion in the first semiconductor layer 420, an excellent semiconductor device in which the light extraction efficiency is approximately doubled can be obtained. .

In addition, the semiconductor substrate 401 can be planarized using a polishing method (FIG. 9B (f)). In the present embodiment, the first semiconductor layer 420 may be peeled from the substrate 410 using a mechanical peeling method without using the laser lift-off method. In this way, a flat and thin semiconductor substrate 405 can be obtained.

As described above, according to the present embodiment, a flat and thin semiconductor substrate is formed by forming the first semiconductor layer on the substrate having the plurality of curved concave portions arranged on the first surface at predetermined intervals. However, a semiconductor substrate that can be easily peeled off from the substrate can be provided.

(Embodiment 5)
In the above-described fourth embodiment, the example in which the first semiconductor layer is formed on the substrate having the curved concave portion has been described. However, in the present embodiment, a plurality of groove portions arranged at predetermined intervals on the first surface. An example in which the first semiconductor layer is formed over the substrate having the structure will be described.

FIG. 10 is a schematic view of a semiconductor substrate 500 according to an embodiment of the present invention. 10A is a top view of the semiconductor substrate 500, and FIG. 10B is a cross-sectional view of the semiconductor substrate 500 taken along a broken line in FIG. 10A. The semiconductor substrate 500 includes a PSS substrate 510 (hereinafter referred to as a substrate 510) and a first semiconductor layer 520. In this embodiment, the substrate 510 and the first semiconductor layer 520 have different compositions, and GaN is used as the first semiconductor layer 520. However, the present invention is not limited to this, and any composition that can be applied to an LED is used. Either may be sufficient. A plurality of grooves 560 having a predetermined width w are arranged at a predetermined interval i on the c-plane which is the first surface 10a of the substrate 510 for forming the first semiconductor layer 520. In the present embodiment, the first semiconductor layer 520 is easily peeled from the substrate 510 by forming the arrangement pattern of the groove portions 560 on the first surface of the substrate at a predetermined interval on the c-plane of the substrate 510.

The groove part 560 according to the present embodiment makes the first semiconductor layer 520 not grow on the bottom surface (c-plane) of the groove part 560 by sufficiently narrowing the width w. Also, as shown in FIG. 10, in the upper portion of the groove portion 560 according to the present embodiment, the cavity portion 555 has a first side opposite to the first surface of the first semiconductor layer 520 in contact with the c-plane of the substrate 510. 2 is recessed in the surface direction. The dent of the cavity 555 is generated when the first semiconductor layer grown on the c-plane of the substrate 510 gradually grows in a direction parallel to the c-plane.

Here, the width w of the groove 560 according to the present embodiment is preferably 5 μm or less. When the width w of the groove portion 560 is 5 μm or less, the cavity portion 555 is formed without the first semiconductor layer 520 growing on the bottom surface of the groove portion 560, and the first semiconductor layer 520 is easily peeled from the substrate 510. When the width w of the groove portion 560 is 5 μm or more, the first semiconductor layer 520 grows on the bottom surface of the groove portion 560, and the first semiconductor layer 520 is hardly peeled from the substrate 510. Moreover, such a pattern of the groove part 560 can be formed by etching the base material 10, and for example, photolithography can be applied. Photolithography is a technique widely used for pattern formation, but the limit of pattern formation with high accuracy is generally 1 μm. Therefore, when the pattern of the groove 560 according to the present embodiment is formed on the substrate 510, the width w is preferably 1 μm or more.

Below, the manufacturing method of the semiconductor substrate 500 concerning this embodiment is demonstrated. FIG. 11A and FIG. 11B are schematic views showing the manufacturing process of the semiconductor substrate 500. The base material 10 is prepared (FIG. 11A (a)), the base material 10 is etched, and the pattern of the groove part 560 mentioned above is formed in the c surface of the board | substrate 510 (FIG. 11A (b)). As described above, photolithography can be used for pattern formation of the substrate 510 according to this embodiment. In the substrate 510 according to the present embodiment, the groove portions 560 having a width w are arranged at a predetermined interval i. As described above, the width w of the groove 560 according to this embodiment is preferably 5 μm or less. When the MOCVD of the next step is performed at 500 TORR or more, the width w is preferably 2 mm or less. By disposing such a pattern, the first semiconductor layer 520 can be easily peeled from the substrate 510 in a peeling step described later.

A first semiconductor layer 520 is formed on the upper surface (c surface) of the substrate 510 on which the pattern of the groove portion 560 is formed by etching (FIG. 11A (c)). MOCVD can be applied to the formation of the first semiconductor layer 420. The conditions for forming the first semiconductor layer 520 can be arbitrarily set depending on the material to be used and the thickness of the layer to be formed. The formation of the first semiconductor layer 520 is performed until the upper surface of the first semiconductor layer 520 (the second surface opposite to the c-plane of the substrate 510 which is the first surface) becomes flat. In this way, the semiconductor substrate 500 according to this embodiment can be manufactured.

The obtained semiconductor substrate 500 can easily peel off the substrate 510. The second substrate 170 is bonded to the upper surface of the first semiconductor layer 520 of the semiconductor substrate 500 with the adhesive layer 180 interposed therebetween (FIG. 5B (d)). Since the second substrate 170 and the adhesive layer 180 are the same as those in the first embodiment, detailed description thereof is omitted. The semiconductor substrate 500 can easily peel off the substrate 510 (FIG. 11B (d)). As a method of peeling the first semiconductor layer 520 from the substrate 510, for example, a laser lift-off method can be used. In the semiconductor substrate 501 manufactured in this way, the first semiconductor layer 520 has a recess at a portion in contact with the groove 560. When a semiconductor device such as an LED is manufactured using the semiconductor substrate 501 having such a recess in the first semiconductor layer 520, an excellent semiconductor device in which light extraction efficiency is approximately doubled can be obtained.

Further, the semiconductor substrate 501 can be planarized using a polishing method (FIG. 11B (f)). In the present embodiment, the first semiconductor layer 520 may be peeled from the substrate 510 by using a mechanical peeling method without using the laser lift-off method. In this way, a flat and thin semiconductor substrate 505 can be obtained.

As described above, according to the present embodiment, a flat and thin semiconductor substrate is formed by forming the first semiconductor layer on the substrate in which the groove portions 560 having a predetermined width are arranged on the first surface at predetermined intervals. However, a semiconductor substrate that can be easily peeled off from the substrate can be provided.

(Semiconductor device)
A semiconductor device, in particular, an LED can be manufactured using the semiconductor substrates 100 to 500 according to the above-described embodiments. Hereinafter, as an example, a semiconductor device 1000 using the semiconductor substrate 105 will be described. FIG. 12 is a cross-sectional view of the semiconductor device 1000 according to the present embodiment. In the semiconductor device 1000, the ohmic contact layer 1110 is disposed on the surface of the first semiconductor layer 20 of the semiconductor substrate 105, and the ohmic contact layer 1130 is disposed on the surface of the second substrate.

The ohmic contact layer 1110 can be formed, for example, by laminating a 10 nm titanium (Ti) layer, a 10 nm Al layer, and a 10 μm Al layer. The ohmic contact layer 1130 can be formed of, for example, a 50 nm Au layer and a 50 nm antimony (Sb) layer when the second substrate 170 is a Si substrate. The adhesive layer 180 is formed of, for example, a 3 μm Au layer. Here, although not shown, an ohmic contact layer is formed between the first semiconductor layer 20 and the adhesive layer 180 by a 10 nm Au layer and a 10 nm nickel (Ni) layer. The ohmic contact layer 1110 of the first semiconductor layer 20 is an N-type semiconductor, and the adhesive layer 180 side of the first semiconductor layer 20 is a P-type semiconductor.

As described above, by manufacturing the semiconductor device 1000 using the semiconductor substrate 105, the manufacturing cost of the LED can be reduced. In the present embodiment, an example in which the semiconductor device 1000 is manufactured on the semiconductor substrate 105 formed from the semiconductor substrate 100 has been described. However, the semiconductor device 1000 is planarized with the semiconductor substrates 200 to 500 and a substrate isolated from them. Any of the substrates can be suitably used.

  10: base material, 10a: c-plane, 11: hemispherical convex portion, 20: first semiconductor layer, 21: hemispherical convex portion, 100: semiconductor substrate, 101: semiconductor substrate, 105: semiconductor substrate, 110 : Substrate, 170: second substrate, 180: adhesive layer, 200: semiconductor substrate, 201: semiconductor substrate, 205: semiconductor substrate, 210: substrate, 220: first semiconductor layer, 230: metal material layer, 240: Second semiconductor layer, 250: cavity, 300: semiconductor substrate, 301: semiconductor substrate, 305: semiconductor substrate, 320: first semiconductor layer, 330: metal material layer, 340: second semiconductor layer, 350: Cavity, 400: Semiconductor substrate, 401: Semiconductor substrate, 405: Semiconductor substrate, 410: Substrate, 420: First semiconductor layer, 460: Concave portion with curved surface, 500: Semiconductor substrate, 501: Semiconductor substrate, 50 : A semiconductor substrate, 510: substrate, 520: first semiconductor layer, 555: cavity, 560: groove, 1000: semiconductor device, 1110: 1130: the ohmic contact layer

Claims (22)

A substrate having a plurality of hemispherical protrusions arranged at predetermined intervals on the first surface;
A first semiconductor layer formed on a first surface of the substrate;
A second semiconductor layer formed on a second surface opposite to the first surface of the first semiconductor layer in contact with the first surface of the substrate;
A cavity formed in a part of the first semiconductor layer and the second semiconductor layer,
The semiconductor substrate according to claim 1, wherein the hollow portion is disposed between the plurality of convex portions and has a substantially circular shape. The pattern of the predetermined shape has a width of the predetermined interval;
3. The semiconductor substrate according to claim 2, wherein the cavity is disposed at a position of a second surface of the first semiconductor layer corresponding to an interval between the plurality of hemispherical protrusions. 4. The semiconductor substrate according to claim 1, wherein a ratio of a total surface area of the plurality of hemispherical protrusions to the first surface is 1 or more. 5. The semiconductor substrate according to claim 4, wherein a width of a bottom surface of the hemispherical convex portion is 5 μm or less. 6. The semiconductor substrate according to claim 1, wherein the substrate is a sapphire substrate, and the first semiconductor layer is a gallium nitride layer. Forming a plurality of hemispherical protrusions at a predetermined interval on the first surface of the substrate;
Forming a first semiconductor layer on a first surface of the substrate;
Forming a metal material layer on a second surface opposite to the first surface in contact with the first surface of the substrate;
A method for manufacturing a semiconductor substrate, comprising: forming a cavity portion that is disposed between the plurality of protrusions in the first semiconductor layer in contact with the metal material layer and has a substantially circular shape. The method of manufacturing a semiconductor substrate according to claim 8, wherein the metal material layer has a substantially cylindrical shape at an interval substantially equal to an interval between the plurality of hemispherical protrusions. The method of manufacturing a semiconductor substrate according to claim 7, wherein forming the plurality of hemispherical protrusions is performed by etching the first surface of the substrate. The hemispherical protrusions are formed on the first surface of the substrate so that a total ratio of the surface areas of the plurality of hemispherical protrusions to the first surface is 1 or more. The method for manufacturing a semiconductor substrate according to claim 10. The semiconductor substrate manufacturing method according to claim 11, wherein the hemispherical protrusions are formed on the first surface of the substrate such that a width of a bottom surface of the hemispherical protrusions is 5 μm or less. Method. The method for manufacturing a semiconductor substrate according to claim 12, wherein the first semiconductor layer is formed by metal organic vapor phase epitaxy. The method for manufacturing a semiconductor substrate according to claim 13, wherein the substrate is a sapphire substrate, and the first semiconductor layer is a gallium nitride layer. The method of manufacturing a semiconductor substrate according to claim 7, wherein the formed first semiconductor layer is peeled from the substrate. Forming a metal material layer having a pattern of a predetermined shape on a second surface opposite to the first surface of the first semiconductor layer;
The second semiconductor layer is formed on the second surface by metal organic vapor phase epitaxy, and a cavity is formed in the first semiconductor layer in contact with the metal material layer. 14. A method for producing a semiconductor substrate according to 14. The method of manufacturing a semiconductor substrate according to claim 16, wherein the metal material layer is formed of tantalum, titanium, or chromium. The semiconductor substrate formed from the first semiconductor layer and the second semiconductor layer is manufactured by peeling the substrate using the cavity formed in the first semiconductor layer. A method for manufacturing a semiconductor substrate according to claim 16 or 17. 19. The method for manufacturing a semiconductor substrate according to claim 15, wherein the first semiconductor layer is peeled from the substrate by using a laser lift-off method. 19. The method of manufacturing a semiconductor substrate according to claim 15, wherein the first semiconductor layer is peeled from the substrate using a mechanical peeling method. The substrate is peeled from the first semiconductor layer of the semiconductor substrate according to any one of claims 1 to 6,
Forming a first compound semiconductor layer on the first semiconductor layer;
Forming an active layer on the first compound semiconductor layer;
A method of manufacturing a semiconductor device, comprising forming a second compound semiconductor layer on the active layer. The substrate is peeled from the second semiconductor layer of the semiconductor substrate according to claim 2,
Forming a first compound semiconductor layer on the second semiconductor layer;
Forming an active layer on the first compound semiconductor layer;
A method of manufacturing a semiconductor device, comprising forming a second compound semiconductor layer on the active layer.