JP5861738B2 - Coating and developing equipment - Google Patents

Description

  The present invention relates to a coating and developing apparatus that applies a resist to a substrate and performs development.

  In the photoresist process, which is one of the semiconductor manufacturing processes, a resist is applied to the surface of a semiconductor wafer (hereinafter referred to as a wafer), the resist is exposed in a predetermined pattern, and then developed to form a resist pattern. . The coating / developing apparatus for forming the resist pattern is provided with a processing block including a processing module for performing various processes on the wafer.

  As described in Patent Document 1, for example, the processing block is configured by laminating a unit block for forming various coating films such as a resist film and a unit block for performing development processing. The wafers are sequentially processed by delivering processing modules provided in each unit block.

  By the way, in order to form a finer pattern and further reduce the yield, the processing modules installed in the processing block are diversified. For example, in addition to a resist film forming module for applying a resist to a substrate and a developing module for supplying a developing solution, a back surface cleaning module for cleaning the back surface of a wafer coated with a resist, and supplying a chemical to the upper layer of the resist film In some cases, a liquid processing module for an upper layer for forming a film is provided. After these various processing modules are mounted on the processing block, how to reduce the occupied floor area of the coating and developing apparatus is being studied.

  The configuration in which the above unit blocks are stacked is effective for suppressing the occupied floor area, but since the wafer is sequentially transferred to each unit block, an abnormality occurs in one processing module or unit block, When performing maintenance, it may be necessary to stop the entire processing of the coating and developing apparatus. If it becomes so, there exists a problem that the operating efficiency of an apparatus will fall.

JP2007-115831

  The present invention has been made under such circumstances, and reduces the installation area of the processing block, and suppresses a decrease in the operating efficiency of the coating and developing apparatus when an abnormality occurs in the unit block or maintenance is performed. It is to provide a technology that can.

In the coating and developing apparatus of the present invention, the substrate carried into the carrier block by the carrier is transferred to the processing block, and after performing liquid processing in this processing block, the coating and developing apparatus is transferred to the carrier block.
a) The processing block comprises:
A liquid processing module that supplies a chemical solution for forming a coating film to the substrate, a heating module that heats the substrate after the chemical solution is applied, and a linear conveyance path that extends in the horizontal direction to convey the substrate between these modules A stack of laminated N units (N is an integer greater than or equal to 2) by laminating unit blocks for coating with each other vertically,
A liquid processing module that is stacked on the laminated body and supplies a developer to the substrate, a heating module that heats the substrate, a carrier block, and a transport mechanism for the unit block that moves on the linear transport path. A stack in which unit blocks for development processing are stacked one above the other, and N (N is an integer of 2 or more) is stacked,
The N-layered coating unit blocks are configured such that the same coating film is formed on each other.
b) a delivery unit that is provided on the carrier block side for each unit block and delivers the substrate to and from the transport mechanism of each unit block;
and c) said carrier, a transfer mechanism for transferring the substrate between each of the transfer portions of the transfer unit and the unit block for the development of a unit block for the coating,
d) a control unit for controlling the conveyance of the substrate;
e) a post-development inspection module for inspecting the substrate after the development process;
f) a storage unit for storing data of a route along which the substrate is transported before being inspected by the inspection module;
With
The control unit is a module in which the substrate in the unit block for development processing is processed based on data stored in the storage unit when an abnormality is detected in the substrate in the inspection by the post-development inspection module. And a mode for controlling the operation of the transport mechanism for the unit block by outputting a control signal so as to transport the subsequent substrate to a module other than the identified module.

Another coating and developing apparatus of the present invention is a coating and developing apparatus that delivers a substrate carried into a carrier block by a carrier to a processing block, performs liquid processing in the processing block, and then delivers the substrate to the carrier block. In
a) The processing block comprises:
A liquid processing module that supplies a chemical solution for forming a coating film to the substrate, a heating module that heats the substrate after the chemical solution is applied, and a linear conveyance path that extends in the horizontal direction to convey the substrate between these modules A stack of laminated N units (N is an integer greater than or equal to 2) by laminating unit blocks for coating with each other vertically,
A liquid processing module that is stacked on the laminated body and supplies a developer to the substrate, a heating module that heats the substrate, a carrier block, and a transport mechanism for the unit block that moves on the linear transport path. A stack in which unit blocks for development processing are stacked one above the other, and N (N is an integer of 2 or more) is stacked,
The N-layered coating unit blocks are configured such that the same coating film is formed on each other.
b) a delivery unit that is provided on the carrier block side for each unit block and delivers the substrate to and from the transport mechanism of each unit block;
and c) said carrier, a transfer mechanism for transferring the substrate between each of the transfer portions of the transfer unit and the unit block for the development of a unit block for the coating,
d) a control unit for controlling the conveyance of the substrate;
e) a post-development inspection module for inspecting the substrate after the development process;
f) a storage unit that stores data of a route along which the substrate is transported before being inspected by the inspection module;
The control unit, when an abnormality is detected in the substrate in the inspection by the post-development inspection module, specifies a unit block for development processing in which the substrate is processed based on data stored in the storage unit, A mode is provided in which a control signal is output to control the operation of the delivery mechanism so that the subsequent substrate is transported to a unit block for development processing other than the specified unit block for development processing. .

According to the present invention, as a unit block for forming a coating film including a resist film, a liquid processing module that supplies a chemical solution for forming the coating film to the substrate, and heating for heating the substrate after the chemical solution is applied using a module, a unit block for coating with and a transport mechanism for the unit block to move straight line conveying path for conveying the substrate between these modules, by stacking the unit block each other in a vertical , N (N is an integer of 2 or more). Further, unit blocks for development processing that are N-layered vertically are stacked on these unit block groups. For this reason, an installation area can be made small, setting the depth dimension of a processing block to a moderate magnitude | size. In addition, since each unit block is N-layered, it is possible to use another unit block even when an abnormality occurs in one unit block or maintenance is performed, thereby suppressing a decrease in operating efficiency. it can.

It is a top view of the coating and developing apparatus of the present invention. It is a perspective view of the coating and developing apparatus. It is a vertical side view of the coating and developing apparatus. It is a vertical side view of the liquid processing module of the coating and developing apparatus. It is a vertical front view of an interface block. It is a perspective view of the delivery module provided in the interface block. It is a block diagram of the control part of the said application | coating and developing apparatus. It is a schematic diagram which shows the data of the memory of the said control part. It is a schematic diagram which shows the data of the memory of the said control part. It is a flowchart which shows the conveyance path | route of the wafer in the said application | coating and developing apparatus. It is the flowchart which showed the process until conveyance to a unit block stops. It is a schematic diagram which shows the conveyance path | route of a wafer when abnormality is detected. It is a schematic diagram which shows the conveyance path | route of a wafer when abnormality is detected. It is the flowchart which showed the process until conveyance to a processing module stops. It is a vertical front view of an interface block. It is another vertical front view of an interface block. It is a side view which shows typically the other layout of the processing block used for the application | coating and developing apparatus of this invention. It is explanatory drawing which shows the conveyance path | route of a wafer at the time of using the processing block shown in FIG. It is a side view which shows typically the other layout of the processing block used for the application | coating and developing apparatus of this invention. It is a side view which shows typically the other layout of the processing block used for the application | coating and developing apparatus of this invention. It is a side view which shows typically the other layout of the processing block used for the application | coating and developing apparatus of this invention.

  The coating and developing apparatus 1 according to the present invention will be described. FIG. 1 shows a plan view of an embodiment in which the coating and developing apparatus 1 of the present invention is applied to a resist pattern forming apparatus, FIG. 2 is a schematic perspective view thereof, and FIG. 3 is a schematic side view thereof. The coating and developing apparatus 1 includes a carrier block S1 for carrying in and out a carrier C in which, for example, 25 wafers W serving as substrates are hermetically stored, a processing block S2 for processing the wafer W, The interface block S3 is arranged in a straight line. An exposure apparatus S4 that performs immersion exposure is connected to the interface block S3.

  In the carrier block S 1, a mounting table 11 on which the carrier C is mounted, an opening / closing part 12 provided on a wall surface in front of the mounting table 11, and a wafer W is taken out from the carrier C through the opening / closing part 12. A transfer arm 13 is provided. The transfer arm 13 includes five wafer holding portions 14 in the vertical direction, and is configured to be movable back and forth, movable up and down, rotatable about a vertical axis, and movable in the arrangement direction of the carrier C. A control unit to be described later assigns a number to the wafer W of the carrier C, and the transfer arm 5 transfers the wafer W to the transfer module BU1 of the processing block S2 in batches in order of 5 sheets from the smallest number. A place where the wafer W can be placed is described as a module, and a module that performs processing such as heating, liquid processing, gas supply, or edge exposure on the wafer W is described as a processing module. Of the processing modules, a module for supplying a chemical solution or a cleaning solution to the wafer W is referred to as a liquid processing module.

  The processing block S2 is connected to the carrier block S1, and the processing block S2 is configured by laminating first to sixth blocks B1 to B6 for performing liquid processing on the wafer W in order from the bottom. The description will be continued with reference to FIG. 4 which is a schematic longitudinal side view of the processing block S2. The first unit block B1 and the second unit block B2 which are unit blocks for the pre-processing are similarly configured, and an antireflection film and a resist film are formed on the wafer W.

  The third unit block B3 and the fourth unit block B4, which are unit blocks for subsequent processing, are configured in the same manner, and form a protective film for immersion exposure and clean the back side of the wafer W. The fifth unit block B5 and the sixth unit block B6, which are unit blocks for development processing, have the same configuration, and perform development processing on the wafer W after immersion exposure. In this way, the unit block for performing the same processing on the wafer W is provided in two layers. For convenience, the first to fourth unit blocks B1 to B4 are called application blocks, and the fifth to sixth unit blocks B5 to B6 are called development blocks.

  Each of the unit blocks B1 to B6 includes a liquid processing module, a heating module, a main arm A that is a transport unit for the unit block, and a transport region R1 in which the main arm A moves. In B, these arrangement layouts are similarly configured. In each unit block B, the main arm A carries the wafer W independently of each other and performs processing. The conveyance area R1 is a straight conveyance path extending from the carrier block S1 to the interface block S3. FIG. 1 shows the first unit block B1, and hereinafter, the first unit block B1 will be described as a representative.

  In the center of the first unit block B1, the transfer region R1 is formed. The liquid processing unit 21 and the shelf units U1 to U6 are arranged on the left and right of the transport area R1 when viewed from the carrier block S1 toward the interface block S3.

  The liquid processing unit 21 is provided with antireflection film forming modules BCT1 and BCT2 and resist film forming modules COT1 and COT2, and BCT1, BCT2, COT1, and COT2 from the carrier block S1 side to the interface block S3 side. Are arranged in this order. Each of the antireflection film forming module BCT and the resist film forming module COT includes a spin chuck 22, and the spin chuck 22 is configured to suck and hold the central portion of the back surface of the wafer W and to be rotatable about a vertical axis. In the figure, 23 is a processing cup, and the upper side is open. The processing cup 23 surrounds the periphery of the spin chuck 22 and suppresses the scattering of the chemical solution. When processing the wafer W, the wafer W is accommodated in the processing cup 23, and the center of the back surface of the wafer W is held by the spin chuck 22.

  The antireflection film forming modules BCT1 and BCT2 are provided with a nozzle 24 shared by these modules. In the figure, 25 is an arm that supports the nozzle 24, and 26 in the figure is a drive mechanism. The drive mechanism 26 moves the nozzles 24 in the arrangement direction of the processing cups 23 via the arms 25 and moves the nozzles 24 up and down via the arms 25. By the driving mechanism 26, the nozzle 24 moves between the processing cup 23 of the antireflection film forming module BCT1 and the processing cup 23 of the antireflection film forming module BCT2, and the wafer W transferred to each spin chuck 22 is transferred. A chemical solution for forming an antireflection film is discharged in the center. The supplied chemical solution spreads to the peripheral edge of the wafer W by the centrifugal force of the wafer W rotating around the vertical axis by the spin chuck 22, and an antireflection film is formed. Although not shown, each of the antireflection film forming modules BCT1 and BCT2 includes a nozzle that supplies a solvent to the peripheral end portion of the wafer W and removes an unnecessary film from the peripheral end portion.

  The resist film forming modules COT1 and COT2 are configured in the same manner as the antireflection film forming modules BCT1 and BCT2. That is, each of the resist film forming modules COT1 and COT2 includes a processing cup 23 and a spin chuck 22 for processing the wafer W, and the nozzle 24 is shared by the processing cup 23 and the spin chuck 22. However, a resist is supplied from the nozzle 24 instead of the chemical solution for forming the antireflection film. Here, each processing cup 23 is provided for each liquid processing module, and two liquid processing modules share one nozzle 24. However, one liquid processing module has one liquid processing module. It can also be seen that two nozzles 24 and two processing cups 23 are provided, and the nozzle 24 is shared by the two processing cups 23.

  The shelf units U1 to U6 are arranged in order from the carrier block S1 side to the interface block S3 side. Each shelf unit U <b> 1 to U <b> 5 is configured by, for example, two layers of heating modules that perform the heat treatment of the wafer W. The heating module includes a hot plate for heating the wafer W and a cooling plate for cooling the wafer W after heating. Therefore, the unit block B1 includes 10 heating modules, and each heating module is HP100 to HP109. The shelf unit U6 is configured by laminating peripheral edge exposure modules WEE1 and WEE2 for performing peripheral edge exposure on the wafer W after resist application.

  The transfer arm R1 is provided with the main arm A1. The main arm A1 is configured to be movable back and forth, vertically movable, rotatable about a vertical axis, and movable in the length direction of the processing block S2, and transfers the wafer W between all the modules of the unit block B1. be able to.

  Other unit blocks will be described. The second unit block B2 is configured in the same manner as the first unit block B1 described above, and is provided with antireflection film forming modules BCT3 and BCT4 and resist film forming modules COT3 and COT4. Moreover, 10 units | sets of HP200-209 are provided as a heating module which comprises each shelf unit U1-U5. Two peripheral exposure modules, WEE3 and WEE4, are provided as the peripheral exposure module constituting the shelf unit U6.

  The third unit block B3 has substantially the same configuration as that of the first unit block B1, except that protective film forming modules TCT1 and TCT2 for immersion exposure are used instead of the antireflection film forming modules BCT1 and BCT2. It has. Further, backside cleaning modules BST1 and BST2 are provided instead of the resist film forming modules COT1 and COT2. The protective film forming modules TCT1 and TCT2 have the same configuration as that of the antireflection film forming module BCT except that a chemical solution for forming a water-repellent protective film is supplied to the wafer W. That is, each of the protective film forming modules TCT1 and TCT2 includes the processing cup 23 and the spin chuck 22 for processing the wafer W, and the nozzle 24 is shared by the two processing cups 23 and the spin chuck 22. .

  In the backside cleaning modules BST1 and BST2, instead of providing the nozzle 24 for supplying the chemical solution to the surface of the wafer W, the nozzles for supplying the cleaning solution to the backside and peripheral bevels of the wafer W and cleaning the backside of the wafer W are provided. Provided separately. Except for these differences, the configuration is the same as that of the antireflection film forming module BCT. The back surface cleaning module BST may be configured to clean only the back surface side of the wafer W or only the bevel portion. Further, the back surface cleaning modules BST1 and BST2 may clean the back surface of the wafer W by a rubbing action using a brush member in addition to the cleaning liquid. Further, the shelf unit U6 of the third unit block B3 is configured by a heating module instead of the peripheral edge exposure module WEE. The heating modules of the shelf units U1 to U6 are HP300 to 311.

  The fourth unit block B4 is configured in the same manner as the third unit block B3 described above, and is provided with protective film forming modules TCT3 and TCT4 and back surface cleaning modules BST3 and BSTT4. The shelf units U1 to U6 of the fourth unit block B4 are configured by heating modules HP400 to 411.

  The fifth unit block B5 has substantially the same configuration as that of the unit block B1, except that development modules DEV1 to DEV4 are provided instead of the antireflection film forming module BCT1 and the resist film forming module COT. The developing module DEV is configured in the same manner as the resist film forming module COT except that a developing solution is supplied to the wafer W instead of the resist. Further, the shelf units U1 to U6 of the fifth unit block B5 are configured by heating modules HP500 to HP511.

  The sixth unit block B6 is configured in the same manner as the unit block B5, and development modules DEV5 to DEV8 are provided. Further, the shelf units U1 to U6 of the sixth unit block B6 are configured by heating modules HP600 to HP611.

  In the liquid processing unit 21 of each unit block, the chemical solution supplied to the wafer W is drained toward a drain path (not shown) provided on the lower side of the coating and developing device, for example. The viscosity of the chemical solution supplied to the wafer W by the antireflection film forming module BCT, the resist film forming module COT, and the protective film forming module TCT is higher than the viscosity of the developer. Accordingly, by disposing the developing module DEV in the upper unit block and disposing the other liquid processing modules in the lower unit block as in this embodiment, each chemical solution can be discharged quickly. As a result, it is possible to prevent the chemical liquid from volatilizing in each processing module, and thus it is possible to prevent the processing environment in the liquid processing unit 21 from changing.

  On the carrier block S1 side of the transport region R1, a shelf unit U7 straddling each unit block B is provided as shown in FIGS. Hereinafter, the configuration of the shelf unit U7 will be described. The shelf unit U7 is composed of a plurality of modules stacked on each other, and the hydrophobization modules ADH1 and ADH2 and the delivery modules CPL1 to CPL3 are provided at a height position accessible by the main arm A1 of the first unit block B1. ing. Hydrophobizing modules ADH3 and ADH4 and delivery modules CPL4 to CPL6 are provided at height positions accessible by the main arm A2 of the second unit block B2. In the description, the delivery module described as CPL includes a cooling stage for cooling the placed wafer W. The delivery module described as BU is configured to receive and retain a plurality of wafers W.

  Further, the hydrophobization modules ADH1 to ADH4 supply a processing gas to the wafer W to improve the hydrophobicity of the wafer W surface. Thereby, peeling of each film from the wafer W is suppressed during immersion exposure. In particular, by improving the hydrophobicity of the bevel portion (peripheral end portion) of the wafer W, the surface of the wafer W is exposed even when the film of the peripheral end portion is removed by each liquid processing module and the surface of the wafer W is exposed. A process is performed so as to have a water repellent effect and to prevent peeling of each film from the peripheral edge during immersion exposure.

  Further, delivery modules CPL7 to CPL8 and CPL9 to CPL10 are provided at height positions where the main arms A3 and A4 of the unit blocks B3 and B4 can be accessed. Further, delivery modules BU1 and CPL0 are provided at a height position accessible by the delivery arm 13 of the carrier block S1. The delivery module BU1 includes five wafer W holders in the vertical direction in order to collectively receive the wafers W transferred from the delivery arm 13 described above. The delivery module CPL0 is used to return the developed wafer W to the carrier C.

  Further, delivery modules CPL12 to CPL13 and BU2 are provided at a height position accessible by the main arm A5 of the unit block B5, and delivery modules CPL14 to CPL15 and BU3 are provided at positions accessible by the main arm A6 of the unit block B6. Is provided.

  An inspection module 31 is provided in the shelf unit U7. When the wafer W is unloaded from the unit blocks B5 and B6, the wafer W loaded into the inspection module 31 is transferred to the delivery modules BU2 and BU3. The wafer W that is not loaded into the inspection module 31 is returned to the carrier C without passing through the delivery modules BU2 and BU3. By setting the paths in this way, the transfer is controlled so that the wafers W return to the carrier C in the order of numbers, that is, the order of unloading from the carrier C.

  In the processing block B2, a transfer arm 30 as a first transfer mechanism that can be moved up and down and moved back and forth is provided in the vicinity of the shelf unit U7, and the wafer W is transferred between the modules of the shelf unit U7. .

  The inspection module 31 will be described in more detail. In accordance with an inspection mode selected as will be described later, a wafer W before exposure or a wafer W after development processing is carried into the inspection module 31 after the resist film is formed. After the resist film is formed, for the wafer W before exposure, for example, the presence or absence of foreign matter on the surface of the resist film and the film thickness of the resist are inspected.

  When the developed wafer W is transferred to the inspection module 31, a post-development defect is inspected. This post-development defect is classified into a defect caused by the development process, a defect caused by the development process and the coating process. Examples of the defect caused by the development process include pattern collapse, line width abnormality, resist dissolution failure, and post-development bubble adhesion. There are foreign matter adhesion, bridging defects between resist patterns (resist residue at the upper part between patterns) and pattern defects (scum defects) due to the remaining dissolved product (scum). Defects resulting from the coating process and the development process include, for example, pattern collapse and a local abnormality in the line width of the pattern.

  In this embodiment, the presence or absence of each of these defects is set as an inspection item. The inspection module 31 transmits the obtained inspection data to the control unit 51 described later when each inspection mode described later is executed. A control unit 51 described later determines the presence or absence of each defect based on the inspection data.

  Next, the configuration of the interface block S3 will be described with reference to FIG. In the interface block S3, a shelf unit U8 is provided at a position where the main arms A1 to A6 of each unit block can be accessed. The shelf unit U8 includes a delivery module BU4 at a position corresponding to the third unit block B3 to the sixth unit block B6. The delivery module BU4 will be described later. Below the delivery module BU4, the delivery modules TRS and CPL16 to CPL18 are stacked on each other.

  For example, four post-exposure cleaning modules PIR1 to PIR4 are stacked in the interface block S3. Each post-exposure cleaning module PIR is configured in the same manner as the resist film formation module COT, and supplies a chemical solution for removing the protective film and cleaning the wafer W surface instead of the resist.

  The interface block S3 is provided with three interface arms 32, 33, and 34. The interface arms 32, 33, and 34 are configured to be movable up and down and back and forth, and the interface arm 32 is configured to be movable in the horizontal direction. The interface arm 32 accesses the exposure apparatus S4, the transfer module TRS, and CPL16 to CPL18, and transfers the wafer W between them. The interface arm 33 accesses the transfer modules TRS, CPL16 to CPL18, and BU4, and transfers the wafer W between these modules. The interface arm 34 accesses the transfer module BU4 and the post-exposure cleaning modules PIR1 to PIR4, and transfers the wafer W between these modules. The interface arms 32 to 34 constitute a second delivery mechanism.

  The delivery module BU4 will be described with reference to FIG. The delivery module BU4 includes a support column 41 arranged in the circumferential direction. A wire 42 is stretched between one strut 41 and another strut 41, and the wires 42 and 42 intersect each other to form a set. A large number of sets of the wires 42 and 42 are provided at different height positions, and a circular support portion 43 is provided on the intersecting portion of the wires 42 and 42, for example. The wafer W is supported horizontally on the support unit 43. Although only five support portions 43 are shown in FIG. 6, many support portions 43 are provided upward so that the wafers W can be delivered to each level. The interface arms 33 and 34 and the main arms A3 to A6 can enter between the columns 41, and each of the entered arms transfers the wafer W to and from the support portion 43 by a lifting operation. The delivery modules BU1 to BU3 are also configured in the same manner as BU4, for example.

  Next, the control unit 51 provided in the coating and developing apparatus 1 will be described with reference to FIG. In the figure, reference numeral 52 denotes a bus, and a CPU 53 for performing various calculations is connected to the bus 52. Further, a program storage unit 57 that stores a processing program 54, a conveyance program 55, and a determination program 56 is connected to the bus 52. The processing program 54 outputs a control signal to each part of the coating / developing apparatus 1, and performs processing such as supply of chemicals and cleaning liquid and heating on each wafer W.

  The transfer program 55 outputs a control signal to the main arms A1 to A6, the transfer arm 30 and the interface arms 32 to 34 of each unit block B1 to B6 according to the selected inspection mode and the determination result of the determination program 56, and the wafer W Control the transport. The determination program 56 determines whether there is an abnormality in the processing of the wafer W based on, for example, inspection data transmitted from the inspection module 31.

  A memory 61 is connected to the bus 52, and the memory 61 stores a transfer schedule of each wafer W and an inspection result by the inspection module 31. FIG. 8 shows an example of data stored in the conveyance schedule storage area 63 included in the memory 61. The data in this figure is a normal transfer schedule in which there is no abnormality in the wafer W in the inspection by the inspection module 31.

  In the transfer schedule storage area 63, the ID of the wafer W, the transfer destination module of the wafer W, and the order of the transferred modules are stored in association with each other as a transfer schedule. That is, the transfer schedule is data of a route along which the wafer is transferred. For example, the wafer A1 in the figure includes an antireflection film forming module BCT1, a heating module HP100, a resist film forming module COT1, a heating module HP101, a peripheral exposure module WEE1, a protective film forming module TCT1, a heating module HP300, a back surface cleaning module BST1, and a heating. It is conveyed to the module 500, the development module DEV1, and the heating module 501 in this order.

  In this example, the wafer W is transported in the order of the first unit block B1 → the third unit block B3 → the fifth unit block B5, or the second unit block B2 → the fourth unit block. It is set to be conveyed in the order of B4 → sixth unit block B6. When a certain wafer W is transferred to the first unit block B1, the next wafer W is transferred to the second unit block B2, and the next wafer W is further transferred to the first unit block B1. In this way, the wafers W continuously discharged from the carrier C are distributed to different unit blocks B alternately.

  Next, the inspection result storage area 60 included in the memory 61 will be described with reference to FIG. The inspection result storage area 60 is an area in which presence / absence of abnormality is stored for each inspection item described above for each wafer. For a wafer W having an abnormality, a module that has processed the wafer W and a unit block that has been processed are stored as will be described later.

  The inspection result storage area 60 stores a conveyance stop reference set for each inspection item. This transfer stop reference is a reference for stopping transfer of the subsequent wafer W to the unit block B or processing module that has processed the wafer W in which an abnormality has been detected. For each inspection item to be inspected by the inspection module 31 described above, the conveyance is stopped when the frequency of occurrence of an abnormality corresponds to this conveyance stop criterion.

  As an example, a conveyance stop criterion set for pattern collapse shown in FIG. 9 will be described. When the mode for stopping the transfer for each unit block B to be described later is selected, when the pattern collapse is detected for the first time on the inspected wafer W, the same unit block B as the unit block B through which the wafer W passes is then detected. When pattern collapse is detected in two or more wafers W out of the five wafers W that have been inspected, the transfer of the subsequent wafers W to the unit block B is stopped.

  In addition, when the mode for stopping the transfer is selected for each processing module, when the pattern collapse is detected for the first time on the inspected wafer W, the inspection is performed through the same processing module as the processing module through which the wafer W has passed. When pattern collapse is detected in two or more wafers W among the five wafers W, the transfer to the processing module is stopped. Of the five wafers W, if the number of wafers W in which pattern collapse has been detected is one or zero, after the five wafers W have been inspected, the pattern collapse has been detected again. If a pattern collapse is detected in two or more wafers W while the five wafers W are inspected, the transfer to the unit block or the processing module is stopped.

  Concerning resist dissolution failure and bubble after development in FIG. 9, the conveyance stop standard is set almost the same as pattern collapse. However, unlike the case of pattern collapse, these inspection items are inspected after a defect is detected once. When the same defect is detected in one of the five wafers W to be transferred, the transfer to the unit block B is stopped. Further, for the scum defect of FIG. 9, processing for stopping the transfer to the unit block or processing module that has processed the wafer W is performed immediately after detection. Such a conveyance stop criterion is set for each inspection item described above. As a result, when the wafer W is accidentally defective, it is possible to prevent the transfer to the unit block or the processing module from being stopped.

  Returning to FIG. 7, the description will be continued. A setting unit 64 is connected to the bus 52. The setting unit 64 includes, for example, a keyboard, a mouse, a touch panel, and the like, and can set an inspection performed by the inspection module 31. As inspections that can be set, there are a post-development inspection C1 and a post-resist film formation inspection C2, which the user selects. In the post-development inspection C1, the wafer W that has undergone the development process in the fifth or sixth unit block B5, B6 is transferred to the inspection module 31 and inspected. In the post-resist film formation inspection C2, the wafer W on which the resist film is formed in the first or second unit block B1, B2 is transferred to the inspection module 31 and inspected.

  When the post-development inspection C1 is selected, the user further selects one of a mode D1 for stopping conveyance for each unit block B and a mode D3 for stopping conveyance for each processing module. Further, when the inspection C2 after resist film formation is selected, the user further selects one of a mode D2 in which the conveyance is stopped for each unit block B and a mode D4 in which the conveyance is stopped for each processing module. ing.

Further, the user can determine the wafer W to be inspected by designating the ID of the wafer W from the setting unit 64, for example. The bus 52 is connected to a display unit 65 composed of, for example, a display. The display unit 65 displays, for example, a transfer schedule and an inspection result for each inspection item for each wafer.
(Mode D1)
Next, the transfer path of the wafer W in the coating and developing apparatus 1 will be described with reference to FIG. Here, it is assumed that the post-development inspection C1 is selected in advance, and the mode D1 for stopping the transfer of the wafer W is selected for each unit block. First, the wafer W is transferred from the carrier C by the transfer arm 14 to the transfer module BU1. When the wafer W is transferred from the delivery module BU1 to the first unit block B1, as shown in FIG. 10A, the wafer W is transferred by the delivery arm 30 to the hydrophobic treatment modules ADH1 and ADH2 and subjected to the hydrophobic treatment. , Transported to the delivery module CPL1.

  The main arm A1 is transferred to the delivery module CPL1, and the main arm A1 transfers the wafer W to the antireflection film forming modules BCT1, BCT2 → heating modules HP100 to 109 → delivery module CPL2 → resist film forming modules COT1, COT2 → heating modules HP100 to 109 → periphery. The exposure modules WEE3, WEE4 → transfer module CPL3 are conveyed in this order, and an antireflection film and a resist film are formed on the wafer W in this order.

  The wafer W is transferred from the transfer module CPL3 to the transfer module CPL7 of the third unit block B3 by the transfer arm 30, and the main arm A3 transfers the wafer W to the protective film forming modules TCT1, TCT2 → heating modules HP300 to 311. → Transfer module CPL8 → Back surface cleaning modules BST1, BST2 → Transfer module BU4 are transferred in this order, a protective film is formed on the wafer W, and back surface cleaning is further performed.

  The wafer W is transferred by the interface arm 33 in the order of the delivery modules CPL16 to CPL18 → interface arm 32 → exposure apparatus S4, and is subjected to immersion exposure processing. After the exposure processing, the wafer W is transferred to the fifth unit block B5 in the interface arm 32 → the delivery module TRS → the interface arm 33 → the delivery module BU4 → the interface arm 34 → the post-exposure cleaning modules PIR1 to PIR4 → the interface arm 34 → the delivery module BU4. It is conveyed in the order of the height position.

  Subsequently, the wafer W is heated by the main arm A5 by the heating modules HP500 to 511 → delivery module CPL12 → developing modules DEV1 to DEV4 → heating modules HP500 to 511 → delivery module CPL13 → delivery arm 30 → delivery module BU2 → inspection module 31. In this order, they are transported and inspected. The inspected wafer W is transferred in the order of the inspection module 31 → the transfer arm 30 → the transfer module BU1, and is returned from the transfer arm 13 to the carrier C. The wafer W set so as not to be inspected by the inspection module 31 is sequentially processed by the development modules DEV1 to DEV4 and the heating modules HP500 to 511, and then the delivery module CPL13 → the delivery arm 30 → the delivery module CPL0 → the delivery arm 13. → It is conveyed in the order of carrier C.

  When the wafer W is transferred from the buffer module BU1 to the second unit blocks B2, B4, and B6, the same processing as that for transferring the wafer W to the unit blocks B1, B3, and B5 is performed on the wafer W. FIG. 10B shows the transport path when passing through the unit blocks B 2 → B 4 → B 6 as described above.

  The transfer path will be briefly described below. The wafer W is transferred in the order of the transfer arm 30 → the hydrophobic treatment module ADH3, ADH4 → the transfer arm 30 → the transfer module CPL4. Subsequently, the main arm A2 removes the wafer W from the antireflection film forming modules BCT3 and BCT4 → heating modules HP200 to 209 → delivery module CPL5 → resist film forming module COT3, COT4 → heating modules HP200 to 209 → edge exposure modules WEE3 and WEE4. → Transport to delivery module CPL6. Thereafter, the wafer W is transferred in the order of the transfer arm 30 → the transfer module CPL9, and is protected by the main arm A4 with the protective film forming modules TCT3 and TCT4 → the heating modules HP400 to 411 → the transfer module CPL10 → the back surface cleaning modules BST3 and BST4 → the transfer. It is conveyed in the order of module BU4.

  In the interface block S3, the wafer W is transferred in the same manner as the wafer W transferred to the first and third unit blocks B, subjected to the exposure process and the post-exposure cleaning process, and further the sixth module of the transfer module BU4. It is transferred to the height position in the unit block B6. Thereafter, the wafer W is heated by the main arm A6 by the heating module HP600 to 611 → delivery module CPL14 → developing module DEV5 to DEV8 → heating module HP600 to 611 → delivery module CPL15 → delivery module BU3 → delivery arm 30 → inspection module 31 → delivery. It is conveyed in the order of arm 30 → delivery module CPL0 → carrier C. The wafer W that is not the inspection target is transferred in the order of development, post-heating processing, delivery module CPL15 → delivery arm 30 → delivery module CPL0 → delivery arm 13 → carrier C, in the above-described conveyance path.

  With reference to FIG. 11, a process in which the control unit 51 stops the conveyance to the unit block B will be described. While the wafer W is transported by the above-described path, the determination program 56 determines the presence / absence of abnormality for each of the inspection items described above based on the inspection data transmitted from the inspection module 31, and the determination result is an inspection result storage area 60. If it is determined that there is an abnormality, the processing module and the unit block B that processed the wafer W in which the abnormality is detected are specified based on the transfer schedule in the transfer schedule storage area 63. Further, the wafer ID, the inspection item in which the abnormality occurred, the processing module and the unit block B are associated with each other and stored in the inspection result storage area 60 of the memory 61 (step S1).

  Subsequently, the determination program 56 determines, based on the past inspection history of the wafer W stored in the inspection result storage area 60, whether or not the transfer stop criterion described above is set for the inspection item. (Step S2). For example, when the abnormal inspection item is pattern collapse, the wafer W that has passed the same unit block B as described above is inspected on five wafers W after the pattern collapse first occurs. Whether or not pattern collapse has occurred in two or more wafers W is determined during the process. If it is determined that the transport stop criterion is not met, the processing is continued by the unit blocks B1 to B6.

  If it is determined that the transfer stop criterion is met, the processing of the wafer W and the main arm A by each processing module of the unit block B5 or B6 that has processed the wafer W in which an abnormality has been detected in step S1. Stop the operation. Then, the transfer program 55 rewrites the transfer schedule so that the process is performed using the unit block of the unit blocks B5 and B6 whose operation of the processing module and the main arm A is not stopped. Then, according to the transfer schedule, the wafer W is transferred and processed (step S3).

  FIGS. 12A and 12B show transfer paths when transfer of the wafer W to the fifth unit block B5 is stopped as an example. As shown in FIGS. All the wafers W that have been processed in the unit blocks B1 to B4 are loaded into the sixth unit block B6. Contrary to this example, when the transfer to the sixth unit block B6 is stopped, all the wafers W processed in the first to fourth unit blocks B1 to B4 are in the fifth unit block B5. It is carried in.

  In this way, the processing is continued using only one development block. Thereafter, when an abnormality is detected in the wafer W, the determination program 56 determines the processing module and unit block that processed the wafer W in which the abnormality was detected based on the transfer schedule in the transfer schedule storage area 63 as in step S1. The wafer ID is identified and the inspection item that has become abnormal is associated with the processing module and the unit block B and stored in the memory 61 (step S4).

  Subsequently, the determination program 56 refers to the inspection history of the wafer W after the transfer to the unit block B5 or B6 is stopped, and whether or not the determination program 56 meets the transfer stop criterion for the unit block set in the inspection item. Is determined (step S5). If it is determined that it does not correspond, the processing is continued by the unit blocks B1 to B4 and B5 or B6.

  If it is determined that the conveyance stop criterion is met, the determination program 56 determines that the inspection item that has become abnormal is determined to be abnormal when the unit block B5 or B6 is stopped in steps S2 and S3. (Step S6). If it is determined in step S6 that the inspection items are the same, the determination program 56 further passes the coating block through which the wafer W determined to be abnormal in step S1 and the wafer W determined to be abnormal in step S4 have passed. It is determined whether or not the coating block matches (step S7).

  If it is determined in step S7 that the coating blocks match, the abnormality in the inspection item is considered to be caused by the processing in the coating block. Therefore, the processing of the wafer W by the coating block and the main arm A Stop the operation. That is, the processing of the wafer W in any one of the unit blocks B1 and B3, B2 and B4 is stopped. Furthermore, the conveyance program 55 rewrites the conveyance schedule so as to perform processing using the unit block that is operating among the unit blocks B1 to B4. Then, according to the transfer schedule, the wafer W is transferred and the processing is continued (step S8).

  For example, from the state where the transport to the unit block B5 is stopped as shown in FIG. 12, if the same inspection item abnormality as when the transport to the unit block B5 is stopped continues according to the above steps S6 to S8, The conveyance to the unit blocks B1 and B3 is stopped. Then, all the wafers W are transferred in order along the path of the unit blocks B 2 → B 4 → B 6 shown in FIG. 9B.

If it is determined in step S6 that the inspection item is abnormal when the development block is stopped or it is determined in step S7 that the abnormal application block is different, for example, Conveyance to each unit block in operation is continued, and the inspection items determined to meet the conveyance stop criteria in step S5 are displayed on the display unit 65 (step S9).
(Mode D2)
Next, a case will be described in which the inspection C2 after the resist film formation is set to be performed and the mode D2 for stopping the conveyance for each unit block is selected. As a transfer path of the wafer W when the inspection C2 is performed after the resist film is formed, the wafer W after finishing the resist coating process and loaded into the delivery modules CPL4 and CPL6 is carried into the inspection module 31 by the delivery arm 30. After being inspected by the inspection module 31, it is carried into the third and fourth unit blocks via the delivery modules CPL7 and CPL9. The wafer W after the development processing is transported in the order of delivery modules CPL13, CPL15 → delivery module CPL0 and returned to the carrier C. Excluding such a difference, the wafer W is transferred in the same manner as when the post-development inspection C1 is executed.

  Even when this mode D2 is executed, the abnormality of the wafer W is inspected for each inspection item in the same manner as when the post-development inspection mode is executed, and the processes of steps S1 to S2 are executed. If it is determined in step S2 that the conveyance stop criterion is not met, the processing is continued. If it is determined that the transfer stop criterion is met, the processing of the wafer W by the processing modules of the unit block B1 or B2 that has processed the wafer W in which an abnormality has been detected and the operation of the main arm A Stop. Then, the transfer program 55 rewrites the transfer schedule so that the process is performed using the unit block of which the operation of the processing module and the arm is not stopped among the unit blocks B1 and B2.

  FIG. 13 shows, as an example, a transfer path when transfer of the wafer W to the second unit block B2 is stopped. As shown in this figure, all subsequent wafers W are transferred from the carrier C to the first unit block. It is carried into block B1. Then, the first unit block B1 is distributed to the third and fourth unit blocks B3 and B4. Conversely, when the transfer to the first unit block B1 is stopped, all subsequent wafers W are transferred from the carrier C to the second unit block B2.

(Mode D3)
Next, a case will be described in which the post-development processing inspection C1 is set to be performed, and the mode D3 for stopping conveyance for each processing module is selected. Hereinafter, the flow when the mode D3 is executed will be described with reference to FIG. 14, focusing on the differences from the mode D1. When an abnormality is detected in the wafer W, a processing module that processes the wafer W is specified in the unit blocks B5 and B6 based on the transfer schedule. The wafer ID is associated with the abnormal inspection item and the processing module is stored in the memory 61 (step S11). Subsequently, the determination program 56 determines, for each processing module specified in step S11, whether or not each processing module meets the conveyance stop criterion based on the data in the inspection result storage area 60 (step S12). .

  If it is determined that none of the processing modules meets the transfer stop criterion, the transfer of the wafer W to each processing module is continued. If there is a processing module corresponding to the transfer stop criterion, the processing of the wafer W in the processing module is stopped (step S13). The transfer schedule is set so that transfer is performed except for the modules whose processing is stopped in this way, and the transfer and processing of the wafer W are continued.

  When the processing of the wafer W is continued, and then an abnormality occurs in the wafer W, the determination program 56, in the same way as in step S11, determines the abnormal wafer ID, the abnormal inspection item, and the development block. The processing module that processes the wafer W is associated with each other and stored in the inspection result storage area 60 (step S14). Then, as in step S12, the determination program 56 determines whether there is a module that meets the conveyance stop criterion for each processing module specified in step S14, based on the data in the inspection result storage area 60. (Step S15).

  If there is an inspection item corresponding to the conveyance stop criterion, the determination program 56 determines whether or not the inspection item is the same inspection item as the inspection item whose conveyance to the processing module is stopped in step S13. Determination is made (step S16). If it is determined that the same inspection item is not applicable, the processing after step S13 is executed, and the transport to the processing module corresponding to the transport stop criterion is stopped in the development block.

  If it is determined in step S16 that the inspection items are the same, the determination program 56 specifies the processing module that has processed the wafer W in which the abnormality is detected in step S14 in the unit blocks B1 to B4 based on the transfer schedule. Then, the processing of the wafer W in the identified processing module is stopped. Further, a transfer schedule is set so that transfer is performed except for the processing module in which the process is stopped in this manner, and the transfer and processing of the wafer W are continued (step S17). More specifically, the transfer is performed except for the processing module in which the processing is stopped. Specifically, the wafer W set to be transferred to the module in which the processing is stopped in one unit block is the same as the module in the unit block. It is to be transported to another transportable module that performs processing. That is, when the processing of one heating module is stopped, the wafer W is transferred to another heating module of the unit block in which the heating module is installed and subjected to the processing. If the processing of one liquid processing module stops, the wafer W is transferred to another liquid processing module that performs the same processing as the liquid processing module in the unit block in which the heating module is installed, and receives the processing. . As described above, the wafer W is transported through the same path as in the case where each unit block has no abnormality as shown in FIG. 10 except that the transport to the module which cannot be used in the mode D3 is not performed. The

  Here, a supplementary description will be given of the processing module that stops conveyance when the mode D3 is executed. For example, when the pattern collapse is detected on the wafer W in the above step S11 and the wafer W is processed by the development module DEV1 and the heating module 500, the inspection result of the wafer W that has been processed by the DEV1 in the past is referred to. Then, it is determined whether or not each processing module meets the conveyance stop criterion. Furthermore, the inspection result of the wafer W that has been processed by the heating module 500 in the past is referred to, and it is determined whether or not the transfer stop criterion is met. And among the DEV1 and the heating module 500, about the processing module determined to correspond to a conveyance stop reference | standard, conveyance to the said processing module stops. In this way, it is determined for each processing module whether the transport stop criterion is met.

  However, the developing modules DEV1 and DEV2, DEV3 and DEV4, DEV5 and DEV6, DEV7 and DEV8 share the nozzle 24, respectively. As described above, when the conveyance stop to one DEV among the DEVs sharing the nozzle 24 is determined, the transfer to the other DEV is also determined to be stopped. Therefore, when the transport to DEV1 is stopped, the transport to DEV2 is also stopped. If the transfer to the DEV3 and DEV4 is not stopped, the wafer W transferred to the unit block B5 is processed by the DEV3 and DEV4 as described above and returned to the carrier C. In addition, when the heating module 500 meets the conveyance stop criterion, the heating module 500 is conveyed to the other heating modules 501 to 511.

Further, regarding the antireflection film forming module BCT, the resist film forming module COT, and the protective film forming module TCT, two units provided in each unit block share a nozzle. Therefore, in order to prevent the processing in each unit block from being stopped, the transfer to these liquid processing modules is not stopped in step S17, but instead, these liquid processing modules that have processed the wafer W corresponding to the stop criterion in step S15. Are displayed on the display unit 65 in association with the abnormal inspection item.
(Mode D4)
Next, the case where the mode D4 in which the inspection C2 after resist coating is set to be performed and the mode in which the conveyance is stopped for each processing module is selected will be described focusing on the difference from the mode D3 selection. When the mode D4 is executed, the wafer W is transferred in the same manner as when the mode D2 is executed. That is, the wafer W that has been processed in the unit blocks B 1 and B 2 is transferred to the inspection module 31. When an abnormality is detected in the wafer W, the processing module that has processed the wafer W is specified in the same manner as in the mode D3, and it is determined whether or not the specified processing module meets the transfer stop criterion. If the transport stop criterion is met, the transport to the processing module is stopped. In this mode D4, since the resist-coated wafer W is inspected, the processing modules whose conveyance stops are the processing modules of the unit blocks B1 and B2. The conveyance to the processing module is stopped based on the rule described in mode D3. That is, the antireflection film forming module BCT and the resist film forming module COT continue to be transported to the module even if the transport stop criterion is met.

  According to this coating and developing apparatus 1, the antireflection film forming module BCT and the resist film forming module COT are arranged in the unit blocks B1 and B2, and the protective film forming module TCT and the back surface cleaning module BST are arranged in the unit blocks B3 and B4. The unit blocks configured similarly are doubled up and down. Further, unit blocks B5 and B6 for development processing that are doubled up and down are stacked on these unit blocks B1 to B4. For this reason, an installation area can be made small, setting the depth dimension of process block S2 to a moderate magnitude | size. Duplexing may be performed by configuring unit blocks so that the same processing can be performed on the wafer W, and is not limited to the same layout and number of modules in each unit block.

  Further, even when an abnormality is detected in the wafer W during execution of modes D1 and D2, transport to one unit block of the duplexed unit blocks is stopped, and transport to the other unit block is performed. Will continue. Then, while the processing of the wafer W is continued in the other unit block, the user can perform maintenance such as repair at the time of failure, periodic inspection, and adjustment confirmation on the one unit block. Accordingly, it is possible to suppress a decrease in operating efficiency of the coating and developing apparatus 1.

  In addition, by stopping the conveyance to the development block and the conveyance block to the application block as described above, it is possible to suppress the conveyance to the coating block that does not need to stop the conveyance, A decrease in operating efficiency can be suppressed more reliably. However, it is not limited to stopping conveyance to each unit block step by step. For example, when a development defect including a coating process factor such as a pattern collapse or a line width local abnormality is detected on the wafer W, the transport to the development block that has processed the wafer W and the coating block may be stopped simultaneously. . In this case, it is possible to reduce the risk of generating a defective wafer W. In mode D1, if the process for stopping the development block is mode E1, and the process for stopping the coating block is mode E2, in the above example, mode E2 is automatically executed after execution of mode E1, but mode E2 is changed to mode E2. The user may be able to select whether to execute the setting from the setting unit 64.

  In addition, when the modes D3 and D4 are executed, the transfer of the wafer W is stopped for each processing module, so that the number of processing modules whose operation is stopped can be reduced. Accordingly, it is possible to further suppress a decrease in the operating efficiency of the apparatus. When the mode D3 is executed, the processing module for the developing block and the processing module for the coating block are not limited to being stopped step by step. For example, depending on the inspection item that becomes abnormal, the processing for processing the wafer W detected as abnormal All transportation to the module may be stopped. In mode D3, when the process for stopping the processing module for the development block is mode E3 and the process for stopping the processing module for the coating block is mode E4, in the above example, mode E4 is automatically executed after execution of mode E3. However, the user may be able to select from the setting unit 64 whether or not to execute the mode E4.

  In addition, when the modes D3 and D4 are executed, the transfer of the wafer W may be controlled for each processing cup for the liquid processing modules BCT, COT, TCT, BST, and DEV. That is, the transfer of the wafer W to the processing cup 23 that has processed the wafer W in which an abnormality has occurred in each of these processing modules is stopped, and the wafer to the processing cup 23 sharing the nozzle 24 with the processing cup 23 is stopped. The conveyance of W may be continued. In addition, when it is determined that BCT, COT, TCT, and BST are stopped to be transported to these liquid processing modules, instead of continuing the transport to these liquid processing modules, the unit block including the liquid processing module is transferred to The transfer of the wafer W may be stopped.

  When the transfer of the wafer W is stopped for each processing cup 23 as described above, the same applies when, for example, one BCT processing cup 23 is not used in order to adjust the number of wafers W processed in the apparatus. The processing cup 23 of one COT of the unit block can be set not to be used. Similarly, for example, when one COT processing cup 23 is not used, one BCT of the same unit block can be set not to be used. Further, even in the unit block configured in the same manner as the unit block in which the transport of the COT and the BCT to the processing cup 23 is stopped, the transport to one processing cup 23 of the COT and one processing cup 23 of the BCT is performed. The number of processed wafers W may be adjusted by stopping.

  In the coating and developing apparatus 1, the interface block S3 may be configured as shown in FIG. In this example, the wafer W is transferred to the unit blocks B1, B2 → B3, B4 via the interface block S3. The difference from the interface block S3 shown in FIG. 5 will be described. Delivery modules BU5 and BU6 are provided at height positions corresponding to the unit blocks B1 and B2, respectively. Delivery modules BU7 and BU8 are provided at a height position corresponding to the unit block B3. Delivery modules BU9 and BU10 are provided at height positions corresponding to the unit block B4. In addition, delivery modules TRS1 and TRS2 are provided at height positions corresponding to the unit blocks B5 and B6, respectively. A delivery module BU11 is also provided. Each delivery module is stacked on top of each other.

  The wafers W that have been processed in the unit blocks B1 and B2 are transferred to the transfer modules BU5 and BU6, respectively, and further transferred to the transfer modules BU7 and BU8 by the interface arm 33. The wafers W transferred to the transfer modules BU7 and BU8 are transferred to the unit blocks B3 and B4 by the transfer arms A3 and A4, respectively, and are processed. The wafers W that have been processed in the unit blocks B3 and B4 are transferred to the transfer modules BU9 and BU10, and transferred to the transfer modules CPL16 and CPL17 by the interface arm 33. Thereafter, the wafer W is transported in the order of the exposure apparatus S4 → the delivery module TRS in the same manner as in the example of FIG. 5. Thereafter, the delivery module TRS → the interface arm 33 → the delivery module BU11 → the interface arm 34 → the post-exposure cleaning module PIR → The interface arm 34 is transferred to the delivery modules TRS1 and TRS2, and is transferred to the unit blocks B5 and B6 by the main arms A5 and A6.

  FIG. 16 shows the configuration of still another interface block S3. In the interface block S3 of FIG. 16, the pre-exposure cleaning modules RD1 to RD4 are stacked. The pre-exposure cleaning modules RD <b> 1 to RD <b> 4 supply a cleaning liquid to the surface of the wafer W before exposure to wash away the surface eluate of the wafer W. Except that the pre-exposure cleaning modules RD1 to RD4 are provided, the interface block S3 in FIG. 16 is configured in the same manner as the interface block S3 in FIG.

  In the interface block S3 of FIG. 16, the wafer W processed in the third unit block B3 or the fourth unit block B4 and transferred to the delivery module BU9 or BU8 is transferred to the pre-exposure cleaning modules RD1 to RD4 by the interface arm 33. Transported and cleaned. Thereafter, the wafer W is transferred in the order of the interface arm 33 → the delivery modules CPL14, 15 → exposure processing S4. Note that such a pre-exposure cleaning module RD can also be provided in the interface block S3 of FIG. 5 to perform a cleaning process. Further, in each of the above embodiments, the transfer of the wafer W from the unit blocks B1 and B2 to the unit blocks B3 and B4 may be performed by the interface arm 33. Specifically, a delivery module that has finished the coating process is provided at the height position of the unit blocks B1 and B2 of the shelf unit U8, and the unit block B3 of the shelf unit U8 of the delivery module BU4 from the delivery module via the interface arm 33. By transferring the wafer W to the height position of B4, transfer between the layers can be performed.

  In the above-described embodiment, a protective film may be formed by TCT1 to TCT4, and the wafer W heated by the heating modules HP300 to 311 or HP400 to 411 may be transferred to the inspection module 31 and inspected. In that case, as in each of the above modes, for example, based on the transfer path of the wafer W in which an abnormality has been detected, transfer to the unit block in which the antireflection film, resist film and protective film are formed on the wafer W is stopped. Or the transfer of the wafer W included in the unit block to the processed module is stopped.

  In the above example, the TCT may be a module that forms an antireflection film on the upper layer of the resist film instead of the protective film forming module. In addition, the hydrophobization treatment in the hydrophobization processing module ADH may be performed after the formation of the antireflection film and before the resist application, instead of being performed before the formation of the antireflection film by the antireflection film formation module BCT. After resist application, it may be performed before the wafer W is transferred to the unit blocks B3 and B4. Further, the stacking order of the unit blocks is not limited to this example. For example, the fifth and sixth unit blocks that perform the development process are provided below the first and second unit blocks that form the resist film. Also good. In the above example, each of the duplicated unit blocks has the same number of modules and the same layout. However, if the same processing can be performed on the wafer W, the number of modules is as described above. The layout is not limited to the same.

  In addition, the coating and developing apparatus 1 can switch to the maintenance mode at an arbitrary timing during processing of the wafer W by executing the above-described modes. When predetermined processing is performed from the unit 64, a mode switching signal is output to each unit of the apparatus 1, and the maintenance mode is started. As an aspect of the maintenance, there is a case where one unit block of the unit block for the coating film that is duplicated is maintained, for example, a case where one of the unit blocks B1 and B2 for the pre-processing is maintained. . Alternatively, there is a case where one of the unit blocks B3 and B4 for subsequent processing is maintained, or a case where one of the unit blocks B5 and B6 for development processing is maintained. In such a case, for example, when information for maintenance of the unit block B1 is input to the control unit, wafer transfer control is performed so that the wafer is not transferred to the unit block B1 to be maintained. In the above-described embodiment, since the route shown in FIG. 10A and the route shown in FIG. 10B are prepared as the wafer transfer route, it means that the wafer is not carried into the unit block B1. This means that the route shown in FIG. 10A is not used. Therefore, no wafer is loaded into the hydrophobization modules ADH1 and 2 and the unit blocks B3 and B5 included in the route.

  In this maintenance mode, regardless of the inspection result of the wafer W, the user designates a unit block for stopping the transfer of the wafer W, and the processing of the wafer W is continued by the unit block for which the transfer is not stopped. As described above, if the unit block is duplicated and the transfer path to which the unit block to be maintained belongs is not used, processing including wafer transfer control is simplified.

The maintenance mode is not limited to the method of stopping the conveyance to the conveyance path to which the unit block to be maintained belongs. For example, when the unit block B1 which is one unit block included in the path shown in FIG. 10A and the unit block B4 which is one unit block included in the path shown in FIG. It is efficient to use the unit block B2 included in the route shown in FIG. 10B and the unit block B3 included in the route shown in FIG. In this case, the wafers are processed by connecting the usable unit blocks among the duplicated unit blocks, and in this case also, the operation of the apparatus that suppresses the decrease in the operation rate while performing maintenance is performed. It can be carried out.
Furthermore, in the maintenance mode, when one of the duplicated unit blocks, for example, the unit block B1 for the pre-stage processing is maintained, the wafer is transferred to the other unit blocks other than the unit block B1. It may be. In this case, for example, the post-processing unit blocks B3 and B4 are operated, the wafers processed in the pre-processing unit block B1 are distributed to the post-processing unit blocks B3 and B4, and the development processing unit Blocks B5 and B6 may also be operated.

  Furthermore, other embodiments of the present invention will be described. FIG. 17 shows another example of the processing block S2, and the horizontal rows correspond to the unit blocks B1 to B6 shown in FIG. 4 in order from the bottom, and one square represents the antireflection film forming module BCT1 and the like. One liquid processing module is represented. Accordingly, the unit blocks B1, B2, B5, and B6 have the same configuration as the unit block shown in FIG. 4. For example, the unit block B1 is represented as shown in FIG. The example of FIG. 17 is different from the example of FIG. 4 in that the unit blocks B3 and B4 are free areas without providing the back surface cleaning modules BST1 to BST4.

  Here, FIG. 18 is a diagram schematically showing an extracted route for forming a coating film among the routes of the wafer shown in FIG. 10 described above. According to the embodiment shown in FIG. 10, the wafer taken out from the carrier C is carried into the coating film unit block for forming the coating film via any one of the hydrophobic treatment modules ADH1 to ADH4. However, the unit block for the coating film is separated into a unit block B1 (B2) for pre-processing and a unit block B3 (B4) for post-processing. The resist film forming modules COT1 to COT4 are provided in the unit block B1 (B2) for the pre-processing, but the resist film forming modules COT1 to COT4 are arranged in the unit block B3 (B4) for the post-processing. It may be.

  An example of such a layout is the layout of FIG. The vertical and horizontal squares in FIG. 19 have the same meaning as the squares in FIG. 17. In this example, resist film forming modules COT1 and COT2 and protective film forming modules TCT1 and TCT2 which are modules for forming an upper layer film are provided. 4 is provided in the unit block B3 for subsequent processing, and the resist film forming modules COT3 and COT4 and the protective film forming modules TCT3 and TCT4 are provided in the unit block B4 for subsequent processing, and the resist film forming module in the layout of FIG. The areas in the unit blocks B1 and B2 in which COT1 to COT4 are provided are vacant areas. The resist film forming module COT1 is provided in the unit block B1, the resist film forming module COT2 is provided in the unit block B2, and the resist film forming module COT3 is provided in the unit block B2, and the resist film forming module COT4. May be provided in the unit block B4. In this case, it can be said that the resist film forming modules are dispersedly arranged in the unit block B1 (B2) for the pre-processing and the unit block B3 (B4) for the post-processing.

  In the processing block S2, as shown in FIG. 20, inspection modules 701 to 704 may be provided in unit blocks B3 and B4 for subsequent processing. In this layout, inspection modules 701 to 704 are provided instead of the back surface cleaning modules BST1 to BST4 with respect to the layout of FIG. The inspection modules 701 to 704 are for inspecting the application state of the coated surface after the protective film is formed on the surface of the wafer W by the protective film forming modules TCT1 to TCT4. Specifically, for example, unevenness of the film thickness, detection of a state in which a streak is visible on the coating film, detection of an uncoated state, and the like can be given. If it is in an uncoated state, there may be an abnormality in the nozzle, coating liquid discharge pump, piping system, or the like.

  When an abnormality is determined in the inspection in the inspection modules 701 to 704, the module (liquid processing module or heating module) on which the wafer W determined to be abnormal is processed is stopped, and the other modules are used. Alternatively, the coating may be stopped for each coating film unit block in which the wafer W is used, and the operation of other unit blocks may be continued. Which mode to use (whether to select module stop or unit block stop when the test result is determined to be abnormal) is implemented by setting a mode in the control unit, for example. The

In the above example, the unit block for the pre-stage process and the unit block for the post-stage process, which constitute the unit block for the coating film, are doubled and stacked on each other. Well, in a more general way, it is a requirement that N (N is an integer of 2 or more) overlap. Similarly, the developing blocks are not limited to duplex, but may be triple or quadruple.
In addition, the unit block for the coating film may be configured so as not to be separated into a unit block for pre-processing and a unit block for post-processing. FIG. 21 shows the layout of such a processing block S2. In this example, the module for forming the antireflection film and the module for forming the resist film are arranged in the same unit block, and these unit blocks are stacked in three stages to form a triple layer. It has become. That is, the processing block S2 shown in FIG. 21 deletes the subsequent processing unit blocks B3 and B4 provided with the protective film forming module in the layout of the processing block S2 shown in FIG. In addition to B2, it can be said that unit blocks having the same configuration are further laminated. In this case, since there is no unit block for the subsequent stage processing, the unit block for the previous stage processing becomes the unit block for the coating film.
Further, in the processing block S2 of FIG. 21, three unit blocks for development processing are stacked to be tripled. In FIG. 21, in order to avoid complication of codes, the number of stages counted from the bottom in each layer is associated with the number attached after B, and the same codes B1 to B6 as in FIG. 4 are used.

W Wafers BCT1 to BCT6 Antireflection film forming modules BST1 to BST4 Back surface cleaning modules COT1 to COT6 Resist film forming modules DEV1 to DEV12 Development module HP Heating modules TCT1 to TCT4 Protective film forming module S1 Carrier block S2 Processing block S3 Interface block WEE Edge exposure Module 1 Coating and developing device 30 Delivery arm 51 Control unit 55 Conveying program 56 Determination program 61 Memory 64 Setting unit A1 to A6 Main arm

Claims (6)

In the coating and developing apparatus, the substrate carried into the carrier block by the carrier is transferred to the processing block, subjected to liquid processing in the processing block, and then transferred to the carrier block.
a) The processing block comprises:
A liquid processing module that supplies a chemical solution for forming a coating film to the substrate, a heating module that heats the substrate after the chemical solution is applied, and a linear conveyance path that extends in the horizontal direction to convey the substrate between these modules A stack of laminated N units (N is an integer greater than or equal to 2) by laminating unit blocks for coating with each other vertically,
A liquid processing module that is stacked on the laminated body and supplies a developer to the substrate, a heating module that heats the substrate, a carrier block, and a transport mechanism for the unit block that moves on the linear transport path. A stack in which unit blocks for development processing are stacked one above the other, and N (N is an integer of 2 or more) is stacked,
The N-layered coating unit blocks are configured such that the same coating film is formed on each other.
b) a delivery unit that is provided on the carrier block side for each unit block and delivers the substrate to and from the transport mechanism of each unit block;
and c) said carrier, a transfer mechanism for transferring the substrate between each of the transfer portions of the transfer unit and the unit block for the development of a unit block for the coating,
d) a control unit for controlling the conveyance of the substrate;
e) a post-development inspection module for inspecting the substrate after the development process;
f) a storage unit for storing data of a route along which the substrate is transported before being inspected by the inspection module;
With
The control unit is a module in which the substrate in the unit block for development processing is processed based on data stored in the storage unit when an abnormality is detected in the substrate in the inspection by the post-development inspection module. And a mode for controlling the operation of the transport mechanism for the unit block by outputting a control signal so that the subsequent substrate is transported to a module other than the identified module. apparatus. In the coating and developing apparatus, the substrate carried into the carrier block by the carrier is transferred to the processing block, subjected to liquid processing in the processing block, and then transferred to the carrier block.
a) The processing block comprises:
A liquid processing module that supplies a chemical solution for forming a coating film to the substrate, a heating module that heats the substrate after the chemical solution is applied, and a linear conveyance path that extends in the horizontal direction to convey the substrate between these modules A stack of laminated N units (N is an integer greater than or equal to 2) by laminating unit blocks for coating with each other vertically,
A liquid processing module that is stacked on the laminated body and supplies a developer to the substrate, a heating module that heats the substrate, a carrier block, and a transport mechanism for the unit block that moves on the linear transport path. A stack in which unit blocks for development processing are stacked one above the other, and N (N is an integer of 2 or more) is stacked,
The N-layered coating unit blocks are configured such that the same coating film is formed on each other.
b) a delivery unit that is provided on the carrier block side for each unit block and delivers the substrate to and from the transport mechanism of each unit block;
and c) said carrier, a transfer mechanism for transferring the substrate between each of the transfer portions of the transfer unit and the unit block for the developing processing unit blocks for the coating,
d) a control unit for controlling the conveyance of the substrate;
e) a post-development inspection module for inspecting the substrate after the development process;
f) a storage unit that stores data of a route along which the substrate is transported before being inspected by the inspection module;
The control unit, when an abnormality is detected in the substrate in the inspection by the post-development inspection module, specifies a unit block for development processing in which the substrate is processed based on data stored in the storage unit, A mode is provided in which a control signal is output to control the operation of the delivery mechanism so that the subsequent substrate is transported to a unit block for development processing other than the specified unit block for development processing. Application and development equipment. A coating film formation inspection module for inspecting the substrate after coating film formation is provided,
The controller controls a module in which the substrate in the coating unit block is processed based on data stored in the storage unit when an abnormality is detected in the substrate by the inspection by the inspection module after the coating film is formed. 2. The coating and developing apparatus according to claim 1, further comprising a mode for controlling an operation of a transport mechanism for a unit block so as to transport a specified substrate subsequent to a module other than the specified module. . A coating film formation inspection module for inspecting the substrate after coating film formation is provided,
When an abnormality is detected in the substrate in the inspection by the inspection module after the coating film is formed, the control unit specifies a unit block for coating on which the substrate has been processed based on data stored in the storage unit. The coating and developing apparatus according to claim 2, further comprising a mode for outputting a control signal so that the subsequent substrate is transported to a coating unit block other than the specified unit block. The unit block for coating is
In order to transport a substrate between these modules, a liquid processing module for a lower layer that supplies a chemical solution for forming an antireflection film to the substrate to form an antireflection film on the lower layer side, a heating module that heats the substrate, and A transport mechanism for a unit block that moves on a straight transport path;
A liquid processing module for an upper layer that forms a film on the upper layer side by supplying a chemical liquid for film formation on the upper layer side to the substrate on which the resist film is formed and laminated on the unit block for the previous stage processing, and the substrate A heating module for heating, and a unit block for post-processing provided with a transport mechanism for a unit block that moves on the linear transport path in order to transport the substrate between these modules,
A coating module for forming a resist film by supplying a resist solution on the antireflection film is provided in at least one of a unit block for a pre-stage process and a unit block for a post-stage process,
The coating according to any one of claims 1 to 4, wherein each of the unit block for the pre-stage process and the unit block for the post-stage process is laminated by using N each. Development device. The said delivery mechanism is controlled so that the board | substrate processed by each unit block for a front | former stage process may be delivered to the said delivery part corresponding to each unit block for a back | latter stage process. Application and development equipment.

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