JP5854221B2 - AD converter circuit - Google Patents

Description

  The present invention relates to an AD conversion circuit that includes a ΔΣ modulator that performs AD (Analog-Digital) conversion of measurement data and filters fixed-cycle noise included in measurement data from AD conversion results.

  The electronic measuring instrument amplifies, calculates and displays the input electric signals of various sizes. Moreover, a measured value is recorded as needed. In this electronic measuring instrument, there are an analog type and a digital type in the processing of electrical signals. At present, however, a digital type that performs digital processing and enables electronic recording as well as display is common. By the way, the ΔΣ AD conversion circuit is an AD conversion circuit having a conversion method developed for performing AD conversion with higher accuracy. As a feature, it is less affected by line noise than sequential conversion and flash conversion type, can be measured with high accuracy, and is often used in recorders.

  By the way, Analog Devices' AD7794 is a low-power, low-noise, full-function front end for high-precision measurement applications, and a 24-bit ΔΣ AD conversion circuit with six differential inputs. A small amplitude signal can be directly interfaced to the AD conversion circuit by a built-in low-noise on-chip instrumentation amplifier (see Non-Patent Document 1, for example).

“AD7794” <Internet URL: www. analog. com / static / imported-files / jp / data_sheets / AD7794_JP. pdf> (accessed December 26, 2011).

  As shown in FIG. 3, the ΔΣ AD conversion circuit 100 includes a ΔΣ modulator 101 and an n-th order moving average filter (n-th order sinc filter) 102. The ΔΣ modulator 101 continuously samples the measurement input at a high sampling rate, and the nth-order sinc filter 102 processes the bit stream and performs decimation to generate a multi-bit conversion result. In addition, the n-th order sinc filter removes periodic noise included in the measurement input, such as commercial power supply frequency noise, from the AD conversion result. Here, n is a positive integer and represents the order of the filter.

  FIG. 4 shows an operation timing chart of the conventional AD conversion circuit 100 when the filter order n is 2. The measurement input is assigned to the vertical axis, and the time axis is assigned to the horizontal axis. The period during which the ΔΣ modulator 101 samples the measurement input and performs A / D conversion is the measurement period (t1). As shown in FIG. 4, in order to remove the fixed period noise included in the measurement input from the AD conversion result, it is necessary to set the measurement period (t1) to the order n of the sinc filter 102 × the period of the noise to be removed. is there. The period in which the ΔΣ converter 101 repeats the A / D conversion operation is the measurement period (T), and this measurement period (T) cannot be shorter than the measurement period (t1).

  As described above, according to the conventional AD converter circuit 100, the measurement period (t1) corresponding to the period of the noise to be removed × the filter order n is required. Therefore, the measurement period (T) is longer than the period of the noise to be removed. It cannot be shortened. In order to obtain a large noise removal effect such as a wide frequency range and a large attenuation amount, it is necessary to increase the filter order n, and thus a long measurement period (t1) is required. As a result, there has been a problem that the measurement cycle (T) becomes longer.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide an AD conversion circuit that obtains a large noise removal effect while shortening the measurement period.

In order to solve the above-described problem, the present invention is an AD conversion circuit that includes a ΔΣ modulator that AD converts measurement data, and filters noise of a fixed period included in the measurement data from the result of the AD conversion, a storage unit that stores a plurality of times before Symbol measurement data of the measurement period in the assigned measurement period to repeat the conversion to the AD, between front Kihaka periodically per the measurement period to be shorter than the period of the noise A measurement period control unit that performs timing control of the ΔΣ modulator and the storage unit, and based on the control of the measurement period control unit, reads measurement data of a plurality of measurement periods per measurement cycle from the storage unit, and an integer the moving average calculation to calculate an average value of the period of the noise waveform to obtain a n-1 order moving average of the measured data, to further the n-1 order moving average of results It said plurality of n by performing a moving average operation on the measurement data measurement period (where, n is a positive integer) and having a n-th moving average calculation means for obtaining the next moving average, a.

In the present invention, when the measurement period control unit adds the plurality of measurement periods allocated within the measurement period, the moving average calculation performed by the n-th moving average calculation unit is a noise waveform for an integer period. The measurement period and the measurement cycle are controlled so as to calculate an average value of the two.

  In the present invention, the measurement period control unit is configured to make the measured noise phase uniform by an integral multiple of one period when the plurality of measurement periods assigned within the measurement period are added together. The measurement period and the measurement cycle are controlled. According to the present invention, the measurement period per measurement period can be made shorter than the period of noise to be removed, and the measurement period can be shortened by shortening the measurement period.

  According to the present invention, it is possible to provide an AD conversion circuit that obtains a large noise removal effect while shortening the measurement period.

It is a block diagram which shows the structure of the AD converter circuit which concerns on embodiment of this invention. It is a timing diagram which shows operation | movement of the AD converter circuit which concerns on embodiment of this invention. It is a block diagram which shows the structure of the conventional AD converter circuit. It is a timing diagram which shows operation | movement of the conventional AD converter circuit.

  Hereinafter, an embodiment for carrying out the present invention (hereinafter simply referred to as the present embodiment) will be described in detail with reference to the accompanying drawings.

(Configuration of the embodiment)
FIG. 1 is a block diagram showing a configuration of an AD conversion circuit according to the present embodiment. As shown in FIG. 1, the AD conversion circuit 1 according to the present embodiment includes a ΔΣ modulator 10 and a filter circuit 20. The ΔΣ modulator 10 continuously samples the measurement input at a high sampling rate, and outputs the AD conversion result to the filter circuit 20. The filter circuit 20 filters fixed-period noise included in the measurement data from the AD conversion result. Therefore, the filter circuit 20 includes a storage unit 21, a measurement time control unit 22, and an n-th order moving average calculation unit (here, a primary moving average calculation unit 23 and a secondary moving average calculation unit 24). Composed.

  The memory | storage part 21 preserve | saves the measurement data of the measurement period for several times allocated within the measurement period which repeats AD conversion. The measurement period control unit 22 performs timing control of the ΔΣ modulator 10 and the storage unit 21 so that a plurality of measurement periods per measurement period is shorter than the noise period. Based on the control of the measurement period control unit 22, the primary moving average calculation unit 23 reads the measurement data of a plurality of measurement periods per measurement cycle from the storage unit 21, and calculates the primary moving average of the measurement data by moving average calculation. Obtained and output to the secondary moving average calculator 24. The secondary moving average calculation unit 24 performs a moving average calculation of the measurement data of a plurality of measurement periods on the result of the primary moving average to obtain a secondary moving average, and a controller or the like (not shown) Output to.

  The measurement period control unit 22 adds the measurement period and measurement so that the phase of the measured noise is uniform by an integral multiple of one period when a plurality of measurement periods assigned within the measurement period are added. Control the period.

(Operation of the embodiment)
FIG. 2 is an operation timing chart showing the operation of the AD conversion circuit 1 according to the present embodiment. Hereinafter, the operation of the AD conversion circuit 1 shown in FIG. 1 will be described in detail with reference to the operation timing chart of FIG.

  Here, it is assumed that the usable time in the measurement period is less than the noise period to be removed due to restrictions such as the measurement period. The measurement period controller 22 adds the measurement period (t1) and the measurement period (t1) so that the phase of the measured noise is an integral multiple of one period when the measurement periods (t1) over a plurality of times (Np) of the assumed period are added Select the measurement period (T). In the example shown in the operation timing diagram of FIG. 2, the measurement period (t1) of Np = 4 is one period of the noise period to be removed.

  First, the ΔΣ modulator 10 obtains a measurement input from the outside (for example, a sensor), and outputs the result of AD conversion to the filter circuit 20. The filter circuit 20 stores discontinuous measurement data in the storage unit 21 under the control of the measurement period control unit 22. Here, the measurement data for the measurement cycle × Np times are stored. The measurement cycle control unit 22 controls the read / write timing of the ΔΣ modulator 10 and the storage unit 21 so as to realize the above-described desired measurement period (t1) and measurement cycle (T).

  Based on the control of the measurement period control unit 22, the primary moving average calculation unit 23 reads measurement data of a plurality of (Np) measurement periods (t 1) per measurement period (T) from the storage unit 21, and measures the measurement period. The moving average calculation of minutes (Np times) is performed to obtain the primary moving average and output it to the secondary moving average calculation unit 24. The secondary moving average calculation unit 24 further performs a moving average calculation for the measurement period (Np times) on the result of the primary moving average output from the primary moving average calculation unit 23, and outputs the result to the outside (controller). Output to.

  The filter circuit 20 shown in FIG. 2 is described as a configuration that outputs the result of the second-order moving average to the outside as a measurement result. However, the moving average is further overlapped to make an n-th order (where n is a positive integer) movement. You can also get an average. By such a moving average calculation, a noise removal effect similar to that of a high-order sinc filter can be obtained.

(Effect of embodiment)
As described above, according to the present invention, the measurement period control unit 22 stores, in the storage unit 21, measurement data for a plurality of measurement periods allocated within a measurement period in which AD conversion is repeated, and a plurality of measurement data per measurement period are stored. The timing control of the ΔΣ modulator 10 and the storage unit 21 is performed so that the measurement period for each batch is shorter than the period of noise. Then, the n-order moving average calculation unit (the primary moving average calculation unit 23 and the secondary moving average calculation unit 24) performs a moving average process for removing period noise by combining the results of AD conversion over a plurality of measurement periods. Do. For this reason, the measurement period per measurement period can be made shorter than the period of noise to be removed, and the measurement period (T) can be shortened by shortening the measurement period (t1). Therefore, the measurement period (T) can be shortened while obtaining a large noise removal effect such as a wide frequency range and a large attenuation.

  In the above-described AD conversion circuit 1 according to the present embodiment, the n-order moving average calculation unit (the primary moving average calculation unit 23 and the secondary moving average calculation unit 24) has been described as being realized by dedicated hardware. Alternatively, it may be realized by software using a microcomputer or the like.

  As mentioned above, although preferred embodiment of this invention was explained in full detail, it cannot be overemphasized that the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiments. Further, it is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  1 ·· AD conversion circuit, 10 ·· ΔΣ modulator, 20 ·· Filter circuit, 21 ·· Storage unit, 22 ·· Measurement period control unit, 23 ·· Primary moving average operation unit, 24 ·· Secondary move Average calculator

Claims (2)

An AD conversion circuit including a ΔΣ modulator for AD conversion of measurement data, and filtering noise of a fixed period included in the measurement data from the result of the AD conversion;
A storage unit that stores a plurality of times before Symbol measurement data of the measurement period allocated to the measurement cycle repeating AD conversion,
A measurement period control unit that performs the timing control of the ΔΣ modulator and the storage unit so that between the leading Kihaka periodically per the measurement period becomes shorter than the period of said noise,
Based on the control of the measurement period control unit, the measurement data is read from the storage unit for a plurality of measurement periods per measurement period, and the measurement is performed by moving average calculation so as to calculate the average value of the noise waveform for an integer period. N-1 order moving average of the data is obtained, and the moving average calculation of the measurement data of the plurality of measurement periods is performed on the result of the n-1 order moving average, and n (where n is a positive integer) ) N-th order moving average calculating means for obtaining a next moving average;
An AD conversion circuit comprising: The measurement period control unit
The measurement is performed such that when the plurality of measurement periods allocated within the measurement period are added, the moving average calculation performed by the n-th moving average calculation unit calculates an average value of the noise waveform for an integer period. The AD conversion circuit according to claim 1, wherein a period and the measurement cycle are controlled.

Images