JP2018146320A - Decimation filter, measuring device, and physical quantity sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a decimation filter, a measuring device and a physical quantity sensor with which it is possible to reduce a circuit scale and cut down power consumption.SOLUTION: Provided is a decimation filter for down-sampling an inputted signal that indicates a measured value and outputting the sampled signal, characterized by comprising: a time calculation unit for finding a time up to sampling timing on the basis of measurement timing; an impulse response calculation unit for finding an impulse response at the sampling timing on the basis of the time up to the sampling timing; a multiplication unit for finding a product of the measured value and the value of the impulse response; and an integration unit for integrating the products and finding an integrated value.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a decimation filter, a measuring device, and a physical quantity sensor.

There is known a frequency counter that generates a delta-sigma modulation signal that is a signal corresponding to a ratio between a frequency of a reference signal (reference clock) and a frequency of a signal under measurement.
This frequency counter has a frequency delta sigma modulator (hereinafter referred to as “FDSM (Frequency Delta Sigma Modulator)”), and by using the FDSM, one of the reference signal and the signal under measurement is used and the other is frequency delta sigma. Modulate and generate and output a delta-sigma modulated signal.
A low-pass filter is provided on the output side of the FDSM. With such a configuration, the noise shape function, which is one of the features of FDSM, is exhibited (noise shape effect), so that the noise can be shifted to the high frequency side, and the noise component can be reduced by the low-pass filter. And accuracy can be improved.

  Patent Document 1 discloses a frequency measurement device that includes a counter unit and a low-pass filter unit that is provided on the output side of the counter unit and has a plurality of stages of moving average filters. In the low-pass filter unit, the output of at least one moving average filter is down-sampled. Thereby, compared with the case where downsampling is not performed, the configuration of the low-pass filter unit can be simplified, the frequency of the circuit operation can be reduced, and the power consumption can be reduced.

JP 2011-80836 A

  In the apparatus described in Patent Document 1, since most of the circuit is driven by a frequency that is higher than the finally required sampling frequency, the configuration of the low-pass filter unit is further simplified, and the power consumption It is difficult to further reduce.

  An object of the present invention is to provide a decimation filter, a measuring device, and a physical quantity sensor that can reduce a circuit scale and reduce power consumption.

SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.
The decimation filter of the present invention is a decimation filter that downsamples and outputs a signal indicating an input measurement value,
A time calculation unit for obtaining the time to the sampling timing based on the measurement timing;
An impulse response calculation unit for obtaining an impulse response at the sampling timing based on the time to the sampling timing;
A multiplier for obtaining a product of the measured value and the impulse response value;
An integrating unit that integrates the products to obtain an integrated value.
According to the present invention, it is possible to remove or reduce a noise component included in a signal indicating a measurement value, and to improve measurement accuracy.
In addition, since it is only necessary to perform convolution integration at a sampling frequency that is finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and power consumption can be reduced.

In the decimation filter of the present invention, the measurement timing interval is preferably constant.
Thereby, the measurement accuracy can be further improved.

In the decimation filter of the present invention, it is preferable that the measurement timing is input as a time stamp.
Thereby, the information of absolute time can be obtained accurately.

In the decimation filter of the present invention, the integration unit outputs the integrated value when the time stamp coincides with the sampling timing or after the time stamp exceeds the sampling timing, and resets the integrated value. It is preferable.
Thus, integration can be performed up to the previous measurement timing when the measurement timing exceeds the sampling timing.

In the decimation filter according to the aspect of the invention, it is preferable that the integration unit performs the integration up to the measurement timing immediately before the measurement timing exceeds the sampling timing.
As a result, the integration can be performed without leakage or duplication, and the measurement accuracy can be improved.

In the decimation filter of the present invention, it is preferable that the impulse response is finite and is expressed by a function.
Thereby, a desired impulse response can be expressed easily and accurately, and the value of the impulse response can be obtained.

In the decimation filter of the present invention, the function is preferably a linear function of time or a quadratic function of time.
Thereby, a desired impulse response can be expressed easily and accurately, and the value of the impulse response can be obtained.

In the decimation filter of the present invention, the measurement value is a count value of a pulse signal that is a signal under measurement.
The gate time used for obtaining the count value is preferably defined by a reference signal.
Thereby, it is possible to employ a direct counting method.

In the decimation filter of the present invention, the measurement value is a count value of a pulse signal that is a reference signal,
The gate time used to obtain the count value is preferably defined by the signal under measurement.
Thereby, it is possible to employ a reciprocal counting method.

In the decimation filter of the present invention, it is preferable that the time calculation unit uses a count value obtained by counting the reference signal or the signal under measurement as a time stamp.
Thereby, it is not necessary to prepare a circuit for generating a time stamp separately, and the circuit configuration can be simplified.

The measuring device of the present invention includes the decimation filter of the present invention,
Measurement is performed using the decimation filter.
According to the present invention, it is possible to remove or reduce a noise component included in a signal indicating a measurement value, and to improve measurement accuracy.
In addition, since it is only necessary to perform convolution integration at a sampling frequency that is finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and power consumption can be reduced.

The measuring device of the present invention includes the decimation filter of the present invention,
The frequency ratio between the signal under measurement and the reference signal is measured using the decimation filter.
According to the present invention, it is possible to remove or reduce a noise component included in a signal indicating a measurement value, and to improve measurement accuracy.
In addition, since it is only necessary to perform convolution integration at a sampling frequency that is finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and power consumption can be reduced.

The physical quantity sensor of the present invention includes a detection unit that detects a physical quantity,
And a measuring apparatus of the present invention to which a signal under measurement output from the detection unit is input.
According to the present invention, it is possible to remove or reduce a noise component included in a signal indicating a measurement value, and to improve measurement accuracy.
In addition, since it is only necessary to perform convolution integration at a sampling frequency that is finally required, the amount of calculation can be reduced, whereby the circuit scale can be reduced and power consumption can be reduced.

It is a block diagram which shows embodiment of the frequency ratio measuring apparatus which is an example of the measuring apparatus of this invention. It is a block diagram which shows the decimation filter of the frequency ratio measuring apparatus shown in FIG. It is a block diagram which shows the structural example of the frequency delta-sigma modulation part of the frequency ratio measuring apparatus shown in FIG. It is a block diagram which shows the structural example of the frequency delta-sigma modulation part of the frequency ratio measuring apparatus shown in FIG. It is a graph which shows an impulse response. It is a timing chart for demonstrating operation | movement of the decimation filter of the frequency ratio measuring apparatus shown in FIG. It is a flowchart which shows the flow of operation | movement of the decimation filter of the frequency ratio measuring apparatus shown in FIG. It is a figure which shows the internal structure of the detection part in embodiment of the acceleration sensor which is an example of the physical quantity sensor of this invention. It is sectional drawing in the AA line in FIG.

  Hereinafter, a decimation filter, a measuring device, and a physical quantity sensor of the present invention will be described in detail based on embodiments shown in the accompanying drawings.

<First Embodiment>
FIG. 1 is a block diagram showing an embodiment of a frequency ratio measuring apparatus which is an example of the measuring apparatus of the present invention. FIG. 2 is a block diagram showing a decimation filter of the frequency ratio measuring apparatus shown in FIG. FIG. 3 is a block diagram illustrating a configuration example of a frequency delta-sigma modulation unit of the frequency ratio measuring apparatus illustrated in FIG. FIG. 4 is a block diagram illustrating a configuration example of a frequency delta-sigma modulation unit of the frequency ratio measuring apparatus illustrated in FIG. FIG. 5 is a graph showing an impulse response. FIG. 6 is a timing chart for explaining the operation of the decimation filter of the frequency ratio measuring apparatus shown in FIG. FIG. 7 is a flowchart showing an operation flow of the decimation filter of the frequency ratio measuring apparatus shown in FIG.
In the following description, the case where the signal level is “Low” is also referred to as “0”, and the case where the signal level is “High” is also referred to as “1”.

The frequency ratio measuring apparatus 1 shown in FIG. 1 as an example of the measuring apparatus according to the present invention includes a decimation filter 4 and performs measurement using the decimation filter 4, that is, a frequency ratio between a signal under measurement and the reference signal. Measure.
According to the frequency ratio measuring apparatus 1, it is possible to remove or reduce a noise component included in a signal indicating a measurement value, and to improve measurement accuracy. In addition, the decimation filter 4 only needs to perform convolution integration at the finally required sampling frequency, so that the amount of computation can be reduced, thereby reducing the circuit scale and reducing power consumption. can do. This will be specifically described below.

A frequency ratio measuring apparatus 1 (measuring apparatus) shown in FIG. 1 has a value corresponding to a ratio (frequency ratio) between a frequency of a reference signal (reference clock) whose frequency is known and a frequency of a signal under measurement (or the value) This is a device (circuit) that generates a count value (a signal indicating a count value) that is a value used for generation. That is, the measured value (output) of the frequency ratio measuring apparatus 1 is the count value.
Further, the frequency ratio measuring apparatus 1 can employ either a direct count method or a reciprocal count method.

  That is, when the direct count method is employed, the measurement value is the count value of the pulse signal that is the signal under measurement, and the gate time used to obtain the count value is defined by the reference signal. In this way, it is possible to employ a direct counting method.

  When the reciprocal counting method is employed, the measurement value is the count value of the pulse signal that is the reference signal, and the gate time used to obtain the count value is defined by the signal under measurement. In this way, it is possible to adopt a reciprocal counting method. Hereinafter, a direct count method will be described as an example. In the reciprocal counting method, the reference signal and the signal under measurement may be reversed in the direct counting method.

As shown in FIG. 1, the frequency ratio measuring apparatus 1 includes a frequency delta sigma modulation unit 2 (hereinafter referred to as “FDSM (Frequency Delta Sigma Modulator)”), an up counter 3 (counter), and a decimation filter 4. I have. The FDSM2 is an example of a frequency ratio measuring unit that measures the frequency ratio between the reference signal and the signal under measurement, and the frequency ratio measuring unit may have another configuration.
In the frequency ratio measuring apparatus 1, a decimation filter 4 is connected to the output side (rear stage) of the FDSM 2 and the up counter 3.
The signal under measurement is input to the FDSM 2, and a reference signal (reference clock) having a known frequency is input to the FDSM 2 and the up counter 3.

Further, the FDSM 2 has a function of performing frequency delta sigma modulation on the signal under measurement based on the reference signal (using the reference signal) and generating a frequency delta sigma modulated signal (direct count method). The reference signal may be subjected to frequency delta sigma modulation (reciprocal count method) based on the signal under measurement (using the signal under measurement).
As the FDSM2, for example, an FDSM that outputs an output signal in a bit stream format (hereinafter also referred to as “bit stream type FDSM (bit stream type FDSM)”), an FDSM that outputs an output signal in a data stream format (hereinafter, “ FDSM having a data stream configuration (also referred to as “data stream type FDSM”) can be used.
When an FDSM having a bit stream configuration is used, other signal processing circuits can be simplified. Further, when the FDSM having the data stream configuration is used, it is possible to cope with a case where the frequency fluctuation is large.

Next, FDSM2 having a data stream configuration and FDSM2 having a bitstream configuration will be described. First, FDSM2 having a data stream configuration will be described.
As shown in FIG. 3, the FDSM 2 having a data stream configuration includes an up counter 21 that counts rising edges of a signal under measurement and outputs count data Dc indicating a count value, and count data in synchronization with the rising edges of the reference signal. A first latch 22 that latches Dc and outputs the first data D1, a second latch 23 that latches the first data D1 and outputs the second data D2 in synchronization with the rising edge of the reference signal; And a subtractor 24 that subtracts the second data D2 from the data D1 to generate output data OUT. The first latch 22 and the second latch 23 are composed of, for example, a D flip-flop circuit.

The FDSM2 in this example is also called a first-order frequency delta-sigma modulator, and latches the count value of the signal under measurement twice with the reference signal, and the count value of the signal under measurement is triggered by the rising edge of the reference signal. Hold sequentially. In this example, it is assumed that the latch operation is performed at the rising edge, but the latch operation may be performed at both the falling edge and the rising and falling edge. The subtractor 24 calculates the difference between the two held count values, and outputs the increment of the count value of the signal under measurement observed while the reference signal transitions for one cycle without any dead time. When the frequency of the signal under measurement is fx and the frequency of the reference signal is fc, the frequency ratio is fx / fc. The FDSM2 outputs a frequency delta-sigma modulation signal (signal indicating the measured value Si shown in FIG. 1) indicating a frequency ratio as a digital signal sequence.
This digital signal sequence is called a data sequence / data stream. A digital signal sequence represented by 1 bit, which will be described later, is called a bit sequence / bit stream.

Next, FDSM2 having a bit stream configuration will be described.
As shown in FIG. 4, the FDSM 2 having the bit stream structure is synchronized with the rising edge of the reference signal and the first latch 22 that latches the signal under measurement and outputs the first data d1 in synchronization with the rising edge of the reference signal. The second latch 23 that latches the first data d1 and outputs the second data d2, and the exclusive logic that calculates the exclusive OR of the first data d1 and the second data d2 to generate the output data OUT. And a sum circuit 25. The first latch 22 and the second latch 23 are composed of, for example, a D flip-flop circuit.

  This FDSM2 is different from the FDSM2 having the data stream structure in the FDSM2 having the data stream structure. The signal under measurement is observed while the count signal Dc is held by the first latch 22 and the reference signal changes for one cycle. In this FDSM2, the high or low state of the signal under measurement is held by the first latch 22 so that the reference signal is the same as the increment of the count data Dc obtained by counting the rising edges of the output signal OUT. The point is that the even / odd number of inversions during one cycle transition is output as the output data OUT (0 if the number of inversions is even, and 1 if it is odd).

  By the way, since one cycle of the signal under measurement is composed of two inversion transitions of High and Low, the degree of change that the variation of the signal under measurement with respect to the reference signal exerts on the output data OUT depends on the FDSM2 of the data stream configuration. In comparison with the case where the count value is held in FIG. Therefore, the behavior of the idle tone in the FDSM2 having the bit stream configuration is the same as the behavior when the signal under measurement having the double frequency is input to the FDSM2 in the FDSM2 having the data stream configuration. The operation of the FDSM2 having the bit stream configuration may be considered by replacing the frequency fx of the signal under measurement with the frequency 2fx as necessary in consideration of the above-described properties.

Next, the decimation filter 4 will be described.
The decimation filter 4 shown in FIG. 2 is a circuit (apparatus) that downsamples and outputs a signal indicating an input measurement value.
As shown in FIG. 2, the decimation filter 4 includes a time calculation unit 41 for obtaining a time (ri) until the sampling timing based on the measurement timing (time stamp ti), and a time (ri) until the sampling timing. An impulse response calculating unit 42 for obtaining an impulse response (impulse response value) at the sampling timing, a multiplying unit 43 for obtaining a product of the measured value (Si) and the impulse response value F (ri), and a measured value (Si). An integration unit 44 that integrates the product of the impulse response value F (ri) to obtain an integrated value is provided. In the decimation filter 4, an impulse response calculation unit 42 is connected to the output side of the time calculation unit 41, a multiplication unit 43 is connected to the output side of the impulse response calculation unit 42, and an integration unit 44 is connected to the output side of the multiplication unit 43. Has been. Note that the multiplication unit 43 and the integration unit 44 may be integrated.

The decimation filter 4 having such a configuration can remove or reduce noise components included in the signal output from the FDSM 2. More specifically, first, the noise can be shifted to the high frequency side by exhibiting the noise shape function (noise shape effect) which is one of the features of FDSM2. The decimation filter 4 can remove or reduce noise components and improve measurement accuracy.
In addition, by providing the decimation filter 4 as a filter, it is only necessary to perform convolution integration at the finally required sampling frequency, so that the amount of computation can be reduced, thereby reducing the circuit scale. , Power consumption can be reduced.

  The time calculation unit 41 has a function of calculating (determining) the time until the sampling timing based on the measurement timing. In the present embodiment, the time calculation unit 41 subtracts the time stamp ti of the current measurement timing from the time stamp at the sampling timing, and calculates the time ri from the current measurement timing to the sampling timing. FIG. 6 shows r11, r12, r21, r22, r23, r31, r32 as an example of the time ri.

In addition, the measurement timing is a timing at which measurement is performed, and in the present embodiment, as illustrated in FIG. 4, it is a rising edge of a pulse signal indicating the measurement timing. This measurement timing is input as a time stamp ti (absolute time). FIG. 6 shows t1, t2, and t3 as an example of the time stamp ti at the measurement timing.
The sampling timing is a timing for performing sampling, and is shown in FIG. 6 in the present embodiment. FIG. 6 shows P1, P2, and P3 as an example of the sampling timing.

  The time calculation unit 41 uses a count value obtained by counting the reference signal or the signal under measurement as the time stamp ti. In the present embodiment, the time calculation unit 41 uses the count value obtained by counting the reference signal as the time stamp ti. Thereby, it is not necessary to prepare a circuit for generating a time stamp separately, and the circuit configuration can be simplified.

  The impulse response calculation unit 42 has a function of calculating (determining) an impulse response at the sampling timing based on the time ri from the current measurement timing to the sampling timing. Further, the impulse response calculation unit 42 can be configured by, for example, an FIR (Finite Impulse Response) filter.

The impulse response is finite and is expressed by a function. This function is not particularly limited, but is preferably a linear function of time or a quadratic function of time. As shown in FIG. 5, in this embodiment, the impulse response is finite and is expressed by a quadratic function of time. The starting point of this impulse response is “0”, and the ending point is “d3”. D1 and d2 are inflection points of a quadratic function representing the impulse response, respectively. In this way, a desired impulse response can be expressed easily and accurately, and the value of the impulse response can be obtained.
In addition, since the waveform of the impulse response is the same as the waveform of the output of the low-pass filter in the present embodiment, the noise component included in the signal output from the FDSM 2 is removed or reduced by the decimation filter 4 as described above. can do.

  Specifically, the impulse response is expressed by the following equations (1), (2), and (3), and the impulse response is expressed by using the equations (1), (2), and (3). Find the value. In the case of 0 ≦ ri <d1, the equation (1) is used, in the case of d1 ≦ ri ≦ d2, the equation (2) is used, and in the case of d2 <ri ≦ d3, the equation (3) is used. The start point of the impulse response is “0” and the end point is “d3”. D1 and d2 are inflection points of a quadratic function representing the impulse response, respectively.

R (ri) = a1 · ri ² + b1 · ri + c1 (0 ≦ ri <d1) (1)
R (ri) = a2 · ri ² + b2 · ri + c2 (d1 ≦ ri ≦ d2) (2)
R (ri) = a3 · ri ² + b3 · ri + c3 (d2 <ri ≦ d3) (3)
Note that a1, a2, a3, b1, b2, b3, c1, c2, and c3 are coefficients.
In addition, the arithmetic expressions (functions) for obtaining the impulse response value, that is, the expressions (1), (2), and (3) are obtained in advance and stored in a storage unit (not shown) included in the impulse response calculation unit 42. Remember.

  Here, as an example, when the impulse response waveform is designed using a quadratic function so that the cutoff frequency of the decimation filter 4 is 200 Hz, the period of the impulse response is 2.7 milliseconds. Therefore, when the output of the decimation filter 4, that is, the interval T between two adjacent sampling timings (see FIG. 6) is 1 msec, only two or three impulse responses are used for measurement. As a result, the amount of calculation can be reduced, whereby the circuit scale can be reduced and the power consumption can be reduced.

The multiplication unit 43 has a function of calculating (determining) the product of the output value of the FDSM2, that is, the measurement value Si and the impulse response value.
The integrating unit 44 has a function of integrating the product of the measured value and the value of the impulse response, that is, a function of calculating (determining) an integrated value of the product of the measured value and the value of the impulse response. Further, the integration unit 44 has a storage unit (not shown) that stores various types of information such as integration values.

Next, the operation of the frequency ratio measuring apparatus 1 will be described.
As shown in FIG. 1, the FDSM 2 outputs a signal (hereinafter referred to as “measurement value Si”) indicating a measurement value corresponding to the frequency ratio between the reference signal and the signal under measurement. The measurement value Si is input to the multiplication unit 43 of the decimation filter 4.

  The up counter 3 counts rising edges of the reference signal and outputs the count value as measurement timing, that is, a time stamp ti. The time stamp ti is input to the time calculation unit 41 of the decimation filter 4. For example, the rising edge of the signal under measurement may be counted and the count value may be output as the time stamp ti.

  Thus, the measurement timing is input to the time calculation unit 41 as a time stamp (ti). Thereby, the information of absolute time can be obtained accurately.

  Further, the interval of the measurement timing (time stamp ti) is constant. Thereby, the measurement accuracy can be further improved.

  Next, the operation of the decimation filter 4 of the frequency ratio measuring apparatus 1 will be described. Here, in order to facilitate understanding, the time stamps t1, t2, and t3 are given as examples as the time stamp ti, and the times r11, r12, r21, r22, and r31 are given as examples as the time ri, and the sampling timing is given. The sampling timings P1 and P2 will be described as an example.

  As shown in FIGS. 2 and 6, in the decimation filter 4, the time calculation unit 41 performs the time stamp of the current measurement timing from the time stamp at the sampling timing P <b> 1 at the first measurement timing (time stamp t <b> 1) in FIG. 6. The time r11 from the current measurement timing to the sampling timing P1 is calculated by subtracting t1. Similarly, the time calculation unit 41 calculates a time r12 from the current measurement timing to the sampling timing P2. The times r11 and r12 are output from the time calculator 41 and input to the impulse response calculator 42.

  Further, the time calculation unit 41 subtracts the time stamp t2 of the current measurement timing from the time stamp at the sampling timing P1 at the second measurement timing (time stamp t2) in FIG. A time r21 until P1 is calculated. Similarly, the time calculation unit 41 calculates a time r22 from the current measurement timing to the sampling timing P2. Similarly, the time calculation unit 41 calculates a time r23 from the current measurement timing to the sampling timing P3. The times r21, r22, r23 are output from the time calculator 41 and input to the impulse response calculator 42.

  Next, the impulse response calculation unit 42 uses the corresponding expression among the expressions (1), (2), and (3) to calculate impulse response values F (r11), F (r12), and F ( r21), F (r22), and F (r22) are calculated. The impulse response values F (r11), F (r12), F (r21), F (r22), and F (r23) are output from the impulse response calculator 42 and input to the multiplier 43.

  Next, the multiplication unit 43 calculates the product of the measured value Si and the impulse response value F (ri), that is, Si · F (ri). As the measured value Si, for the impulse response values F (r11) and F (r12), the measured value at the first measurement timing (time stamp t1) in FIG. 6 is used, and the impulse response value F (r21), For F (r22) and F (r23), the measurement value at the second measurement timing (time stamp t2) in FIG. 6 is used. Each Si · F (ri) is output from the multiplication unit 43 and input to the integration unit 44.

  Next, the integrating unit 44 integrates Si · F (r11) and Si · F (r21) to obtain an integrated value Σ1. The integrated value Σ1 is output from the integrating unit 44 at a predetermined timing when the time stamp (ti) coincides with the sampling timing P1 or after the time stamp (ti) exceeds the sampling timing P1. Then, the integrated value Σ1 is reset when the time stamp (ti) coincides with the sampling timing P1 or thereafter. The integration is performed up to the previous measurement timing when the measurement timing exceeds the sampling timing P1.

  Similarly, the integrating unit 44 integrates Si · F (r12), Si · F (r22), and Si · F (r31) to obtain an integrated value Σ2. The integrated value Σ2 is output from the integrating unit 44 at a predetermined timing when the time stamp (ti) coincides with the sampling timing P2 or after the time stamp (ti) exceeds the sampling timing P2. Then, the integrated value Σ2 is reset when the time stamp (ti) coincides with the sampling timing P2, or after that. The integration is performed up to the previous measurement timing when the measurement timing exceeds the sampling timing P2.

  As described above, the integrating unit 44 outputs the integrated value when the time stamp (ti) coincides with the sampling timing or after the time stamp (ti) exceeds the sampling timing, and resets the integrated value. For example, when the sampling timing is P1, the integrating unit 44, when the current time indicated by the time stamp (ti) coincides with the sampling timing P1 or after exceeding the sampling timing P1 (for example, time stamp t3), The integrated value Σ1 is output. Thus, integration can be performed up to the previous measurement timing when the measurement timing exceeds the sampling timing.

  Further, the integration unit 44 performs integration until the measurement timing (for example, time stamp t2) immediately before the measurement timing (time stamp ti) exceeds the sampling timing (for example, P1). As a result, the integration can be performed without leakage or duplication, and the measurement accuracy can be improved.

Next, the operation of the decimation filter 4 will be described from another angle based on the flowchart shown in FIG.
As shown in FIG. 7, first, the integrating unit 44 stores an initial value as an integrated value (step S101).
Next, the measurement value Si and the time stamp ti at the current measurement timing are acquired (step S102).

Next, the time calculation unit 41 calculates a time ri from the current measurement timing to the corresponding sampling timing (step S103).
Next, the impulse response calculation unit 42 calculates an impulse response value F (ri) using a corresponding equation from the equations (1), (2), and (3) (step S104).
Next, it is determined whether or not the time stamp ti of the current measurement timing exceeds the sampling timing (step S105). If it is determined that the time stamp ti does not exceed the sampling timing, the multiplier 43 determines the measurement value Si and the impulse response value F. The product of (ri), that is, Si · F (ri) is calculated, and the integrating unit 44 integrates Si · F (ri) to obtain an integrated value (step S107).

On the other hand, if it is determined in step S105 that the time stamp ti of the current measurement timing exceeds the sampling timing, the integrating unit 44 outputs the integrated value and resets the integrated value (step S106). Next, the multiplying unit 43 calculates the product of the measured value Si and the impulse response value F (ri), that is, Si · F (ri), and the accumulating unit 44 accumulates Si · F (ri), An integrated value is obtained (step S107).
Next, it is determined whether or not the measurement has ended (step S108). If it is determined that the measurement has not ended, the process returns to step S102, and step S102 and subsequent steps are executed again. On the other hand, if it is determined in step S108 that the measurement has been completed, the operation is stopped.

  Such a frequency ratio measuring apparatus 1 can be configured by hardware that realizes functions corresponding to the above-described units. Further, the frequency ratio measuring apparatus 1 can be configured as software by a program, a module, or the like that realizes functions corresponding to the above-described units. Moreover, the frequency ratio measuring apparatus 1 can also be configured by combining hardware and software that realize functions corresponding to the above-described units.

  As described above, according to the frequency ratio measuring apparatus 1, the noise component included in the signal output from the FDSM 2 can be removed or reduced by the decimation filter 4, and the measurement accuracy can be improved. In this case, it is possible to obtain the same measurement accuracy as in the case of a multistage moving average filter, and it is possible to realize a desired filter characteristic by designing an impulse response waveform.

  In addition, by providing the decimation filter 4 as a filter, it is only necessary to perform convolution integration at the finally required sampling frequency, so that the amount of computation can be reduced, thereby reducing the circuit scale. , Power consumption can be reduced.

  In the present embodiment, one FDSM2 is provided as the frequency ratio measurement unit. However, the present invention is not limited to this. For example, a plurality of FDSM2s may be provided. In this case, for example, the FDSMs 2 are connected in parallel, and the signals under measurement having the same phase or different phases are input to the FDSMs 2. Alternatively, the reference signal may be configured such that reference signals having the same phase or different phases are input to each FDSM2. Alternatively, the signal under measurement may be configured such that signals to be measured having the same phase or different phases are input to the respective FDSMs 2, and the reference signals having the same phase or different phases from each other are input to the FDSMs 2. Thereby, the idle tone superimposed on the output signal of each FDSM2 can be temporally dispersed. That is, the influence of quantization noise such as an idle tone can be suppressed, and measurement accuracy can be improved.

<Embodiment of physical quantity sensor>
FIG. 8 is a diagram illustrating an internal structure of a detection unit in an embodiment of an acceleration sensor which is an example of the physical quantity sensor of the present invention. 9 is a cross-sectional view taken along line AA in FIG.
Hereinafter, an embodiment of an acceleration sensor, which is an example of a physical quantity sensor, will be described with a focus on differences from the above-described embodiment, and description of similar matters will be omitted.

  As shown in FIG. 8 and FIG. 9, the acceleration sensor 100 (physical quantity sensor) of the present embodiment detects the acceleration that is an example of the physical quantity (physical quantity related to vibration), and is output from the detection section 200. And a frequency ratio measuring device 1 (measuring device) to which a signal under measurement is inputted. The detection unit 200 and the frequency ratio measuring apparatus 1 are electrically connected. That is, the output of the detection unit 200 is input to the frequency ratio measuring apparatus 1 as a signal under measurement of the frequency ratio measuring apparatus 1. The frequency ratio measuring apparatus 1 may be built in the detection unit 200 or may be externally attached. Since the frequency ratio measuring apparatus 1 has already been described with reference to FIGS. 1 and 2, etc., the description thereof will be omitted.

  The detection unit 200 includes a flat base portion 210, a substantially rectangular flat plate-shaped movable portion 212 connected to the base portion 210 via a joint portion 211, and a physical quantity spanned between the base portion 210 and the movable portion 212. An acceleration detection element 213 that is an example of the detection element, and a package 220 that houses at least each of the above-described components are provided.

The detection unit 200 is driven by a drive signal applied to the excitation electrode of the acceleration detection element 213 via the external terminals 227 and 228, the internal terminals 224 and 225, the external connection terminals 214e and 214f, the connection terminals 210b and 210c, and the like. The vibrating beams 213a and 213b of the acceleration detecting element 213 oscillate (resonate) at a predetermined frequency. And the detection part 200 outputs the resonance frequency of the acceleration detection element 213 which changes according to the applied acceleration as a to-be-measured signal (detection signal).
This signal under measurement is input to the frequency ratio measuring apparatus 1, and the frequency ratio measuring apparatus 1 operates as described in the above embodiment.

  Moreover, although the number of the detection parts 200 is one in this embodiment, it is not restricted to this, For example, two or three may be sufficient. By providing three detection units 200 and making the detection axes of each detection unit 200 orthogonal (cross) each other, it is possible to detect the acceleration in the axial direction of each of the three detection axes orthogonal to each other.

  Even with the acceleration sensor 100 as described above, the frequency ratio measuring apparatus 1 included in the acceleration sensor 100 can exhibit the same effects as those of the above-described embodiment. Thereby, the acceleration sensor 100 can detect the acceleration with high accuracy.

  As described above, the decimation filter, the measurement device, and the physical quantity sensor of the present invention have been described based on the illustrated embodiment. However, the present invention is not limited to this, and the configuration of each unit is an arbitrary one having the same function. It can be replaced with that of the configuration. Moreover, other arbitrary components may be added.

  In the above-described embodiment, the frequency ratio measuring device is described as an example of the measuring device. However, in the present invention, the measuring device is not limited to this, and is applicable to any measuring device in which a decimation filter can be provided. Is possible. Specific examples include an AD converter and the like.

  In the above embodiment, the acceleration sensor is described as an example of the physical quantity sensor. However, in the present invention, if the physical quantity sensor can detect a change in physical quantity as a frequency change, In addition, for example, a mass sensor, an ultrasonic sensor, an angular acceleration sensor, a capacitance sensor, and the like can be given.

  The physical quantity sensor of the present invention includes, for example, various electronic devices such as an inclinometer, a seismometer, a navigation device, an attitude control device, a game controller, a mobile phone, a smartphone, a digital still camera, and various moving bodies such as an automobile. It is possible to apply to. That is, according to the present invention, it is possible to provide an electronic device including the physical quantity sensor of the present invention, a moving object including the physical quantity sensor of the present invention, and the like.

  DESCRIPTION OF SYMBOLS 1 ... Frequency ratio measuring apparatus, 2 ... FDSM (frequency delta-sigma modulation part), 3 ... Up counter, 4 ... Decimation filter, 21 ... Up counter, 22 ... 1st latch, 23 ... 2nd latch, 24 ... Subtractor, DESCRIPTION OF SYMBOLS 25 ... Exclusive OR circuit, 41 ... Time calculation part, 42 ... Impulse response calculation part, 43 ... Multiplication part, 44 ... Integration part, 100 ... Acceleration sensor, 200 ... Detection part, 210 ... Base part, 210b ... Connection terminal , 210c ... connection terminal, 211 ... joint part, 212 ... movable part, 213 ... acceleration detection element, 213a ... vibration beam, 213b ... vibration beam, 214e ... external connection terminal, 214f ... external connection terminal, 220 ... package, 224 ... Internal terminal, 225 ... Internal terminal, 227 ... External terminal, 228 ... External terminal, S101-S108 ... Step

Claims (13)

A decimation filter that downsamples and outputs a signal indicating an input measurement value,
A time calculation unit for obtaining the time to the sampling timing based on the measurement timing;
An impulse response calculation unit for obtaining an impulse response at the sampling timing based on the time to the sampling timing;
A multiplier for obtaining a product of the measured value and the impulse response value;
A decimation filter comprising: an integration unit that integrates the products to obtain an integrated value.   The decimation filter according to claim 1, wherein an interval of the measurement timing is constant.   The decimation filter according to claim 1, wherein the measurement timing is input as a time stamp.   The decimation according to claim 3, wherein the integration unit outputs the integrated value when the time stamp coincides with the sampling timing or after the time stamp exceeds the sampling timing, and resets the integrated value. filter.   The decimation filter according to any one of claims 1 to 4, wherein the integration unit performs the integration up to the measurement timing immediately before the measurement timing exceeds the sampling timing.   The decimation filter according to claim 1, wherein the impulse response is finite and is expressed by a function.   The decimation filter according to claim 6, wherein the function is a linear function of time or a quadratic function of time. The measurement value is a count value of a pulse signal that is a signal under measurement,
The decimation filter according to claim 1, wherein a gate time used for obtaining the count value is defined by a reference signal. The measured value is a count value of a pulse signal that is a reference signal,
9. The decimation filter according to claim 1, wherein a gate time used for obtaining the count value is defined by a signal under measurement.   The decimation filter according to claim 8 or 9, wherein the time calculation unit uses a count value obtained by counting the reference signal or the signal under measurement as a time stamp. A decimation filter according to any one of claims 1 to 10,
A measurement apparatus that performs measurement using the decimation filter. A decimation filter according to any one of claims 8 to 10,
A measuring apparatus for measuring a frequency ratio between the signal under measurement and the reference signal using the decimation filter. A detection unit for detecting a physical quantity;
A physical quantity sensor comprising: the measurement device according to claim 11 or 12 to which a signal under measurement output from the detection unit is input.

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